All of lore.kernel.org
 help / color / mirror / Atom feed
From: Gregory CLEMENT <gregory.clement@free-electrons.com>
To: Richard Genoud <richard.genoud@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
	Alexandre Courbot <gnurou@gmail.com>,
	Andrew Lunn <andrew@lunn.ch>, Jason Cooper <jason@lakedaemon.net>,
	linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org,
	Mark Rutland <mark.rutland@arm.com>,
	Ralph Sennhauser <ralph.sennhauser@gmail.com>,
	Rob Herring <robh+dt@kernel.org>,
	Russell King <linux@armlinux.org.uk>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Thierry Reding <thierry.reding@gmail.com>
Subject: Re: [PATCHv2 2/2] gpio: mvebu: fix gpio bank registration when pwm is used
Date: Thu, 01 Jun 2017 16:57:47 +0200	[thread overview]
Message-ID: <87h8zzsql0.fsf@free-electrons.com> (raw)
In-Reply-To: <20170601121826.14685-3-richard.genoud@gmail.com> (Richard Genoud's message of "Thu, 1 Jun 2017 14:18:26 +0200")

Hi Richard,
 
 On jeu., juin 01 2017, Richard Genoud <richard.genoud@gmail.com> wrote:

> If more than one gpio bank has the "pwm" property, only one will be
> registered successfully, all the others will fail with:
> mvebu-gpio: probe of f1018140.gpio failed with error -17
>
> That's because in alloc_pwms(), the chip->base (aka "int pwm"), was not
> set (thus, ==0) ; and 0 is a meaningful start value in alloc_pwm().
> What was intended is mvpwm->chip->base = -1.
> Like that, the numbering will be done auto-magically
>
> Moreover, as the region might be already occupied by another pwm, we
> shouldn't force:
> mvpwm->chip->base = 0
> nor
> mvpwm->chip->base = id * MVEBU_MAX_GPIO_PER_BANK;
>
> Tested on clearfog-pro (Marvell 88F6828)
>
> Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
> Signed-off-by: Richard Genoud <richard.genoud@gmail.com>

Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Thanks,

Gregory


> ---
>  drivers/gpio/gpio-mvebu.c | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
> index cdef2c78cb3b..5104b6398139 100644
> --- a/drivers/gpio/gpio-mvebu.c
> +++ b/drivers/gpio/gpio-mvebu.c
> @@ -768,6 +768,13 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
>  	mvpwm->chip.dev = dev;
>  	mvpwm->chip.ops = &mvebu_pwm_ops;
>  	mvpwm->chip.npwm = mvchip->chip.ngpio;
> +	/*
> +	 * There may already be some PWM allocated, so we can't force
> +	 * mvpwm->chip.base to a fixed point like mvchip->chip.base.
> +	 * So, we let pwmchip_add() do the numbering and take the next free
> +	 * region.
> +	 */
> +	mvpwm->chip.base = -1;
>  
>  	spin_lock_init(&mvpwm->lock);
>  

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

WARNING: multiple messages have this Message-ID (diff)
From: gregory.clement@free-electrons.com (Gregory CLEMENT)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv2 2/2] gpio: mvebu: fix gpio bank registration when pwm is used
Date: Thu, 01 Jun 2017 16:57:47 +0200	[thread overview]
Message-ID: <87h8zzsql0.fsf@free-electrons.com> (raw)
In-Reply-To: <20170601121826.14685-3-richard.genoud@gmail.com> (Richard Genoud's message of "Thu, 1 Jun 2017 14:18:26 +0200")

Hi Richard,
 
 On jeu., juin 01 2017, Richard Genoud <richard.genoud@gmail.com> wrote:

> If more than one gpio bank has the "pwm" property, only one will be
> registered successfully, all the others will fail with:
> mvebu-gpio: probe of f1018140.gpio failed with error -17
>
> That's because in alloc_pwms(), the chip->base (aka "int pwm"), was not
> set (thus, ==0) ; and 0 is a meaningful start value in alloc_pwm().
> What was intended is mvpwm->chip->base = -1.
> Like that, the numbering will be done auto-magically
>
> Moreover, as the region might be already occupied by another pwm, we
> shouldn't force:
> mvpwm->chip->base = 0
> nor
> mvpwm->chip->base = id * MVEBU_MAX_GPIO_PER_BANK;
>
> Tested on clearfog-pro (Marvell 88F6828)
>
> Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
> Signed-off-by: Richard Genoud <richard.genoud@gmail.com>

Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>

Thanks,

Gregory


> ---
>  drivers/gpio/gpio-mvebu.c | 7 +++++++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c
> index cdef2c78cb3b..5104b6398139 100644
> --- a/drivers/gpio/gpio-mvebu.c
> +++ b/drivers/gpio/gpio-mvebu.c
> @@ -768,6 +768,13 @@ static int mvebu_pwm_probe(struct platform_device *pdev,
>  	mvpwm->chip.dev = dev;
>  	mvpwm->chip.ops = &mvebu_pwm_ops;
>  	mvpwm->chip.npwm = mvchip->chip.ngpio;
> +	/*
> +	 * There may already be some PWM allocated, so we can't force
> +	 * mvpwm->chip.base to a fixed point like mvchip->chip.base.
> +	 * So, we let pwmchip_add() do the numbering and take the next free
> +	 * region.
> +	 */
> +	mvpwm->chip.base = -1;
>  
>  	spin_lock_init(&mvpwm->lock);
>  

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

  reply	other threads:[~2017-06-01 14:57 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-06-01 12:18 [PATCHv2 0/2] gpio: mvebu: fixes for PWM/blink Richard Genoud
2017-06-01 12:18 ` Richard Genoud
2017-06-01 12:18 ` [PATCHv2 1/2] gpio: mvebu: fix blink counter register selection Richard Genoud
2017-06-01 12:18   ` Richard Genoud
2017-06-09  7:37   ` Linus Walleij
2017-06-09  7:37     ` Linus Walleij
2017-06-09  7:40     ` Richard Genoud
2017-06-09  7:40       ` Richard Genoud
2017-06-09  8:03     ` Ralph Sennhauser
2017-06-09  8:03       ` Ralph Sennhauser
2017-06-11 21:48       ` Linus Walleij
2017-06-11 21:48         ` Linus Walleij
2017-06-12  7:17         ` Ralph Sennhauser
2017-06-12  7:17           ` Ralph Sennhauser
2017-06-01 12:18 ` [PATCHv2 2/2] gpio: mvebu: fix gpio bank registration when pwm is used Richard Genoud
2017-06-01 12:18   ` Richard Genoud
2017-06-01 14:57   ` Gregory CLEMENT [this message]
2017-06-01 14:57     ` Gregory CLEMENT
2017-06-09  7:39   ` Linus Walleij
2017-06-09  7:39     ` Linus Walleij

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87h8zzsql0.fsf@free-electrons.com \
    --to=gregory.clement@free-electrons.com \
    --cc=andrew@lunn.ch \
    --cc=gnurou@gmail.com \
    --cc=jason@lakedaemon.net \
    --cc=linus.walleij@linaro.org \
    --cc=linux-arm-kernel@lists.infradead.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pwm@vger.kernel.org \
    --cc=linux@armlinux.org.uk \
    --cc=mark.rutland@arm.com \
    --cc=ralph.sennhauser@gmail.com \
    --cc=richard.genoud@gmail.com \
    --cc=robh+dt@kernel.org \
    --cc=sebastian.hesselbarth@gmail.com \
    --cc=thierry.reding@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.