[PATCH 0/6] drm/i915/dsi: subset of the cleanups from Hans

[PATCH 0/6] drm/i915/dsi: subset of the cleanups from Hans

[Jani Nikula]

Hans, I don't know what's going on, but patchwork didn't get your series
[1] or patch [2] although they hit the list, and they didn't go through
CI because of that. I recall this happening before with your patches.

I picked up the patches from the front of the series and the separate
single patch that were reviewed and ready and applied cleanly, and I'm
resending them to get CI. I intend to push them as soon as I get
results. Please rebase the rest on top.

Thanks for the patches and review.

BR,
Jani.


[1] http://mid.mail-archive.com/20170220140845.1714-1-hdegoede@redhat.com
[2] http://mid.mail-archive.com/20170227102232.10338-1-hdegoede@redhat.com

Hans de Goede (6):
  drm/i915/dsi: Move calling of wait_for_dsi_fifo_empty to
    mipi_exec_send_packet
  drm/i915/dsi: Merge intel_dsi_disable/enable into their respective
    callers
  drm/i915/dsi: Add intel_dsi_unprepare() helper
  drm/i915/dsi: Move intel_dsi_clear_device_ready()
  drm/i915/dsi: Make intel_dsi_enable/disable directly exec VBT
    sequences
  drm/i915/dsi: VLV/CHT Only wait for LP00 on MIPI PORT A

 drivers/gpu/drm/i915/intel_dsi.c           | 219 ++++++++++++++---------------
 drivers/gpu/drm/i915/intel_dsi.h           |   5 +
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c |  45 +-----
 3 files changed, 113 insertions(+), 156 deletions(-)

-- 
2.1.4

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[PATCH 1/6] drm/i915/dsi: Move calling of wait_for_dsi_fifo_empty to mipi_exec_send_packet

[Jani Nikula]

From: Hans de Goede <hdegoede@redhat.com>

Instead of calling wait_for_dsi_fifo_empty on all dsi ports after calling
a drm_panel_foo helper which calls VBT sequences, move it to the VBT
mipi_exec_send_packet helper, which is the one VBT instruction which
actually puts data in the fifo.

This results in a nice cleanup making it clearer what all the steps on
intel_dsi_enable / disable are and this also makes the VBT code properly
wait till a command has actually been send before executing the next
steps (typically a delay) in the VBT sequence.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c           | 12 +-----------
 drivers/gpu/drm/i915/intel_dsi.h           |  2 ++
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c |  2 ++
 3 files changed, 5 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index d7ffb9ac3c8a..f4ad96693c1e 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -80,7 +80,7 @@ enum mipi_dsi_pixel_format pixel_format_from_register_bits(u32 fmt)
 	}
 }
 
-static void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port)
+void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port)
 {
 	struct drm_encoder *encoder = &intel_dsi->base.base;
 	struct drm_device *dev = encoder->dev;
@@ -525,9 +525,6 @@ static void intel_dsi_enable(struct intel_encoder *encoder)
 
 		drm_panel_enable(intel_dsi->panel);
 
-		for_each_dsi_port(port, intel_dsi->ports)
-			wait_for_dsi_fifo_empty(intel_dsi, port);
-
 		intel_dsi_port_enable(encoder);
 	}
 
@@ -543,7 +540,6 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
-	enum port port;
 	u32 val;
 
 	DRM_DEBUG_KMS("\n");
@@ -588,9 +584,6 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
 
 	drm_panel_prepare(intel_dsi->panel);
 
-	for_each_dsi_port(port, intel_dsi->ports)
-		wait_for_dsi_fifo_empty(intel_dsi, port);
-
 	/* Enable port in pre-enable phase itself because as per hw team
 	 * recommendation, port should be enabled befor plane & pipe */
 	intel_dsi_enable(encoder);
@@ -672,9 +665,6 @@ static void intel_dsi_disable(struct intel_encoder *encoder)
 	/* if disable packets are sent before sending shutdown packet then in
 	 * some next enable sequence send turn on packet error is observed */
 	drm_panel_disable(intel_dsi->panel);
-
-	for_each_dsi_port(port, intel_dsi->ports)
-		wait_for_dsi_fifo_empty(intel_dsi, port);
 }
 
 static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index 5967ea6d6045..d56782396f60 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -130,6 +130,8 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
 	return container_of(encoder, struct intel_dsi, base.base);
 }
 
+void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
+
 bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
 int intel_compute_dsi_pll(struct intel_encoder *encoder,
 			  struct intel_crtc_state *config);
diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 84b3683c1f46..995f72df5472 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -192,6 +192,8 @@ static const u8 *mipi_exec_send_packet(struct intel_dsi *intel_dsi,
 		break;
 	}
 
+	wait_for_dsi_fifo_empty(intel_dsi, port);
+
 out:
 	data += len;
 
-- 
2.1.4

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[PATCH 2/6] drm/i915/dsi: Merge intel_dsi_disable/enable into their respective callers

[Jani Nikula]

From: Hans de Goede <hdegoede@redhat.com>

intel_dsi_disable/enable only have one caller, merge them into their
respective callers.

Change msleep(2) into usleep_range(2000, 5000) to make checkpatch happy,
otherwise no functional changes.

The main advantage of this change is that it makes it easier to
follow all the steps of the panel enable / disable sequence when
reading the code.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c | 108 ++++++++++++++++-----------------------
 1 file changed, 44 insertions(+), 64 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index f4ad96693c1e..86f9b3331505 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -505,32 +505,6 @@ static void intel_dsi_port_disable(struct intel_encoder *encoder)
 	}
 }
 
-static void intel_dsi_enable(struct intel_encoder *encoder)
-{
-	struct drm_device *dev = encoder->base.dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
-	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
-	enum port port;
-
-	DRM_DEBUG_KMS("\n");
-
-	if (is_cmd_mode(intel_dsi)) {
-		for_each_dsi_port(port, intel_dsi->ports)
-			I915_WRITE(MIPI_MAX_RETURN_PKT_SIZE(port), 8 * 4);
-	} else {
-		msleep(20); /* XXX */
-		for_each_dsi_port(port, intel_dsi->ports)
-			dpi_send_cmd(intel_dsi, TURN_ON, false, port);
-		msleep(100);
-
-		drm_panel_enable(intel_dsi->panel);
-
-		intel_dsi_port_enable(encoder);
-	}
-
-	intel_panel_enable_backlight(intel_dsi->attached_connector);
-}
-
 static void intel_dsi_prepare(struct intel_encoder *intel_encoder,
 			      struct intel_crtc_state *pipe_config);
 
@@ -540,6 +514,7 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	enum port port;
 	u32 val;
 
 	DRM_DEBUG_KMS("\n");
@@ -586,7 +561,21 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
 
 	/* Enable port in pre-enable phase itself because as per hw team
 	 * recommendation, port should be enabled befor plane & pipe */
-	intel_dsi_enable(encoder);
+	if (is_cmd_mode(intel_dsi)) {
+		for_each_dsi_port(port, intel_dsi->ports)
+			I915_WRITE(MIPI_MAX_RETURN_PKT_SIZE(port), 8 * 4);
+	} else {
+		msleep(20); /* XXX */
+		for_each_dsi_port(port, intel_dsi->ports)
+			dpi_send_cmd(intel_dsi, TURN_ON, false, port);
+		msleep(100);
+
+		drm_panel_enable(intel_dsi->panel);
+
+		intel_dsi_port_enable(encoder);
+	}
+
+	intel_panel_enable_backlight(intel_dsi->attached_connector);
 }
 
 static void intel_dsi_enable_nop(struct intel_encoder *encoder,
@@ -631,42 +620,6 @@ static void intel_dsi_pre_disable(struct intel_encoder *encoder,
 	}
 }
 
-static void intel_dsi_disable(struct intel_encoder *encoder)
-{
-	struct drm_device *dev = encoder->base.dev;
-	struct drm_i915_private *dev_priv = to_i915(dev);
-	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
-	enum port port;
-	u32 temp;
-
-	DRM_DEBUG_KMS("\n");
-
-	if (is_vid_mode(intel_dsi)) {
-		for_each_dsi_port(port, intel_dsi->ports)
-			wait_for_dsi_fifo_empty(intel_dsi, port);
-
-		intel_dsi_port_disable(encoder);
-		msleep(2);
-	}
-
-	for_each_dsi_port(port, intel_dsi->ports) {
-		/* Panel commands can be sent when clock is in LP11 */
-		I915_WRITE(MIPI_DEVICE_READY(port), 0x0);
-
-		intel_dsi_reset_clocks(encoder, port);
-		I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);
-
-		temp = I915_READ(MIPI_DSI_FUNC_PRG(port));
-		temp &= ~VID_MODE_FORMAT_MASK;
-		I915_WRITE(MIPI_DSI_FUNC_PRG(port), temp);
-
-		I915_WRITE(MIPI_DEVICE_READY(port), 0x1);
-	}
-	/* if disable packets are sent before sending shutdown packet then in
-	 * some next enable sequence send turn on packet error is observed */
-	drm_panel_disable(intel_dsi->panel);
-}
-
 static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
@@ -716,11 +669,38 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder,
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
 	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	enum port port;
 	u32 val;
 
 	DRM_DEBUG_KMS("\n");
 
-	intel_dsi_disable(encoder);
+	if (is_vid_mode(intel_dsi)) {
+		for_each_dsi_port(port, intel_dsi->ports)
+			wait_for_dsi_fifo_empty(intel_dsi, port);
+
+		intel_dsi_port_disable(encoder);
+		usleep_range(2000, 5000);
+	}
+
+	for_each_dsi_port(port, intel_dsi->ports) {
+		/* Panel commands can be sent when clock is in LP11 */
+		I915_WRITE(MIPI_DEVICE_READY(port), 0x0);
+
+		intel_dsi_reset_clocks(encoder, port);
+		I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);
+
+		val = I915_READ(MIPI_DSI_FUNC_PRG(port));
+		val &= ~VID_MODE_FORMAT_MASK;
+		I915_WRITE(MIPI_DSI_FUNC_PRG(port), val);
+
+		I915_WRITE(MIPI_DEVICE_READY(port), 0x1);
+	}
+
+	/*
+	 * if disable packets are sent before sending shutdown packet then in
+	 * some next enable sequence send turn on packet error is observed
+	 */
+	drm_panel_disable(intel_dsi->panel);
 
 	intel_dsi_clear_device_ready(encoder);
 
-- 
2.1.4

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[PATCH 3/6] drm/i915/dsi: Add intel_dsi_unprepare() helper

[Jani Nikula]

From: Hans de Goede <hdegoede@redhat.com>

The enable path has an intel_dsi_prepare() helper which prepares various
registers for the mode-set. Move the code undoing this to a new
intel_dsi_unprepare() helper function for better symmetry between the
enable and disable paths. No functional changes.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c | 37 ++++++++++++++++++++++++-------------
 1 file changed, 24 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 86f9b3331505..3b46c619fd90 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -507,6 +507,7 @@ static void intel_dsi_port_disable(struct intel_encoder *encoder)
 
 static void intel_dsi_prepare(struct intel_encoder *intel_encoder,
 			      struct intel_crtc_state *pipe_config);
+static void intel_dsi_unprepare(struct intel_encoder *encoder);
 
 static void intel_dsi_pre_enable(struct intel_encoder *encoder,
 				 struct intel_crtc_state *pipe_config,
@@ -682,19 +683,7 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder,
 		usleep_range(2000, 5000);
 	}
 
-	for_each_dsi_port(port, intel_dsi->ports) {
-		/* Panel commands can be sent when clock is in LP11 */
-		I915_WRITE(MIPI_DEVICE_READY(port), 0x0);
-
-		intel_dsi_reset_clocks(encoder, port);
-		I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);
-
-		val = I915_READ(MIPI_DSI_FUNC_PRG(port));
-		val &= ~VID_MODE_FORMAT_MASK;
-		I915_WRITE(MIPI_DSI_FUNC_PRG(port), val);
-
-		I915_WRITE(MIPI_DEVICE_READY(port), 0x1);
-	}
+	intel_dsi_unprepare(encoder);
 
 	/*
 	 * if disable packets are sent before sending shutdown packet then in
@@ -1302,6 +1291,28 @@ static void intel_dsi_prepare(struct intel_encoder *intel_encoder,
 	}
 }
 
+static void intel_dsi_unprepare(struct intel_encoder *encoder)
+{
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	enum port port;
+	u32 val;
+
+	for_each_dsi_port(port, intel_dsi->ports) {
+		/* Panel commands can be sent when clock is in LP11 */
+		I915_WRITE(MIPI_DEVICE_READY(port), 0x0);
+
+		intel_dsi_reset_clocks(encoder, port);
+		I915_WRITE(MIPI_EOT_DISABLE(port), CLOCKSTOP);
+
+		val = I915_READ(MIPI_DSI_FUNC_PRG(port));
+		val &= ~VID_MODE_FORMAT_MASK;
+		I915_WRITE(MIPI_DSI_FUNC_PRG(port), val);
+
+		I915_WRITE(MIPI_DEVICE_READY(port), 0x1);
+	}
+}
+
 static int intel_dsi_get_modes(struct drm_connector *connector)
 {
 	struct intel_connector *intel_connector = to_intel_connector(connector);
-- 
2.1.4

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[PATCH 4/6] drm/i915/dsi: Move intel_dsi_clear_device_ready()

[Jani Nikula]

From: Hans de Goede <hdegoede@redhat.com>

Move the intel_dsi_clear_device_ready() function to higher up in
intel_dsi.c this pairs it with intel_dsi_device_ready(); and pairs
intel_dsi_*enable* with intel_dsi_*disable without
intel_dsi_clear_device_ready() sitting in the middle of them.

This commit purely moves code around, it does not make any
changes what-so-ever.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c | 86 ++++++++++++++++++++--------------------
 1 file changed, 43 insertions(+), 43 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 3b46c619fd90..e6a782ec78a6 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -433,6 +433,49 @@ static void intel_dsi_device_ready(struct intel_encoder *encoder)
 		bxt_dsi_device_ready(encoder);
 }
 
+static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
+{
+	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+	enum port port;
+
+	DRM_DEBUG_KMS("\n");
+	for_each_dsi_port(port, intel_dsi->ports) {
+		/* Common bit for both MIPI Port A & MIPI Port C on VLV/CHV */
+		i915_reg_t port_ctrl = IS_GEN9_LP(dev_priv) ?
+			BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(PORT_A);
+		u32 val;
+
+		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
+							ULPS_STATE_ENTER);
+		usleep_range(2000, 2500);
+
+		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
+							ULPS_STATE_EXIT);
+		usleep_range(2000, 2500);
+
+		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
+							ULPS_STATE_ENTER);
+		usleep_range(2000, 2500);
+
+		/* Wait till Clock lanes are in LP-00 state for MIPI Port A
+		 * only. MIPI Port C has no similar bit for checking
+		 */
+		if (intel_wait_for_register(dev_priv,
+					    port_ctrl, AFE_LATCHOUT, 0,
+					    30))
+			DRM_ERROR("DSI LP not going Low\n");
+
+		/* Disable MIPI PHY transparent latch */
+		val = I915_READ(port_ctrl);
+		I915_WRITE(port_ctrl, val & ~LP_OUTPUT_HOLD);
+		usleep_range(1000, 1500);
+
+		I915_WRITE(MIPI_DEVICE_READY(port), 0x00);
+		usleep_range(2000, 2500);
+	}
+}
+
 static void intel_dsi_port_enable(struct intel_encoder *encoder)
 {
 	struct drm_device *dev = encoder->base.dev;
@@ -621,49 +664,6 @@ static void intel_dsi_pre_disable(struct intel_encoder *encoder,
 	}
 }
 
-static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
-{
-	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-	struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
-	enum port port;
-
-	DRM_DEBUG_KMS("\n");
-	for_each_dsi_port(port, intel_dsi->ports) {
-		/* Common bit for both MIPI Port A & MIPI Port C on VLV/CHV */
-		i915_reg_t port_ctrl = IS_GEN9_LP(dev_priv) ?
-			BXT_MIPI_PORT_CTRL(port) : MIPI_PORT_CTRL(PORT_A);
-		u32 val;
-
-		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
-							ULPS_STATE_ENTER);
-		usleep_range(2000, 2500);
-
-		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
-							ULPS_STATE_EXIT);
-		usleep_range(2000, 2500);
-
-		I915_WRITE(MIPI_DEVICE_READY(port), DEVICE_READY |
-							ULPS_STATE_ENTER);
-		usleep_range(2000, 2500);
-
-		/* Wait till Clock lanes are in LP-00 state for MIPI Port A
-		 * only. MIPI Port C has no similar bit for checking
-		 */
-		if (intel_wait_for_register(dev_priv,
-					    port_ctrl, AFE_LATCHOUT, 0,
-					    30))
-			DRM_ERROR("DSI LP not going Low\n");
-
-		/* Disable MIPI PHY transparent latch */
-		val = I915_READ(port_ctrl);
-		I915_WRITE(port_ctrl, val & ~LP_OUTPUT_HOLD);
-		usleep_range(1000, 1500);
-
-		I915_WRITE(MIPI_DEVICE_READY(port), 0x00);
-		usleep_range(2000, 2500);
-	}
-}
-
 static void intel_dsi_post_disable(struct intel_encoder *encoder,
 				   struct intel_crtc_state *pipe_config,
 				   struct drm_connector_state *conn_state)
-- 
2.1.4

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[PATCH 5/6] drm/i915/dsi: Make intel_dsi_enable/disable directly exec VBT sequences

[Jani Nikula]

From: Hans de Goede <hdegoede@redhat.com>

The drm_panel_enable/disable and drm_panel_prepare/unprepare calls are
not fine grained enough to abstract all the different steps we need to
take (and VBT sequences we need to exec) properly. So simply remove the
panel _enable/disable and prepare/unprepare callbacks and instead
export intel_dsi_exec_vbt_sequence() from intel_dsi_panel_vbt.c
and call that from intel_dsi_enable/disable().

No functional changes.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c           | 14 +++++++---
 drivers/gpu/drm/i915/intel_dsi.h           |  3 +++
 drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 43 ++----------------------------
 3 files changed, 15 insertions(+), 45 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index e6a782ec78a6..877577d885c1 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -601,7 +601,10 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
 	/* put device in ready state */
 	intel_dsi_device_ready(encoder);
 
-	drm_panel_prepare(intel_dsi->panel);
+	intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_ASSERT_RESET);
+	intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_ON);
+	intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DEASSERT_RESET);
+	intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_INIT_OTP);
 
 	/* Enable port in pre-enable phase itself because as per hw team
 	 * recommendation, port should be enabled befor plane & pipe */
@@ -614,7 +617,8 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
 			dpi_send_cmd(intel_dsi, TURN_ON, false, port);
 		msleep(100);
 
-		drm_panel_enable(intel_dsi->panel);
+		intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DISPLAY_ON);
+		intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_ON);
 
 		intel_dsi_port_enable(encoder);
 	}
@@ -689,7 +693,8 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder,
 	 * if disable packets are sent before sending shutdown packet then in
 	 * some next enable sequence send turn on packet error is observed
 	 */
-	drm_panel_disable(intel_dsi->panel);
+	intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_OFF);
+	intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_DISPLAY_OFF);
 
 	intel_dsi_clear_device_ready(encoder);
 
@@ -714,7 +719,8 @@ static void intel_dsi_post_disable(struct intel_encoder *encoder,
 		I915_WRITE(DSPCLK_GATE_D, val);
 	}
 
-	drm_panel_unprepare(intel_dsi->panel);
+	intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_ASSERT_RESET);
+	intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_OFF);
 
 	msleep(intel_dsi->panel_off_delay);
 
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index d56782396f60..548649158abd 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -132,6 +132,9 @@ static inline struct intel_dsi *enc_to_intel_dsi(struct drm_encoder *encoder)
 
 void wait_for_dsi_fifo_empty(struct intel_dsi *intel_dsi, enum port port);
 
+void intel_dsi_exec_vbt_sequence(struct intel_dsi *intel_dsi,
+				 enum mipi_seq seq_id);
+
 bool intel_dsi_pll_is_enabled(struct drm_i915_private *dev_priv);
 int intel_compute_dsi_pll(struct intel_encoder *encoder,
 			  struct intel_crtc_state *config);
diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 995f72df5472..0ce10868470d 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -426,10 +426,9 @@ static const char *sequence_name(enum mipi_seq seq_id)
 		return "(unknown)";
 }
 
-static void generic_exec_sequence(struct drm_panel *panel, enum mipi_seq seq_id)
+void intel_dsi_exec_vbt_sequence(struct intel_dsi *intel_dsi,
+				 enum mipi_seq seq_id)
 {
-	struct vbt_panel *vbt_panel = to_vbt_panel(panel);
-	struct intel_dsi *intel_dsi = vbt_panel->intel_dsi;
 	struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev);
 	const u8 *data;
 	fn_mipi_elem_exec mipi_elem_exec;
@@ -493,40 +492,6 @@ static void generic_exec_sequence(struct drm_panel *panel, enum mipi_seq seq_id)
 	}
 }
 
-static int vbt_panel_prepare(struct drm_panel *panel)
-{
-	generic_exec_sequence(panel, MIPI_SEQ_ASSERT_RESET);
-	generic_exec_sequence(panel, MIPI_SEQ_POWER_ON);
-	generic_exec_sequence(panel, MIPI_SEQ_DEASSERT_RESET);
-	generic_exec_sequence(panel, MIPI_SEQ_INIT_OTP);
-
-	return 0;
-}
-
-static int vbt_panel_unprepare(struct drm_panel *panel)
-{
-	generic_exec_sequence(panel, MIPI_SEQ_ASSERT_RESET);
-	generic_exec_sequence(panel, MIPI_SEQ_POWER_OFF);
-
-	return 0;
-}
-
-static int vbt_panel_enable(struct drm_panel *panel)
-{
-	generic_exec_sequence(panel, MIPI_SEQ_DISPLAY_ON);
-	generic_exec_sequence(panel, MIPI_SEQ_BACKLIGHT_ON);
-
-	return 0;
-}
-
-static int vbt_panel_disable(struct drm_panel *panel)
-{
-	generic_exec_sequence(panel, MIPI_SEQ_BACKLIGHT_OFF);
-	generic_exec_sequence(panel, MIPI_SEQ_DISPLAY_OFF);
-
-	return 0;
-}
-
 static int vbt_panel_get_modes(struct drm_panel *panel)
 {
 	struct vbt_panel *vbt_panel = to_vbt_panel(panel);
@@ -550,10 +515,6 @@ static int vbt_panel_get_modes(struct drm_panel *panel)
 }
 
 static const struct drm_panel_funcs vbt_panel_funcs = {
-	.disable = vbt_panel_disable,
-	.unprepare = vbt_panel_unprepare,
-	.prepare = vbt_panel_prepare,
-	.enable = vbt_panel_enable,
 	.get_modes = vbt_panel_get_modes,
 };
 
-- 
2.1.4

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[PATCH 6/6] drm/i915/dsi: VLV/CHT Only wait for LP00 on MIPI PORT A

[Jani Nikula]

From: Hans de Goede <hdegoede@redhat.com>

On some devices only MIPI PORT C is used, in this case checking the
MIPI PORT A CTRL AFE_LATCHOUT bit (there is no such bit for PORT C
on VLV/CHT) will result in false positive "DSI LP not going Low" errors
as this checks the PORT A clk status.

In case both ports are used we have already checked the AFE_LATCHOUT
bit when going through the for_each_dsi_port() loop for PORT A and
checking the same bit again for PORT C is a no-op.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=97061
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/intel_dsi.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 877577d885c1..9ed494809b06 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -458,10 +458,12 @@ static void intel_dsi_clear_device_ready(struct intel_encoder *encoder)
 							ULPS_STATE_ENTER);
 		usleep_range(2000, 2500);
 
-		/* Wait till Clock lanes are in LP-00 state for MIPI Port A
-		 * only. MIPI Port C has no similar bit for checking
+		/*
+		 * On VLV/CHV, wait till Clock lanes are in LP-00 state for MIPI
+		 * Port A only. MIPI Port C has no similar bit for checking.
 		 */
-		if (intel_wait_for_register(dev_priv,
+		if ((IS_GEN9_LP(dev_priv) || port == PORT_A) &&
+		    intel_wait_for_register(dev_priv,
 					    port_ctrl, AFE_LATCHOUT, 0,
 					    30))
 			DRM_ERROR("DSI LP not going Low\n");
-- 
2.1.4

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Re: [PATCH 0/6] drm/i915/dsi: subset of the cleanups from Hans

[Hans de Goede]

Hi,

On 28-02-17 10:26, Jani Nikula wrote:
> Hans, I don't know what's going on, but patchwork didn't get your series
> [1] or patch [2] although they hit the list, and they didn't go through
> CI because of that. I recall this happening before with your patches.
>
> I picked up the patches from the front of the series and the separate
> single patch that were reviewed and ready and applied cleanly, and I'm
> resending them to get CI. I intend to push them as soon as I get
> results. Please rebase the rest on top.

Done (rebased on top) I will send out v2 of the remaining patches
as soon as I've run some local basic functionality tests.

Regards,

Hans



>
> Thanks for the patches and review.
>
> BR,
> Jani.
>
>
> [1] http://mid.mail-archive.com/20170220140845.1714-1-hdegoede@redhat.com
> [2] http://mid.mail-archive.com/20170227102232.10338-1-hdegoede@redhat.com
>
> Hans de Goede (6):
>   drm/i915/dsi: Move calling of wait_for_dsi_fifo_empty to
>     mipi_exec_send_packet
>   drm/i915/dsi: Merge intel_dsi_disable/enable into their respective
>     callers
>   drm/i915/dsi: Add intel_dsi_unprepare() helper
>   drm/i915/dsi: Move intel_dsi_clear_device_ready()
>   drm/i915/dsi: Make intel_dsi_enable/disable directly exec VBT
>     sequences
>   drm/i915/dsi: VLV/CHT Only wait for LP00 on MIPI PORT A
>
>  drivers/gpu/drm/i915/intel_dsi.c           | 219 ++++++++++++++---------------
>  drivers/gpu/drm/i915/intel_dsi.h           |   5 +
>  drivers/gpu/drm/i915/intel_dsi_panel_vbt.c |  45 +-----
>  3 files changed, 113 insertions(+), 156 deletions(-)
>
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Re: [PATCH 0/6] drm/i915/dsi: subset of the cleanups from Hans

[Jani Nikula]

On Tue, 28 Feb 2017, Hans de Goede <hdegoede@redhat.com> wrote:
> Hi,
>
> On 28-02-17 10:26, Jani Nikula wrote:
>> Hans, I don't know what's going on, but patchwork didn't get your series
>> [1] or patch [2] although they hit the list, and they didn't go through
>> CI because of that. I recall this happening before with your patches.
>>
>> I picked up the patches from the front of the series and the separate
>> single patch that were reviewed and ready and applied cleanly, and I'm
>> resending them to get CI. I intend to push them as soon as I get
>> results. Please rebase the rest on top.
>
> Done (rebased on top) I will send out v2 of the remaining patches
> as soon as I've run some local basic functionality tests.

Oh, btw, I'm about to push everything from Madhav's series [1] except
patch 3 that conflicts with this. I don't think it should conflict, but
please hold off for a little bit so we don't get an extra round.

Thanks,
Jani.


[1] http://mid.mail-archive.com/1487335415-14766-1-git-send-email-madhav.chauhan@intel.com


>
> Regards,
>
> Hans
>
>
>
>>
>> Thanks for the patches and review.
>>
>> BR,
>> Jani.
>>
>>
>> [1] http://mid.mail-archive.com/20170220140845.1714-1-hdegoede@redhat.com
>> [2] http://mid.mail-archive.com/20170227102232.10338-1-hdegoede@redhat.com
>>
>> Hans de Goede (6):
>>   drm/i915/dsi: Move calling of wait_for_dsi_fifo_empty to
>>     mipi_exec_send_packet
>>   drm/i915/dsi: Merge intel_dsi_disable/enable into their respective
>>     callers
>>   drm/i915/dsi: Add intel_dsi_unprepare() helper
>>   drm/i915/dsi: Move intel_dsi_clear_device_ready()
>>   drm/i915/dsi: Make intel_dsi_enable/disable directly exec VBT
>>     sequences
>>   drm/i915/dsi: VLV/CHT Only wait for LP00 on MIPI PORT A
>>
>>  drivers/gpu/drm/i915/intel_dsi.c           | 219 ++++++++++++++---------------
>>  drivers/gpu/drm/i915/intel_dsi.h           |   5 +
>>  drivers/gpu/drm/i915/intel_dsi_panel_vbt.c |  45 +-----
>>  3 files changed, 113 insertions(+), 156 deletions(-)
>>

-- 
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Re: [PATCH 0/6] drm/i915/dsi: subset of the cleanups from Hans

[Hans de Goede]

Hi,

On 28-02-17 10:50, Jani Nikula wrote:
> On Tue, 28 Feb 2017, Hans de Goede <hdegoede@redhat.com> wrote:
>> Hi,
>>
>> On 28-02-17 10:26, Jani Nikula wrote:
>>> Hans, I don't know what's going on, but patchwork didn't get your series
>>> [1] or patch [2] although they hit the list, and they didn't go through
>>> CI because of that. I recall this happening before with your patches.
>>>
>>> I picked up the patches from the front of the series and the separate
>>> single patch that were reviewed and ready and applied cleanly, and I'm
>>> resending them to get CI. I intend to push them as soon as I get
>>> results. Please rebase the rest on top.
>>
>> Done (rebased on top) I will send out v2 of the remaining patches
>> as soon as I've run some local basic functionality tests.
>
> Oh, btw, I'm about to push everything from Madhav's series [1] except
> patch 3 that conflicts with this. I don't think it should conflict, but
> please hold off for a little bit so we don't get an extra round.

Ok I will wait a bit, rebase , re-test and then send v2 after you've pushed
those.

Regards,

Hans






>
> Thanks,
> Jani.
>
>
> [1] http://mid.mail-archive.com/1487335415-14766-1-git-send-email-madhav.chauhan@intel.com
>
>
>>
>> Regards,
>>
>> Hans
>>
>>
>>
>>>
>>> Thanks for the patches and review.
>>>
>>> BR,
>>> Jani.
>>>
>>>
>>> [1] http://mid.mail-archive.com/20170220140845.1714-1-hdegoede@redhat.com
>>> [2] http://mid.mail-archive.com/20170227102232.10338-1-hdegoede@redhat.com
>>>
>>> Hans de Goede (6):
>>>   drm/i915/dsi: Move calling of wait_for_dsi_fifo_empty to
>>>     mipi_exec_send_packet
>>>   drm/i915/dsi: Merge intel_dsi_disable/enable into their respective
>>>     callers
>>>   drm/i915/dsi: Add intel_dsi_unprepare() helper
>>>   drm/i915/dsi: Move intel_dsi_clear_device_ready()
>>>   drm/i915/dsi: Make intel_dsi_enable/disable directly exec VBT
>>>     sequences
>>>   drm/i915/dsi: VLV/CHT Only wait for LP00 on MIPI PORT A
>>>
>>>  drivers/gpu/drm/i915/intel_dsi.c           | 219 ++++++++++++++---------------
>>>  drivers/gpu/drm/i915/intel_dsi.h           |   5 +
>>>  drivers/gpu/drm/i915/intel_dsi_panel_vbt.c |  45 +-----
>>>  3 files changed, 113 insertions(+), 156 deletions(-)
>>>
>
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✗ Fi.CI.BAT: failure for drm/i915/dsi: subset of the cleanups from Hans

[Patchwork]

== Series Details ==

Series: drm/i915/dsi: subset of the cleanups from Hans
URL   : https://patchwork.freedesktop.org/series/20361/
State : failure

== Summary ==

Series 20361v1 drm/i915/dsi: subset of the cleanups from Hans
https://patchwork.freedesktop.org/api/1.0/series/20361/revisions/1/mbox/

Test gem_exec_flush:
        Subgroup basic-batch-kernel-default-uc:
                pass       -> FAIL       (fi-snb-2600)
Test gem_exec_parallel:
        Subgroup basic:
                pass       -> DMESG-WARN (fi-skl-6700hq)

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11 
fi-bsw-n3050     total:278  pass:239  dwarn:0   dfail:0   fail:0   skip:39 
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19 
fi-bxt-t5700     total:108  pass:95   dwarn:0   dfail:0   fail:0   skip:12 
fi-byt-j1900     total:278  pass:251  dwarn:0   dfail:0   fail:0   skip:27 
fi-byt-n2820     total:278  pass:247  dwarn:0   dfail:0   fail:0   skip:31 
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50 
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
fi-skl-6700hq    total:278  pass:260  dwarn:1   dfail:0   fail:0   skip:17 
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18 
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28 
fi-snb-2600      total:278  pass:248  dwarn:0   dfail:0   fail:1   skip:29 

1a8bd0fb40e5d02f827f925b7702ed6f64fadce2 drm-tip: 2017y-02m-27d-22h-04m-19s UTC integration manifest
be04e28 drm/i915/dsi: VLV/CHT Only wait for LP00 on MIPI PORT A
87eca4a drm/i915/dsi: Make intel_dsi_enable/disable directly exec VBT sequences
b546679 drm/i915/dsi: Move intel_dsi_clear_device_ready()
f899715 drm/i915/dsi: Add intel_dsi_unprepare() helper
a91757c drm/i915/dsi: Merge intel_dsi_disable/enable into their respective callers
8674908 drm/i915/dsi: Move calling of wait_for_dsi_fifo_empty to mipi_exec_send_packet

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3996/
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Re: ✗ Fi.CI.BAT: failure for drm/i915/dsi: subset of the cleanups from Hans

[Jani Nikula]

On Tue, 28 Feb 2017, Patchwork <patchwork@emeril.freedesktop.org> wrote:
> == Series Details ==
>
> Series: drm/i915/dsi: subset of the cleanups from Hans
> URL   : https://patchwork.freedesktop.org/series/20361/
> State : failure
>
> == Summary ==
>
> Series 20361v1 drm/i915/dsi: subset of the cleanups from Hans
> https://patchwork.freedesktop.org/api/1.0/series/20361/revisions/1/mbox/
>
> Test gem_exec_flush:
>         Subgroup basic-batch-kernel-default-uc:
>                 pass       -> FAIL       (fi-snb-2600)
> Test gem_exec_parallel:
>         Subgroup basic:
>                 pass       -> DMESG-WARN (fi-skl-6700hq)

This looks bad (BUG: spinlock already unlocked on CPU#6,
gem_exec_parall/6645) but was definitely not caused by this series
(which is strictly DSI only, which is mutually exclusive with SKL).

Pushed the lot, thanks for the patches and review.

BR,
Jani.


>
> fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11 
> fi-bsw-n3050     total:278  pass:239  dwarn:0   dfail:0   fail:0   skip:39 
> fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19 
> fi-bxt-t5700     total:108  pass:95   dwarn:0   dfail:0   fail:0   skip:12 
> fi-byt-j1900     total:278  pass:251  dwarn:0   dfail:0   fail:0   skip:27 
> fi-byt-n2820     total:278  pass:247  dwarn:0   dfail:0   fail:0   skip:31 
> fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
> fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16 
> fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50 
> fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
> fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
> fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18 
> fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
> fi-skl-6700hq    total:278  pass:260  dwarn:1   dfail:0   fail:0   skip:17 
> fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18 
> fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10 
> fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28 
> fi-snb-2600      total:278  pass:248  dwarn:0   dfail:0   fail:1   skip:29 
>
> 1a8bd0fb40e5d02f827f925b7702ed6f64fadce2 drm-tip: 2017y-02m-27d-22h-04m-19s UTC integration manifest
> be04e28 drm/i915/dsi: VLV/CHT Only wait for LP00 on MIPI PORT A
> 87eca4a drm/i915/dsi: Make intel_dsi_enable/disable directly exec VBT sequences
> b546679 drm/i915/dsi: Move intel_dsi_clear_device_ready()
> f899715 drm/i915/dsi: Add intel_dsi_unprepare() helper
> a91757c drm/i915/dsi: Merge intel_dsi_disable/enable into their respective callers
> 8674908 drm/i915/dsi: Move calling of wait_for_dsi_fifo_empty to mipi_exec_send_packet
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_3996/

-- 
Jani Nikula, Intel Open Source Technology Center
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