From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Gabor Juhos <j4g8y7@gmail.com>
Cc: Mark Brown <broonie@kernel.org>,
Manivannan Sadhasivam <mani@kernel.org>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Varadarajan Narayanan <quic_varada@quicinc.com>,
Md Sadre Alam <quic_mdalam@quicinc.com>,
Sricharan Ramabadhran <quic_srichara@quicinc.com>,
linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/2] mtd: nand: qpic-common: add defines for ECC_MODE values
Date: Wed, 02 Jul 2025 17:57:57 +0200 [thread overview]
Message-ID: <87ikkamvp6.fsf@bootlin.com> (raw)
In-Reply-To: <20250702-qpic-snand-8bit-ecc-v2-1-ae2c17a30bb7@gmail.com> (Gabor Juhos's message of "Wed, 02 Jul 2025 14:35:23 +0200")
Hi Gabor,
On 02/07/2025 at 14:35:23 +02, Gabor Juhos <j4g8y7@gmail.com> wrote:
> Add defines for the values of the ECC_MODE field of the NAND_DEV0_ECC_CFG
> register and change both the 'qcom-nandc' and 'spi-qpic-snand' drivers to
> use those instead of magic numbers.
>
> No functional changes. This is in preparation for adding 8 bit ECC strength
> support for the 'spi-qpic-snand' driver.
>
> Reviewed-by: Md Sadre Alam <quic_mdalam@quicinc.com>
> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
I hereby agree to let Marm take this patch.
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Thanks,
Miquèl
WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Gabor Juhos <j4g8y7@gmail.com>
Cc: Mark Brown <broonie@kernel.org>,
Manivannan Sadhasivam <mani@kernel.org>,
Richard Weinberger <richard@nod.at>,
Vignesh Raghavendra <vigneshr@ti.com>,
Varadarajan Narayanan <quic_varada@quicinc.com>,
Md Sadre Alam <quic_mdalam@quicinc.com>,
Sricharan Ramabadhran <quic_srichara@quicinc.com>,
linux-spi@vger.kernel.org, linux-mtd@lists.infradead.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/2] mtd: nand: qpic-common: add defines for ECC_MODE values
Date: Wed, 02 Jul 2025 17:57:57 +0200 [thread overview]
Message-ID: <87ikkamvp6.fsf@bootlin.com> (raw)
In-Reply-To: <20250702-qpic-snand-8bit-ecc-v2-1-ae2c17a30bb7@gmail.com> (Gabor Juhos's message of "Wed, 02 Jul 2025 14:35:23 +0200")
Hi Gabor,
On 02/07/2025 at 14:35:23 +02, Gabor Juhos <j4g8y7@gmail.com> wrote:
> Add defines for the values of the ECC_MODE field of the NAND_DEV0_ECC_CFG
> register and change both the 'qcom-nandc' and 'spi-qpic-snand' drivers to
> use those instead of magic numbers.
>
> No functional changes. This is in preparation for adding 8 bit ECC strength
> support for the 'spi-qpic-snand' driver.
>
> Reviewed-by: Md Sadre Alam <quic_mdalam@quicinc.com>
> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
I hereby agree to let Marm take this patch.
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Thanks,
Miquèl
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next prev parent reply other threads:[~2025-07-02 15:57 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-02 12:35 [PATCH v2 0/2] spi: spi-qpic-snand: enable 8 bits ECC strength support Gabor Juhos
2025-07-02 12:35 ` Gabor Juhos
2025-07-02 12:35 ` [PATCH v2 1/2] mtd: nand: qpic-common: add defines for ECC_MODE values Gabor Juhos
2025-07-02 12:35 ` Gabor Juhos
2025-07-02 15:57 ` Miquel Raynal [this message]
2025-07-02 15:57 ` Miquel Raynal
2025-07-02 12:35 ` [PATCH v2 2/2] spi: spi-qpic-snand: add support for 8 bits ECC strength Gabor Juhos
2025-07-02 12:35 ` Gabor Juhos
2025-07-04 13:05 ` [PATCH v2 0/2] spi: spi-qpic-snand: enable 8 bits ECC strength support Mark Brown
2025-07-04 13:05 ` Mark Brown
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