* [PATCH 01/14] drm/i915/dpll: Rename intel_dpll
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
@ 2025-05-15 7:17 ` Suraj Kandpal
2025-05-15 7:17 ` [PATCH 02/14] drm/i915/dpll: Rename intel_dpll_funcs Suraj Kandpal
` (29 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:17 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename intel_dpll to intel_dpll_global so that intel_shared_dpll
can be renamed to intel_dpll in an effort to move away from the shared
naming convention.
Also intel_dpll according to it's comment tracks global dpll rather
than individual hence making more sense this gets changed.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_core.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index b4937e102360..6fc213f84e73 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -122,7 +122,7 @@ struct intel_audio {
* intel_{prepare,enable,disable}_shared_dpll. Must be global rather than per
* dpll, because on some platforms plls share registers.
*/
-struct intel_dpll {
+struct intel_dpll_global {
struct mutex lock;
int num_shared_dpll;
@@ -570,7 +570,7 @@ struct intel_display {
/* Grouping using named structs. Keep sorted. */
struct drm_dp_tunnel_mgr *dp_tunnel_mgr;
struct intel_audio audio;
- struct intel_dpll dpll;
+ struct intel_dpll_global dpll;
struct intel_fbc *fbc[I915_MAX_FBCS];
struct intel_frontbuffer_tracking fb_tracking;
struct intel_hotplug hotplug;
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 02/14] drm/i915/dpll: Rename intel_dpll_funcs
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
2025-05-15 7:17 ` [PATCH 01/14] drm/i915/dpll: Rename intel_dpll Suraj Kandpal
@ 2025-05-15 7:17 ` Suraj Kandpal
2025-05-15 7:17 ` [PATCH 03/14] drm/i915/dpll: Rename intel_shared_dpll_state Suraj Kandpal
` (28 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:17 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename intel_dpll_funcs to intel_dpll_global_funcs so that later
on intel_shared_dpll_funcs can be renamed to intel_dpll_funcs.
This is done to move away from the shared naming convention since
starting MTL dpll's are not shared among PHYs.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
.../gpu/drm/i915/display/intel_display_core.h | 4 ++--
drivers/gpu/drm/i915/display/intel_dpll.c | 22 +++++++++----------
2 files changed, 13 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index 6fc213f84e73..e0221e514326 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -42,7 +42,7 @@ struct intel_color_funcs;
struct intel_crtc;
struct intel_crtc_state;
struct intel_dmc;
-struct intel_dpll_funcs;
+struct intel_dpll_global_funcs;
struct intel_dpll_mgr;
struct intel_fbdev;
struct intel_fdi_funcs;
@@ -300,7 +300,7 @@ struct intel_display {
const struct intel_cdclk_funcs *cdclk;
/* Display pll funcs */
- const struct intel_dpll_funcs *dpll;
+ const struct intel_dpll_global_funcs *dpll;
/* irq display functions */
const struct intel_hotplug_funcs *hotplug;
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index a9e9b98d0bf9..8db603d9c823 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -24,7 +24,7 @@
#include "vlv_dpio_phy_regs.h"
#include "vlv_sideband.h"
-struct intel_dpll_funcs {
+struct intel_dpll_global_funcs {
int (*crtc_compute_clock)(struct intel_atomic_state *state,
struct intel_crtc *crtc);
int (*crtc_get_shared_dpll)(struct intel_atomic_state *state,
@@ -1690,45 +1690,45 @@ static int i8xx_crtc_compute_clock(struct intel_atomic_state *state,
return 0;
}
-static const struct intel_dpll_funcs mtl_dpll_funcs = {
+static const struct intel_dpll_global_funcs mtl_dpll_funcs = {
.crtc_compute_clock = mtl_crtc_compute_clock,
};
-static const struct intel_dpll_funcs dg2_dpll_funcs = {
+static const struct intel_dpll_global_funcs dg2_dpll_funcs = {
.crtc_compute_clock = dg2_crtc_compute_clock,
};
-static const struct intel_dpll_funcs hsw_dpll_funcs = {
+static const struct intel_dpll_global_funcs hsw_dpll_funcs = {
.crtc_compute_clock = hsw_crtc_compute_clock,
.crtc_get_shared_dpll = hsw_crtc_get_shared_dpll,
};
-static const struct intel_dpll_funcs ilk_dpll_funcs = {
+static const struct intel_dpll_global_funcs ilk_dpll_funcs = {
.crtc_compute_clock = ilk_crtc_compute_clock,
.crtc_get_shared_dpll = ilk_crtc_get_shared_dpll,
};
-static const struct intel_dpll_funcs chv_dpll_funcs = {
+static const struct intel_dpll_global_funcs chv_dpll_funcs = {
.crtc_compute_clock = chv_crtc_compute_clock,
};
-static const struct intel_dpll_funcs vlv_dpll_funcs = {
+static const struct intel_dpll_global_funcs vlv_dpll_funcs = {
.crtc_compute_clock = vlv_crtc_compute_clock,
};
-static const struct intel_dpll_funcs g4x_dpll_funcs = {
+static const struct intel_dpll_global_funcs g4x_dpll_funcs = {
.crtc_compute_clock = g4x_crtc_compute_clock,
};
-static const struct intel_dpll_funcs pnv_dpll_funcs = {
+static const struct intel_dpll_global_funcs pnv_dpll_funcs = {
.crtc_compute_clock = pnv_crtc_compute_clock,
};
-static const struct intel_dpll_funcs i9xx_dpll_funcs = {
+static const struct intel_dpll_global_funcs i9xx_dpll_funcs = {
.crtc_compute_clock = i9xx_crtc_compute_clock,
};
-static const struct intel_dpll_funcs i8xx_dpll_funcs = {
+static const struct intel_dpll_global_funcs i8xx_dpll_funcs = {
.crtc_compute_clock = i8xx_crtc_compute_clock,
};
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 03/14] drm/i915/dpll: Rename intel_shared_dpll_state
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
2025-05-15 7:17 ` [PATCH 01/14] drm/i915/dpll: Rename intel_dpll Suraj Kandpal
2025-05-15 7:17 ` [PATCH 02/14] drm/i915/dpll: Rename intel_dpll_funcs Suraj Kandpal
@ 2025-05-15 7:17 ` Suraj Kandpal
2025-05-15 7:17 ` [PATCH 04/14] drm/i915/dpll: Rename macro for_each_shared_dpll Suraj Kandpal
` (27 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:17 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename intel_shared_dpll_state to just intel_dpll_state since it may
not necessarily store share dpll state info specially since
DISPLAY_VER >= 14 PLL's are not shared.
Also change the name of variables which may have been associated as
a shared_dpll.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
.../drm/i915/display/intel_display_types.h | 2 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 56 +++++++++----------
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 8 +--
3 files changed, 33 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index d6d0440dcee9..1bdffaca153a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -591,7 +591,7 @@ struct intel_atomic_state {
bool dpll_set, modeset;
- struct intel_shared_dpll_state shared_dpll[I915_NUM_PLLS];
+ struct intel_dpll_state dpll_state[I915_NUM_PLLS];
struct intel_dp_tunnel_inherited_state *inherited_dp_tunnels;
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 9da051a3f455..6b4eb230f4b3 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -122,17 +122,17 @@ struct intel_dpll_mgr {
static void
intel_atomic_duplicate_dpll_state(struct intel_display *display,
- struct intel_shared_dpll_state *shared_dpll)
+ struct intel_dpll_state *dpll_state)
{
struct intel_shared_dpll *pll;
int i;
/* Copy shared dpll state */
for_each_shared_dpll(display, pll, i)
- shared_dpll[pll->index] = pll->state;
+ dpll_state[pll->index] = pll->state;
}
-static struct intel_shared_dpll_state *
+static struct intel_dpll_state *
intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s)
{
struct intel_atomic_state *state = to_intel_atomic_state(s);
@@ -144,10 +144,10 @@ intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s)
state->dpll_set = true;
intel_atomic_duplicate_dpll_state(display,
- state->shared_dpll);
+ state->dpll_state);
}
- return state->shared_dpll;
+ return state->dpll_state;
}
/**
@@ -365,11 +365,11 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
{
struct intel_display *display = to_intel_display(crtc);
unsigned long dpll_mask_all = intel_dpll_mask_all(display);
- struct intel_shared_dpll_state *shared_dpll;
+ struct intel_dpll_state *dpll_state;
struct intel_shared_dpll *unused_pll = NULL;
enum intel_dpll_id id;
- shared_dpll = intel_atomic_get_shared_dpll_state(&state->base);
+ dpll_state = intel_atomic_get_shared_dpll_state(&state->base);
drm_WARN_ON(display->drm, dpll_mask & ~dpll_mask_all);
@@ -381,20 +381,20 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
continue;
/* Only want to check enabled timings first */
- if (shared_dpll[pll->index].pipe_mask == 0) {
+ if (dpll_state[pll->index].pipe_mask == 0) {
if (!unused_pll)
unused_pll = pll;
continue;
}
if (memcmp(dpll_hw_state,
- &shared_dpll[pll->index].hw_state,
+ &dpll_state[pll->index].hw_state,
sizeof(*dpll_hw_state)) == 0) {
drm_dbg_kms(display->drm,
"[CRTC:%d:%s] sharing existing %s (pipe mask 0x%x, active 0x%x)\n",
crtc->base.base.id, crtc->base.name,
pll->info->name,
- shared_dpll[pll->index].pipe_mask,
+ dpll_state[pll->index].pipe_mask,
pll->active_mask);
return pll;
}
@@ -415,20 +415,20 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
* intel_reference_shared_dpll_crtc - Get a DPLL reference for a CRTC
* @crtc: CRTC on which behalf the reference is taken
* @pll: DPLL for which the reference is taken
- * @shared_dpll_state: the DPLL atomic state in which the reference is tracked
+ * @dpll_state: the DPLL atomic state in which the reference is tracked
*
* Take a reference for @pll tracking the use of it by @crtc.
*/
static void
intel_reference_shared_dpll_crtc(const struct intel_crtc *crtc,
const struct intel_shared_dpll *pll,
- struct intel_shared_dpll_state *shared_dpll_state)
+ struct intel_dpll_state *dpll_state)
{
struct intel_display *display = to_intel_display(crtc);
- drm_WARN_ON(display->drm, (shared_dpll_state->pipe_mask & BIT(crtc->pipe)) != 0);
+ drm_WARN_ON(display->drm, (dpll_state->pipe_mask & BIT(crtc->pipe)) != 0);
- shared_dpll_state->pipe_mask |= BIT(crtc->pipe);
+ dpll_state->pipe_mask |= BIT(crtc->pipe);
drm_dbg_kms(display->drm, "[CRTC:%d:%s] reserving %s\n",
crtc->base.base.id, crtc->base.name, pll->info->name);
@@ -440,34 +440,34 @@ intel_reference_shared_dpll(struct intel_atomic_state *state,
const struct intel_shared_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
- struct intel_shared_dpll_state *shared_dpll;
+ struct intel_dpll_state *dpll_state;
- shared_dpll = intel_atomic_get_shared_dpll_state(&state->base);
+ dpll_state = intel_atomic_get_shared_dpll_state(&state->base);
- if (shared_dpll[pll->index].pipe_mask == 0)
- shared_dpll[pll->index].hw_state = *dpll_hw_state;
+ if (dpll_state[pll->index].pipe_mask == 0)
+ dpll_state[pll->index].hw_state = *dpll_hw_state;
- intel_reference_shared_dpll_crtc(crtc, pll, &shared_dpll[pll->index]);
+ intel_reference_shared_dpll_crtc(crtc, pll, &dpll_state[pll->index]);
}
/**
* intel_unreference_shared_dpll_crtc - Drop a DPLL reference for a CRTC
* @crtc: CRTC on which behalf the reference is dropped
* @pll: DPLL for which the reference is dropped
- * @shared_dpll_state: the DPLL atomic state in which the reference is tracked
+ * @dpll_state: the DPLL atomic state in which the reference is tracked
*
* Drop a reference for @pll tracking the end of use of it by @crtc.
*/
void
intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
const struct intel_shared_dpll *pll,
- struct intel_shared_dpll_state *shared_dpll_state)
+ struct intel_dpll_state *dpll_state)
{
struct intel_display *display = to_intel_display(crtc);
- drm_WARN_ON(display->drm, (shared_dpll_state->pipe_mask & BIT(crtc->pipe)) == 0);
+ drm_WARN_ON(display->drm, (dpll_state->pipe_mask & BIT(crtc->pipe)) == 0);
- shared_dpll_state->pipe_mask &= ~BIT(crtc->pipe);
+ dpll_state->pipe_mask &= ~BIT(crtc->pipe);
drm_dbg_kms(display->drm, "[CRTC:%d:%s] releasing %s\n",
crtc->base.base.id, crtc->base.name, pll->info->name);
@@ -477,11 +477,11 @@ static void intel_unreference_shared_dpll(struct intel_atomic_state *state,
const struct intel_crtc *crtc,
const struct intel_shared_dpll *pll)
{
- struct intel_shared_dpll_state *shared_dpll;
+ struct intel_dpll_state *dpll_state;
- shared_dpll = intel_atomic_get_shared_dpll_state(&state->base);
+ dpll_state = intel_atomic_get_shared_dpll_state(&state->base);
- intel_unreference_shared_dpll_crtc(crtc, pll, &shared_dpll[pll->index]);
+ intel_unreference_shared_dpll_crtc(crtc, pll, &dpll_state[pll->index]);
}
static void intel_put_dpll(struct intel_atomic_state *state,
@@ -514,7 +514,7 @@ static void intel_put_dpll(struct intel_atomic_state *state,
void intel_shared_dpll_swap_state(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct intel_shared_dpll_state *shared_dpll = state->shared_dpll;
+ struct intel_dpll_state *dpll_state = state->dpll_state;
struct intel_shared_dpll *pll;
int i;
@@ -522,7 +522,7 @@ void intel_shared_dpll_swap_state(struct intel_atomic_state *state)
return;
for_each_shared_dpll(display, pll, i)
- swap(pll->state, shared_dpll[pll->index]);
+ swap(pll->state, dpll_state[pll->index]);
}
static bool ibx_pch_dpll_get_hw_state(struct intel_display *display,
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index caffb084830c..fe6c676737bb 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -280,7 +280,7 @@ struct intel_dpll_hw_state {
};
/**
- * struct intel_shared_dpll_state - hold the DPLL atomic state
+ * struct intel_dpll_state - hold the DPLL atomic state
*
* This structure holds an atomic state for the DPLL, that can represent
* either its current state (in struct &intel_shared_dpll) or a desired
@@ -289,7 +289,7 @@ struct intel_dpll_hw_state {
*
* See also intel_reserve_shared_dplls() and intel_release_shared_dplls().
*/
-struct intel_shared_dpll_state {
+struct intel_dpll_state {
/**
* @pipe_mask: mask of pipes using this DPLL, active or not
*/
@@ -353,7 +353,7 @@ struct intel_shared_dpll {
* Store the state for the pll, including its hw state
* and CRTCs using it.
*/
- struct intel_shared_dpll_state state;
+ struct intel_dpll_state state;
/**
* @index: index for atomic state
@@ -406,7 +406,7 @@ void intel_release_shared_dplls(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
const struct intel_shared_dpll *pll,
- struct intel_shared_dpll_state *shared_dpll_state);
+ struct intel_dpll_state *shared_dpll_state);
void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,
enum icl_port_dpll_id port_dpll_id);
void intel_update_active_dpll(struct intel_atomic_state *state,
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 04/14] drm/i915/dpll: Rename macro for_each_shared_dpll
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (2 preceding siblings ...)
2025-05-15 7:17 ` [PATCH 03/14] drm/i915/dpll: Rename intel_shared_dpll_state Suraj Kandpal
@ 2025-05-15 7:17 ` Suraj Kandpal
2025-05-15 7:17 ` [PATCH 05/14] drm/i915/dpll: Rename intel_shared_dpll_funcs Suraj Kandpal
` (26 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:17 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename the macro for_each_shared_dpll to for_each_dpll since
this loop will not necessarily be used for only shared
dpll in future.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
.../gpu/drm/i915/display/intel_display_debugfs.c | 2 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 16 ++++++++--------
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 2 +-
drivers/gpu/drm/i915/display/intel_pch_refclk.c | 2 +-
4 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 8d0a1779dd19..3770ce9469d1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -627,7 +627,7 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused)
display->dpll.ref_clks.nssc,
display->dpll.ref_clks.ssc);
- for_each_shared_dpll(display, pll, i) {
+ for_each_dpll(display, pll, i) {
drm_printf(&p, "DPLL%i: %s, id: %i\n", pll->index,
pll->info->name, pll->info->id);
drm_printf(&p, " pipe_mask: 0x%x, active: 0x%x, on: %s\n",
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 6b4eb230f4b3..9974fdb6eaeb 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -127,8 +127,8 @@ intel_atomic_duplicate_dpll_state(struct intel_display *display,
struct intel_shared_dpll *pll;
int i;
- /* Copy shared dpll state */
- for_each_shared_dpll(display, pll, i)
+ /* Copy dpll state */
+ for_each_dpll(display, pll, i)
dpll_state[pll->index] = pll->state;
}
@@ -165,7 +165,7 @@ intel_get_shared_dpll_by_id(struct intel_display *display,
struct intel_shared_dpll *pll;
int i;
- for_each_shared_dpll(display, pll, i) {
+ for_each_dpll(display, pll, i) {
if (pll->info->id == id)
return pll;
}
@@ -348,7 +348,7 @@ intel_dpll_mask_all(struct intel_display *display)
unsigned long dpll_mask = 0;
int i;
- for_each_shared_dpll(display, pll, i) {
+ for_each_dpll(display, pll, i) {
drm_WARN_ON(display->drm, dpll_mask & BIT(pll->info->id));
dpll_mask |= BIT(pll->info->id);
@@ -521,7 +521,7 @@ void intel_shared_dpll_swap_state(struct intel_atomic_state *state)
if (!state->dpll_set)
return;
- for_each_shared_dpll(display, pll, i)
+ for_each_dpll(display, pll, i)
swap(pll->state, dpll_state[pll->index]);
}
@@ -4542,7 +4542,7 @@ void intel_dpll_readout_hw_state(struct intel_display *display)
struct intel_shared_dpll *pll;
int i;
- for_each_shared_dpll(display, pll, i)
+ for_each_dpll(display, pll, i)
readout_dpll_hw_state(display, pll);
}
@@ -4571,7 +4571,7 @@ void intel_dpll_sanitize_state(struct intel_display *display)
intel_cx0_pll_power_save_wa(display);
- for_each_shared_dpll(display, pll, i)
+ for_each_dpll(display, pll, i)
sanitize_dpll_state(display, pll);
}
@@ -4720,6 +4720,6 @@ void intel_shared_dpll_verify_disabled(struct intel_atomic_state *state)
struct intel_shared_dpll *pll;
int i;
- for_each_shared_dpll(display, pll, i)
+ for_each_dpll(display, pll, i)
verify_single_dpll_state(display, pll, NULL, NULL);
}
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index fe6c676737bb..d93072486831 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -30,7 +30,7 @@
#include "intel_display_power.h"
#include "intel_wakeref.h"
-#define for_each_shared_dpll(__display, __pll, __i) \
+#define for_each_dpll(__display, __pll, __i) \
for ((__i) = 0; (__i) < (__display)->dpll.num_shared_dpll && \
((__pll) = &(__display)->dpll.shared_dplls[(__i)]) ; (__i)++)
diff --git a/drivers/gpu/drm/i915/display/intel_pch_refclk.c b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
index 693b90e3dfc3..8bec55deff9f 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_refclk.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
@@ -535,7 +535,7 @@ static void ilk_init_pch_refclk(struct intel_display *display)
}
/* Check if any DPLLs are using the SSC source */
- for_each_shared_dpll(display, pll, i) {
+ for_each_dpll(display, pll, i) {
u32 temp;
temp = intel_de_read(display, PCH_DPLL(pll->info->id));
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 05/14] drm/i915/dpll: Rename intel_shared_dpll_funcs
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (3 preceding siblings ...)
2025-05-15 7:17 ` [PATCH 04/14] drm/i915/dpll: Rename macro for_each_shared_dpll Suraj Kandpal
@ 2025-05-15 7:17 ` Suraj Kandpal
2025-05-15 7:17 ` [PATCH 06/14] drm/i915/dpll: Rename intel_shared_dpll Suraj Kandpal
` (25 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:17 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename intel_shared_dpll_funcs to intel_dpll_funcs
since it needs to represent both shared and individual
dplls.
--v2
-Change intel_global_dpll to intel_dpll_global to be more
in line with the naming standard where the name should
start with the file name [Jani]
--v3
-Drop shared and global altogether [Jani]
--v4
-Keep declarations sorted [Jani]
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 24 +++++++++----------
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 4 ++--
2 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 9974fdb6eaeb..bdad4d72cc01 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -64,7 +64,7 @@
*/
/* platform specific hooks for managing DPLLs */
-struct intel_shared_dpll_funcs {
+struct intel_dpll_funcs {
/*
* Hook for enabling the pll, called from intel_enable_shared_dpll() if
* the pll is not already enabled.
@@ -670,7 +670,7 @@ static bool ibx_compare_hw_state(const struct intel_dpll_hw_state *_a,
a->fp1 == b->fp1;
}
-static const struct intel_shared_dpll_funcs ibx_pch_dpll_funcs = {
+static const struct intel_dpll_funcs ibx_pch_dpll_funcs = {
.enable = ibx_pch_dpll_enable,
.disable = ibx_pch_dpll_disable,
.get_hw_state = ibx_pch_dpll_get_hw_state,
@@ -1270,14 +1270,14 @@ static bool hsw_compare_hw_state(const struct intel_dpll_hw_state *_a,
a->spll == b->spll;
}
-static const struct intel_shared_dpll_funcs hsw_ddi_wrpll_funcs = {
+static const struct intel_dpll_funcs hsw_ddi_wrpll_funcs = {
.enable = hsw_ddi_wrpll_enable,
.disable = hsw_ddi_wrpll_disable,
.get_hw_state = hsw_ddi_wrpll_get_hw_state,
.get_freq = hsw_ddi_wrpll_get_freq,
};
-static const struct intel_shared_dpll_funcs hsw_ddi_spll_funcs = {
+static const struct intel_dpll_funcs hsw_ddi_spll_funcs = {
.enable = hsw_ddi_spll_enable,
.disable = hsw_ddi_spll_disable,
.get_hw_state = hsw_ddi_spll_get_hw_state,
@@ -1302,7 +1302,7 @@ static bool hsw_ddi_lcpll_get_hw_state(struct intel_display *display,
return true;
}
-static const struct intel_shared_dpll_funcs hsw_ddi_lcpll_funcs = {
+static const struct intel_dpll_funcs hsw_ddi_lcpll_funcs = {
.enable = hsw_ddi_lcpll_enable,
.disable = hsw_ddi_lcpll_disable,
.get_hw_state = hsw_ddi_lcpll_get_hw_state,
@@ -2004,14 +2004,14 @@ static bool skl_compare_hw_state(const struct intel_dpll_hw_state *_a,
a->cfgcr2 == b->cfgcr2;
}
-static const struct intel_shared_dpll_funcs skl_ddi_pll_funcs = {
+static const struct intel_dpll_funcs skl_ddi_pll_funcs = {
.enable = skl_ddi_pll_enable,
.disable = skl_ddi_pll_disable,
.get_hw_state = skl_ddi_pll_get_hw_state,
.get_freq = skl_ddi_pll_get_freq,
};
-static const struct intel_shared_dpll_funcs skl_ddi_dpll0_funcs = {
+static const struct intel_dpll_funcs skl_ddi_dpll0_funcs = {
.enable = skl_ddi_dpll0_enable,
.disable = skl_ddi_dpll0_disable,
.get_hw_state = skl_ddi_dpll0_get_hw_state,
@@ -2486,7 +2486,7 @@ static bool bxt_compare_hw_state(const struct intel_dpll_hw_state *_a,
a->pcsdw12 == b->pcsdw12;
}
-static const struct intel_shared_dpll_funcs bxt_ddi_pll_funcs = {
+static const struct intel_dpll_funcs bxt_ddi_pll_funcs = {
.enable = bxt_ddi_pll_enable,
.disable = bxt_ddi_pll_disable,
.get_hw_state = bxt_ddi_pll_get_hw_state,
@@ -4129,21 +4129,21 @@ static bool icl_compare_hw_state(const struct intel_dpll_hw_state *_a,
a->mg_pll_tdc_coldst_bias == b->mg_pll_tdc_coldst_bias;
}
-static const struct intel_shared_dpll_funcs combo_pll_funcs = {
+static const struct intel_dpll_funcs combo_pll_funcs = {
.enable = combo_pll_enable,
.disable = combo_pll_disable,
.get_hw_state = combo_pll_get_hw_state,
.get_freq = icl_ddi_combo_pll_get_freq,
};
-static const struct intel_shared_dpll_funcs tbt_pll_funcs = {
+static const struct intel_dpll_funcs tbt_pll_funcs = {
.enable = tbt_pll_enable,
.disable = tbt_pll_disable,
.get_hw_state = tbt_pll_get_hw_state,
.get_freq = icl_ddi_tbt_pll_get_freq,
};
-static const struct intel_shared_dpll_funcs mg_pll_funcs = {
+static const struct intel_dpll_funcs mg_pll_funcs = {
.enable = mg_pll_enable,
.disable = mg_pll_disable,
.get_hw_state = mg_pll_get_hw_state,
@@ -4191,7 +4191,7 @@ static const struct intel_dpll_mgr ehl_pll_mgr = {
.compare_hw_state = icl_compare_hw_state,
};
-static const struct intel_shared_dpll_funcs dkl_pll_funcs = {
+static const struct intel_dpll_funcs dkl_pll_funcs = {
.enable = mg_pll_enable,
.disable = mg_pll_disable,
.get_hw_state = dkl_pll_get_hw_state,
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index d93072486831..28f464d504fb 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -39,9 +39,9 @@ struct drm_printer;
struct intel_atomic_state;
struct intel_crtc;
struct intel_crtc_state;
+struct intel_dpll_funcs;
struct intel_encoder;
struct intel_shared_dpll;
-struct intel_shared_dpll_funcs;
/**
* enum intel_dpll_id - possible DPLL ids
@@ -314,7 +314,7 @@ struct dpll_info {
/**
* @funcs: platform specific hooks
*/
- const struct intel_shared_dpll_funcs *funcs;
+ const struct intel_dpll_funcs *funcs;
/**
* @id: unique identifier for this DPLL
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 06/14] drm/i915/dpll: Rename intel_shared_dpll
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (4 preceding siblings ...)
2025-05-15 7:17 ` [PATCH 05/14] drm/i915/dpll: Rename intel_shared_dpll_funcs Suraj Kandpal
@ 2025-05-15 7:17 ` Suraj Kandpal
2025-05-15 7:24 ` Jani Nikula
2025-05-15 7:17 ` [PATCH 07/14] drm/i915/dpll: Move away from using shared dpll Suraj Kandpal
` (24 subsequent siblings)
30 siblings, 1 reply; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:17 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename intel_shared_dpll to intel_dpll to represent both
shared and individual dplls. Since from MTL each PHY has it's
own PLL making the shared PLL naming a little outdated. In an
effort to make this framework accepting of future changes this
needs to be done.
--v2
-Use intel_dpll_global to make sure names start with the filename
[Jani/Ville]
-Explain the need of this rename [Jani]
--v3
-Just keep it intel_dpll [Jani]
--v4
-Fix comment [Jani]
-Use just num_dpll and dplls [Jani]
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 52 ++--
drivers/gpu/drm/i915/display/intel_ddi.h | 6 +-
drivers/gpu/drm/i915/display/intel_display.c | 12 +-
.../gpu/drm/i915/display/intel_display_core.h | 4 +-
.../drm/i915/display/intel_display_debugfs.c | 2 +-
.../drm/i915/display/intel_display_types.h | 6 +-
drivers/gpu/drm/i915/display/intel_dpll.c | 4 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 228 +++++++++---------
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 18 +-
drivers/gpu/drm/i915/display/intel_fdi.c | 2 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 2 +-
.../drm/i915/display/intel_modeset_setup.c | 8 +-
.../gpu/drm/i915/display/intel_pch_display.c | 10 +-
.../gpu/drm/i915/display/intel_pch_refclk.c | 2 +-
15 files changed, 179 insertions(+), 179 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
index ca7033251e91..55f0a20e0874 100644
--- a/drivers/gpu/drm/i915/display/icl_dsi.c
+++ b/drivers/gpu/drm/i915/display/icl_dsi.c
@@ -658,7 +658,7 @@ static void gen11_dsi_map_pll(struct intel_encoder *encoder,
{
struct intel_display *display = to_intel_display(encoder);
struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
- struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ struct intel_dpll *pll = crtc_state->intel_dpll;
enum phy phy;
u32 val;
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 74132c1d6385..4d631cbc81d2 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -236,7 +236,7 @@ static void intel_wait_ddi_buf_active(struct intel_encoder *encoder)
port_name(port));
}
-static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
+static u32 hsw_pll_to_ddi_pll_sel(const struct intel_dpll *pll)
{
switch (pll->info->id) {
case DPLL_ID_WRPLL1:
@@ -260,7 +260,7 @@ static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
static u32 icl_pll_to_ddi_clk_sel(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
- const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ const struct intel_dpll *pll = crtc_state->intel_dpll;
int clock = crtc_state->port_clock;
const enum intel_dpll_id id = pll->info->id;
@@ -1561,7 +1561,7 @@ static bool _icl_ddi_is_clock_enabled(struct intel_display *display, i915_reg_t
return !(intel_de_read(display, reg) & clk_off);
}
-static struct intel_shared_dpll *
+static struct intel_dpll *
_icl_ddi_get_pll(struct intel_display *display, i915_reg_t reg,
u32 clk_sel_mask, u32 clk_sel_shift)
{
@@ -1576,7 +1576,7 @@ static void adls_ddi_enable_clock(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
- const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ const struct intel_dpll *pll = crtc_state->intel_dpll;
enum phy phy = intel_encoder_to_phy(encoder);
if (drm_WARN_ON(display->drm, !pll))
@@ -1606,7 +1606,7 @@ static bool adls_ddi_is_clock_enabled(struct intel_encoder *encoder)
ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
}
-static struct intel_shared_dpll *adls_ddi_get_pll(struct intel_encoder *encoder)
+static struct intel_dpll *adls_ddi_get_pll(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
enum phy phy = intel_encoder_to_phy(encoder);
@@ -1620,7 +1620,7 @@ static void rkl_ddi_enable_clock(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
- const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ const struct intel_dpll *pll = crtc_state->intel_dpll;
enum phy phy = intel_encoder_to_phy(encoder);
if (drm_WARN_ON(display->drm, !pll))
@@ -1650,7 +1650,7 @@ static bool rkl_ddi_is_clock_enabled(struct intel_encoder *encoder)
RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
}
-static struct intel_shared_dpll *rkl_ddi_get_pll(struct intel_encoder *encoder)
+static struct intel_dpll *rkl_ddi_get_pll(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
enum phy phy = intel_encoder_to_phy(encoder);
@@ -1664,7 +1664,7 @@ static void dg1_ddi_enable_clock(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
- const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ const struct intel_dpll *pll = crtc_state->intel_dpll;
enum phy phy = intel_encoder_to_phy(encoder);
if (drm_WARN_ON(display->drm, !pll))
@@ -1703,7 +1703,7 @@ static bool dg1_ddi_is_clock_enabled(struct intel_encoder *encoder)
DG1_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
}
-static struct intel_shared_dpll *dg1_ddi_get_pll(struct intel_encoder *encoder)
+static struct intel_dpll *dg1_ddi_get_pll(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
enum phy phy = intel_encoder_to_phy(encoder);
@@ -1730,7 +1730,7 @@ static void icl_ddi_combo_enable_clock(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
- const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ const struct intel_dpll *pll = crtc_state->intel_dpll;
enum phy phy = intel_encoder_to_phy(encoder);
if (drm_WARN_ON(display->drm, !pll))
@@ -1760,7 +1760,7 @@ static bool icl_ddi_combo_is_clock_enabled(struct intel_encoder *encoder)
ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
}
-struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder)
+struct intel_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
enum phy phy = intel_encoder_to_phy(encoder);
@@ -1774,7 +1774,7 @@ static void jsl_ddi_tc_enable_clock(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
- const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ const struct intel_dpll *pll = crtc_state->intel_dpll;
enum port port = encoder->port;
if (drm_WARN_ON(display->drm, !pll))
@@ -1817,7 +1817,7 @@ static void icl_ddi_tc_enable_clock(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
- const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ const struct intel_dpll *pll = crtc_state->intel_dpll;
enum tc_port tc_port = intel_encoder_to_tc(encoder);
enum port port = encoder->port;
@@ -1868,7 +1868,7 @@ static bool icl_ddi_tc_is_clock_enabled(struct intel_encoder *encoder)
return !(tmp & ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port));
}
-static struct intel_shared_dpll *icl_ddi_tc_get_pll(struct intel_encoder *encoder)
+static struct intel_dpll *icl_ddi_tc_get_pll(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
enum tc_port tc_port = intel_encoder_to_tc(encoder);
@@ -1898,7 +1898,7 @@ static struct intel_shared_dpll *icl_ddi_tc_get_pll(struct intel_encoder *encode
return intel_get_shared_dpll_by_id(display, id);
}
-static struct intel_shared_dpll *bxt_ddi_get_pll(struct intel_encoder *encoder)
+static struct intel_dpll *bxt_ddi_get_pll(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder->base.dev);
enum intel_dpll_id id;
@@ -1925,7 +1925,7 @@ static void skl_ddi_enable_clock(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
- const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ const struct intel_dpll *pll = crtc_state->intel_dpll;
enum port port = encoder->port;
if (drm_WARN_ON(display->drm, !pll))
@@ -1967,7 +1967,7 @@ static bool skl_ddi_is_clock_enabled(struct intel_encoder *encoder)
return !(intel_de_read(display, DPLL_CTRL2) & DPLL_CTRL2_DDI_CLK_OFF(port));
}
-static struct intel_shared_dpll *skl_ddi_get_pll(struct intel_encoder *encoder)
+static struct intel_dpll *skl_ddi_get_pll(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
enum port port = encoder->port;
@@ -1993,7 +1993,7 @@ void hsw_ddi_enable_clock(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
- const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ const struct intel_dpll *pll = crtc_state->intel_dpll;
enum port port = encoder->port;
if (drm_WARN_ON(display->drm, !pll))
@@ -2018,7 +2018,7 @@ bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder)
return intel_de_read(display, PORT_CLK_SEL(port)) != PORT_CLK_SEL_NONE;
}
-static struct intel_shared_dpll *hsw_ddi_get_pll(struct intel_encoder *encoder)
+static struct intel_dpll *hsw_ddi_get_pll(struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(encoder);
enum port port = encoder->port;
@@ -4187,7 +4187,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
void intel_ddi_get_clock(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
struct intel_display *display = to_intel_display(encoder);
enum icl_port_dpll_id port_dpll_id = ICL_PORT_DPLL_DEFAULT;
@@ -4203,7 +4203,7 @@ void intel_ddi_get_clock(struct intel_encoder *encoder,
icl_set_active_port_dpll(crtc_state, port_dpll_id);
- crtc_state->port_clock = intel_dpll_get_freq(display, crtc_state->shared_dpll,
+ crtc_state->port_clock = intel_dpll_get_freq(display, crtc_state->intel_dpll,
&crtc_state->dpll_hw_state);
}
@@ -4257,7 +4257,7 @@ static void icl_ddi_combo_get_config(struct intel_encoder *encoder,
intel_ddi_get_config(encoder, crtc_state);
}
-static bool icl_ddi_tc_pll_is_tbt(const struct intel_shared_dpll *pll)
+static bool icl_ddi_tc_pll_is_tbt(const struct intel_dpll *pll)
{
return pll->info->id == DPLL_ID_ICL_TBTPLL;
}
@@ -4267,7 +4267,7 @@ icl_ddi_tc_port_pll_type(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(encoder);
- const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ const struct intel_dpll *pll = crtc_state->intel_dpll;
if (drm_WARN_ON(display->drm, !pll))
return ICL_PORT_DPLL_DEFAULT;
@@ -4290,7 +4290,7 @@ intel_ddi_port_pll_type(struct intel_encoder *encoder,
static void icl_ddi_tc_get_clock(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
struct intel_display *display = to_intel_display(encoder);
enum icl_port_dpll_id port_dpll_id;
@@ -4313,10 +4313,10 @@ static void icl_ddi_tc_get_clock(struct intel_encoder *encoder,
icl_set_active_port_dpll(crtc_state, port_dpll_id);
- if (icl_ddi_tc_pll_is_tbt(crtc_state->shared_dpll))
+ if (icl_ddi_tc_pll_is_tbt(crtc_state->intel_dpll))
crtc_state->port_clock = icl_calc_tbt_pll_link(display, encoder->port);
else
- crtc_state->port_clock = intel_dpll_get_freq(display, crtc_state->shared_dpll,
+ crtc_state->port_clock = intel_dpll_get_freq(display, crtc_state->intel_dpll,
&crtc_state->dpll_hw_state);
}
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h
index 353eb04079e9..f6f511bb0431 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.h
+++ b/drivers/gpu/drm/i915/display/intel_ddi.h
@@ -16,9 +16,9 @@ struct intel_crtc;
struct intel_crtc_state;
struct intel_display;
struct intel_dp;
+struct intel_dpll;
struct intel_dpll_hw_state;
struct intel_encoder;
-struct intel_shared_dpll;
enum pipe;
enum port;
enum transcoder;
@@ -40,7 +40,7 @@ void intel_ddi_enable_clock(struct intel_encoder *encoder,
void intel_ddi_disable_clock(struct intel_encoder *encoder);
void intel_ddi_get_clock(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state,
- struct intel_shared_dpll *pll);
+ struct intel_dpll *pll);
void hsw_ddi_enable_clock(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void hsw_ddi_disable_clock(struct intel_encoder *encoder);
@@ -50,7 +50,7 @@ intel_ddi_port_pll_type(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void hsw_ddi_get_config(struct intel_encoder *encoder,
struct intel_crtc_state *crtc_state);
-struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
+struct intel_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_wait_ddi_buf_idle(struct intel_display *display, enum port port);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 6f0a0bc71b06..dcfbd3d2df32 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1325,7 +1325,7 @@ static void intel_encoders_update_prepare(struct intel_atomic_state *state)
if (intel_crtc_needs_modeset(new_crtc_state))
continue;
- new_crtc_state->shared_dpll = old_crtc_state->shared_dpll;
+ new_crtc_state->intel_dpll = old_crtc_state->intel_dpll;
new_crtc_state->dpll_hw_state = old_crtc_state->dpll_hw_state;
}
}
@@ -1663,7 +1663,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
intel_encoders_pre_pll_enable(state, crtc);
- if (new_crtc_state->shared_dpll)
+ if (new_crtc_state->intel_dpll)
intel_enable_shared_dpll(new_crtc_state);
intel_encoders_pre_enable(state, crtc);
@@ -1959,7 +1959,7 @@ static void get_crtc_power_domains(struct intel_crtc_state *crtc_state,
if (HAS_DDI(display) && crtc_state->has_audio)
set_bit(POWER_DOMAIN_AUDIO_MMIO, mask->bits);
- if (crtc_state->shared_dpll)
+ if (crtc_state->intel_dpll)
set_bit(POWER_DOMAIN_DISPLAY_CORE, mask->bits);
if (crtc_state->dsc.compression_enable)
@@ -4501,7 +4501,7 @@ copy_joiner_crtc_state_modeset(struct intel_atomic_state *state,
/* preserve some things from the slave's original crtc state */
saved_state->uapi = secondary_crtc_state->uapi;
saved_state->scaler_state = secondary_crtc_state->scaler_state;
- saved_state->shared_dpll = secondary_crtc_state->shared_dpll;
+ saved_state->intel_dpll = secondary_crtc_state->intel_dpll;
saved_state->crc_enabled = secondary_crtc_state->crc_enabled;
intel_crtc_free_hw_state(secondary_crtc_state);
@@ -4564,7 +4564,7 @@ intel_crtc_prepare_cleared_state(struct intel_atomic_state *state,
saved_state->uapi = crtc_state->uapi;
saved_state->inherited = crtc_state->inherited;
saved_state->scaler_state = crtc_state->scaler_state;
- saved_state->shared_dpll = crtc_state->shared_dpll;
+ saved_state->intel_dpll = crtc_state->intel_dpll;
saved_state->dpll_hw_state = crtc_state->dpll_hw_state;
memcpy(saved_state->icl_port_dplls, crtc_state->icl_port_dplls,
sizeof(saved_state->icl_port_dplls));
@@ -5318,7 +5318,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
PIPE_CONF_CHECK_BOOL(double_wide);
if (display->dpll.mgr)
- PIPE_CONF_CHECK_P(shared_dpll);
+ PIPE_CONF_CHECK_P(intel_dpll);
/* FIXME convert everything over the dpll_mgr */
if (display->dpll.mgr || HAS_GMCH(display))
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index e0221e514326..5f5dd2722d99 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -125,8 +125,8 @@ struct intel_audio {
struct intel_dpll_global {
struct mutex lock;
- int num_shared_dpll;
- struct intel_shared_dpll shared_dplls[I915_NUM_PLLS];
+ int num_dpll;
+ struct intel_dpll dplls[I915_NUM_PLLS];
const struct intel_dpll_mgr *mgr;
struct {
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 3770ce9469d1..ea9e271bc6ee 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -618,7 +618,7 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused)
{
struct intel_display *display = node_to_intel_display(m->private);
struct drm_printer p = drm_seq_file_printer(m);
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
int i;
drm_modeset_lock_all(display->drm);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 1bdffaca153a..dbb07f05bfc6 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1075,8 +1075,8 @@ struct intel_crtc_state {
* haswell. */
struct dpll dpll;
- /* Selected dpll when shared or NULL. */
- struct intel_shared_dpll *shared_dpll;
+ /* Selected dpll or NULL. */
+ struct intel_dpll *intel_dpll;
/* Actual register state of the dpll, for shared dpll cross-checking. */
struct intel_dpll_hw_state dpll_hw_state;
@@ -1086,7 +1086,7 @@ struct intel_crtc_state {
* setting shared_dpll and dpll_hw_state to one of these reserved ones.
*/
struct icl_port_dpll {
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
struct intel_dpll_hw_state hw_state;
} icl_port_dplls[ICL_PORT_DPLL_COUNT];
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index 8db603d9c823..4d1f7fccd28a 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -1767,9 +1767,9 @@ int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,
int ret;
drm_WARN_ON(display->drm, !intel_crtc_needs_modeset(crtc_state));
- drm_WARN_ON(display->drm, !crtc_state->hw.enable && crtc_state->shared_dpll);
+ drm_WARN_ON(display->drm, !crtc_state->hw.enable && crtc_state->intel_dpll);
- if (!crtc_state->hw.enable || crtc_state->shared_dpll)
+ if (!crtc_state->hw.enable || crtc_state->intel_dpll)
return 0;
if (!display->funcs.dpll->crtc_get_shared_dpll)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index bdad4d72cc01..6fbbc5e89f3c 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -70,7 +70,7 @@ struct intel_dpll_funcs {
* the pll is not already enabled.
*/
void (*enable)(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state);
/*
@@ -79,7 +79,7 @@ struct intel_dpll_funcs {
* tracked users for it.
*/
void (*disable)(struct intel_display *display,
- struct intel_shared_dpll *pll);
+ struct intel_dpll *pll);
/*
* Hook for reading the values currently programmed to the DPLL
@@ -87,7 +87,7 @@ struct intel_dpll_funcs {
* verification after a mode set.
*/
bool (*get_hw_state)(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state);
/*
@@ -95,7 +95,7 @@ struct intel_dpll_funcs {
* in state.
*/
int (*get_freq)(struct intel_display *i915,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state);
};
@@ -124,7 +124,7 @@ static void
intel_atomic_duplicate_dpll_state(struct intel_display *display,
struct intel_dpll_state *dpll_state)
{
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
int i;
/* Copy dpll state */
@@ -158,11 +158,11 @@ intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s)
* Returns:
* A pointer to the DPLL with @id
*/
-struct intel_shared_dpll *
+struct intel_dpll *
intel_get_shared_dpll_by_id(struct intel_display *display,
enum intel_dpll_id id)
{
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
int i;
for_each_dpll(display, pll, i) {
@@ -176,7 +176,7 @@ intel_get_shared_dpll_by_id(struct intel_display *display,
/* For ILK+ */
void assert_shared_dpll(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
bool state)
{
bool cur_state;
@@ -205,7 +205,7 @@ enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port)
static i915_reg_t
intel_combo_pll_enable_reg(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
if (display->platform.dg1)
return DG1_DPLL_ENABLE(pll->info->id);
@@ -218,7 +218,7 @@ intel_combo_pll_enable_reg(struct intel_display *display,
static i915_reg_t
intel_tc_pll_enable_reg(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
const enum intel_dpll_id id = pll->info->id;
enum tc_port tc_port = icl_pll_id_to_tc_port(id);
@@ -230,7 +230,7 @@ intel_tc_pll_enable_reg(struct intel_display *display,
}
static void _intel_enable_shared_dpll(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
if (pll->info->power_domain)
pll->wakeref = intel_display_power_get(display, pll->info->power_domain);
@@ -240,7 +240,7 @@ static void _intel_enable_shared_dpll(struct intel_display *display,
}
static void _intel_disable_shared_dpll(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
pll->info->funcs->disable(display, pll);
pll->on = false;
@@ -259,7 +259,7 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ struct intel_dpll *pll = crtc_state->intel_dpll;
unsigned int pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
unsigned int old_mask;
@@ -305,7 +305,7 @@ void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct intel_shared_dpll *pll = crtc_state->shared_dpll;
+ struct intel_dpll *pll = crtc_state->intel_dpll;
unsigned int pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
/* PCH only available on ILK+ */
@@ -344,7 +344,7 @@ void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state)
static unsigned long
intel_dpll_mask_all(struct intel_display *display)
{
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
unsigned long dpll_mask = 0;
int i;
@@ -357,7 +357,7 @@ intel_dpll_mask_all(struct intel_display *display)
return dpll_mask;
}
-static struct intel_shared_dpll *
+static struct intel_dpll *
intel_find_shared_dpll(struct intel_atomic_state *state,
const struct intel_crtc *crtc,
const struct intel_dpll_hw_state *dpll_hw_state,
@@ -366,7 +366,7 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
struct intel_display *display = to_intel_display(crtc);
unsigned long dpll_mask_all = intel_dpll_mask_all(display);
struct intel_dpll_state *dpll_state;
- struct intel_shared_dpll *unused_pll = NULL;
+ struct intel_dpll *unused_pll = NULL;
enum intel_dpll_id id;
dpll_state = intel_atomic_get_shared_dpll_state(&state->base);
@@ -374,7 +374,7 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
drm_WARN_ON(display->drm, dpll_mask & ~dpll_mask_all);
for_each_set_bit(id, &dpll_mask, fls(dpll_mask_all)) {
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
pll = intel_get_shared_dpll_by_id(display, id);
if (!pll)
@@ -421,7 +421,7 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
*/
static void
intel_reference_shared_dpll_crtc(const struct intel_crtc *crtc,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
struct intel_dpll_state *dpll_state)
{
struct intel_display *display = to_intel_display(crtc);
@@ -437,7 +437,7 @@ intel_reference_shared_dpll_crtc(const struct intel_crtc *crtc,
static void
intel_reference_shared_dpll(struct intel_atomic_state *state,
const struct intel_crtc *crtc,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
struct intel_dpll_state *dpll_state;
@@ -460,7 +460,7 @@ intel_reference_shared_dpll(struct intel_atomic_state *state,
*/
void
intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
struct intel_dpll_state *dpll_state)
{
struct intel_display *display = to_intel_display(crtc);
@@ -475,7 +475,7 @@ intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
static void intel_unreference_shared_dpll(struct intel_atomic_state *state,
const struct intel_crtc *crtc,
- const struct intel_shared_dpll *pll)
+ const struct intel_dpll *pll)
{
struct intel_dpll_state *dpll_state;
@@ -492,12 +492,12 @@ static void intel_put_dpll(struct intel_atomic_state *state,
struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- new_crtc_state->shared_dpll = NULL;
+ new_crtc_state->intel_dpll = NULL;
- if (!old_crtc_state->shared_dpll)
+ if (!old_crtc_state->intel_dpll)
return;
- intel_unreference_shared_dpll(state, crtc, old_crtc_state->shared_dpll);
+ intel_unreference_shared_dpll(state, crtc, old_crtc_state->intel_dpll);
}
/**
@@ -515,7 +515,7 @@ void intel_shared_dpll_swap_state(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
struct intel_dpll_state *dpll_state = state->dpll_state;
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
int i;
if (!state->dpll_set)
@@ -526,7 +526,7 @@ void intel_shared_dpll_swap_state(struct intel_atomic_state *state)
}
static bool ibx_pch_dpll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
struct i9xx_dpll_hw_state *hw_state = &dpll_hw_state->i9xx;
@@ -562,7 +562,7 @@ static void ibx_assert_pch_refclk_enabled(struct intel_display *display)
}
static void ibx_pch_dpll_enable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct i9xx_dpll_hw_state *hw_state = &dpll_hw_state->i9xx;
@@ -591,7 +591,7 @@ static void ibx_pch_dpll_enable(struct intel_display *display,
}
static void ibx_pch_dpll_disable(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
const enum intel_dpll_id id = pll->info->id;
@@ -614,7 +614,7 @@ static int ibx_get_dpll(struct intel_atomic_state *state,
struct intel_display *display = to_intel_display(state);
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
enum intel_dpll_id id;
if (HAS_PCH_IBX(display)) {
@@ -640,7 +640,7 @@ static int ibx_get_dpll(struct intel_atomic_state *state,
intel_reference_shared_dpll(state, crtc,
pll, &crtc_state->dpll_hw_state);
- crtc_state->shared_dpll = pll;
+ crtc_state->intel_dpll = pll;
return 0;
}
@@ -692,7 +692,7 @@ static const struct intel_dpll_mgr pch_pll_mgr = {
};
static void hsw_ddi_wrpll_enable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
@@ -704,7 +704,7 @@ static void hsw_ddi_wrpll_enable(struct intel_display *display,
}
static void hsw_ddi_spll_enable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
@@ -715,7 +715,7 @@ static void hsw_ddi_spll_enable(struct intel_display *display,
}
static void hsw_ddi_wrpll_disable(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
const enum intel_dpll_id id = pll->info->id;
@@ -731,7 +731,7 @@ static void hsw_ddi_wrpll_disable(struct intel_display *display,
}
static void hsw_ddi_spll_disable(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
enum intel_dpll_id id = pll->info->id;
@@ -747,7 +747,7 @@ static void hsw_ddi_spll_disable(struct intel_display *display,
}
static bool hsw_ddi_wrpll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
@@ -769,7 +769,7 @@ static bool hsw_ddi_wrpll_get_hw_state(struct intel_display *display,
}
static bool hsw_ddi_spll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
@@ -996,7 +996,7 @@ hsw_ddi_calculate_wrpll(int clock /* in Hz */,
}
static int hsw_ddi_wrpll_get_freq(struct intel_display *display,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
@@ -1059,7 +1059,7 @@ hsw_ddi_wrpll_compute_dpll(struct intel_atomic_state *state,
return 0;
}
-static struct intel_shared_dpll *
+static struct intel_dpll *
hsw_ddi_wrpll_get_dpll(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
@@ -1090,11 +1090,11 @@ hsw_ddi_lcpll_compute_dpll(struct intel_crtc_state *crtc_state)
}
}
-static struct intel_shared_dpll *
+static struct intel_dpll *
hsw_ddi_lcpll_get_dpll(struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
enum intel_dpll_id pll_id;
int clock = crtc_state->port_clock;
@@ -1122,7 +1122,7 @@ hsw_ddi_lcpll_get_dpll(struct intel_crtc_state *crtc_state)
}
static int hsw_ddi_lcpll_get_freq(struct intel_display *display,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
int link_clock = 0;
@@ -1162,7 +1162,7 @@ hsw_ddi_spll_compute_dpll(struct intel_atomic_state *state,
return 0;
}
-static struct intel_shared_dpll *
+static struct intel_dpll *
hsw_ddi_spll_get_dpll(struct intel_atomic_state *state,
struct intel_crtc *crtc)
{
@@ -1174,7 +1174,7 @@ hsw_ddi_spll_get_dpll(struct intel_atomic_state *state,
}
static int hsw_ddi_spll_get_freq(struct intel_display *display,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
@@ -1221,7 +1221,7 @@ static int hsw_get_dpll(struct intel_atomic_state *state,
{
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- struct intel_shared_dpll *pll = NULL;
+ struct intel_dpll *pll = NULL;
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
pll = hsw_ddi_wrpll_get_dpll(state, crtc);
@@ -1236,7 +1236,7 @@ static int hsw_get_dpll(struct intel_atomic_state *state,
intel_reference_shared_dpll(state, crtc,
pll, &crtc_state->dpll_hw_state);
- crtc_state->shared_dpll = pll;
+ crtc_state->intel_dpll = pll;
return 0;
}
@@ -1285,18 +1285,18 @@ static const struct intel_dpll_funcs hsw_ddi_spll_funcs = {
};
static void hsw_ddi_lcpll_enable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct intel_dpll_hw_state *hw_state)
{
}
static void hsw_ddi_lcpll_disable(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
}
static bool hsw_ddi_lcpll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
return true;
@@ -1364,7 +1364,7 @@ static const struct skl_dpll_regs skl_dpll_regs[4] = {
};
static void skl_ddi_pll_write_ctrl1(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct skl_dpll_hw_state *hw_state)
{
const enum intel_dpll_id id = pll->info->id;
@@ -1378,7 +1378,7 @@ static void skl_ddi_pll_write_ctrl1(struct intel_display *display,
}
static void skl_ddi_pll_enable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
@@ -1400,7 +1400,7 @@ static void skl_ddi_pll_enable(struct intel_display *display,
}
static void skl_ddi_dpll0_enable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
@@ -1409,7 +1409,7 @@ static void skl_ddi_dpll0_enable(struct intel_display *display,
}
static void skl_ddi_pll_disable(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
const struct skl_dpll_regs *regs = skl_dpll_regs;
const enum intel_dpll_id id = pll->info->id;
@@ -1420,12 +1420,12 @@ static void skl_ddi_pll_disable(struct intel_display *display,
}
static void skl_ddi_dpll0_disable(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
}
static bool skl_ddi_pll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
@@ -1463,7 +1463,7 @@ static bool skl_ddi_pll_get_hw_state(struct intel_display *display,
}
static bool skl_ddi_dpll0_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
@@ -1736,7 +1736,7 @@ skl_ddi_calculate_wrpll(int clock,
}
static int skl_ddi_wrpll_get_freq(struct intel_display *display,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
@@ -1884,7 +1884,7 @@ skl_ddi_dp_set_dpll_hw_state(struct intel_crtc_state *crtc_state)
}
static int skl_ddi_lcpll_get_freq(struct intel_display *display,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
@@ -1939,7 +1939,7 @@ static int skl_get_dpll(struct intel_atomic_state *state,
{
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
pll = intel_find_shared_dpll(state, crtc,
@@ -1957,13 +1957,13 @@ static int skl_get_dpll(struct intel_atomic_state *state,
intel_reference_shared_dpll(state, crtc,
pll, &crtc_state->dpll_hw_state);
- crtc_state->shared_dpll = pll;
+ crtc_state->intel_dpll = pll;
return 0;
}
static int skl_ddi_pll_get_freq(struct intel_display *display,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
@@ -2038,7 +2038,7 @@ static const struct intel_dpll_mgr skl_pll_mgr = {
};
static void bxt_ddi_pll_enable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
@@ -2141,7 +2141,7 @@ static void bxt_ddi_pll_enable(struct intel_display *display,
}
static void bxt_ddi_pll_disable(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
enum port port = (enum port)pll->info->id; /* 1:1 port->PLL mapping */
@@ -2160,7 +2160,7 @@ static void bxt_ddi_pll_disable(struct intel_display *display,
}
static bool bxt_ddi_pll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
@@ -2360,7 +2360,7 @@ static int bxt_ddi_set_dpll_hw_state(struct intel_crtc_state *crtc_state,
}
static int bxt_ddi_pll_get_freq(struct intel_display *display,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
@@ -2429,7 +2429,7 @@ static int bxt_get_dpll(struct intel_atomic_state *state,
struct intel_display *display = to_intel_display(state);
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
enum intel_dpll_id id;
/* 1:1 mapping between ports and PLLs */
@@ -2442,7 +2442,7 @@ static int bxt_get_dpll(struct intel_atomic_state *state,
intel_reference_shared_dpll(state, crtc,
pll, &crtc_state->dpll_hw_state);
- crtc_state->shared_dpll = pll;
+ crtc_state->intel_dpll = pll;
return 0;
}
@@ -2755,7 +2755,7 @@ static int icl_calc_tbt_pll(struct intel_crtc_state *crtc_state,
}
static int icl_ddi_tbt_pll_get_freq(struct intel_display *display,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
/*
@@ -2826,7 +2826,7 @@ icl_calc_wrpll(struct intel_crtc_state *crtc_state,
}
static int icl_ddi_combo_pll_get_freq(struct intel_display *display,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
@@ -3199,7 +3199,7 @@ static int icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,
}
static int icl_ddi_mg_pll_get_freq(struct intel_display *display,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
@@ -3285,7 +3285,7 @@ void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,
struct icl_port_dpll *port_dpll =
&crtc_state->icl_port_dplls[port_dpll_id];
- crtc_state->shared_dpll = port_dpll->pll;
+ crtc_state->intel_dpll = port_dpll->pll;
crtc_state->dpll_hw_state = port_dpll->hw_state;
}
@@ -3428,8 +3428,8 @@ static int icl_compute_tc_phy_dplls(struct intel_atomic_state *state,
return ret;
/* this is mainly for the fastset check */
- if (old_crtc_state->shared_dpll &&
- old_crtc_state->shared_dpll->info->id == DPLL_ID_ICL_TBTPLL)
+ if (old_crtc_state->intel_dpll &&
+ old_crtc_state->intel_dpll->info->id == DPLL_ID_ICL_TBTPLL)
icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT);
else
icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_MG_PHY);
@@ -3521,7 +3521,7 @@ static void icl_put_dplls(struct intel_atomic_state *state,
intel_atomic_get_new_crtc_state(state, crtc);
enum icl_port_dpll_id id;
- new_crtc_state->shared_dpll = NULL;
+ new_crtc_state->intel_dpll = NULL;
for (id = ICL_PORT_DPLL_DEFAULT; id < ICL_PORT_DPLL_COUNT; id++) {
const struct icl_port_dpll *old_port_dpll =
@@ -3539,7 +3539,7 @@ static void icl_put_dplls(struct intel_atomic_state *state,
}
static bool mg_pll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
@@ -3606,7 +3606,7 @@ static bool mg_pll_get_hw_state(struct intel_display *display,
}
static bool dkl_pll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
@@ -3678,7 +3678,7 @@ static bool dkl_pll_get_hw_state(struct intel_display *display,
}
static bool icl_pll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state,
i915_reg_t enable_reg)
{
@@ -3739,7 +3739,7 @@ static bool icl_pll_get_hw_state(struct intel_display *display,
}
static bool combo_pll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
i915_reg_t enable_reg = intel_combo_pll_enable_reg(display, pll);
@@ -3748,14 +3748,14 @@ static bool combo_pll_get_hw_state(struct intel_display *display,
}
static bool tbt_pll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
return icl_pll_get_hw_state(display, pll, dpll_hw_state, TBT_PLL_ENABLE);
}
static void icl_dpll_write(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct icl_dpll_hw_state *hw_state)
{
const enum intel_dpll_id id = pll->info->id;
@@ -3797,7 +3797,7 @@ static void icl_dpll_write(struct intel_display *display,
}
static void icl_mg_pll_write(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct icl_dpll_hw_state *hw_state)
{
enum tc_port tc_port = icl_pll_id_to_tc_port(pll->info->id);
@@ -3840,7 +3840,7 @@ static void icl_mg_pll_write(struct intel_display *display,
}
static void dkl_pll_write(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct icl_dpll_hw_state *hw_state)
{
enum tc_port tc_port = icl_pll_id_to_tc_port(pll->info->id);
@@ -3905,7 +3905,7 @@ static void dkl_pll_write(struct intel_display *display,
}
static void icl_pll_power_enable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
i915_reg_t enable_reg)
{
intel_de_rmw(display, enable_reg, 0, PLL_POWER_ENABLE);
@@ -3920,7 +3920,7 @@ static void icl_pll_power_enable(struct intel_display *display,
}
static void icl_pll_enable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
i915_reg_t enable_reg)
{
intel_de_rmw(display, enable_reg, 0, PLL_ENABLE);
@@ -3930,7 +3930,7 @@ static void icl_pll_enable(struct intel_display *display,
drm_err(display->drm, "PLL %d not locked\n", pll->info->id);
}
-static void adlp_cmtg_clock_gating_wa(struct intel_display *display, struct intel_shared_dpll *pll)
+static void adlp_cmtg_clock_gating_wa(struct intel_display *display, struct intel_dpll *pll)
{
u32 val;
@@ -3955,7 +3955,7 @@ static void adlp_cmtg_clock_gating_wa(struct intel_display *display, struct inte
}
static void combo_pll_enable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
@@ -3979,7 +3979,7 @@ static void combo_pll_enable(struct intel_display *display,
}
static void tbt_pll_enable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
@@ -4000,7 +4000,7 @@ static void tbt_pll_enable(struct intel_display *display,
}
static void mg_pll_enable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
@@ -4025,7 +4025,7 @@ static void mg_pll_enable(struct intel_display *display,
}
static void icl_pll_disable(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
i915_reg_t enable_reg)
{
/* The first steps are done by intel_ddi_post_disable(). */
@@ -4056,7 +4056,7 @@ static void icl_pll_disable(struct intel_display *display,
}
static void combo_pll_disable(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
i915_reg_t enable_reg = intel_combo_pll_enable_reg(display, pll);
@@ -4064,13 +4064,13 @@ static void combo_pll_disable(struct intel_display *display,
}
static void tbt_pll_disable(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
icl_pll_disable(display, pll, TBT_PLL_ENABLE);
}
static void mg_pll_disable(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
i915_reg_t enable_reg = intel_tc_pll_enable_reg(display, pll);
@@ -4346,19 +4346,19 @@ void intel_shared_dpll_init(struct intel_display *display)
for (i = 0; dpll_info[i].name; i++) {
if (drm_WARN_ON(display->drm,
- i >= ARRAY_SIZE(display->dpll.shared_dplls)))
+ i >= ARRAY_SIZE(display->dpll.dplls)))
break;
/* must fit into unsigned long bitmask on 32bit */
if (drm_WARN_ON(display->drm, dpll_info[i].id >= 32))
break;
- display->dpll.shared_dplls[i].info = &dpll_info[i];
- display->dpll.shared_dplls[i].index = i;
+ display->dpll.dplls[i].info = &dpll_info[i];
+ display->dpll.dplls[i].index = i;
}
display->dpll.mgr = dpll_mgr;
- display->dpll.num_shared_dpll = i;
+ display->dpll.num_dpll = i;
}
/**
@@ -4482,7 +4482,7 @@ void intel_update_active_dpll(struct intel_atomic_state *state,
* Return the output frequency corresponding to @pll's passed in @dpll_hw_state.
*/
int intel_dpll_get_freq(struct intel_display *display,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state)
{
if (drm_WARN_ON(display->drm, !pll->info->funcs->get_freq))
@@ -4500,14 +4500,14 @@ int intel_dpll_get_freq(struct intel_display *display,
* Read out @pll's hardware state into @dpll_hw_state.
*/
bool intel_dpll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state)
{
return pll->info->funcs->get_hw_state(display, pll, dpll_hw_state);
}
static void readout_dpll_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
struct intel_crtc *crtc;
@@ -4521,7 +4521,7 @@ static void readout_dpll_hw_state(struct intel_display *display,
struct intel_crtc_state *crtc_state =
to_intel_crtc_state(crtc->base.state);
- if (crtc_state->hw.active && crtc_state->shared_dpll == pll)
+ if (crtc_state->hw.active && crtc_state->intel_dpll == pll)
intel_reference_shared_dpll_crtc(crtc, pll, &pll->state);
}
pll->active_mask = pll->state.pipe_mask;
@@ -4539,7 +4539,7 @@ void intel_dpll_update_ref_clks(struct intel_display *display)
void intel_dpll_readout_hw_state(struct intel_display *display)
{
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
int i;
for_each_dpll(display, pll, i)
@@ -4547,7 +4547,7 @@ void intel_dpll_readout_hw_state(struct intel_display *display)
}
static void sanitize_dpll_state(struct intel_display *display,
- struct intel_shared_dpll *pll)
+ struct intel_dpll *pll)
{
if (!pll->on)
return;
@@ -4566,7 +4566,7 @@ static void sanitize_dpll_state(struct intel_display *display,
void intel_dpll_sanitize_state(struct intel_display *display)
{
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
int i;
intel_cx0_pll_power_save_wa(display);
@@ -4623,7 +4623,7 @@ bool intel_dpll_compare_hw_state(struct intel_display *display,
static void
verify_single_dpll_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_crtc *crtc,
const struct intel_crtc_state *new_crtc_state)
{
@@ -4676,8 +4676,8 @@ verify_single_dpll_state(struct intel_display *display,
pll->info->name);
}
-static bool has_alt_port_dpll(const struct intel_shared_dpll *old_pll,
- const struct intel_shared_dpll *new_pll)
+static bool has_alt_port_dpll(const struct intel_dpll *old_pll,
+ const struct intel_dpll *new_pll)
{
return old_pll && new_pll && old_pll != new_pll &&
(old_pll->info->is_alt_port_dpll || new_pll->info->is_alt_port_dpll);
@@ -4692,22 +4692,22 @@ void intel_shared_dpll_state_verify(struct intel_atomic_state *state,
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- if (new_crtc_state->shared_dpll)
- verify_single_dpll_state(display, new_crtc_state->shared_dpll,
+ if (new_crtc_state->intel_dpll)
+ verify_single_dpll_state(display, new_crtc_state->intel_dpll,
crtc, new_crtc_state);
- if (old_crtc_state->shared_dpll &&
- old_crtc_state->shared_dpll != new_crtc_state->shared_dpll) {
+ if (old_crtc_state->intel_dpll &&
+ old_crtc_state->intel_dpll != new_crtc_state->intel_dpll) {
u8 pipe_mask = BIT(crtc->pipe);
- struct intel_shared_dpll *pll = old_crtc_state->shared_dpll;
+ struct intel_dpll *pll = old_crtc_state->intel_dpll;
INTEL_DISPLAY_STATE_WARN(display, pll->active_mask & pipe_mask,
"%s: pll active mismatch (didn't expect pipe %c in active mask (0x%x))\n",
pll->info->name, pipe_name(crtc->pipe), pll->active_mask);
/* TC ports have both MG/TC and TBT PLL referenced simultaneously */
- INTEL_DISPLAY_STATE_WARN(display, !has_alt_port_dpll(old_crtc_state->shared_dpll,
- new_crtc_state->shared_dpll) &&
+ INTEL_DISPLAY_STATE_WARN(display, !has_alt_port_dpll(old_crtc_state->intel_dpll,
+ new_crtc_state->intel_dpll) &&
pll->state.pipe_mask & pipe_mask,
"%s: pll enabled crtcs mismatch (found pipe %c in enabled mask (0x%x))\n",
pll->info->name, pipe_name(crtc->pipe), pll->state.pipe_mask);
@@ -4717,7 +4717,7 @@ void intel_shared_dpll_state_verify(struct intel_atomic_state *state,
void intel_shared_dpll_verify_disabled(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
int i;
for_each_dpll(display, pll, i)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index 28f464d504fb..ea3fb7002e65 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -31,8 +31,8 @@
#include "intel_wakeref.h"
#define for_each_dpll(__display, __pll, __i) \
- for ((__i) = 0; (__i) < (__display)->dpll.num_shared_dpll && \
- ((__pll) = &(__display)->dpll.shared_dplls[(__i)]) ; (__i)++)
+ for ((__i) = 0; (__i) < (__display)->dpll.num_dpll && \
+ ((__pll) = &(__display)->dpll.dplls[(__i)]) ; (__i)++)
enum tc_port;
struct drm_printer;
@@ -344,9 +344,9 @@ struct dpll_info {
};
/**
- * struct intel_shared_dpll - display PLL with tracked state and users
+ * struct intel_dpll - display PLL with tracked state and users
*/
-struct intel_shared_dpll {
+struct intel_dpll {
/**
* @state:
*
@@ -388,11 +388,11 @@ struct intel_shared_dpll {
#define SKL_DPLL3 3
/* shared dpll functions */
-struct intel_shared_dpll *
+struct intel_dpll *
intel_get_shared_dpll_by_id(struct intel_display *display,
enum intel_dpll_id id);
void assert_shared_dpll(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
bool state);
#define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
#define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
@@ -405,7 +405,7 @@ int intel_reserve_shared_dplls(struct intel_atomic_state *state,
void intel_release_shared_dplls(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
struct intel_dpll_state *shared_dpll_state);
void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,
enum icl_port_dpll_id port_dpll_id);
@@ -413,10 +413,10 @@ void intel_update_active_dpll(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_encoder *encoder);
int intel_dpll_get_freq(struct intel_display *display,
- const struct intel_shared_dpll *pll,
+ const struct intel_dpll *pll,
const struct intel_dpll_hw_state *dpll_hw_state);
bool intel_dpll_get_hw_state(struct intel_display *display,
- struct intel_shared_dpll *pll,
+ struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state);
void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state);
void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
index 169bbe154b5c..b1d2ba9b7295 100644
--- a/drivers/gpu/drm/i915/display/intel_fdi.c
+++ b/drivers/gpu/drm/i915/display/intel_fdi.c
@@ -910,7 +910,7 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
intel_de_write(display, FDI_RX_CTL(PIPE_A), rx_ctl_val);
/* Configure Port Clock Select */
- drm_WARN_ON(display->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL);
+ drm_WARN_ON(display->drm, crtc_state->intel_dpll->info->id != DPLL_ID_SPLL);
intel_ddi_enable_clock(encoder, crtc_state);
/* Start the training iterating through available voltages and emphasis,
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 8ce7c630da52..ec8f38fba178 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -249,7 +249,7 @@ static void intel_pre_enable_lvds(struct intel_atomic_state *state,
if (HAS_PCH_SPLIT(display)) {
assert_fdi_rx_pll_disabled(display, pipe);
- assert_shared_dpll_disabled(display, crtc_state->shared_dpll);
+ assert_shared_dpll_disabled(display, crtc_state->intel_dpll);
} else {
assert_pll_disabled(display, pipe);
}
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index 0325b0c9506d..46e0002a1358 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -92,10 +92,10 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc,
crtc->active = false;
crtc->base.enabled = false;
- if (crtc_state->shared_dpll)
+ if (crtc_state->intel_dpll)
intel_unreference_shared_dpll_crtc(crtc,
- crtc_state->shared_dpll,
- &crtc_state->shared_dpll->state);
+ crtc_state->intel_dpll,
+ &crtc_state->intel_dpll->state);
}
static void set_encoder_for_connector(struct intel_connector *connector,
@@ -565,7 +565,7 @@ static bool has_bogus_dpll_config(const struct intel_crtc_state *crtc_state)
*/
return display->platform.sandybridge &&
crtc_state->hw.active &&
- crtc_state->shared_dpll &&
+ crtc_state->intel_dpll &&
crtc_state->port_clock == 0;
}
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
index 1743ebf551cb..b38305c16e77 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
@@ -251,7 +251,7 @@ static void ilk_enable_pch_transcoder(const struct intel_crtc_state *crtc_state)
u32 val, pipeconf_val;
/* Make sure PCH DPLL is enabled */
- assert_shared_dpll_enabled(display, crtc_state->shared_dpll);
+ assert_shared_dpll_enabled(display, crtc_state->intel_dpll);
/* FDI must be feeding us bits for PCH ports */
assert_fdi_tx_enabled(display, pipe);
@@ -381,7 +381,7 @@ void ilk_pch_enable(struct intel_atomic_state *state,
temp = intel_de_read(display, PCH_DPLL_SEL);
temp |= TRANS_DPLL_ENABLE(pipe);
sel = TRANS_DPLLB_SEL(pipe);
- if (crtc_state->shared_dpll ==
+ if (crtc_state->intel_dpll ==
intel_get_shared_dpll_by_id(display, DPLL_ID_PCH_PLL_B))
temp |= sel;
else
@@ -496,7 +496,7 @@ void ilk_pch_get_config(struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
enum pipe pipe = crtc->pipe;
enum intel_dpll_id pll_id;
bool pll_active;
@@ -528,8 +528,8 @@ void ilk_pch_get_config(struct intel_crtc_state *crtc_state)
pll_id = DPLL_ID_PCH_PLL_A;
}
- crtc_state->shared_dpll = intel_get_shared_dpll_by_id(display, pll_id);
- pll = crtc_state->shared_dpll;
+ crtc_state->intel_dpll = intel_get_shared_dpll_by_id(display, pll_id);
+ pll = crtc_state->intel_dpll;
pll_active = intel_dpll_get_hw_state(display, pll,
&crtc_state->dpll_hw_state);
diff --git a/drivers/gpu/drm/i915/display/intel_pch_refclk.c b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
index 8bec55deff9f..9f6102d7c7be 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_refclk.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
@@ -499,7 +499,7 @@ static void lpt_init_pch_refclk(struct intel_display *display)
static void ilk_init_pch_refclk(struct intel_display *display)
{
struct intel_encoder *encoder;
- struct intel_shared_dpll *pll;
+ struct intel_dpll *pll;
int i;
u32 val, final;
bool has_lvds = false;
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* Re: [PATCH 06/14] drm/i915/dpll: Rename intel_shared_dpll
2025-05-15 7:17 ` [PATCH 06/14] drm/i915/dpll: Rename intel_shared_dpll Suraj Kandpal
@ 2025-05-15 7:24 ` Jani Nikula
2025-05-15 7:42 ` Kandpal, Suraj
0 siblings, 1 reply; 38+ messages in thread
From: Jani Nikula @ 2025-05-15 7:24 UTC (permalink / raw)
To: Suraj Kandpal, intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, mika.kahola, Suraj Kandpal
On Thu, 15 May 2025, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> Rename intel_shared_dpll to intel_dpll to represent both
> shared and individual dplls. Since from MTL each PHY has it's
> own PLL making the shared PLL naming a little outdated. In an
> effort to make this framework accepting of future changes this
> needs to be done.
>
> --v2
> -Use intel_dpll_global to make sure names start with the filename
> [Jani/Ville]
> -Explain the need of this rename [Jani]
>
> --v3
> -Just keep it intel_dpll [Jani]
>
> --v4
> -Fix comment [Jani]
> -Use just num_dpll and dplls [Jani]
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 52 ++--
> drivers/gpu/drm/i915/display/intel_ddi.h | 6 +-
> drivers/gpu/drm/i915/display/intel_display.c | 12 +-
> .../gpu/drm/i915/display/intel_display_core.h | 4 +-
> .../drm/i915/display/intel_display_debugfs.c | 2 +-
> .../drm/i915/display/intel_display_types.h | 6 +-
> drivers/gpu/drm/i915/display/intel_dpll.c | 4 +-
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 228 +++++++++---------
> drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 18 +-
> drivers/gpu/drm/i915/display/intel_fdi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_lvds.c | 2 +-
> .../drm/i915/display/intel_modeset_setup.c | 8 +-
> .../gpu/drm/i915/display/intel_pch_display.c | 10 +-
> .../gpu/drm/i915/display/intel_pch_refclk.c | 2 +-
> 15 files changed, 179 insertions(+), 179 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index ca7033251e91..55f0a20e0874 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -658,7 +658,7 @@ static void gen11_dsi_map_pll(struct intel_encoder *encoder,
> {
> struct intel_display *display = to_intel_display(encoder);
> struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
> - struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + struct intel_dpll *pll = crtc_state->intel_dpll;
The rb was conditioned on the member not being named intel_dpll.
BR,
Jani.
> enum phy phy;
> u32 val;
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 74132c1d6385..4d631cbc81d2 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -236,7 +236,7 @@ static void intel_wait_ddi_buf_active(struct intel_encoder *encoder)
> port_name(port));
> }
>
> -static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
> +static u32 hsw_pll_to_ddi_pll_sel(const struct intel_dpll *pll)
> {
> switch (pll->info->id) {
> case DPLL_ID_WRPLL1:
> @@ -260,7 +260,7 @@ static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
> static u32 icl_pll_to_ddi_clk_sel(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + const struct intel_dpll *pll = crtc_state->intel_dpll;
> int clock = crtc_state->port_clock;
> const enum intel_dpll_id id = pll->info->id;
>
> @@ -1561,7 +1561,7 @@ static bool _icl_ddi_is_clock_enabled(struct intel_display *display, i915_reg_t
> return !(intel_de_read(display, reg) & clk_off);
> }
>
> -static struct intel_shared_dpll *
> +static struct intel_dpll *
> _icl_ddi_get_pll(struct intel_display *display, i915_reg_t reg,
> u32 clk_sel_mask, u32 clk_sel_shift)
> {
> @@ -1576,7 +1576,7 @@ static void adls_ddi_enable_clock(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(encoder);
> - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + const struct intel_dpll *pll = crtc_state->intel_dpll;
> enum phy phy = intel_encoder_to_phy(encoder);
>
> if (drm_WARN_ON(display->drm, !pll))
> @@ -1606,7 +1606,7 @@ static bool adls_ddi_is_clock_enabled(struct intel_encoder *encoder)
> ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
> }
>
> -static struct intel_shared_dpll *adls_ddi_get_pll(struct intel_encoder *encoder)
> +static struct intel_dpll *adls_ddi_get_pll(struct intel_encoder *encoder)
> {
> struct intel_display *display = to_intel_display(encoder);
> enum phy phy = intel_encoder_to_phy(encoder);
> @@ -1620,7 +1620,7 @@ static void rkl_ddi_enable_clock(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(encoder);
> - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + const struct intel_dpll *pll = crtc_state->intel_dpll;
> enum phy phy = intel_encoder_to_phy(encoder);
>
> if (drm_WARN_ON(display->drm, !pll))
> @@ -1650,7 +1650,7 @@ static bool rkl_ddi_is_clock_enabled(struct intel_encoder *encoder)
> RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
> }
>
> -static struct intel_shared_dpll *rkl_ddi_get_pll(struct intel_encoder *encoder)
> +static struct intel_dpll *rkl_ddi_get_pll(struct intel_encoder *encoder)
> {
> struct intel_display *display = to_intel_display(encoder);
> enum phy phy = intel_encoder_to_phy(encoder);
> @@ -1664,7 +1664,7 @@ static void dg1_ddi_enable_clock(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(encoder);
> - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + const struct intel_dpll *pll = crtc_state->intel_dpll;
> enum phy phy = intel_encoder_to_phy(encoder);
>
> if (drm_WARN_ON(display->drm, !pll))
> @@ -1703,7 +1703,7 @@ static bool dg1_ddi_is_clock_enabled(struct intel_encoder *encoder)
> DG1_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
> }
>
> -static struct intel_shared_dpll *dg1_ddi_get_pll(struct intel_encoder *encoder)
> +static struct intel_dpll *dg1_ddi_get_pll(struct intel_encoder *encoder)
> {
> struct intel_display *display = to_intel_display(encoder);
> enum phy phy = intel_encoder_to_phy(encoder);
> @@ -1730,7 +1730,7 @@ static void icl_ddi_combo_enable_clock(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(encoder);
> - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + const struct intel_dpll *pll = crtc_state->intel_dpll;
> enum phy phy = intel_encoder_to_phy(encoder);
>
> if (drm_WARN_ON(display->drm, !pll))
> @@ -1760,7 +1760,7 @@ static bool icl_ddi_combo_is_clock_enabled(struct intel_encoder *encoder)
> ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
> }
>
> -struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder)
> +struct intel_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder)
> {
> struct intel_display *display = to_intel_display(encoder);
> enum phy phy = intel_encoder_to_phy(encoder);
> @@ -1774,7 +1774,7 @@ static void jsl_ddi_tc_enable_clock(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(encoder);
> - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + const struct intel_dpll *pll = crtc_state->intel_dpll;
> enum port port = encoder->port;
>
> if (drm_WARN_ON(display->drm, !pll))
> @@ -1817,7 +1817,7 @@ static void icl_ddi_tc_enable_clock(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(encoder);
> - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + const struct intel_dpll *pll = crtc_state->intel_dpll;
> enum tc_port tc_port = intel_encoder_to_tc(encoder);
> enum port port = encoder->port;
>
> @@ -1868,7 +1868,7 @@ static bool icl_ddi_tc_is_clock_enabled(struct intel_encoder *encoder)
> return !(tmp & ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port));
> }
>
> -static struct intel_shared_dpll *icl_ddi_tc_get_pll(struct intel_encoder *encoder)
> +static struct intel_dpll *icl_ddi_tc_get_pll(struct intel_encoder *encoder)
> {
> struct intel_display *display = to_intel_display(encoder);
> enum tc_port tc_port = intel_encoder_to_tc(encoder);
> @@ -1898,7 +1898,7 @@ static struct intel_shared_dpll *icl_ddi_tc_get_pll(struct intel_encoder *encode
> return intel_get_shared_dpll_by_id(display, id);
> }
>
> -static struct intel_shared_dpll *bxt_ddi_get_pll(struct intel_encoder *encoder)
> +static struct intel_dpll *bxt_ddi_get_pll(struct intel_encoder *encoder)
> {
> struct intel_display *display = to_intel_display(encoder->base.dev);
> enum intel_dpll_id id;
> @@ -1925,7 +1925,7 @@ static void skl_ddi_enable_clock(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(encoder);
> - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + const struct intel_dpll *pll = crtc_state->intel_dpll;
> enum port port = encoder->port;
>
> if (drm_WARN_ON(display->drm, !pll))
> @@ -1967,7 +1967,7 @@ static bool skl_ddi_is_clock_enabled(struct intel_encoder *encoder)
> return !(intel_de_read(display, DPLL_CTRL2) & DPLL_CTRL2_DDI_CLK_OFF(port));
> }
>
> -static struct intel_shared_dpll *skl_ddi_get_pll(struct intel_encoder *encoder)
> +static struct intel_dpll *skl_ddi_get_pll(struct intel_encoder *encoder)
> {
> struct intel_display *display = to_intel_display(encoder);
> enum port port = encoder->port;
> @@ -1993,7 +1993,7 @@ void hsw_ddi_enable_clock(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(encoder);
> - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + const struct intel_dpll *pll = crtc_state->intel_dpll;
> enum port port = encoder->port;
>
> if (drm_WARN_ON(display->drm, !pll))
> @@ -2018,7 +2018,7 @@ bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder)
> return intel_de_read(display, PORT_CLK_SEL(port)) != PORT_CLK_SEL_NONE;
> }
>
> -static struct intel_shared_dpll *hsw_ddi_get_pll(struct intel_encoder *encoder)
> +static struct intel_dpll *hsw_ddi_get_pll(struct intel_encoder *encoder)
> {
> struct intel_display *display = to_intel_display(encoder);
> enum port port = encoder->port;
> @@ -4187,7 +4187,7 @@ static void intel_ddi_get_config(struct intel_encoder *encoder,
>
> void intel_ddi_get_clock(struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> struct intel_display *display = to_intel_display(encoder);
> enum icl_port_dpll_id port_dpll_id = ICL_PORT_DPLL_DEFAULT;
> @@ -4203,7 +4203,7 @@ void intel_ddi_get_clock(struct intel_encoder *encoder,
>
> icl_set_active_port_dpll(crtc_state, port_dpll_id);
>
> - crtc_state->port_clock = intel_dpll_get_freq(display, crtc_state->shared_dpll,
> + crtc_state->port_clock = intel_dpll_get_freq(display, crtc_state->intel_dpll,
> &crtc_state->dpll_hw_state);
> }
>
> @@ -4257,7 +4257,7 @@ static void icl_ddi_combo_get_config(struct intel_encoder *encoder,
> intel_ddi_get_config(encoder, crtc_state);
> }
>
> -static bool icl_ddi_tc_pll_is_tbt(const struct intel_shared_dpll *pll)
> +static bool icl_ddi_tc_pll_is_tbt(const struct intel_dpll *pll)
> {
> return pll->info->id == DPLL_ID_ICL_TBTPLL;
> }
> @@ -4267,7 +4267,7 @@ icl_ddi_tc_port_pll_type(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(encoder);
> - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + const struct intel_dpll *pll = crtc_state->intel_dpll;
>
> if (drm_WARN_ON(display->drm, !pll))
> return ICL_PORT_DPLL_DEFAULT;
> @@ -4290,7 +4290,7 @@ intel_ddi_port_pll_type(struct intel_encoder *encoder,
>
> static void icl_ddi_tc_get_clock(struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> struct intel_display *display = to_intel_display(encoder);
> enum icl_port_dpll_id port_dpll_id;
> @@ -4313,10 +4313,10 @@ static void icl_ddi_tc_get_clock(struct intel_encoder *encoder,
>
> icl_set_active_port_dpll(crtc_state, port_dpll_id);
>
> - if (icl_ddi_tc_pll_is_tbt(crtc_state->shared_dpll))
> + if (icl_ddi_tc_pll_is_tbt(crtc_state->intel_dpll))
> crtc_state->port_clock = icl_calc_tbt_pll_link(display, encoder->port);
> else
> - crtc_state->port_clock = intel_dpll_get_freq(display, crtc_state->shared_dpll,
> + crtc_state->port_clock = intel_dpll_get_freq(display, crtc_state->intel_dpll,
> &crtc_state->dpll_hw_state);
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h b/drivers/gpu/drm/i915/display/intel_ddi.h
> index 353eb04079e9..f6f511bb0431 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.h
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.h
> @@ -16,9 +16,9 @@ struct intel_crtc;
> struct intel_crtc_state;
> struct intel_display;
> struct intel_dp;
> +struct intel_dpll;
> struct intel_dpll_hw_state;
> struct intel_encoder;
> -struct intel_shared_dpll;
> enum pipe;
> enum port;
> enum transcoder;
> @@ -40,7 +40,7 @@ void intel_ddi_enable_clock(struct intel_encoder *encoder,
> void intel_ddi_disable_clock(struct intel_encoder *encoder);
> void intel_ddi_get_clock(struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state,
> - struct intel_shared_dpll *pll);
> + struct intel_dpll *pll);
> void hsw_ddi_enable_clock(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state);
> void hsw_ddi_disable_clock(struct intel_encoder *encoder);
> @@ -50,7 +50,7 @@ intel_ddi_port_pll_type(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state);
> void hsw_ddi_get_config(struct intel_encoder *encoder,
> struct intel_crtc_state *crtc_state);
> -struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
> +struct intel_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
> void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state);
> void intel_wait_ddi_buf_idle(struct intel_display *display, enum port port);
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 6f0a0bc71b06..dcfbd3d2df32 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -1325,7 +1325,7 @@ static void intel_encoders_update_prepare(struct intel_atomic_state *state)
> if (intel_crtc_needs_modeset(new_crtc_state))
> continue;
>
> - new_crtc_state->shared_dpll = old_crtc_state->shared_dpll;
> + new_crtc_state->intel_dpll = old_crtc_state->intel_dpll;
> new_crtc_state->dpll_hw_state = old_crtc_state->dpll_hw_state;
> }
> }
> @@ -1663,7 +1663,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
>
> intel_encoders_pre_pll_enable(state, crtc);
>
> - if (new_crtc_state->shared_dpll)
> + if (new_crtc_state->intel_dpll)
> intel_enable_shared_dpll(new_crtc_state);
>
> intel_encoders_pre_enable(state, crtc);
> @@ -1959,7 +1959,7 @@ static void get_crtc_power_domains(struct intel_crtc_state *crtc_state,
> if (HAS_DDI(display) && crtc_state->has_audio)
> set_bit(POWER_DOMAIN_AUDIO_MMIO, mask->bits);
>
> - if (crtc_state->shared_dpll)
> + if (crtc_state->intel_dpll)
> set_bit(POWER_DOMAIN_DISPLAY_CORE, mask->bits);
>
> if (crtc_state->dsc.compression_enable)
> @@ -4501,7 +4501,7 @@ copy_joiner_crtc_state_modeset(struct intel_atomic_state *state,
> /* preserve some things from the slave's original crtc state */
> saved_state->uapi = secondary_crtc_state->uapi;
> saved_state->scaler_state = secondary_crtc_state->scaler_state;
> - saved_state->shared_dpll = secondary_crtc_state->shared_dpll;
> + saved_state->intel_dpll = secondary_crtc_state->intel_dpll;
> saved_state->crc_enabled = secondary_crtc_state->crc_enabled;
>
> intel_crtc_free_hw_state(secondary_crtc_state);
> @@ -4564,7 +4564,7 @@ intel_crtc_prepare_cleared_state(struct intel_atomic_state *state,
> saved_state->uapi = crtc_state->uapi;
> saved_state->inherited = crtc_state->inherited;
> saved_state->scaler_state = crtc_state->scaler_state;
> - saved_state->shared_dpll = crtc_state->shared_dpll;
> + saved_state->intel_dpll = crtc_state->intel_dpll;
> saved_state->dpll_hw_state = crtc_state->dpll_hw_state;
> memcpy(saved_state->icl_port_dplls, crtc_state->icl_port_dplls,
> sizeof(saved_state->icl_port_dplls));
> @@ -5318,7 +5318,7 @@ intel_pipe_config_compare(const struct intel_crtc_state *current_config,
> PIPE_CONF_CHECK_BOOL(double_wide);
>
> if (display->dpll.mgr)
> - PIPE_CONF_CHECK_P(shared_dpll);
> + PIPE_CONF_CHECK_P(intel_dpll);
>
> /* FIXME convert everything over the dpll_mgr */
> if (display->dpll.mgr || HAS_GMCH(display))
> diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
> index e0221e514326..5f5dd2722d99 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> @@ -125,8 +125,8 @@ struct intel_audio {
> struct intel_dpll_global {
> struct mutex lock;
>
> - int num_shared_dpll;
> - struct intel_shared_dpll shared_dplls[I915_NUM_PLLS];
> + int num_dpll;
> + struct intel_dpll dplls[I915_NUM_PLLS];
> const struct intel_dpll_mgr *mgr;
>
> struct {
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 3770ce9469d1..ea9e271bc6ee 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -618,7 +618,7 @@ static int i915_shared_dplls_info(struct seq_file *m, void *unused)
> {
> struct intel_display *display = node_to_intel_display(m->private);
> struct drm_printer p = drm_seq_file_printer(m);
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> int i;
>
> drm_modeset_lock_all(display->drm);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 1bdffaca153a..dbb07f05bfc6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1075,8 +1075,8 @@ struct intel_crtc_state {
> * haswell. */
> struct dpll dpll;
>
> - /* Selected dpll when shared or NULL. */
> - struct intel_shared_dpll *shared_dpll;
> + /* Selected dpll or NULL. */
> + struct intel_dpll *intel_dpll;
>
> /* Actual register state of the dpll, for shared dpll cross-checking. */
> struct intel_dpll_hw_state dpll_hw_state;
> @@ -1086,7 +1086,7 @@ struct intel_crtc_state {
> * setting shared_dpll and dpll_hw_state to one of these reserved ones.
> */
> struct icl_port_dpll {
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> struct intel_dpll_hw_state hw_state;
> } icl_port_dplls[ICL_PORT_DPLL_COUNT];
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
> index 8db603d9c823..4d1f7fccd28a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> @@ -1767,9 +1767,9 @@ int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,
> int ret;
>
> drm_WARN_ON(display->drm, !intel_crtc_needs_modeset(crtc_state));
> - drm_WARN_ON(display->drm, !crtc_state->hw.enable && crtc_state->shared_dpll);
> + drm_WARN_ON(display->drm, !crtc_state->hw.enable && crtc_state->intel_dpll);
>
> - if (!crtc_state->hw.enable || crtc_state->shared_dpll)
> + if (!crtc_state->hw.enable || crtc_state->intel_dpll)
> return 0;
>
> if (!display->funcs.dpll->crtc_get_shared_dpll)
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index bdad4d72cc01..6fbbc5e89f3c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -70,7 +70,7 @@ struct intel_dpll_funcs {
> * the pll is not already enabled.
> */
> void (*enable)(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state);
>
> /*
> @@ -79,7 +79,7 @@ struct intel_dpll_funcs {
> * tracked users for it.
> */
> void (*disable)(struct intel_display *display,
> - struct intel_shared_dpll *pll);
> + struct intel_dpll *pll);
>
> /*
> * Hook for reading the values currently programmed to the DPLL
> @@ -87,7 +87,7 @@ struct intel_dpll_funcs {
> * verification after a mode set.
> */
> bool (*get_hw_state)(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state);
>
> /*
> @@ -95,7 +95,7 @@ struct intel_dpll_funcs {
> * in state.
> */
> int (*get_freq)(struct intel_display *i915,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state);
> };
>
> @@ -124,7 +124,7 @@ static void
> intel_atomic_duplicate_dpll_state(struct intel_display *display,
> struct intel_dpll_state *dpll_state)
> {
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> int i;
>
> /* Copy dpll state */
> @@ -158,11 +158,11 @@ intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s)
> * Returns:
> * A pointer to the DPLL with @id
> */
> -struct intel_shared_dpll *
> +struct intel_dpll *
> intel_get_shared_dpll_by_id(struct intel_display *display,
> enum intel_dpll_id id)
> {
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> int i;
>
> for_each_dpll(display, pll, i) {
> @@ -176,7 +176,7 @@ intel_get_shared_dpll_by_id(struct intel_display *display,
>
> /* For ILK+ */
> void assert_shared_dpll(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> bool state)
> {
> bool cur_state;
> @@ -205,7 +205,7 @@ enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port)
>
> static i915_reg_t
> intel_combo_pll_enable_reg(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> if (display->platform.dg1)
> return DG1_DPLL_ENABLE(pll->info->id);
> @@ -218,7 +218,7 @@ intel_combo_pll_enable_reg(struct intel_display *display,
>
> static i915_reg_t
> intel_tc_pll_enable_reg(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> const enum intel_dpll_id id = pll->info->id;
> enum tc_port tc_port = icl_pll_id_to_tc_port(id);
> @@ -230,7 +230,7 @@ intel_tc_pll_enable_reg(struct intel_display *display,
> }
>
> static void _intel_enable_shared_dpll(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> if (pll->info->power_domain)
> pll->wakeref = intel_display_power_get(display, pll->info->power_domain);
> @@ -240,7 +240,7 @@ static void _intel_enable_shared_dpll(struct intel_display *display,
> }
>
> static void _intel_disable_shared_dpll(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> pll->info->funcs->disable(display, pll);
> pll->on = false;
> @@ -259,7 +259,7 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(crtc_state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + struct intel_dpll *pll = crtc_state->intel_dpll;
> unsigned int pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
> unsigned int old_mask;
>
> @@ -305,7 +305,7 @@ void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(crtc_state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> + struct intel_dpll *pll = crtc_state->intel_dpll;
> unsigned int pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
>
> /* PCH only available on ILK+ */
> @@ -344,7 +344,7 @@ void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state)
> static unsigned long
> intel_dpll_mask_all(struct intel_display *display)
> {
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> unsigned long dpll_mask = 0;
> int i;
>
> @@ -357,7 +357,7 @@ intel_dpll_mask_all(struct intel_display *display)
> return dpll_mask;
> }
>
> -static struct intel_shared_dpll *
> +static struct intel_dpll *
> intel_find_shared_dpll(struct intel_atomic_state *state,
> const struct intel_crtc *crtc,
> const struct intel_dpll_hw_state *dpll_hw_state,
> @@ -366,7 +366,7 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
> struct intel_display *display = to_intel_display(crtc);
> unsigned long dpll_mask_all = intel_dpll_mask_all(display);
> struct intel_dpll_state *dpll_state;
> - struct intel_shared_dpll *unused_pll = NULL;
> + struct intel_dpll *unused_pll = NULL;
> enum intel_dpll_id id;
>
> dpll_state = intel_atomic_get_shared_dpll_state(&state->base);
> @@ -374,7 +374,7 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
> drm_WARN_ON(display->drm, dpll_mask & ~dpll_mask_all);
>
> for_each_set_bit(id, &dpll_mask, fls(dpll_mask_all)) {
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
>
> pll = intel_get_shared_dpll_by_id(display, id);
> if (!pll)
> @@ -421,7 +421,7 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
> */
> static void
> intel_reference_shared_dpll_crtc(const struct intel_crtc *crtc,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> struct intel_dpll_state *dpll_state)
> {
> struct intel_display *display = to_intel_display(crtc);
> @@ -437,7 +437,7 @@ intel_reference_shared_dpll_crtc(const struct intel_crtc *crtc,
> static void
> intel_reference_shared_dpll(struct intel_atomic_state *state,
> const struct intel_crtc *crtc,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> struct intel_dpll_state *dpll_state;
> @@ -460,7 +460,7 @@ intel_reference_shared_dpll(struct intel_atomic_state *state,
> */
> void
> intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> struct intel_dpll_state *dpll_state)
> {
> struct intel_display *display = to_intel_display(crtc);
> @@ -475,7 +475,7 @@ intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
>
> static void intel_unreference_shared_dpll(struct intel_atomic_state *state,
> const struct intel_crtc *crtc,
> - const struct intel_shared_dpll *pll)
> + const struct intel_dpll *pll)
> {
> struct intel_dpll_state *dpll_state;
>
> @@ -492,12 +492,12 @@ static void intel_put_dpll(struct intel_atomic_state *state,
> struct intel_crtc_state *new_crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
>
> - new_crtc_state->shared_dpll = NULL;
> + new_crtc_state->intel_dpll = NULL;
>
> - if (!old_crtc_state->shared_dpll)
> + if (!old_crtc_state->intel_dpll)
> return;
>
> - intel_unreference_shared_dpll(state, crtc, old_crtc_state->shared_dpll);
> + intel_unreference_shared_dpll(state, crtc, old_crtc_state->intel_dpll);
> }
>
> /**
> @@ -515,7 +515,7 @@ void intel_shared_dpll_swap_state(struct intel_atomic_state *state)
> {
> struct intel_display *display = to_intel_display(state);
> struct intel_dpll_state *dpll_state = state->dpll_state;
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> int i;
>
> if (!state->dpll_set)
> @@ -526,7 +526,7 @@ void intel_shared_dpll_swap_state(struct intel_atomic_state *state)
> }
>
> static bool ibx_pch_dpll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state)
> {
> struct i9xx_dpll_hw_state *hw_state = &dpll_hw_state->i9xx;
> @@ -562,7 +562,7 @@ static void ibx_assert_pch_refclk_enabled(struct intel_display *display)
> }
>
> static void ibx_pch_dpll_enable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct i9xx_dpll_hw_state *hw_state = &dpll_hw_state->i9xx;
> @@ -591,7 +591,7 @@ static void ibx_pch_dpll_enable(struct intel_display *display,
> }
>
> static void ibx_pch_dpll_disable(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> const enum intel_dpll_id id = pll->info->id;
>
> @@ -614,7 +614,7 @@ static int ibx_get_dpll(struct intel_atomic_state *state,
> struct intel_display *display = to_intel_display(state);
> struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> enum intel_dpll_id id;
>
> if (HAS_PCH_IBX(display)) {
> @@ -640,7 +640,7 @@ static int ibx_get_dpll(struct intel_atomic_state *state,
> intel_reference_shared_dpll(state, crtc,
> pll, &crtc_state->dpll_hw_state);
>
> - crtc_state->shared_dpll = pll;
> + crtc_state->intel_dpll = pll;
>
> return 0;
> }
> @@ -692,7 +692,7 @@ static const struct intel_dpll_mgr pch_pll_mgr = {
> };
>
> static void hsw_ddi_wrpll_enable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> @@ -704,7 +704,7 @@ static void hsw_ddi_wrpll_enable(struct intel_display *display,
> }
>
> static void hsw_ddi_spll_enable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> @@ -715,7 +715,7 @@ static void hsw_ddi_spll_enable(struct intel_display *display,
> }
>
> static void hsw_ddi_wrpll_disable(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> const enum intel_dpll_id id = pll->info->id;
>
> @@ -731,7 +731,7 @@ static void hsw_ddi_wrpll_disable(struct intel_display *display,
> }
>
> static void hsw_ddi_spll_disable(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> enum intel_dpll_id id = pll->info->id;
>
> @@ -747,7 +747,7 @@ static void hsw_ddi_spll_disable(struct intel_display *display,
> }
>
> static bool hsw_ddi_wrpll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state)
> {
> struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> @@ -769,7 +769,7 @@ static bool hsw_ddi_wrpll_get_hw_state(struct intel_display *display,
> }
>
> static bool hsw_ddi_spll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state)
> {
> struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> @@ -996,7 +996,7 @@ hsw_ddi_calculate_wrpll(int clock /* in Hz */,
> }
>
> static int hsw_ddi_wrpll_get_freq(struct intel_display *display,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> @@ -1059,7 +1059,7 @@ hsw_ddi_wrpll_compute_dpll(struct intel_atomic_state *state,
> return 0;
> }
>
> -static struct intel_shared_dpll *
> +static struct intel_dpll *
> hsw_ddi_wrpll_get_dpll(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> @@ -1090,11 +1090,11 @@ hsw_ddi_lcpll_compute_dpll(struct intel_crtc_state *crtc_state)
> }
> }
>
> -static struct intel_shared_dpll *
> +static struct intel_dpll *
> hsw_ddi_lcpll_get_dpll(struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(crtc_state);
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> enum intel_dpll_id pll_id;
> int clock = crtc_state->port_clock;
>
> @@ -1122,7 +1122,7 @@ hsw_ddi_lcpll_get_dpll(struct intel_crtc_state *crtc_state)
> }
>
> static int hsw_ddi_lcpll_get_freq(struct intel_display *display,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> int link_clock = 0;
> @@ -1162,7 +1162,7 @@ hsw_ddi_spll_compute_dpll(struct intel_atomic_state *state,
> return 0;
> }
>
> -static struct intel_shared_dpll *
> +static struct intel_dpll *
> hsw_ddi_spll_get_dpll(struct intel_atomic_state *state,
> struct intel_crtc *crtc)
> {
> @@ -1174,7 +1174,7 @@ hsw_ddi_spll_get_dpll(struct intel_atomic_state *state,
> }
>
> static int hsw_ddi_spll_get_freq(struct intel_display *display,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> @@ -1221,7 +1221,7 @@ static int hsw_get_dpll(struct intel_atomic_state *state,
> {
> struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> - struct intel_shared_dpll *pll = NULL;
> + struct intel_dpll *pll = NULL;
>
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
> pll = hsw_ddi_wrpll_get_dpll(state, crtc);
> @@ -1236,7 +1236,7 @@ static int hsw_get_dpll(struct intel_atomic_state *state,
> intel_reference_shared_dpll(state, crtc,
> pll, &crtc_state->dpll_hw_state);
>
> - crtc_state->shared_dpll = pll;
> + crtc_state->intel_dpll = pll;
>
> return 0;
> }
> @@ -1285,18 +1285,18 @@ static const struct intel_dpll_funcs hsw_ddi_spll_funcs = {
> };
>
> static void hsw_ddi_lcpll_enable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct intel_dpll_hw_state *hw_state)
> {
> }
>
> static void hsw_ddi_lcpll_disable(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> }
>
> static bool hsw_ddi_lcpll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state)
> {
> return true;
> @@ -1364,7 +1364,7 @@ static const struct skl_dpll_regs skl_dpll_regs[4] = {
> };
>
> static void skl_ddi_pll_write_ctrl1(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct skl_dpll_hw_state *hw_state)
> {
> const enum intel_dpll_id id = pll->info->id;
> @@ -1378,7 +1378,7 @@ static void skl_ddi_pll_write_ctrl1(struct intel_display *display,
> }
>
> static void skl_ddi_pll_enable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> @@ -1400,7 +1400,7 @@ static void skl_ddi_pll_enable(struct intel_display *display,
> }
>
> static void skl_ddi_dpll0_enable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> @@ -1409,7 +1409,7 @@ static void skl_ddi_dpll0_enable(struct intel_display *display,
> }
>
> static void skl_ddi_pll_disable(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> const struct skl_dpll_regs *regs = skl_dpll_regs;
> const enum intel_dpll_id id = pll->info->id;
> @@ -1420,12 +1420,12 @@ static void skl_ddi_pll_disable(struct intel_display *display,
> }
>
> static void skl_ddi_dpll0_disable(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> }
>
> static bool skl_ddi_pll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state)
> {
> struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> @@ -1463,7 +1463,7 @@ static bool skl_ddi_pll_get_hw_state(struct intel_display *display,
> }
>
> static bool skl_ddi_dpll0_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state)
> {
> struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> @@ -1736,7 +1736,7 @@ skl_ddi_calculate_wrpll(int clock,
> }
>
> static int skl_ddi_wrpll_get_freq(struct intel_display *display,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> @@ -1884,7 +1884,7 @@ skl_ddi_dp_set_dpll_hw_state(struct intel_crtc_state *crtc_state)
> }
>
> static int skl_ddi_lcpll_get_freq(struct intel_display *display,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> @@ -1939,7 +1939,7 @@ static int skl_get_dpll(struct intel_atomic_state *state,
> {
> struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
>
> if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
> pll = intel_find_shared_dpll(state, crtc,
> @@ -1957,13 +1957,13 @@ static int skl_get_dpll(struct intel_atomic_state *state,
> intel_reference_shared_dpll(state, crtc,
> pll, &crtc_state->dpll_hw_state);
>
> - crtc_state->shared_dpll = pll;
> + crtc_state->intel_dpll = pll;
>
> return 0;
> }
>
> static int skl_ddi_pll_get_freq(struct intel_display *display,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> @@ -2038,7 +2038,7 @@ static const struct intel_dpll_mgr skl_pll_mgr = {
> };
>
> static void bxt_ddi_pll_enable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
> @@ -2141,7 +2141,7 @@ static void bxt_ddi_pll_enable(struct intel_display *display,
> }
>
> static void bxt_ddi_pll_disable(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> enum port port = (enum port)pll->info->id; /* 1:1 port->PLL mapping */
>
> @@ -2160,7 +2160,7 @@ static void bxt_ddi_pll_disable(struct intel_display *display,
> }
>
> static bool bxt_ddi_pll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state)
> {
> struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
> @@ -2360,7 +2360,7 @@ static int bxt_ddi_set_dpll_hw_state(struct intel_crtc_state *crtc_state,
> }
>
> static int bxt_ddi_pll_get_freq(struct intel_display *display,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
> @@ -2429,7 +2429,7 @@ static int bxt_get_dpll(struct intel_atomic_state *state,
> struct intel_display *display = to_intel_display(state);
> struct intel_crtc_state *crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> enum intel_dpll_id id;
>
> /* 1:1 mapping between ports and PLLs */
> @@ -2442,7 +2442,7 @@ static int bxt_get_dpll(struct intel_atomic_state *state,
> intel_reference_shared_dpll(state, crtc,
> pll, &crtc_state->dpll_hw_state);
>
> - crtc_state->shared_dpll = pll;
> + crtc_state->intel_dpll = pll;
>
> return 0;
> }
> @@ -2755,7 +2755,7 @@ static int icl_calc_tbt_pll(struct intel_crtc_state *crtc_state,
> }
>
> static int icl_ddi_tbt_pll_get_freq(struct intel_display *display,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> /*
> @@ -2826,7 +2826,7 @@ icl_calc_wrpll(struct intel_crtc_state *crtc_state,
> }
>
> static int icl_ddi_combo_pll_get_freq(struct intel_display *display,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> @@ -3199,7 +3199,7 @@ static int icl_calc_mg_pll_state(struct intel_crtc_state *crtc_state,
> }
>
> static int icl_ddi_mg_pll_get_freq(struct intel_display *display,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> @@ -3285,7 +3285,7 @@ void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,
> struct icl_port_dpll *port_dpll =
> &crtc_state->icl_port_dplls[port_dpll_id];
>
> - crtc_state->shared_dpll = port_dpll->pll;
> + crtc_state->intel_dpll = port_dpll->pll;
> crtc_state->dpll_hw_state = port_dpll->hw_state;
> }
>
> @@ -3428,8 +3428,8 @@ static int icl_compute_tc_phy_dplls(struct intel_atomic_state *state,
> return ret;
>
> /* this is mainly for the fastset check */
> - if (old_crtc_state->shared_dpll &&
> - old_crtc_state->shared_dpll->info->id == DPLL_ID_ICL_TBTPLL)
> + if (old_crtc_state->intel_dpll &&
> + old_crtc_state->intel_dpll->info->id == DPLL_ID_ICL_TBTPLL)
> icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT);
> else
> icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_MG_PHY);
> @@ -3521,7 +3521,7 @@ static void icl_put_dplls(struct intel_atomic_state *state,
> intel_atomic_get_new_crtc_state(state, crtc);
> enum icl_port_dpll_id id;
>
> - new_crtc_state->shared_dpll = NULL;
> + new_crtc_state->intel_dpll = NULL;
>
> for (id = ICL_PORT_DPLL_DEFAULT; id < ICL_PORT_DPLL_COUNT; id++) {
> const struct icl_port_dpll *old_port_dpll =
> @@ -3539,7 +3539,7 @@ static void icl_put_dplls(struct intel_atomic_state *state,
> }
>
> static bool mg_pll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state)
> {
> struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> @@ -3606,7 +3606,7 @@ static bool mg_pll_get_hw_state(struct intel_display *display,
> }
>
> static bool dkl_pll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state)
> {
> struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> @@ -3678,7 +3678,7 @@ static bool dkl_pll_get_hw_state(struct intel_display *display,
> }
>
> static bool icl_pll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state,
> i915_reg_t enable_reg)
> {
> @@ -3739,7 +3739,7 @@ static bool icl_pll_get_hw_state(struct intel_display *display,
> }
>
> static bool combo_pll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state)
> {
> i915_reg_t enable_reg = intel_combo_pll_enable_reg(display, pll);
> @@ -3748,14 +3748,14 @@ static bool combo_pll_get_hw_state(struct intel_display *display,
> }
>
> static bool tbt_pll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state)
> {
> return icl_pll_get_hw_state(display, pll, dpll_hw_state, TBT_PLL_ENABLE);
> }
>
> static void icl_dpll_write(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct icl_dpll_hw_state *hw_state)
> {
> const enum intel_dpll_id id = pll->info->id;
> @@ -3797,7 +3797,7 @@ static void icl_dpll_write(struct intel_display *display,
> }
>
> static void icl_mg_pll_write(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct icl_dpll_hw_state *hw_state)
> {
> enum tc_port tc_port = icl_pll_id_to_tc_port(pll->info->id);
> @@ -3840,7 +3840,7 @@ static void icl_mg_pll_write(struct intel_display *display,
> }
>
> static void dkl_pll_write(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct icl_dpll_hw_state *hw_state)
> {
> enum tc_port tc_port = icl_pll_id_to_tc_port(pll->info->id);
> @@ -3905,7 +3905,7 @@ static void dkl_pll_write(struct intel_display *display,
> }
>
> static void icl_pll_power_enable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> i915_reg_t enable_reg)
> {
> intel_de_rmw(display, enable_reg, 0, PLL_POWER_ENABLE);
> @@ -3920,7 +3920,7 @@ static void icl_pll_power_enable(struct intel_display *display,
> }
>
> static void icl_pll_enable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> i915_reg_t enable_reg)
> {
> intel_de_rmw(display, enable_reg, 0, PLL_ENABLE);
> @@ -3930,7 +3930,7 @@ static void icl_pll_enable(struct intel_display *display,
> drm_err(display->drm, "PLL %d not locked\n", pll->info->id);
> }
>
> -static void adlp_cmtg_clock_gating_wa(struct intel_display *display, struct intel_shared_dpll *pll)
> +static void adlp_cmtg_clock_gating_wa(struct intel_display *display, struct intel_dpll *pll)
> {
> u32 val;
>
> @@ -3955,7 +3955,7 @@ static void adlp_cmtg_clock_gating_wa(struct intel_display *display, struct inte
> }
>
> static void combo_pll_enable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> @@ -3979,7 +3979,7 @@ static void combo_pll_enable(struct intel_display *display,
> }
>
> static void tbt_pll_enable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> @@ -4000,7 +4000,7 @@ static void tbt_pll_enable(struct intel_display *display,
> }
>
> static void mg_pll_enable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> @@ -4025,7 +4025,7 @@ static void mg_pll_enable(struct intel_display *display,
> }
>
> static void icl_pll_disable(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> i915_reg_t enable_reg)
> {
> /* The first steps are done by intel_ddi_post_disable(). */
> @@ -4056,7 +4056,7 @@ static void icl_pll_disable(struct intel_display *display,
> }
>
> static void combo_pll_disable(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> i915_reg_t enable_reg = intel_combo_pll_enable_reg(display, pll);
>
> @@ -4064,13 +4064,13 @@ static void combo_pll_disable(struct intel_display *display,
> }
>
> static void tbt_pll_disable(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> icl_pll_disable(display, pll, TBT_PLL_ENABLE);
> }
>
> static void mg_pll_disable(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> i915_reg_t enable_reg = intel_tc_pll_enable_reg(display, pll);
>
> @@ -4346,19 +4346,19 @@ void intel_shared_dpll_init(struct intel_display *display)
>
> for (i = 0; dpll_info[i].name; i++) {
> if (drm_WARN_ON(display->drm,
> - i >= ARRAY_SIZE(display->dpll.shared_dplls)))
> + i >= ARRAY_SIZE(display->dpll.dplls)))
> break;
>
> /* must fit into unsigned long bitmask on 32bit */
> if (drm_WARN_ON(display->drm, dpll_info[i].id >= 32))
> break;
>
> - display->dpll.shared_dplls[i].info = &dpll_info[i];
> - display->dpll.shared_dplls[i].index = i;
> + display->dpll.dplls[i].info = &dpll_info[i];
> + display->dpll.dplls[i].index = i;
> }
>
> display->dpll.mgr = dpll_mgr;
> - display->dpll.num_shared_dpll = i;
> + display->dpll.num_dpll = i;
> }
>
> /**
> @@ -4482,7 +4482,7 @@ void intel_update_active_dpll(struct intel_atomic_state *state,
> * Return the output frequency corresponding to @pll's passed in @dpll_hw_state.
> */
> int intel_dpll_get_freq(struct intel_display *display,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state)
> {
> if (drm_WARN_ON(display->drm, !pll->info->funcs->get_freq))
> @@ -4500,14 +4500,14 @@ int intel_dpll_get_freq(struct intel_display *display,
> * Read out @pll's hardware state into @dpll_hw_state.
> */
> bool intel_dpll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state)
> {
> return pll->info->funcs->get_hw_state(display, pll, dpll_hw_state);
> }
>
> static void readout_dpll_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> struct intel_crtc *crtc;
>
> @@ -4521,7 +4521,7 @@ static void readout_dpll_hw_state(struct intel_display *display,
> struct intel_crtc_state *crtc_state =
> to_intel_crtc_state(crtc->base.state);
>
> - if (crtc_state->hw.active && crtc_state->shared_dpll == pll)
> + if (crtc_state->hw.active && crtc_state->intel_dpll == pll)
> intel_reference_shared_dpll_crtc(crtc, pll, &pll->state);
> }
> pll->active_mask = pll->state.pipe_mask;
> @@ -4539,7 +4539,7 @@ void intel_dpll_update_ref_clks(struct intel_display *display)
>
> void intel_dpll_readout_hw_state(struct intel_display *display)
> {
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> int i;
>
> for_each_dpll(display, pll, i)
> @@ -4547,7 +4547,7 @@ void intel_dpll_readout_hw_state(struct intel_display *display)
> }
>
> static void sanitize_dpll_state(struct intel_display *display,
> - struct intel_shared_dpll *pll)
> + struct intel_dpll *pll)
> {
> if (!pll->on)
> return;
> @@ -4566,7 +4566,7 @@ static void sanitize_dpll_state(struct intel_display *display,
>
> void intel_dpll_sanitize_state(struct intel_display *display)
> {
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> int i;
>
> intel_cx0_pll_power_save_wa(display);
> @@ -4623,7 +4623,7 @@ bool intel_dpll_compare_hw_state(struct intel_display *display,
>
> static void
> verify_single_dpll_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_crtc *crtc,
> const struct intel_crtc_state *new_crtc_state)
> {
> @@ -4676,8 +4676,8 @@ verify_single_dpll_state(struct intel_display *display,
> pll->info->name);
> }
>
> -static bool has_alt_port_dpll(const struct intel_shared_dpll *old_pll,
> - const struct intel_shared_dpll *new_pll)
> +static bool has_alt_port_dpll(const struct intel_dpll *old_pll,
> + const struct intel_dpll *new_pll)
> {
> return old_pll && new_pll && old_pll != new_pll &&
> (old_pll->info->is_alt_port_dpll || new_pll->info->is_alt_port_dpll);
> @@ -4692,22 +4692,22 @@ void intel_shared_dpll_state_verify(struct intel_atomic_state *state,
> const struct intel_crtc_state *new_crtc_state =
> intel_atomic_get_new_crtc_state(state, crtc);
>
> - if (new_crtc_state->shared_dpll)
> - verify_single_dpll_state(display, new_crtc_state->shared_dpll,
> + if (new_crtc_state->intel_dpll)
> + verify_single_dpll_state(display, new_crtc_state->intel_dpll,
> crtc, new_crtc_state);
>
> - if (old_crtc_state->shared_dpll &&
> - old_crtc_state->shared_dpll != new_crtc_state->shared_dpll) {
> + if (old_crtc_state->intel_dpll &&
> + old_crtc_state->intel_dpll != new_crtc_state->intel_dpll) {
> u8 pipe_mask = BIT(crtc->pipe);
> - struct intel_shared_dpll *pll = old_crtc_state->shared_dpll;
> + struct intel_dpll *pll = old_crtc_state->intel_dpll;
>
> INTEL_DISPLAY_STATE_WARN(display, pll->active_mask & pipe_mask,
> "%s: pll active mismatch (didn't expect pipe %c in active mask (0x%x))\n",
> pll->info->name, pipe_name(crtc->pipe), pll->active_mask);
>
> /* TC ports have both MG/TC and TBT PLL referenced simultaneously */
> - INTEL_DISPLAY_STATE_WARN(display, !has_alt_port_dpll(old_crtc_state->shared_dpll,
> - new_crtc_state->shared_dpll) &&
> + INTEL_DISPLAY_STATE_WARN(display, !has_alt_port_dpll(old_crtc_state->intel_dpll,
> + new_crtc_state->intel_dpll) &&
> pll->state.pipe_mask & pipe_mask,
> "%s: pll enabled crtcs mismatch (found pipe %c in enabled mask (0x%x))\n",
> pll->info->name, pipe_name(crtc->pipe), pll->state.pipe_mask);
> @@ -4717,7 +4717,7 @@ void intel_shared_dpll_state_verify(struct intel_atomic_state *state,
> void intel_shared_dpll_verify_disabled(struct intel_atomic_state *state)
> {
> struct intel_display *display = to_intel_display(state);
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> int i;
>
> for_each_dpll(display, pll, i)
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> index 28f464d504fb..ea3fb7002e65 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> @@ -31,8 +31,8 @@
> #include "intel_wakeref.h"
>
> #define for_each_dpll(__display, __pll, __i) \
> - for ((__i) = 0; (__i) < (__display)->dpll.num_shared_dpll && \
> - ((__pll) = &(__display)->dpll.shared_dplls[(__i)]) ; (__i)++)
> + for ((__i) = 0; (__i) < (__display)->dpll.num_dpll && \
> + ((__pll) = &(__display)->dpll.dplls[(__i)]) ; (__i)++)
>
> enum tc_port;
> struct drm_printer;
> @@ -344,9 +344,9 @@ struct dpll_info {
> };
>
> /**
> - * struct intel_shared_dpll - display PLL with tracked state and users
> + * struct intel_dpll - display PLL with tracked state and users
> */
> -struct intel_shared_dpll {
> +struct intel_dpll {
> /**
> * @state:
> *
> @@ -388,11 +388,11 @@ struct intel_shared_dpll {
> #define SKL_DPLL3 3
>
> /* shared dpll functions */
> -struct intel_shared_dpll *
> +struct intel_dpll *
> intel_get_shared_dpll_by_id(struct intel_display *display,
> enum intel_dpll_id id);
> void assert_shared_dpll(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> bool state);
> #define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
> #define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
> @@ -405,7 +405,7 @@ int intel_reserve_shared_dplls(struct intel_atomic_state *state,
> void intel_release_shared_dplls(struct intel_atomic_state *state,
> struct intel_crtc *crtc);
> void intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> struct intel_dpll_state *shared_dpll_state);
> void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,
> enum icl_port_dpll_id port_dpll_id);
> @@ -413,10 +413,10 @@ void intel_update_active_dpll(struct intel_atomic_state *state,
> struct intel_crtc *crtc,
> struct intel_encoder *encoder);
> int intel_dpll_get_freq(struct intel_display *display,
> - const struct intel_shared_dpll *pll,
> + const struct intel_dpll *pll,
> const struct intel_dpll_hw_state *dpll_hw_state);
> bool intel_dpll_get_hw_state(struct intel_display *display,
> - struct intel_shared_dpll *pll,
> + struct intel_dpll *pll,
> struct intel_dpll_hw_state *dpll_hw_state);
> void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state);
> void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c b/drivers/gpu/drm/i915/display/intel_fdi.c
> index 169bbe154b5c..b1d2ba9b7295 100644
> --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> @@ -910,7 +910,7 @@ void hsw_fdi_link_train(struct intel_encoder *encoder,
> intel_de_write(display, FDI_RX_CTL(PIPE_A), rx_ctl_val);
>
> /* Configure Port Clock Select */
> - drm_WARN_ON(display->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL);
> + drm_WARN_ON(display->drm, crtc_state->intel_dpll->info->id != DPLL_ID_SPLL);
> intel_ddi_enable_clock(encoder, crtc_state);
>
> /* Start the training iterating through available voltages and emphasis,
> diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
> index 8ce7c630da52..ec8f38fba178 100644
> --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> @@ -249,7 +249,7 @@ static void intel_pre_enable_lvds(struct intel_atomic_state *state,
>
> if (HAS_PCH_SPLIT(display)) {
> assert_fdi_rx_pll_disabled(display, pipe);
> - assert_shared_dpll_disabled(display, crtc_state->shared_dpll);
> + assert_shared_dpll_disabled(display, crtc_state->intel_dpll);
> } else {
> assert_pll_disabled(display, pipe);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> index 0325b0c9506d..46e0002a1358 100644
> --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> @@ -92,10 +92,10 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc,
> crtc->active = false;
> crtc->base.enabled = false;
>
> - if (crtc_state->shared_dpll)
> + if (crtc_state->intel_dpll)
> intel_unreference_shared_dpll_crtc(crtc,
> - crtc_state->shared_dpll,
> - &crtc_state->shared_dpll->state);
> + crtc_state->intel_dpll,
> + &crtc_state->intel_dpll->state);
> }
>
> static void set_encoder_for_connector(struct intel_connector *connector,
> @@ -565,7 +565,7 @@ static bool has_bogus_dpll_config(const struct intel_crtc_state *crtc_state)
> */
> return display->platform.sandybridge &&
> crtc_state->hw.active &&
> - crtc_state->shared_dpll &&
> + crtc_state->intel_dpll &&
> crtc_state->port_clock == 0;
> }
>
> diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
> index 1743ebf551cb..b38305c16e77 100644
> --- a/drivers/gpu/drm/i915/display/intel_pch_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
> @@ -251,7 +251,7 @@ static void ilk_enable_pch_transcoder(const struct intel_crtc_state *crtc_state)
> u32 val, pipeconf_val;
>
> /* Make sure PCH DPLL is enabled */
> - assert_shared_dpll_enabled(display, crtc_state->shared_dpll);
> + assert_shared_dpll_enabled(display, crtc_state->intel_dpll);
>
> /* FDI must be feeding us bits for PCH ports */
> assert_fdi_tx_enabled(display, pipe);
> @@ -381,7 +381,7 @@ void ilk_pch_enable(struct intel_atomic_state *state,
> temp = intel_de_read(display, PCH_DPLL_SEL);
> temp |= TRANS_DPLL_ENABLE(pipe);
> sel = TRANS_DPLLB_SEL(pipe);
> - if (crtc_state->shared_dpll ==
> + if (crtc_state->intel_dpll ==
> intel_get_shared_dpll_by_id(display, DPLL_ID_PCH_PLL_B))
> temp |= sel;
> else
> @@ -496,7 +496,7 @@ void ilk_pch_get_config(struct intel_crtc_state *crtc_state)
> {
> struct intel_display *display = to_intel_display(crtc_state);
> struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> enum pipe pipe = crtc->pipe;
> enum intel_dpll_id pll_id;
> bool pll_active;
> @@ -528,8 +528,8 @@ void ilk_pch_get_config(struct intel_crtc_state *crtc_state)
> pll_id = DPLL_ID_PCH_PLL_A;
> }
>
> - crtc_state->shared_dpll = intel_get_shared_dpll_by_id(display, pll_id);
> - pll = crtc_state->shared_dpll;
> + crtc_state->intel_dpll = intel_get_shared_dpll_by_id(display, pll_id);
> + pll = crtc_state->intel_dpll;
>
> pll_active = intel_dpll_get_hw_state(display, pll,
> &crtc_state->dpll_hw_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_pch_refclk.c b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> index 8bec55deff9f..9f6102d7c7be 100644
> --- a/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> +++ b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> @@ -499,7 +499,7 @@ static void lpt_init_pch_refclk(struct intel_display *display)
> static void ilk_init_pch_refclk(struct intel_display *display)
> {
> struct intel_encoder *encoder;
> - struct intel_shared_dpll *pll;
> + struct intel_dpll *pll;
> int i;
> u32 val, final;
> bool has_lvds = false;
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 38+ messages in thread* RE: [PATCH 06/14] drm/i915/dpll: Rename intel_shared_dpll
2025-05-15 7:24 ` Jani Nikula
@ 2025-05-15 7:42 ` Kandpal, Suraj
2025-05-20 3:00 ` Kandpal, Suraj
0 siblings, 1 reply; 38+ messages in thread
From: Kandpal, Suraj @ 2025-05-15 7:42 UTC (permalink / raw)
To: Nikula, Jani, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Murthy, Arun R, Kahola, Mika
> -----Original Message-----
> From: Nikula, Jani <jani.nikula@intel.com>
> Sent: Thursday, May 15, 2025 12:54 PM
> To: Kandpal, Suraj <suraj.kandpal@intel.com>; intel-xe@lists.freedesktop.org;
> intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Murthy, Arun R
> <arun.r.murthy@intel.com>; Kahola, Mika <mika.kahola@intel.com>; Kandpal,
> Suraj <suraj.kandpal@intel.com>
> Subject: Re: [PATCH 06/14] drm/i915/dpll: Rename intel_shared_dpll
>
> On Thu, 15 May 2025, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> > Rename intel_shared_dpll to intel_dpll to represent both
> > shared and individual dplls. Since from MTL each PHY has it's
> > own PLL making the shared PLL naming a little outdated. In an
> > effort to make this framework accepting of future changes this
> > needs to be done.
> >
> > --v2
> > -Use intel_dpll_global to make sure names start with the filename
> > [Jani/Ville]
> > -Explain the need of this rename [Jani]
> >
> > --v3
> > -Just keep it intel_dpll [Jani]
> >
> > --v4
> > -Fix comment [Jani]
> > -Use just num_dpll and dplls [Jani]
> >
> > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_ddi.c | 52 ++--
> > drivers/gpu/drm/i915/display/intel_ddi.h | 6 +-
> > drivers/gpu/drm/i915/display/intel_display.c | 12 +-
> > .../gpu/drm/i915/display/intel_display_core.h | 4 +-
> > .../drm/i915/display/intel_display_debugfs.c | 2 +-
> > .../drm/i915/display/intel_display_types.h | 6 +-
> > drivers/gpu/drm/i915/display/intel_dpll.c | 4 +-
> > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 228 +++++++++---------
> > drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 18 +-
> > drivers/gpu/drm/i915/display/intel_fdi.c | 2 +-
> > drivers/gpu/drm/i915/display/intel_lvds.c | 2 +-
> > .../drm/i915/display/intel_modeset_setup.c | 8 +-
> > .../gpu/drm/i915/display/intel_pch_display.c | 10 +-
> > .../gpu/drm/i915/display/intel_pch_refclk.c | 2 +-
> > 15 files changed, 179 insertions(+), 179 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> b/drivers/gpu/drm/i915/display/icl_dsi.c
> > index ca7033251e91..55f0a20e0874 100644
> > --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> > @@ -658,7 +658,7 @@ static void gen11_dsi_map_pll(struct intel_encoder
> *encoder,
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
> > - struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + struct intel_dpll *pll = crtc_state->intel_dpll;
>
> The rb was conditioned on the member not being named intel_dpll.
Last time you mentioned the one that we keep in the intel_dpll_global struct
for which I changed it to dpll and num_dpll dropping the intel
for the one that is in crtc_state it has to be intel_dpll since the crtc_state already has a variable dpll defined there
/* Settings for the intel dpll used on pretty much everything but
* haswell. */
struct dpll dpll;
/* Selected dpll or NULL. */
struct intel_dpll *intel_dpll;
Regards,
Suraj Kandpal
>
> BR,
> Jani.
>
>
>
>
> > enum phy phy;
> > u32 val;
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 74132c1d6385..4d631cbc81d2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -236,7 +236,7 @@ static void intel_wait_ddi_buf_active(struct
> intel_encoder *encoder)
> > port_name(port));
> > }
> >
> > -static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
> > +static u32 hsw_pll_to_ddi_pll_sel(const struct intel_dpll *pll)
> > {
> > switch (pll->info->id) {
> > case DPLL_ID_WRPLL1:
> > @@ -260,7 +260,7 @@ static u32 hsw_pll_to_ddi_pll_sel(const struct
> intel_shared_dpll *pll)
> > static u32 icl_pll_to_ddi_clk_sel(struct intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state)
> > {
> > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > int clock = crtc_state->port_clock;
> > const enum intel_dpll_id id = pll->info->id;
> >
> > @@ -1561,7 +1561,7 @@ static bool _icl_ddi_is_clock_enabled(struct
> intel_display *display, i915_reg_t
> > return !(intel_de_read(display, reg) & clk_off);
> > }
> >
> > -static struct intel_shared_dpll *
> > +static struct intel_dpll *
> > _icl_ddi_get_pll(struct intel_display *display, i915_reg_t reg,
> > u32 clk_sel_mask, u32 clk_sel_shift)
> > {
> > @@ -1576,7 +1576,7 @@ static void adls_ddi_enable_clock(struct
> intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > enum phy phy = intel_encoder_to_phy(encoder);
> >
> > if (drm_WARN_ON(display->drm, !pll))
> > @@ -1606,7 +1606,7 @@ static bool adls_ddi_is_clock_enabled(struct
> intel_encoder *encoder)
> >
> ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
> > }
> >
> > -static struct intel_shared_dpll *adls_ddi_get_pll(struct intel_encoder
> *encoder)
> > +static struct intel_dpll *adls_ddi_get_pll(struct intel_encoder *encoder)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > enum phy phy = intel_encoder_to_phy(encoder);
> > @@ -1620,7 +1620,7 @@ static void rkl_ddi_enable_clock(struct
> intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > enum phy phy = intel_encoder_to_phy(encoder);
> >
> > if (drm_WARN_ON(display->drm, !pll))
> > @@ -1650,7 +1650,7 @@ static bool rkl_ddi_is_clock_enabled(struct
> intel_encoder *encoder)
> >
> RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
> > }
> >
> > -static struct intel_shared_dpll *rkl_ddi_get_pll(struct intel_encoder
> *encoder)
> > +static struct intel_dpll *rkl_ddi_get_pll(struct intel_encoder *encoder)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > enum phy phy = intel_encoder_to_phy(encoder);
> > @@ -1664,7 +1664,7 @@ static void dg1_ddi_enable_clock(struct
> intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > enum phy phy = intel_encoder_to_phy(encoder);
> >
> > if (drm_WARN_ON(display->drm, !pll))
> > @@ -1703,7 +1703,7 @@ static bool dg1_ddi_is_clock_enabled(struct
> intel_encoder *encoder)
> >
> DG1_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
> > }
> >
> > -static struct intel_shared_dpll *dg1_ddi_get_pll(struct intel_encoder
> *encoder)
> > +static struct intel_dpll *dg1_ddi_get_pll(struct intel_encoder *encoder)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > enum phy phy = intel_encoder_to_phy(encoder);
> > @@ -1730,7 +1730,7 @@ static void icl_ddi_combo_enable_clock(struct
> intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > enum phy phy = intel_encoder_to_phy(encoder);
> >
> > if (drm_WARN_ON(display->drm, !pll))
> > @@ -1760,7 +1760,7 @@ static bool icl_ddi_combo_is_clock_enabled(struct
> intel_encoder *encoder)
> >
> ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
> > }
> >
> > -struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder
> *encoder)
> > +struct intel_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > enum phy phy = intel_encoder_to_phy(encoder);
> > @@ -1774,7 +1774,7 @@ static void jsl_ddi_tc_enable_clock(struct
> intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > enum port port = encoder->port;
> >
> > if (drm_WARN_ON(display->drm, !pll))
> > @@ -1817,7 +1817,7 @@ static void icl_ddi_tc_enable_clock(struct
> intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > enum tc_port tc_port = intel_encoder_to_tc(encoder);
> > enum port port = encoder->port;
> >
> > @@ -1868,7 +1868,7 @@ static bool icl_ddi_tc_is_clock_enabled(struct
> intel_encoder *encoder)
> > return !(tmp & ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port));
> > }
> >
> > -static struct intel_shared_dpll *icl_ddi_tc_get_pll(struct intel_encoder
> *encoder)
> > +static struct intel_dpll *icl_ddi_tc_get_pll(struct intel_encoder *encoder)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > enum tc_port tc_port = intel_encoder_to_tc(encoder);
> > @@ -1898,7 +1898,7 @@ static struct intel_shared_dpll
> *icl_ddi_tc_get_pll(struct intel_encoder *encode
> > return intel_get_shared_dpll_by_id(display, id);
> > }
> >
> > -static struct intel_shared_dpll *bxt_ddi_get_pll(struct intel_encoder
> *encoder)
> > +static struct intel_dpll *bxt_ddi_get_pll(struct intel_encoder *encoder)
> > {
> > struct intel_display *display = to_intel_display(encoder->base.dev);
> > enum intel_dpll_id id;
> > @@ -1925,7 +1925,7 @@ static void skl_ddi_enable_clock(struct
> intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > enum port port = encoder->port;
> >
> > if (drm_WARN_ON(display->drm, !pll))
> > @@ -1967,7 +1967,7 @@ static bool skl_ddi_is_clock_enabled(struct
> intel_encoder *encoder)
> > return !(intel_de_read(display, DPLL_CTRL2) &
> DPLL_CTRL2_DDI_CLK_OFF(port));
> > }
> >
> > -static struct intel_shared_dpll *skl_ddi_get_pll(struct intel_encoder
> *encoder)
> > +static struct intel_dpll *skl_ddi_get_pll(struct intel_encoder *encoder)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > enum port port = encoder->port;
> > @@ -1993,7 +1993,7 @@ void hsw_ddi_enable_clock(struct intel_encoder
> *encoder,
> > const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > enum port port = encoder->port;
> >
> > if (drm_WARN_ON(display->drm, !pll))
> > @@ -2018,7 +2018,7 @@ bool hsw_ddi_is_clock_enabled(struct
> intel_encoder *encoder)
> > return intel_de_read(display, PORT_CLK_SEL(port)) !=
> PORT_CLK_SEL_NONE;
> > }
> >
> > -static struct intel_shared_dpll *hsw_ddi_get_pll(struct intel_encoder
> *encoder)
> > +static struct intel_dpll *hsw_ddi_get_pll(struct intel_encoder *encoder)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > enum port port = encoder->port;
> > @@ -4187,7 +4187,7 @@ static void intel_ddi_get_config(struct
> intel_encoder *encoder,
> >
> > void intel_ddi_get_clock(struct intel_encoder *encoder,
> > struct intel_crtc_state *crtc_state,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > enum icl_port_dpll_id port_dpll_id = ICL_PORT_DPLL_DEFAULT;
> > @@ -4203,7 +4203,7 @@ void intel_ddi_get_clock(struct intel_encoder
> *encoder,
> >
> > icl_set_active_port_dpll(crtc_state, port_dpll_id);
> >
> > - crtc_state->port_clock = intel_dpll_get_freq(display, crtc_state-
> >shared_dpll,
> > + crtc_state->port_clock = intel_dpll_get_freq(display, crtc_state-
> >intel_dpll,
> > &crtc_state-
> >dpll_hw_state);
> > }
> >
> > @@ -4257,7 +4257,7 @@ static void icl_ddi_combo_get_config(struct
> intel_encoder *encoder,
> > intel_ddi_get_config(encoder, crtc_state);
> > }
> >
> > -static bool icl_ddi_tc_pll_is_tbt(const struct intel_shared_dpll *pll)
> > +static bool icl_ddi_tc_pll_is_tbt(const struct intel_dpll *pll)
> > {
> > return pll->info->id == DPLL_ID_ICL_TBTPLL;
> > }
> > @@ -4267,7 +4267,7 @@ icl_ddi_tc_port_pll_type(struct intel_encoder
> *encoder,
> > const struct intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> >
> > if (drm_WARN_ON(display->drm, !pll))
> > return ICL_PORT_DPLL_DEFAULT;
> > @@ -4290,7 +4290,7 @@ intel_ddi_port_pll_type(struct intel_encoder
> *encoder,
> >
> > static void icl_ddi_tc_get_clock(struct intel_encoder *encoder,
> > struct intel_crtc_state *crtc_state,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > struct intel_display *display = to_intel_display(encoder);
> > enum icl_port_dpll_id port_dpll_id;
> > @@ -4313,10 +4313,10 @@ static void icl_ddi_tc_get_clock(struct
> intel_encoder *encoder,
> >
> > icl_set_active_port_dpll(crtc_state, port_dpll_id);
> >
> > - if (icl_ddi_tc_pll_is_tbt(crtc_state->shared_dpll))
> > + if (icl_ddi_tc_pll_is_tbt(crtc_state->intel_dpll))
> > crtc_state->port_clock = icl_calc_tbt_pll_link(display, encoder-
> >port);
> > else
> > - crtc_state->port_clock = intel_dpll_get_freq(display,
> crtc_state->shared_dpll,
> > + crtc_state->port_clock = intel_dpll_get_freq(display,
> crtc_state->intel_dpll,
> > &crtc_state-
> >dpll_hw_state);
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h
> b/drivers/gpu/drm/i915/display/intel_ddi.h
> > index 353eb04079e9..f6f511bb0431 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.h
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.h
> > @@ -16,9 +16,9 @@ struct intel_crtc;
> > struct intel_crtc_state;
> > struct intel_display;
> > struct intel_dp;
> > +struct intel_dpll;
> > struct intel_dpll_hw_state;
> > struct intel_encoder;
> > -struct intel_shared_dpll;
> > enum pipe;
> > enum port;
> > enum transcoder;
> > @@ -40,7 +40,7 @@ void intel_ddi_enable_clock(struct intel_encoder
> *encoder,
> > void intel_ddi_disable_clock(struct intel_encoder *encoder);
> > void intel_ddi_get_clock(struct intel_encoder *encoder,
> > struct intel_crtc_state *crtc_state,
> > - struct intel_shared_dpll *pll);
> > + struct intel_dpll *pll);
> > void hsw_ddi_enable_clock(struct intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state);
> > void hsw_ddi_disable_clock(struct intel_encoder *encoder);
> > @@ -50,7 +50,7 @@ intel_ddi_port_pll_type(struct intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state);
> > void hsw_ddi_get_config(struct intel_encoder *encoder,
> > struct intel_crtc_state *crtc_state);
> > -struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder
> *encoder);
> > +struct intel_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
> > void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
> > const struct intel_crtc_state *crtc_state);
> > void intel_wait_ddi_buf_idle(struct intel_display *display, enum port port);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> b/drivers/gpu/drm/i915/display/intel_display.c
> > index 6f0a0bc71b06..dcfbd3d2df32 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -1325,7 +1325,7 @@ static void intel_encoders_update_prepare(struct
> intel_atomic_state *state)
> > if (intel_crtc_needs_modeset(new_crtc_state))
> > continue;
> >
> > - new_crtc_state->shared_dpll = old_crtc_state-
> >shared_dpll;
> > + new_crtc_state->intel_dpll = old_crtc_state-
> >intel_dpll;
> > new_crtc_state->dpll_hw_state = old_crtc_state-
> >dpll_hw_state;
> > }
> > }
> > @@ -1663,7 +1663,7 @@ static void hsw_crtc_enable(struct
> intel_atomic_state *state,
> >
> > intel_encoders_pre_pll_enable(state, crtc);
> >
> > - if (new_crtc_state->shared_dpll)
> > + if (new_crtc_state->intel_dpll)
> > intel_enable_shared_dpll(new_crtc_state);
> >
> > intel_encoders_pre_enable(state, crtc);
> > @@ -1959,7 +1959,7 @@ static void get_crtc_power_domains(struct
> intel_crtc_state *crtc_state,
> > if (HAS_DDI(display) && crtc_state->has_audio)
> > set_bit(POWER_DOMAIN_AUDIO_MMIO, mask->bits);
> >
> > - if (crtc_state->shared_dpll)
> > + if (crtc_state->intel_dpll)
> > set_bit(POWER_DOMAIN_DISPLAY_CORE, mask->bits);
> >
> > if (crtc_state->dsc.compression_enable)
> > @@ -4501,7 +4501,7 @@ copy_joiner_crtc_state_modeset(struct
> intel_atomic_state *state,
> > /* preserve some things from the slave's original crtc state */
> > saved_state->uapi = secondary_crtc_state->uapi;
> > saved_state->scaler_state = secondary_crtc_state->scaler_state;
> > - saved_state->shared_dpll = secondary_crtc_state->shared_dpll;
> > + saved_state->intel_dpll = secondary_crtc_state->intel_dpll;
> > saved_state->crc_enabled = secondary_crtc_state->crc_enabled;
> >
> > intel_crtc_free_hw_state(secondary_crtc_state);
> > @@ -4564,7 +4564,7 @@ intel_crtc_prepare_cleared_state(struct
> intel_atomic_state *state,
> > saved_state->uapi = crtc_state->uapi;
> > saved_state->inherited = crtc_state->inherited;
> > saved_state->scaler_state = crtc_state->scaler_state;
> > - saved_state->shared_dpll = crtc_state->shared_dpll;
> > + saved_state->intel_dpll = crtc_state->intel_dpll;
> > saved_state->dpll_hw_state = crtc_state->dpll_hw_state;
> > memcpy(saved_state->icl_port_dplls, crtc_state->icl_port_dplls,
> > sizeof(saved_state->icl_port_dplls));
> > @@ -5318,7 +5318,7 @@ intel_pipe_config_compare(const struct
> intel_crtc_state *current_config,
> > PIPE_CONF_CHECK_BOOL(double_wide);
> >
> > if (display->dpll.mgr)
> > - PIPE_CONF_CHECK_P(shared_dpll);
> > + PIPE_CONF_CHECK_P(intel_dpll);
> >
> > /* FIXME convert everything over the dpll_mgr */
> > if (display->dpll.mgr || HAS_GMCH(display))
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> b/drivers/gpu/drm/i915/display/intel_display_core.h
> > index e0221e514326..5f5dd2722d99 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> > @@ -125,8 +125,8 @@ struct intel_audio {
> > struct intel_dpll_global {
> > struct mutex lock;
> >
> > - int num_shared_dpll;
> > - struct intel_shared_dpll shared_dplls[I915_NUM_PLLS];
> > + int num_dpll;
> > + struct intel_dpll dplls[I915_NUM_PLLS];
> > const struct intel_dpll_mgr *mgr;
> >
> > struct {
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > index 3770ce9469d1..ea9e271bc6ee 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > @@ -618,7 +618,7 @@ static int i915_shared_dplls_info(struct seq_file *m,
> void *unused)
> > {
> > struct intel_display *display = node_to_intel_display(m->private);
> > struct drm_printer p = drm_seq_file_printer(m);
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > int i;
> >
> > drm_modeset_lock_all(display->drm);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index 1bdffaca153a..dbb07f05bfc6 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1075,8 +1075,8 @@ struct intel_crtc_state {
> > * haswell. */
> > struct dpll dpll;
> >
> > - /* Selected dpll when shared or NULL. */
> > - struct intel_shared_dpll *shared_dpll;
> > + /* Selected dpll or NULL. */
> > + struct intel_dpll *intel_dpll;
> >
> > /* Actual register state of the dpll, for shared dpll cross-checking. */
> > struct intel_dpll_hw_state dpll_hw_state;
> > @@ -1086,7 +1086,7 @@ struct intel_crtc_state {
> > * setting shared_dpll and dpll_hw_state to one of these reserved
> ones.
> > */
> > struct icl_port_dpll {
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > struct intel_dpll_hw_state hw_state;
> > } icl_port_dplls[ICL_PORT_DPLL_COUNT];
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c
> b/drivers/gpu/drm/i915/display/intel_dpll.c
> > index 8db603d9c823..4d1f7fccd28a 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> > @@ -1767,9 +1767,9 @@ int intel_dpll_crtc_get_shared_dpll(struct
> intel_atomic_state *state,
> > int ret;
> >
> > drm_WARN_ON(display->drm, !intel_crtc_needs_modeset(crtc_state));
> > - drm_WARN_ON(display->drm, !crtc_state->hw.enable && crtc_state-
> >shared_dpll);
> > + drm_WARN_ON(display->drm, !crtc_state->hw.enable && crtc_state-
> >intel_dpll);
> >
> > - if (!crtc_state->hw.enable || crtc_state->shared_dpll)
> > + if (!crtc_state->hw.enable || crtc_state->intel_dpll)
> > return 0;
> >
> > if (!display->funcs.dpll->crtc_get_shared_dpll)
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > index bdad4d72cc01..6fbbc5e89f3c 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > @@ -70,7 +70,7 @@ struct intel_dpll_funcs {
> > * the pll is not already enabled.
> > */
> > void (*enable)(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct intel_dpll_hw_state *dpll_hw_state);
> >
> > /*
> > @@ -79,7 +79,7 @@ struct intel_dpll_funcs {
> > * tracked users for it.
> > */
> > void (*disable)(struct intel_display *display,
> > - struct intel_shared_dpll *pll);
> > + struct intel_dpll *pll);
> >
> > /*
> > * Hook for reading the values currently programmed to the DPLL
> > @@ -87,7 +87,7 @@ struct intel_dpll_funcs {
> > * verification after a mode set.
> > */
> > bool (*get_hw_state)(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state);
> >
> > /*
> > @@ -95,7 +95,7 @@ struct intel_dpll_funcs {
> > * in state.
> > */
> > int (*get_freq)(struct intel_display *i915,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state *dpll_hw_state);
> > };
> >
> > @@ -124,7 +124,7 @@ static void
> > intel_atomic_duplicate_dpll_state(struct intel_display *display,
> > struct intel_dpll_state *dpll_state)
> > {
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > int i;
> >
> > /* Copy dpll state */
> > @@ -158,11 +158,11 @@ intel_atomic_get_shared_dpll_state(struct
> drm_atomic_state *s)
> > * Returns:
> > * A pointer to the DPLL with @id
> > */
> > -struct intel_shared_dpll *
> > +struct intel_dpll *
> > intel_get_shared_dpll_by_id(struct intel_display *display,
> > enum intel_dpll_id id)
> > {
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > int i;
> >
> > for_each_dpll(display, pll, i) {
> > @@ -176,7 +176,7 @@ intel_get_shared_dpll_by_id(struct intel_display
> *display,
> >
> > /* For ILK+ */
> > void assert_shared_dpll(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > bool state)
> > {
> > bool cur_state;
> > @@ -205,7 +205,7 @@ enum intel_dpll_id icl_tc_port_to_pll_id(enum
> tc_port tc_port)
> >
> > static i915_reg_t
> > intel_combo_pll_enable_reg(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > if (display->platform.dg1)
> > return DG1_DPLL_ENABLE(pll->info->id);
> > @@ -218,7 +218,7 @@ intel_combo_pll_enable_reg(struct intel_display
> *display,
> >
> > static i915_reg_t
> > intel_tc_pll_enable_reg(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > const enum intel_dpll_id id = pll->info->id;
> > enum tc_port tc_port = icl_pll_id_to_tc_port(id);
> > @@ -230,7 +230,7 @@ intel_tc_pll_enable_reg(struct intel_display *display,
> > }
> >
> > static void _intel_enable_shared_dpll(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > if (pll->info->power_domain)
> > pll->wakeref = intel_display_power_get(display, pll->info-
> >power_domain);
> > @@ -240,7 +240,7 @@ static void _intel_enable_shared_dpll(struct
> intel_display *display,
> > }
> >
> > static void _intel_disable_shared_dpll(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > pll->info->funcs->disable(display, pll);
> > pll->on = false;
> > @@ -259,7 +259,7 @@ void intel_enable_shared_dpll(const struct
> intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(crtc_state);
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > - struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + struct intel_dpll *pll = crtc_state->intel_dpll;
> > unsigned int pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
> > unsigned int old_mask;
> >
> > @@ -305,7 +305,7 @@ void intel_disable_shared_dpll(const struct
> intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(crtc_state);
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > - struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > + struct intel_dpll *pll = crtc_state->intel_dpll;
> > unsigned int pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
> >
> > /* PCH only available on ILK+ */
> > @@ -344,7 +344,7 @@ void intel_disable_shared_dpll(const struct
> intel_crtc_state *crtc_state)
> > static unsigned long
> > intel_dpll_mask_all(struct intel_display *display)
> > {
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > unsigned long dpll_mask = 0;
> > int i;
> >
> > @@ -357,7 +357,7 @@ intel_dpll_mask_all(struct intel_display *display)
> > return dpll_mask;
> > }
> >
> > -static struct intel_shared_dpll *
> > +static struct intel_dpll *
> > intel_find_shared_dpll(struct intel_atomic_state *state,
> > const struct intel_crtc *crtc,
> > const struct intel_dpll_hw_state *dpll_hw_state,
> > @@ -366,7 +366,7 @@ intel_find_shared_dpll(struct intel_atomic_state
> *state,
> > struct intel_display *display = to_intel_display(crtc);
> > unsigned long dpll_mask_all = intel_dpll_mask_all(display);
> > struct intel_dpll_state *dpll_state;
> > - struct intel_shared_dpll *unused_pll = NULL;
> > + struct intel_dpll *unused_pll = NULL;
> > enum intel_dpll_id id;
> >
> > dpll_state = intel_atomic_get_shared_dpll_state(&state->base);
> > @@ -374,7 +374,7 @@ intel_find_shared_dpll(struct intel_atomic_state
> *state,
> > drm_WARN_ON(display->drm, dpll_mask & ~dpll_mask_all);
> >
> > for_each_set_bit(id, &dpll_mask, fls(dpll_mask_all)) {
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> >
> > pll = intel_get_shared_dpll_by_id(display, id);
> > if (!pll)
> > @@ -421,7 +421,7 @@ intel_find_shared_dpll(struct intel_atomic_state
> *state,
> > */
> > static void
> > intel_reference_shared_dpll_crtc(const struct intel_crtc *crtc,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > struct intel_dpll_state *dpll_state)
> > {
> > struct intel_display *display = to_intel_display(crtc);
> > @@ -437,7 +437,7 @@ intel_reference_shared_dpll_crtc(const struct
> intel_crtc *crtc,
> > static void
> > intel_reference_shared_dpll(struct intel_atomic_state *state,
> > const struct intel_crtc *crtc,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > struct intel_dpll_state *dpll_state;
> > @@ -460,7 +460,7 @@ intel_reference_shared_dpll(struct
> intel_atomic_state *state,
> > */
> > void
> > intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > struct intel_dpll_state *dpll_state)
> > {
> > struct intel_display *display = to_intel_display(crtc);
> > @@ -475,7 +475,7 @@ intel_unreference_shared_dpll_crtc(const struct
> intel_crtc *crtc,
> >
> > static void intel_unreference_shared_dpll(struct intel_atomic_state *state,
> > const struct intel_crtc *crtc,
> > - const struct intel_shared_dpll *pll)
> > + const struct intel_dpll *pll)
> > {
> > struct intel_dpll_state *dpll_state;
> >
> > @@ -492,12 +492,12 @@ static void intel_put_dpll(struct intel_atomic_state
> *state,
> > struct intel_crtc_state *new_crtc_state =
> > intel_atomic_get_new_crtc_state(state, crtc);
> >
> > - new_crtc_state->shared_dpll = NULL;
> > + new_crtc_state->intel_dpll = NULL;
> >
> > - if (!old_crtc_state->shared_dpll)
> > + if (!old_crtc_state->intel_dpll)
> > return;
> >
> > - intel_unreference_shared_dpll(state, crtc, old_crtc_state-
> >shared_dpll);
> > + intel_unreference_shared_dpll(state, crtc, old_crtc_state->intel_dpll);
> > }
> >
> > /**
> > @@ -515,7 +515,7 @@ void intel_shared_dpll_swap_state(struct
> intel_atomic_state *state)
> > {
> > struct intel_display *display = to_intel_display(state);
> > struct intel_dpll_state *dpll_state = state->dpll_state;
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > int i;
> >
> > if (!state->dpll_set)
> > @@ -526,7 +526,7 @@ void intel_shared_dpll_swap_state(struct
> intel_atomic_state *state)
> > }
> >
> > static bool ibx_pch_dpll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > struct i9xx_dpll_hw_state *hw_state = &dpll_hw_state->i9xx;
> > @@ -562,7 +562,7 @@ static void ibx_assert_pch_refclk_enabled(struct
> intel_display *display)
> > }
> >
> > static void ibx_pch_dpll_enable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > const struct i9xx_dpll_hw_state *hw_state = &dpll_hw_state->i9xx;
> > @@ -591,7 +591,7 @@ static void ibx_pch_dpll_enable(struct intel_display
> *display,
> > }
> >
> > static void ibx_pch_dpll_disable(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > const enum intel_dpll_id id = pll->info->id;
> >
> > @@ -614,7 +614,7 @@ static int ibx_get_dpll(struct intel_atomic_state
> *state,
> > struct intel_display *display = to_intel_display(state);
> > struct intel_crtc_state *crtc_state =
> > intel_atomic_get_new_crtc_state(state, crtc);
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > enum intel_dpll_id id;
> >
> > if (HAS_PCH_IBX(display)) {
> > @@ -640,7 +640,7 @@ static int ibx_get_dpll(struct intel_atomic_state
> *state,
> > intel_reference_shared_dpll(state, crtc,
> > pll, &crtc_state->dpll_hw_state);
> >
> > - crtc_state->shared_dpll = pll;
> > + crtc_state->intel_dpll = pll;
> >
> > return 0;
> > }
> > @@ -692,7 +692,7 @@ static const struct intel_dpll_mgr pch_pll_mgr = {
> > };
> >
> > static void hsw_ddi_wrpll_enable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> > @@ -704,7 +704,7 @@ static void hsw_ddi_wrpll_enable(struct intel_display
> *display,
> > }
> >
> > static void hsw_ddi_spll_enable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> > @@ -715,7 +715,7 @@ static void hsw_ddi_spll_enable(struct intel_display
> *display,
> > }
> >
> > static void hsw_ddi_wrpll_disable(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > const enum intel_dpll_id id = pll->info->id;
> >
> > @@ -731,7 +731,7 @@ static void hsw_ddi_wrpll_disable(struct intel_display
> *display,
> > }
> >
> > static void hsw_ddi_spll_disable(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > enum intel_dpll_id id = pll->info->id;
> >
> > @@ -747,7 +747,7 @@ static void hsw_ddi_spll_disable(struct intel_display
> *display,
> > }
> >
> > static bool hsw_ddi_wrpll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> > @@ -769,7 +769,7 @@ static bool hsw_ddi_wrpll_get_hw_state(struct
> intel_display *display,
> > }
> >
> > static bool hsw_ddi_spll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> > @@ -996,7 +996,7 @@ hsw_ddi_calculate_wrpll(int clock /* in Hz */,
> > }
> >
> > static int hsw_ddi_wrpll_get_freq(struct intel_display *display,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> > @@ -1059,7 +1059,7 @@ hsw_ddi_wrpll_compute_dpll(struct
> intel_atomic_state *state,
> > return 0;
> > }
> >
> > -static struct intel_shared_dpll *
> > +static struct intel_dpll *
> > hsw_ddi_wrpll_get_dpll(struct intel_atomic_state *state,
> > struct intel_crtc *crtc)
> > {
> > @@ -1090,11 +1090,11 @@ hsw_ddi_lcpll_compute_dpll(struct
> intel_crtc_state *crtc_state)
> > }
> > }
> >
> > -static struct intel_shared_dpll *
> > +static struct intel_dpll *
> > hsw_ddi_lcpll_get_dpll(struct intel_crtc_state *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(crtc_state);
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > enum intel_dpll_id pll_id;
> > int clock = crtc_state->port_clock;
> >
> > @@ -1122,7 +1122,7 @@ hsw_ddi_lcpll_get_dpll(struct intel_crtc_state
> *crtc_state)
> > }
> >
> > static int hsw_ddi_lcpll_get_freq(struct intel_display *display,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > int link_clock = 0;
> > @@ -1162,7 +1162,7 @@ hsw_ddi_spll_compute_dpll(struct
> intel_atomic_state *state,
> > return 0;
> > }
> >
> > -static struct intel_shared_dpll *
> > +static struct intel_dpll *
> > hsw_ddi_spll_get_dpll(struct intel_atomic_state *state,
> > struct intel_crtc *crtc)
> > {
> > @@ -1174,7 +1174,7 @@ hsw_ddi_spll_get_dpll(struct intel_atomic_state
> *state,
> > }
> >
> > static int hsw_ddi_spll_get_freq(struct intel_display *display,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> > @@ -1221,7 +1221,7 @@ static int hsw_get_dpll(struct intel_atomic_state
> *state,
> > {
> > struct intel_crtc_state *crtc_state =
> > intel_atomic_get_new_crtc_state(state, crtc);
> > - struct intel_shared_dpll *pll = NULL;
> > + struct intel_dpll *pll = NULL;
> >
> > if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
> > pll = hsw_ddi_wrpll_get_dpll(state, crtc);
> > @@ -1236,7 +1236,7 @@ static int hsw_get_dpll(struct intel_atomic_state
> *state,
> > intel_reference_shared_dpll(state, crtc,
> > pll, &crtc_state->dpll_hw_state);
> >
> > - crtc_state->shared_dpll = pll;
> > + crtc_state->intel_dpll = pll;
> >
> > return 0;
> > }
> > @@ -1285,18 +1285,18 @@ static const struct intel_dpll_funcs
> hsw_ddi_spll_funcs = {
> > };
> >
> > static void hsw_ddi_lcpll_enable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct intel_dpll_hw_state *hw_state)
> > {
> > }
> >
> > static void hsw_ddi_lcpll_disable(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > }
> >
> > static bool hsw_ddi_lcpll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > return true;
> > @@ -1364,7 +1364,7 @@ static const struct skl_dpll_regs skl_dpll_regs[4] = {
> > };
> >
> > static void skl_ddi_pll_write_ctrl1(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct skl_dpll_hw_state *hw_state)
> > {
> > const enum intel_dpll_id id = pll->info->id;
> > @@ -1378,7 +1378,7 @@ static void skl_ddi_pll_write_ctrl1(struct
> intel_display *display,
> > }
> >
> > static void skl_ddi_pll_enable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > @@ -1400,7 +1400,7 @@ static void skl_ddi_pll_enable(struct intel_display
> *display,
> > }
> >
> > static void skl_ddi_dpll0_enable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > @@ -1409,7 +1409,7 @@ static void skl_ddi_dpll0_enable(struct
> intel_display *display,
> > }
> >
> > static void skl_ddi_pll_disable(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > const struct skl_dpll_regs *regs = skl_dpll_regs;
> > const enum intel_dpll_id id = pll->info->id;
> > @@ -1420,12 +1420,12 @@ static void skl_ddi_pll_disable(struct
> intel_display *display,
> > }
> >
> > static void skl_ddi_dpll0_disable(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > }
> >
> > static bool skl_ddi_pll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > @@ -1463,7 +1463,7 @@ static bool skl_ddi_pll_get_hw_state(struct
> intel_display *display,
> > }
> >
> > static bool skl_ddi_dpll0_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > @@ -1736,7 +1736,7 @@ skl_ddi_calculate_wrpll(int clock,
> > }
> >
> > static int skl_ddi_wrpll_get_freq(struct intel_display *display,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > @@ -1884,7 +1884,7 @@ skl_ddi_dp_set_dpll_hw_state(struct
> intel_crtc_state *crtc_state)
> > }
> >
> > static int skl_ddi_lcpll_get_freq(struct intel_display *display,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > @@ -1939,7 +1939,7 @@ static int skl_get_dpll(struct intel_atomic_state
> *state,
> > {
> > struct intel_crtc_state *crtc_state =
> > intel_atomic_get_new_crtc_state(state, crtc);
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> >
> > if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
> > pll = intel_find_shared_dpll(state, crtc,
> > @@ -1957,13 +1957,13 @@ static int skl_get_dpll(struct intel_atomic_state
> *state,
> > intel_reference_shared_dpll(state, crtc,
> > pll, &crtc_state->dpll_hw_state);
> >
> > - crtc_state->shared_dpll = pll;
> > + crtc_state->intel_dpll = pll;
> >
> > return 0;
> > }
> >
> > static int skl_ddi_pll_get_freq(struct intel_display *display,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > @@ -2038,7 +2038,7 @@ static const struct intel_dpll_mgr skl_pll_mgr = {
> > };
> >
> > static void bxt_ddi_pll_enable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > const struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
> > @@ -2141,7 +2141,7 @@ static void bxt_ddi_pll_enable(struct intel_display
> *display,
> > }
> >
> > static void bxt_ddi_pll_disable(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > enum port port = (enum port)pll->info->id; /* 1:1 port->PLL mapping */
> >
> > @@ -2160,7 +2160,7 @@ static void bxt_ddi_pll_disable(struct intel_display
> *display,
> > }
> >
> > static bool bxt_ddi_pll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
> > @@ -2360,7 +2360,7 @@ static int bxt_ddi_set_dpll_hw_state(struct
> intel_crtc_state *crtc_state,
> > }
> >
> > static int bxt_ddi_pll_get_freq(struct intel_display *display,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > const struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
> > @@ -2429,7 +2429,7 @@ static int bxt_get_dpll(struct intel_atomic_state
> *state,
> > struct intel_display *display = to_intel_display(state);
> > struct intel_crtc_state *crtc_state =
> > intel_atomic_get_new_crtc_state(state, crtc);
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > enum intel_dpll_id id;
> >
> > /* 1:1 mapping between ports and PLLs */
> > @@ -2442,7 +2442,7 @@ static int bxt_get_dpll(struct intel_atomic_state
> *state,
> > intel_reference_shared_dpll(state, crtc,
> > pll, &crtc_state->dpll_hw_state);
> >
> > - crtc_state->shared_dpll = pll;
> > + crtc_state->intel_dpll = pll;
> >
> > return 0;
> > }
> > @@ -2755,7 +2755,7 @@ static int icl_calc_tbt_pll(struct intel_crtc_state
> *crtc_state,
> > }
> >
> > static int icl_ddi_tbt_pll_get_freq(struct intel_display *display,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > /*
> > @@ -2826,7 +2826,7 @@ icl_calc_wrpll(struct intel_crtc_state *crtc_state,
> > }
> >
> > static int icl_ddi_combo_pll_get_freq(struct intel_display *display,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > @@ -3199,7 +3199,7 @@ static int icl_calc_mg_pll_state(struct
> intel_crtc_state *crtc_state,
> > }
> >
> > static int icl_ddi_mg_pll_get_freq(struct intel_display *display,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state
> *dpll_hw_state)
> > {
> > const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > @@ -3285,7 +3285,7 @@ void icl_set_active_port_dpll(struct
> intel_crtc_state *crtc_state,
> > struct icl_port_dpll *port_dpll =
> > &crtc_state->icl_port_dplls[port_dpll_id];
> >
> > - crtc_state->shared_dpll = port_dpll->pll;
> > + crtc_state->intel_dpll = port_dpll->pll;
> > crtc_state->dpll_hw_state = port_dpll->hw_state;
> > }
> >
> > @@ -3428,8 +3428,8 @@ static int icl_compute_tc_phy_dplls(struct
> intel_atomic_state *state,
> > return ret;
> >
> > /* this is mainly for the fastset check */
> > - if (old_crtc_state->shared_dpll &&
> > - old_crtc_state->shared_dpll->info->id == DPLL_ID_ICL_TBTPLL)
> > + if (old_crtc_state->intel_dpll &&
> > + old_crtc_state->intel_dpll->info->id == DPLL_ID_ICL_TBTPLL)
> > icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT);
> > else
> > icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_MG_PHY);
> > @@ -3521,7 +3521,7 @@ static void icl_put_dplls(struct intel_atomic_state
> *state,
> > intel_atomic_get_new_crtc_state(state, crtc);
> > enum icl_port_dpll_id id;
> >
> > - new_crtc_state->shared_dpll = NULL;
> > + new_crtc_state->intel_dpll = NULL;
> >
> > for (id = ICL_PORT_DPLL_DEFAULT; id < ICL_PORT_DPLL_COUNT; id++) {
> > const struct icl_port_dpll *old_port_dpll =
> > @@ -3539,7 +3539,7 @@ static void icl_put_dplls(struct intel_atomic_state
> *state,
> > }
> >
> > static bool mg_pll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > @@ -3606,7 +3606,7 @@ static bool mg_pll_get_hw_state(struct
> intel_display *display,
> > }
> >
> > static bool dkl_pll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > @@ -3678,7 +3678,7 @@ static bool dkl_pll_get_hw_state(struct
> intel_display *display,
> > }
> >
> > static bool icl_pll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state,
> > i915_reg_t enable_reg)
> > {
> > @@ -3739,7 +3739,7 @@ static bool icl_pll_get_hw_state(struct intel_display
> *display,
> > }
> >
> > static bool combo_pll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > i915_reg_t enable_reg = intel_combo_pll_enable_reg(display, pll);
> > @@ -3748,14 +3748,14 @@ static bool combo_pll_get_hw_state(struct
> intel_display *display,
> > }
> >
> > static bool tbt_pll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > return icl_pll_get_hw_state(display, pll, dpll_hw_state,
> TBT_PLL_ENABLE);
> > }
> >
> > static void icl_dpll_write(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct icl_dpll_hw_state *hw_state)
> > {
> > const enum intel_dpll_id id = pll->info->id;
> > @@ -3797,7 +3797,7 @@ static void icl_dpll_write(struct intel_display
> *display,
> > }
> >
> > static void icl_mg_pll_write(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct icl_dpll_hw_state *hw_state)
> > {
> > enum tc_port tc_port = icl_pll_id_to_tc_port(pll->info->id);
> > @@ -3840,7 +3840,7 @@ static void icl_mg_pll_write(struct intel_display
> *display,
> > }
> >
> > static void dkl_pll_write(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct icl_dpll_hw_state *hw_state)
> > {
> > enum tc_port tc_port = icl_pll_id_to_tc_port(pll->info->id);
> > @@ -3905,7 +3905,7 @@ static void dkl_pll_write(struct intel_display
> *display,
> > }
> >
> > static void icl_pll_power_enable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > i915_reg_t enable_reg)
> > {
> > intel_de_rmw(display, enable_reg, 0, PLL_POWER_ENABLE);
> > @@ -3920,7 +3920,7 @@ static void icl_pll_power_enable(struct
> intel_display *display,
> > }
> >
> > static void icl_pll_enable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > i915_reg_t enable_reg)
> > {
> > intel_de_rmw(display, enable_reg, 0, PLL_ENABLE);
> > @@ -3930,7 +3930,7 @@ static void icl_pll_enable(struct intel_display
> *display,
> > drm_err(display->drm, "PLL %d not locked\n", pll->info->id);
> > }
> >
> > -static void adlp_cmtg_clock_gating_wa(struct intel_display *display, struct
> intel_shared_dpll *pll)
> > +static void adlp_cmtg_clock_gating_wa(struct intel_display *display, struct
> intel_dpll *pll)
> > {
> > u32 val;
> >
> > @@ -3955,7 +3955,7 @@ static void adlp_cmtg_clock_gating_wa(struct
> intel_display *display, struct inte
> > }
> >
> > static void combo_pll_enable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > @@ -3979,7 +3979,7 @@ static void combo_pll_enable(struct intel_display
> *display,
> > }
> >
> > static void tbt_pll_enable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > @@ -4000,7 +4000,7 @@ static void tbt_pll_enable(struct intel_display
> *display,
> > }
> >
> > static void mg_pll_enable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > const struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > @@ -4025,7 +4025,7 @@ static void mg_pll_enable(struct intel_display
> *display,
> > }
> >
> > static void icl_pll_disable(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > i915_reg_t enable_reg)
> > {
> > /* The first steps are done by intel_ddi_post_disable(). */
> > @@ -4056,7 +4056,7 @@ static void icl_pll_disable(struct intel_display
> *display,
> > }
> >
> > static void combo_pll_disable(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > i915_reg_t enable_reg = intel_combo_pll_enable_reg(display, pll);
> >
> > @@ -4064,13 +4064,13 @@ static void combo_pll_disable(struct
> intel_display *display,
> > }
> >
> > static void tbt_pll_disable(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > icl_pll_disable(display, pll, TBT_PLL_ENABLE);
> > }
> >
> > static void mg_pll_disable(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > i915_reg_t enable_reg = intel_tc_pll_enable_reg(display, pll);
> >
> > @@ -4346,19 +4346,19 @@ void intel_shared_dpll_init(struct intel_display
> *display)
> >
> > for (i = 0; dpll_info[i].name; i++) {
> > if (drm_WARN_ON(display->drm,
> > - i >= ARRAY_SIZE(display->dpll.shared_dplls)))
> > + i >= ARRAY_SIZE(display->dpll.dplls)))
> > break;
> >
> > /* must fit into unsigned long bitmask on 32bit */
> > if (drm_WARN_ON(display->drm, dpll_info[i].id >= 32))
> > break;
> >
> > - display->dpll.shared_dplls[i].info = &dpll_info[i];
> > - display->dpll.shared_dplls[i].index = i;
> > + display->dpll.dplls[i].info = &dpll_info[i];
> > + display->dpll.dplls[i].index = i;
> > }
> >
> > display->dpll.mgr = dpll_mgr;
> > - display->dpll.num_shared_dpll = i;
> > + display->dpll.num_dpll = i;
> > }
> >
> > /**
> > @@ -4482,7 +4482,7 @@ void intel_update_active_dpll(struct
> intel_atomic_state *state,
> > * Return the output frequency corresponding to @pll's passed in
> @dpll_hw_state.
> > */
> > int intel_dpll_get_freq(struct intel_display *display,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > if (drm_WARN_ON(display->drm, !pll->info->funcs->get_freq))
> > @@ -4500,14 +4500,14 @@ int intel_dpll_get_freq(struct intel_display
> *display,
> > * Read out @pll's hardware state into @dpll_hw_state.
> > */
> > bool intel_dpll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state)
> > {
> > return pll->info->funcs->get_hw_state(display, pll, dpll_hw_state);
> > }
> >
> > static void readout_dpll_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > struct intel_crtc *crtc;
> >
> > @@ -4521,7 +4521,7 @@ static void readout_dpll_hw_state(struct
> intel_display *display,
> > struct intel_crtc_state *crtc_state =
> > to_intel_crtc_state(crtc->base.state);
> >
> > - if (crtc_state->hw.active && crtc_state->shared_dpll == pll)
> > + if (crtc_state->hw.active && crtc_state->intel_dpll == pll)
> > intel_reference_shared_dpll_crtc(crtc, pll, &pll->state);
> > }
> > pll->active_mask = pll->state.pipe_mask;
> > @@ -4539,7 +4539,7 @@ void intel_dpll_update_ref_clks(struct
> intel_display *display)
> >
> > void intel_dpll_readout_hw_state(struct intel_display *display)
> > {
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > int i;
> >
> > for_each_dpll(display, pll, i)
> > @@ -4547,7 +4547,7 @@ void intel_dpll_readout_hw_state(struct
> intel_display *display)
> > }
> >
> > static void sanitize_dpll_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll)
> > + struct intel_dpll *pll)
> > {
> > if (!pll->on)
> > return;
> > @@ -4566,7 +4566,7 @@ static void sanitize_dpll_state(struct intel_display
> *display,
> >
> > void intel_dpll_sanitize_state(struct intel_display *display)
> > {
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > int i;
> >
> > intel_cx0_pll_power_save_wa(display);
> > @@ -4623,7 +4623,7 @@ bool intel_dpll_compare_hw_state(struct
> intel_display *display,
> >
> > static void
> > verify_single_dpll_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_crtc *crtc,
> > const struct intel_crtc_state *new_crtc_state)
> > {
> > @@ -4676,8 +4676,8 @@ verify_single_dpll_state(struct intel_display
> *display,
> > pll->info->name);
> > }
> >
> > -static bool has_alt_port_dpll(const struct intel_shared_dpll *old_pll,
> > - const struct intel_shared_dpll *new_pll)
> > +static bool has_alt_port_dpll(const struct intel_dpll *old_pll,
> > + const struct intel_dpll *new_pll)
> > {
> > return old_pll && new_pll && old_pll != new_pll &&
> > (old_pll->info->is_alt_port_dpll || new_pll->info-
> >is_alt_port_dpll);
> > @@ -4692,22 +4692,22 @@ void intel_shared_dpll_state_verify(struct
> intel_atomic_state *state,
> > const struct intel_crtc_state *new_crtc_state =
> > intel_atomic_get_new_crtc_state(state, crtc);
> >
> > - if (new_crtc_state->shared_dpll)
> > - verify_single_dpll_state(display, new_crtc_state->shared_dpll,
> > + if (new_crtc_state->intel_dpll)
> > + verify_single_dpll_state(display, new_crtc_state->intel_dpll,
> > crtc, new_crtc_state);
> >
> > - if (old_crtc_state->shared_dpll &&
> > - old_crtc_state->shared_dpll != new_crtc_state->shared_dpll) {
> > + if (old_crtc_state->intel_dpll &&
> > + old_crtc_state->intel_dpll != new_crtc_state->intel_dpll) {
> > u8 pipe_mask = BIT(crtc->pipe);
> > - struct intel_shared_dpll *pll = old_crtc_state->shared_dpll;
> > + struct intel_dpll *pll = old_crtc_state->intel_dpll;
> >
> > INTEL_DISPLAY_STATE_WARN(display, pll->active_mask &
> pipe_mask,
> > "%s: pll active mismatch (didn't expect
> pipe %c in active mask (0x%x))\n",
> > pll->info->name, pipe_name(crtc-
> >pipe), pll->active_mask);
> >
> > /* TC ports have both MG/TC and TBT PLL referenced
> simultaneously */
> > - INTEL_DISPLAY_STATE_WARN(display,
> !has_alt_port_dpll(old_crtc_state->shared_dpll,
> > -
> new_crtc_state->shared_dpll) &&
> > + INTEL_DISPLAY_STATE_WARN(display,
> !has_alt_port_dpll(old_crtc_state->intel_dpll,
> > +
> new_crtc_state->intel_dpll) &&
> > pll->state.pipe_mask & pipe_mask,
> > "%s: pll enabled crtcs mismatch
> (found pipe %c in enabled mask (0x%x))\n",
> > pll->info->name, pipe_name(crtc-
> >pipe), pll->state.pipe_mask);
> > @@ -4717,7 +4717,7 @@ void intel_shared_dpll_state_verify(struct
> intel_atomic_state *state,
> > void intel_shared_dpll_verify_disabled(struct intel_atomic_state *state)
> > {
> > struct intel_display *display = to_intel_display(state);
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > int i;
> >
> > for_each_dpll(display, pll, i)
> > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> > index 28f464d504fb..ea3fb7002e65 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> > @@ -31,8 +31,8 @@
> > #include "intel_wakeref.h"
> >
> > #define for_each_dpll(__display, __pll, __i) \
> > - for ((__i) = 0; (__i) < (__display)->dpll.num_shared_dpll && \
> > - ((__pll) = &(__display)->dpll.shared_dplls[(__i)]) ; (__i)++)
> > + for ((__i) = 0; (__i) < (__display)->dpll.num_dpll && \
> > + ((__pll) = &(__display)->dpll.dplls[(__i)]) ; (__i)++)
> >
> > enum tc_port;
> > struct drm_printer;
> > @@ -344,9 +344,9 @@ struct dpll_info {
> > };
> >
> > /**
> > - * struct intel_shared_dpll - display PLL with tracked state and users
> > + * struct intel_dpll - display PLL with tracked state and users
> > */
> > -struct intel_shared_dpll {
> > +struct intel_dpll {
> > /**
> > * @state:
> > *
> > @@ -388,11 +388,11 @@ struct intel_shared_dpll {
> > #define SKL_DPLL3 3
> >
> > /* shared dpll functions */
> > -struct intel_shared_dpll *
> > +struct intel_dpll *
> > intel_get_shared_dpll_by_id(struct intel_display *display,
> > enum intel_dpll_id id);
> > void assert_shared_dpll(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > bool state);
> > #define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
> > #define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
> > @@ -405,7 +405,7 @@ int intel_reserve_shared_dplls(struct
> intel_atomic_state *state,
> > void intel_release_shared_dplls(struct intel_atomic_state *state,
> > struct intel_crtc *crtc);
> > void intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > struct intel_dpll_state
> *shared_dpll_state);
> > void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,
> > enum icl_port_dpll_id port_dpll_id);
> > @@ -413,10 +413,10 @@ void intel_update_active_dpll(struct
> intel_atomic_state *state,
> > struct intel_crtc *crtc,
> > struct intel_encoder *encoder);
> > int intel_dpll_get_freq(struct intel_display *display,
> > - const struct intel_shared_dpll *pll,
> > + const struct intel_dpll *pll,
> > const struct intel_dpll_hw_state *dpll_hw_state);
> > bool intel_dpll_get_hw_state(struct intel_display *display,
> > - struct intel_shared_dpll *pll,
> > + struct intel_dpll *pll,
> > struct intel_dpll_hw_state *dpll_hw_state);
> > void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state);
> > void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);
> > diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c
> b/drivers/gpu/drm/i915/display/intel_fdi.c
> > index 169bbe154b5c..b1d2ba9b7295 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> > @@ -910,7 +910,7 @@ void hsw_fdi_link_train(struct intel_encoder
> *encoder,
> > intel_de_write(display, FDI_RX_CTL(PIPE_A), rx_ctl_val);
> >
> > /* Configure Port Clock Select */
> > - drm_WARN_ON(display->drm, crtc_state->shared_dpll->info->id !=
> DPLL_ID_SPLL);
> > + drm_WARN_ON(display->drm, crtc_state->intel_dpll->info->id !=
> DPLL_ID_SPLL);
> > intel_ddi_enable_clock(encoder, crtc_state);
> >
> > /* Start the training iterating through available voltages and emphasis,
> > diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c
> b/drivers/gpu/drm/i915/display/intel_lvds.c
> > index 8ce7c630da52..ec8f38fba178 100644
> > --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> > +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> > @@ -249,7 +249,7 @@ static void intel_pre_enable_lvds(struct
> intel_atomic_state *state,
> >
> > if (HAS_PCH_SPLIT(display)) {
> > assert_fdi_rx_pll_disabled(display, pipe);
> > - assert_shared_dpll_disabled(display, crtc_state->shared_dpll);
> > + assert_shared_dpll_disabled(display, crtc_state->intel_dpll);
> > } else {
> > assert_pll_disabled(display, pipe);
> > }
> > diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> > index 0325b0c9506d..46e0002a1358 100644
> > --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> > +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> > @@ -92,10 +92,10 @@ static void intel_crtc_disable_noatomic_begin(struct
> intel_crtc *crtc,
> > crtc->active = false;
> > crtc->base.enabled = false;
> >
> > - if (crtc_state->shared_dpll)
> > + if (crtc_state->intel_dpll)
> > intel_unreference_shared_dpll_crtc(crtc,
> > - crtc_state->shared_dpll,
> > - &crtc_state->shared_dpll-
> >state);
> > + crtc_state->intel_dpll,
> > + &crtc_state->intel_dpll-
> >state);
> > }
> >
> > static void set_encoder_for_connector(struct intel_connector *connector,
> > @@ -565,7 +565,7 @@ static bool has_bogus_dpll_config(const struct
> intel_crtc_state *crtc_state)
> > */
> > return display->platform.sandybridge &&
> > crtc_state->hw.active &&
> > - crtc_state->shared_dpll &&
> > + crtc_state->intel_dpll &&
> > crtc_state->port_clock == 0;
> > }
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c
> b/drivers/gpu/drm/i915/display/intel_pch_display.c
> > index 1743ebf551cb..b38305c16e77 100644
> > --- a/drivers/gpu/drm/i915/display/intel_pch_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
> > @@ -251,7 +251,7 @@ static void ilk_enable_pch_transcoder(const struct
> intel_crtc_state *crtc_state)
> > u32 val, pipeconf_val;
> >
> > /* Make sure PCH DPLL is enabled */
> > - assert_shared_dpll_enabled(display, crtc_state->shared_dpll);
> > + assert_shared_dpll_enabled(display, crtc_state->intel_dpll);
> >
> > /* FDI must be feeding us bits for PCH ports */
> > assert_fdi_tx_enabled(display, pipe);
> > @@ -381,7 +381,7 @@ void ilk_pch_enable(struct intel_atomic_state *state,
> > temp = intel_de_read(display, PCH_DPLL_SEL);
> > temp |= TRANS_DPLL_ENABLE(pipe);
> > sel = TRANS_DPLLB_SEL(pipe);
> > - if (crtc_state->shared_dpll ==
> > + if (crtc_state->intel_dpll ==
> > intel_get_shared_dpll_by_id(display, DPLL_ID_PCH_PLL_B))
> > temp |= sel;
> > else
> > @@ -496,7 +496,7 @@ void ilk_pch_get_config(struct intel_crtc_state
> *crtc_state)
> > {
> > struct intel_display *display = to_intel_display(crtc_state);
> > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > enum pipe pipe = crtc->pipe;
> > enum intel_dpll_id pll_id;
> > bool pll_active;
> > @@ -528,8 +528,8 @@ void ilk_pch_get_config(struct intel_crtc_state
> *crtc_state)
> > pll_id = DPLL_ID_PCH_PLL_A;
> > }
> >
> > - crtc_state->shared_dpll = intel_get_shared_dpll_by_id(display, pll_id);
> > - pll = crtc_state->shared_dpll;
> > + crtc_state->intel_dpll = intel_get_shared_dpll_by_id(display, pll_id);
> > + pll = crtc_state->intel_dpll;
> >
> > pll_active = intel_dpll_get_hw_state(display, pll,
> > &crtc_state->dpll_hw_state);
> > diff --git a/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> > index 8bec55deff9f..9f6102d7c7be 100644
> > --- a/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> > +++ b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> > @@ -499,7 +499,7 @@ static void lpt_init_pch_refclk(struct intel_display
> *display)
> > static void ilk_init_pch_refclk(struct intel_display *display)
> > {
> > struct intel_encoder *encoder;
> > - struct intel_shared_dpll *pll;
> > + struct intel_dpll *pll;
> > int i;
> > u32 val, final;
> > bool has_lvds = false;
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 38+ messages in thread* RE: [PATCH 06/14] drm/i915/dpll: Rename intel_shared_dpll
2025-05-15 7:42 ` Kandpal, Suraj
@ 2025-05-20 3:00 ` Kandpal, Suraj
0 siblings, 0 replies; 38+ messages in thread
From: Kandpal, Suraj @ 2025-05-20 3:00 UTC (permalink / raw)
To: Nikula, Jani, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Murthy, Arun R, Kahola, Mika
> Subject: RE: [PATCH 06/14] drm/i915/dpll: Rename intel_shared_dpll
>
>
>
> > Subject: Re: [PATCH 06/14] drm/i915/dpll: Rename intel_shared_dpll
> >
> > On Thu, 15 May 2025, Suraj Kandpal <suraj.kandpal@intel.com> wrote:
> > > Rename intel_shared_dpll to intel_dpll to represent both
> > > shared and individual dplls. Since from MTL each PHY has it's
> > > own PLL making the shared PLL naming a little outdated. In an
> > > effort to make this framework accepting of future changes this
> > > needs to be done.
> > >
> > > --v2
> > > -Use intel_dpll_global to make sure names start with the filename
> > > [Jani/Ville]
> > > -Explain the need of this rename [Jani]
> > >
> > > --v3
> > > -Just keep it intel_dpll [Jani]
> > >
> > > --v4
> > > -Fix comment [Jani]
> > > -Use just num_dpll and dplls [Jani]
> > >
> > > Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> > > Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
> > > drivers/gpu/drm/i915/display/intel_ddi.c | 52 ++--
> > > drivers/gpu/drm/i915/display/intel_ddi.h | 6 +-
> > > drivers/gpu/drm/i915/display/intel_display.c | 12 +-
> > > .../gpu/drm/i915/display/intel_display_core.h | 4 +-
> > > .../drm/i915/display/intel_display_debugfs.c | 2 +-
> > > .../drm/i915/display/intel_display_types.h | 6 +-
> > > drivers/gpu/drm/i915/display/intel_dpll.c | 4 +-
> > > drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 228 +++++++++---------
> > > drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 18 +-
> > > drivers/gpu/drm/i915/display/intel_fdi.c | 2 +-
> > > drivers/gpu/drm/i915/display/intel_lvds.c | 2 +-
> > > .../drm/i915/display/intel_modeset_setup.c | 8 +-
> > > .../gpu/drm/i915/display/intel_pch_display.c | 10 +-
> > > .../gpu/drm/i915/display/intel_pch_refclk.c | 2 +-
> > > 15 files changed, 179 insertions(+), 179 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c
> > b/drivers/gpu/drm/i915/display/icl_dsi.c
> > > index ca7033251e91..55f0a20e0874 100644
> > > --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> > > +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> > > @@ -658,7 +658,7 @@ static void gen11_dsi_map_pll(struct intel_encoder
> > *encoder,
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
> > > - struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + struct intel_dpll *pll = crtc_state->intel_dpll;
> >
> > The rb was conditioned on the member not being named intel_dpll.
>
> Last time you mentioned the one that we keep in the intel_dpll_global struct
> for which I changed it to dpll and num_dpll dropping the intel
>
> for the one that is in crtc_state it has to be intel_dpll since the crtc_state
> already has a variable dpll defined there
> /* Settings for the intel dpll used on pretty much everything but
> * haswell. */
> struct dpll dpll;
>
> /* Selected dpll or NULL. */
> struct intel_dpll *intel_dpll;
>
> Regards,
> Suraj Kandpal
>
Hi Jani,
Can I have a ack on this so that I can go ahead with the merge of this series
Regards,
Suraj Kandpal
> >
> > BR,
> > Jani.
> >
> >
> >
> >
> > > enum phy phy;
> > > u32 val;
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > index 74132c1d6385..4d631cbc81d2 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > > @@ -236,7 +236,7 @@ static void intel_wait_ddi_buf_active(struct
> > intel_encoder *encoder)
> > > port_name(port));
> > > }
> > >
> > > -static u32 hsw_pll_to_ddi_pll_sel(const struct intel_shared_dpll *pll)
> > > +static u32 hsw_pll_to_ddi_pll_sel(const struct intel_dpll *pll)
> > > {
> > > switch (pll->info->id) {
> > > case DPLL_ID_WRPLL1:
> > > @@ -260,7 +260,7 @@ static u32 hsw_pll_to_ddi_pll_sel(const struct
> > intel_shared_dpll *pll)
> > > static u32 icl_pll_to_ddi_clk_sel(struct intel_encoder *encoder,
> > > const struct intel_crtc_state *crtc_state)
> > > {
> > > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > > int clock = crtc_state->port_clock;
> > > const enum intel_dpll_id id = pll->info->id;
> > >
> > > @@ -1561,7 +1561,7 @@ static bool _icl_ddi_is_clock_enabled(struct
> > intel_display *display, i915_reg_t
> > > return !(intel_de_read(display, reg) & clk_off);
> > > }
> > >
> > > -static struct intel_shared_dpll *
> > > +static struct intel_dpll *
> > > _icl_ddi_get_pll(struct intel_display *display, i915_reg_t reg,
> > > u32 clk_sel_mask, u32 clk_sel_shift)
> > > {
> > > @@ -1576,7 +1576,7 @@ static void adls_ddi_enable_clock(struct
> > intel_encoder *encoder,
> > > const struct intel_crtc_state *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > > enum phy phy = intel_encoder_to_phy(encoder);
> > >
> > > if (drm_WARN_ON(display->drm, !pll))
> > > @@ -1606,7 +1606,7 @@ static bool adls_ddi_is_clock_enabled(struct
> > intel_encoder *encoder)
> > >
> > ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
> > > }
> > >
> > > -static struct intel_shared_dpll *adls_ddi_get_pll(struct intel_encoder
> > *encoder)
> > > +static struct intel_dpll *adls_ddi_get_pll(struct intel_encoder *encoder)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > enum phy phy = intel_encoder_to_phy(encoder);
> > > @@ -1620,7 +1620,7 @@ static void rkl_ddi_enable_clock(struct
> > intel_encoder *encoder,
> > > const struct intel_crtc_state *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > > enum phy phy = intel_encoder_to_phy(encoder);
> > >
> > > if (drm_WARN_ON(display->drm, !pll))
> > > @@ -1650,7 +1650,7 @@ static bool rkl_ddi_is_clock_enabled(struct
> > intel_encoder *encoder)
> > >
> > RKL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
> > > }
> > >
> > > -static struct intel_shared_dpll *rkl_ddi_get_pll(struct intel_encoder
> > *encoder)
> > > +static struct intel_dpll *rkl_ddi_get_pll(struct intel_encoder *encoder)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > enum phy phy = intel_encoder_to_phy(encoder);
> > > @@ -1664,7 +1664,7 @@ static void dg1_ddi_enable_clock(struct
> > intel_encoder *encoder,
> > > const struct intel_crtc_state *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > > enum phy phy = intel_encoder_to_phy(encoder);
> > >
> > > if (drm_WARN_ON(display->drm, !pll))
> > > @@ -1703,7 +1703,7 @@ static bool dg1_ddi_is_clock_enabled(struct
> > intel_encoder *encoder)
> > >
> > DG1_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
> > > }
> > >
> > > -static struct intel_shared_dpll *dg1_ddi_get_pll(struct intel_encoder
> > *encoder)
> > > +static struct intel_dpll *dg1_ddi_get_pll(struct intel_encoder *encoder)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > enum phy phy = intel_encoder_to_phy(encoder);
> > > @@ -1730,7 +1730,7 @@ static void icl_ddi_combo_enable_clock(struct
> > intel_encoder *encoder,
> > > const struct intel_crtc_state *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > > enum phy phy = intel_encoder_to_phy(encoder);
> > >
> > > if (drm_WARN_ON(display->drm, !pll))
> > > @@ -1760,7 +1760,7 @@ static bool
> icl_ddi_combo_is_clock_enabled(struct
> > intel_encoder *encoder)
> > >
> > ICL_DPCLKA_CFGCR0_DDI_CLK_OFF(phy));
> > > }
> > >
> > > -struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder
> > *encoder)
> > > +struct intel_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > enum phy phy = intel_encoder_to_phy(encoder);
> > > @@ -1774,7 +1774,7 @@ static void jsl_ddi_tc_enable_clock(struct
> > intel_encoder *encoder,
> > > const struct intel_crtc_state *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > > enum port port = encoder->port;
> > >
> > > if (drm_WARN_ON(display->drm, !pll))
> > > @@ -1817,7 +1817,7 @@ static void icl_ddi_tc_enable_clock(struct
> > intel_encoder *encoder,
> > > const struct intel_crtc_state *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > > enum tc_port tc_port = intel_encoder_to_tc(encoder);
> > > enum port port = encoder->port;
> > >
> > > @@ -1868,7 +1868,7 @@ static bool icl_ddi_tc_is_clock_enabled(struct
> > intel_encoder *encoder)
> > > return !(tmp & ICL_DPCLKA_CFGCR0_TC_CLK_OFF(tc_port));
> > > }
> > >
> > > -static struct intel_shared_dpll *icl_ddi_tc_get_pll(struct intel_encoder
> > *encoder)
> > > +static struct intel_dpll *icl_ddi_tc_get_pll(struct intel_encoder *encoder)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > enum tc_port tc_port = intel_encoder_to_tc(encoder);
> > > @@ -1898,7 +1898,7 @@ static struct intel_shared_dpll
> > *icl_ddi_tc_get_pll(struct intel_encoder *encode
> > > return intel_get_shared_dpll_by_id(display, id);
> > > }
> > >
> > > -static struct intel_shared_dpll *bxt_ddi_get_pll(struct intel_encoder
> > *encoder)
> > > +static struct intel_dpll *bxt_ddi_get_pll(struct intel_encoder *encoder)
> > > {
> > > struct intel_display *display = to_intel_display(encoder->base.dev);
> > > enum intel_dpll_id id;
> > > @@ -1925,7 +1925,7 @@ static void skl_ddi_enable_clock(struct
> > intel_encoder *encoder,
> > > const struct intel_crtc_state *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > > enum port port = encoder->port;
> > >
> > > if (drm_WARN_ON(display->drm, !pll))
> > > @@ -1967,7 +1967,7 @@ static bool skl_ddi_is_clock_enabled(struct
> > intel_encoder *encoder)
> > > return !(intel_de_read(display, DPLL_CTRL2) &
> > DPLL_CTRL2_DDI_CLK_OFF(port));
> > > }
> > >
> > > -static struct intel_shared_dpll *skl_ddi_get_pll(struct intel_encoder
> > *encoder)
> > > +static struct intel_dpll *skl_ddi_get_pll(struct intel_encoder *encoder)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > enum port port = encoder->port;
> > > @@ -1993,7 +1993,7 @@ void hsw_ddi_enable_clock(struct intel_encoder
> > *encoder,
> > > const struct intel_crtc_state *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > > enum port port = encoder->port;
> > >
> > > if (drm_WARN_ON(display->drm, !pll))
> > > @@ -2018,7 +2018,7 @@ bool hsw_ddi_is_clock_enabled(struct
> > intel_encoder *encoder)
> > > return intel_de_read(display, PORT_CLK_SEL(port)) !=
> > PORT_CLK_SEL_NONE;
> > > }
> > >
> > > -static struct intel_shared_dpll *hsw_ddi_get_pll(struct intel_encoder
> > *encoder)
> > > +static struct intel_dpll *hsw_ddi_get_pll(struct intel_encoder *encoder)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > enum port port = encoder->port;
> > > @@ -4187,7 +4187,7 @@ static void intel_ddi_get_config(struct
> > intel_encoder *encoder,
> > >
> > > void intel_ddi_get_clock(struct intel_encoder *encoder,
> > > struct intel_crtc_state *crtc_state,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > enum icl_port_dpll_id port_dpll_id = ICL_PORT_DPLL_DEFAULT;
> > > @@ -4203,7 +4203,7 @@ void intel_ddi_get_clock(struct intel_encoder
> > *encoder,
> > >
> > > icl_set_active_port_dpll(crtc_state, port_dpll_id);
> > >
> > > - crtc_state->port_clock = intel_dpll_get_freq(display, crtc_state-
> > >shared_dpll,
> > > + crtc_state->port_clock = intel_dpll_get_freq(display, crtc_state-
> > >intel_dpll,
> > > &crtc_state-
> > >dpll_hw_state);
> > > }
> > >
> > > @@ -4257,7 +4257,7 @@ static void icl_ddi_combo_get_config(struct
> > intel_encoder *encoder,
> > > intel_ddi_get_config(encoder, crtc_state);
> > > }
> > >
> > > -static bool icl_ddi_tc_pll_is_tbt(const struct intel_shared_dpll *pll)
> > > +static bool icl_ddi_tc_pll_is_tbt(const struct intel_dpll *pll)
> > > {
> > > return pll->info->id == DPLL_ID_ICL_TBTPLL;
> > > }
> > > @@ -4267,7 +4267,7 @@ icl_ddi_tc_port_pll_type(struct intel_encoder
> > *encoder,
> > > const struct intel_crtc_state *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > - const struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + const struct intel_dpll *pll = crtc_state->intel_dpll;
> > >
> > > if (drm_WARN_ON(display->drm, !pll))
> > > return ICL_PORT_DPLL_DEFAULT;
> > > @@ -4290,7 +4290,7 @@ intel_ddi_port_pll_type(struct intel_encoder
> > *encoder,
> > >
> > > static void icl_ddi_tc_get_clock(struct intel_encoder *encoder,
> > > struct intel_crtc_state *crtc_state,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > struct intel_display *display = to_intel_display(encoder);
> > > enum icl_port_dpll_id port_dpll_id;
> > > @@ -4313,10 +4313,10 @@ static void icl_ddi_tc_get_clock(struct
> > intel_encoder *encoder,
> > >
> > > icl_set_active_port_dpll(crtc_state, port_dpll_id);
> > >
> > > - if (icl_ddi_tc_pll_is_tbt(crtc_state->shared_dpll))
> > > + if (icl_ddi_tc_pll_is_tbt(crtc_state->intel_dpll))
> > > crtc_state->port_clock = icl_calc_tbt_pll_link(display, encoder-
> > >port);
> > > else
> > > - crtc_state->port_clock = intel_dpll_get_freq(display,
> > crtc_state->shared_dpll,
> > > + crtc_state->port_clock = intel_dpll_get_freq(display,
> > crtc_state->intel_dpll,
> > > &crtc_state-
> > >dpll_hw_state);
> > > }
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.h
> > b/drivers/gpu/drm/i915/display/intel_ddi.h
> > > index 353eb04079e9..f6f511bb0431 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_ddi.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.h
> > > @@ -16,9 +16,9 @@ struct intel_crtc;
> > > struct intel_crtc_state;
> > > struct intel_display;
> > > struct intel_dp;
> > > +struct intel_dpll;
> > > struct intel_dpll_hw_state;
> > > struct intel_encoder;
> > > -struct intel_shared_dpll;
> > > enum pipe;
> > > enum port;
> > > enum transcoder;
> > > @@ -40,7 +40,7 @@ void intel_ddi_enable_clock(struct intel_encoder
> > *encoder,
> > > void intel_ddi_disable_clock(struct intel_encoder *encoder);
> > > void intel_ddi_get_clock(struct intel_encoder *encoder,
> > > struct intel_crtc_state *crtc_state,
> > > - struct intel_shared_dpll *pll);
> > > + struct intel_dpll *pll);
> > > void hsw_ddi_enable_clock(struct intel_encoder *encoder,
> > > const struct intel_crtc_state *crtc_state);
> > > void hsw_ddi_disable_clock(struct intel_encoder *encoder);
> > > @@ -50,7 +50,7 @@ intel_ddi_port_pll_type(struct intel_encoder
> *encoder,
> > > const struct intel_crtc_state *crtc_state);
> > > void hsw_ddi_get_config(struct intel_encoder *encoder,
> > > struct intel_crtc_state *crtc_state);
> > > -struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder
> > *encoder);
> > > +struct intel_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
> > > void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
> > > const struct intel_crtc_state *crtc_state);
> > > void intel_wait_ddi_buf_idle(struct intel_display *display, enum port
> port);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c
> > b/drivers/gpu/drm/i915/display/intel_display.c
> > > index 6f0a0bc71b06..dcfbd3d2df32 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > > @@ -1325,7 +1325,7 @@ static void intel_encoders_update_prepare(struct
> > intel_atomic_state *state)
> > > if (intel_crtc_needs_modeset(new_crtc_state))
> > > continue;
> > >
> > > - new_crtc_state->shared_dpll = old_crtc_state-
> > >shared_dpll;
> > > + new_crtc_state->intel_dpll = old_crtc_state-
> > >intel_dpll;
> > > new_crtc_state->dpll_hw_state = old_crtc_state-
> > >dpll_hw_state;
> > > }
> > > }
> > > @@ -1663,7 +1663,7 @@ static void hsw_crtc_enable(struct
> > intel_atomic_state *state,
> > >
> > > intel_encoders_pre_pll_enable(state, crtc);
> > >
> > > - if (new_crtc_state->shared_dpll)
> > > + if (new_crtc_state->intel_dpll)
> > > intel_enable_shared_dpll(new_crtc_state);
> > >
> > > intel_encoders_pre_enable(state, crtc);
> > > @@ -1959,7 +1959,7 @@ static void get_crtc_power_domains(struct
> > intel_crtc_state *crtc_state,
> > > if (HAS_DDI(display) && crtc_state->has_audio)
> > > set_bit(POWER_DOMAIN_AUDIO_MMIO, mask->bits);
> > >
> > > - if (crtc_state->shared_dpll)
> > > + if (crtc_state->intel_dpll)
> > > set_bit(POWER_DOMAIN_DISPLAY_CORE, mask->bits);
> > >
> > > if (crtc_state->dsc.compression_enable)
> > > @@ -4501,7 +4501,7 @@ copy_joiner_crtc_state_modeset(struct
> > intel_atomic_state *state,
> > > /* preserve some things from the slave's original crtc state */
> > > saved_state->uapi = secondary_crtc_state->uapi;
> > > saved_state->scaler_state = secondary_crtc_state->scaler_state;
> > > - saved_state->shared_dpll = secondary_crtc_state->shared_dpll;
> > > + saved_state->intel_dpll = secondary_crtc_state->intel_dpll;
> > > saved_state->crc_enabled = secondary_crtc_state->crc_enabled;
> > >
> > > intel_crtc_free_hw_state(secondary_crtc_state);
> > > @@ -4564,7 +4564,7 @@ intel_crtc_prepare_cleared_state(struct
> > intel_atomic_state *state,
> > > saved_state->uapi = crtc_state->uapi;
> > > saved_state->inherited = crtc_state->inherited;
> > > saved_state->scaler_state = crtc_state->scaler_state;
> > > - saved_state->shared_dpll = crtc_state->shared_dpll;
> > > + saved_state->intel_dpll = crtc_state->intel_dpll;
> > > saved_state->dpll_hw_state = crtc_state->dpll_hw_state;
> > > memcpy(saved_state->icl_port_dplls, crtc_state->icl_port_dplls,
> > > sizeof(saved_state->icl_port_dplls));
> > > @@ -5318,7 +5318,7 @@ intel_pipe_config_compare(const struct
> > intel_crtc_state *current_config,
> > > PIPE_CONF_CHECK_BOOL(double_wide);
> > >
> > > if (display->dpll.mgr)
> > > - PIPE_CONF_CHECK_P(shared_dpll);
> > > + PIPE_CONF_CHECK_P(intel_dpll);
> > >
> > > /* FIXME convert everything over the dpll_mgr */
> > > if (display->dpll.mgr || HAS_GMCH(display))
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h
> > b/drivers/gpu/drm/i915/display/intel_display_core.h
> > > index e0221e514326..5f5dd2722d99 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_core.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_core.h
> > > @@ -125,8 +125,8 @@ struct intel_audio {
> > > struct intel_dpll_global {
> > > struct mutex lock;
> > >
> > > - int num_shared_dpll;
> > > - struct intel_shared_dpll shared_dplls[I915_NUM_PLLS];
> > > + int num_dpll;
> > > + struct intel_dpll dplls[I915_NUM_PLLS];
> > > const struct intel_dpll_mgr *mgr;
> > >
> > > struct {
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > > index 3770ce9469d1..ea9e271bc6ee 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> > > @@ -618,7 +618,7 @@ static int i915_shared_dplls_info(struct seq_file *m,
> > void *unused)
> > > {
> > > struct intel_display *display = node_to_intel_display(m->private);
> > > struct drm_printer p = drm_seq_file_printer(m);
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > int i;
> > >
> > > drm_modeset_lock_all(display->drm);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > index 1bdffaca153a..dbb07f05bfc6 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > > @@ -1075,8 +1075,8 @@ struct intel_crtc_state {
> > > * haswell. */
> > > struct dpll dpll;
> > >
> > > - /* Selected dpll when shared or NULL. */
> > > - struct intel_shared_dpll *shared_dpll;
> > > + /* Selected dpll or NULL. */
> > > + struct intel_dpll *intel_dpll;
> > >
> > > /* Actual register state of the dpll, for shared dpll cross-checking. */
> > > struct intel_dpll_hw_state dpll_hw_state;
> > > @@ -1086,7 +1086,7 @@ struct intel_crtc_state {
> > > * setting shared_dpll and dpll_hw_state to one of these reserved
> > ones.
> > > */
> > > struct icl_port_dpll {
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > struct intel_dpll_hw_state hw_state;
> > > } icl_port_dplls[ICL_PORT_DPLL_COUNT];
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c
> > b/drivers/gpu/drm/i915/display/intel_dpll.c
> > > index 8db603d9c823..4d1f7fccd28a 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dpll.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dpll.c
> > > @@ -1767,9 +1767,9 @@ int intel_dpll_crtc_get_shared_dpll(struct
> > intel_atomic_state *state,
> > > int ret;
> > >
> > > drm_WARN_ON(display->drm, !intel_crtc_needs_modeset(crtc_state));
> > > - drm_WARN_ON(display->drm, !crtc_state->hw.enable && crtc_state-
> > >shared_dpll);
> > > + drm_WARN_ON(display->drm, !crtc_state->hw.enable && crtc_state-
> > >intel_dpll);
> > >
> > > - if (!crtc_state->hw.enable || crtc_state->shared_dpll)
> > > + if (!crtc_state->hw.enable || crtc_state->intel_dpll)
> > > return 0;
> > >
> > > if (!display->funcs.dpll->crtc_get_shared_dpll)
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > index bdad4d72cc01..6fbbc5e89f3c 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> > > @@ -70,7 +70,7 @@ struct intel_dpll_funcs {
> > > * the pll is not already enabled.
> > > */
> > > void (*enable)(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state *dpll_hw_state);
> > >
> > > /*
> > > @@ -79,7 +79,7 @@ struct intel_dpll_funcs {
> > > * tracked users for it.
> > > */
> > > void (*disable)(struct intel_display *display,
> > > - struct intel_shared_dpll *pll);
> > > + struct intel_dpll *pll);
> > >
> > > /*
> > > * Hook for reading the values currently programmed to the DPLL
> > > @@ -87,7 +87,7 @@ struct intel_dpll_funcs {
> > > * verification after a mode set.
> > > */
> > > bool (*get_hw_state)(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state);
> > >
> > > /*
> > > @@ -95,7 +95,7 @@ struct intel_dpll_funcs {
> > > * in state.
> > > */
> > > int (*get_freq)(struct intel_display *i915,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state *dpll_hw_state);
> > > };
> > >
> > > @@ -124,7 +124,7 @@ static void
> > > intel_atomic_duplicate_dpll_state(struct intel_display *display,
> > > struct intel_dpll_state *dpll_state)
> > > {
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > int i;
> > >
> > > /* Copy dpll state */
> > > @@ -158,11 +158,11 @@ intel_atomic_get_shared_dpll_state(struct
> > drm_atomic_state *s)
> > > * Returns:
> > > * A pointer to the DPLL with @id
> > > */
> > > -struct intel_shared_dpll *
> > > +struct intel_dpll *
> > > intel_get_shared_dpll_by_id(struct intel_display *display,
> > > enum intel_dpll_id id)
> > > {
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > int i;
> > >
> > > for_each_dpll(display, pll, i) {
> > > @@ -176,7 +176,7 @@ intel_get_shared_dpll_by_id(struct intel_display
> > *display,
> > >
> > > /* For ILK+ */
> > > void assert_shared_dpll(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > bool state)
> > > {
> > > bool cur_state;
> > > @@ -205,7 +205,7 @@ enum intel_dpll_id icl_tc_port_to_pll_id(enum
> > tc_port tc_port)
> > >
> > > static i915_reg_t
> > > intel_combo_pll_enable_reg(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > if (display->platform.dg1)
> > > return DG1_DPLL_ENABLE(pll->info->id);
> > > @@ -218,7 +218,7 @@ intel_combo_pll_enable_reg(struct intel_display
> > *display,
> > >
> > > static i915_reg_t
> > > intel_tc_pll_enable_reg(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > const enum intel_dpll_id id = pll->info->id;
> > > enum tc_port tc_port = icl_pll_id_to_tc_port(id);
> > > @@ -230,7 +230,7 @@ intel_tc_pll_enable_reg(struct intel_display
> *display,
> > > }
> > >
> > > static void _intel_enable_shared_dpll(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > if (pll->info->power_domain)
> > > pll->wakeref = intel_display_power_get(display, pll->info-
> > >power_domain);
> > > @@ -240,7 +240,7 @@ static void _intel_enable_shared_dpll(struct
> > intel_display *display,
> > > }
> > >
> > > static void _intel_disable_shared_dpll(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > pll->info->funcs->disable(display, pll);
> > > pll->on = false;
> > > @@ -259,7 +259,7 @@ void intel_enable_shared_dpll(const struct
> > intel_crtc_state *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(crtc_state);
> > > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > - struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + struct intel_dpll *pll = crtc_state->intel_dpll;
> > > unsigned int pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
> > > unsigned int old_mask;
> > >
> > > @@ -305,7 +305,7 @@ void intel_disable_shared_dpll(const struct
> > intel_crtc_state *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(crtc_state);
> > > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > - struct intel_shared_dpll *pll = crtc_state->shared_dpll;
> > > + struct intel_dpll *pll = crtc_state->intel_dpll;
> > > unsigned int pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
> > >
> > > /* PCH only available on ILK+ */
> > > @@ -344,7 +344,7 @@ void intel_disable_shared_dpll(const struct
> > intel_crtc_state *crtc_state)
> > > static unsigned long
> > > intel_dpll_mask_all(struct intel_display *display)
> > > {
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > unsigned long dpll_mask = 0;
> > > int i;
> > >
> > > @@ -357,7 +357,7 @@ intel_dpll_mask_all(struct intel_display *display)
> > > return dpll_mask;
> > > }
> > >
> > > -static struct intel_shared_dpll *
> > > +static struct intel_dpll *
> > > intel_find_shared_dpll(struct intel_atomic_state *state,
> > > const struct intel_crtc *crtc,
> > > const struct intel_dpll_hw_state *dpll_hw_state,
> > > @@ -366,7 +366,7 @@ intel_find_shared_dpll(struct intel_atomic_state
> > *state,
> > > struct intel_display *display = to_intel_display(crtc);
> > > unsigned long dpll_mask_all = intel_dpll_mask_all(display);
> > > struct intel_dpll_state *dpll_state;
> > > - struct intel_shared_dpll *unused_pll = NULL;
> > > + struct intel_dpll *unused_pll = NULL;
> > > enum intel_dpll_id id;
> > >
> > > dpll_state = intel_atomic_get_shared_dpll_state(&state->base);
> > > @@ -374,7 +374,7 @@ intel_find_shared_dpll(struct intel_atomic_state
> > *state,
> > > drm_WARN_ON(display->drm, dpll_mask & ~dpll_mask_all);
> > >
> > > for_each_set_bit(id, &dpll_mask, fls(dpll_mask_all)) {
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > >
> > > pll = intel_get_shared_dpll_by_id(display, id);
> > > if (!pll)
> > > @@ -421,7 +421,7 @@ intel_find_shared_dpll(struct intel_atomic_state
> > *state,
> > > */
> > > static void
> > > intel_reference_shared_dpll_crtc(const struct intel_crtc *crtc,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > struct intel_dpll_state *dpll_state)
> > > {
> > > struct intel_display *display = to_intel_display(crtc);
> > > @@ -437,7 +437,7 @@ intel_reference_shared_dpll_crtc(const struct
> > intel_crtc *crtc,
> > > static void
> > > intel_reference_shared_dpll(struct intel_atomic_state *state,
> > > const struct intel_crtc *crtc,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > struct intel_dpll_state *dpll_state;
> > > @@ -460,7 +460,7 @@ intel_reference_shared_dpll(struct
> > intel_atomic_state *state,
> > > */
> > > void
> > > intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > struct intel_dpll_state *dpll_state)
> > > {
> > > struct intel_display *display = to_intel_display(crtc);
> > > @@ -475,7 +475,7 @@ intel_unreference_shared_dpll_crtc(const struct
> > intel_crtc *crtc,
> > >
> > > static void intel_unreference_shared_dpll(struct intel_atomic_state *state,
> > > const struct intel_crtc *crtc,
> > > - const struct intel_shared_dpll *pll)
> > > + const struct intel_dpll *pll)
> > > {
> > > struct intel_dpll_state *dpll_state;
> > >
> > > @@ -492,12 +492,12 @@ static void intel_put_dpll(struct
> intel_atomic_state
> > *state,
> > > struct intel_crtc_state *new_crtc_state =
> > > intel_atomic_get_new_crtc_state(state, crtc);
> > >
> > > - new_crtc_state->shared_dpll = NULL;
> > > + new_crtc_state->intel_dpll = NULL;
> > >
> > > - if (!old_crtc_state->shared_dpll)
> > > + if (!old_crtc_state->intel_dpll)
> > > return;
> > >
> > > - intel_unreference_shared_dpll(state, crtc, old_crtc_state-
> > >shared_dpll);
> > > + intel_unreference_shared_dpll(state, crtc, old_crtc_state->intel_dpll);
> > > }
> > >
> > > /**
> > > @@ -515,7 +515,7 @@ void intel_shared_dpll_swap_state(struct
> > intel_atomic_state *state)
> > > {
> > > struct intel_display *display = to_intel_display(state);
> > > struct intel_dpll_state *dpll_state = state->dpll_state;
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > int i;
> > >
> > > if (!state->dpll_set)
> > > @@ -526,7 +526,7 @@ void intel_shared_dpll_swap_state(struct
> > intel_atomic_state *state)
> > > }
> > >
> > > static bool ibx_pch_dpll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > struct i9xx_dpll_hw_state *hw_state = &dpll_hw_state->i9xx;
> > > @@ -562,7 +562,7 @@ static void ibx_assert_pch_refclk_enabled(struct
> > intel_display *display)
> > > }
> > >
> > > static void ibx_pch_dpll_enable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > const struct i9xx_dpll_hw_state *hw_state = &dpll_hw_state->i9xx;
> > > @@ -591,7 +591,7 @@ static void ibx_pch_dpll_enable(struct intel_display
> > *display,
> > > }
> > >
> > > static void ibx_pch_dpll_disable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > const enum intel_dpll_id id = pll->info->id;
> > >
> > > @@ -614,7 +614,7 @@ static int ibx_get_dpll(struct intel_atomic_state
> > *state,
> > > struct intel_display *display = to_intel_display(state);
> > > struct intel_crtc_state *crtc_state =
> > > intel_atomic_get_new_crtc_state(state, crtc);
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > enum intel_dpll_id id;
> > >
> > > if (HAS_PCH_IBX(display)) {
> > > @@ -640,7 +640,7 @@ static int ibx_get_dpll(struct intel_atomic_state
> > *state,
> > > intel_reference_shared_dpll(state, crtc,
> > > pll, &crtc_state->dpll_hw_state);
> > >
> > > - crtc_state->shared_dpll = pll;
> > > + crtc_state->intel_dpll = pll;
> > >
> > > return 0;
> > > }
> > > @@ -692,7 +692,7 @@ static const struct intel_dpll_mgr pch_pll_mgr = {
> > > };
> > >
> > > static void hsw_ddi_wrpll_enable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> > > @@ -704,7 +704,7 @@ static void hsw_ddi_wrpll_enable(struct
> intel_display
> > *display,
> > > }
> > >
> > > static void hsw_ddi_spll_enable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> > > @@ -715,7 +715,7 @@ static void hsw_ddi_spll_enable(struct intel_display
> > *display,
> > > }
> > >
> > > static void hsw_ddi_wrpll_disable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > const enum intel_dpll_id id = pll->info->id;
> > >
> > > @@ -731,7 +731,7 @@ static void hsw_ddi_wrpll_disable(struct
> intel_display
> > *display,
> > > }
> > >
> > > static void hsw_ddi_spll_disable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > enum intel_dpll_id id = pll->info->id;
> > >
> > > @@ -747,7 +747,7 @@ static void hsw_ddi_spll_disable(struct intel_display
> > *display,
> > > }
> > >
> > > static bool hsw_ddi_wrpll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> > > @@ -769,7 +769,7 @@ static bool hsw_ddi_wrpll_get_hw_state(struct
> > intel_display *display,
> > > }
> > >
> > > static bool hsw_ddi_spll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> > > @@ -996,7 +996,7 @@ hsw_ddi_calculate_wrpll(int clock /* in Hz */,
> > > }
> > >
> > > static int hsw_ddi_wrpll_get_freq(struct intel_display *display,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> > > @@ -1059,7 +1059,7 @@ hsw_ddi_wrpll_compute_dpll(struct
> > intel_atomic_state *state,
> > > return 0;
> > > }
> > >
> > > -static struct intel_shared_dpll *
> > > +static struct intel_dpll *
> > > hsw_ddi_wrpll_get_dpll(struct intel_atomic_state *state,
> > > struct intel_crtc *crtc)
> > > {
> > > @@ -1090,11 +1090,11 @@ hsw_ddi_lcpll_compute_dpll(struct
> > intel_crtc_state *crtc_state)
> > > }
> > > }
> > >
> > > -static struct intel_shared_dpll *
> > > +static struct intel_dpll *
> > > hsw_ddi_lcpll_get_dpll(struct intel_crtc_state *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(crtc_state);
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > enum intel_dpll_id pll_id;
> > > int clock = crtc_state->port_clock;
> > >
> > > @@ -1122,7 +1122,7 @@ hsw_ddi_lcpll_get_dpll(struct intel_crtc_state
> > *crtc_state)
> > > }
> > >
> > > static int hsw_ddi_lcpll_get_freq(struct intel_display *display,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > int link_clock = 0;
> > > @@ -1162,7 +1162,7 @@ hsw_ddi_spll_compute_dpll(struct
> > intel_atomic_state *state,
> > > return 0;
> > > }
> > >
> > > -static struct intel_shared_dpll *
> > > +static struct intel_dpll *
> > > hsw_ddi_spll_get_dpll(struct intel_atomic_state *state,
> > > struct intel_crtc *crtc)
> > > {
> > > @@ -1174,7 +1174,7 @@ hsw_ddi_spll_get_dpll(struct intel_atomic_state
> > *state,
> > > }
> > >
> > > static int hsw_ddi_spll_get_freq(struct intel_display *display,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > const struct hsw_dpll_hw_state *hw_state = &dpll_hw_state->hsw;
> > > @@ -1221,7 +1221,7 @@ static int hsw_get_dpll(struct intel_atomic_state
> > *state,
> > > {
> > > struct intel_crtc_state *crtc_state =
> > > intel_atomic_get_new_crtc_state(state, crtc);
> > > - struct intel_shared_dpll *pll = NULL;
> > > + struct intel_dpll *pll = NULL;
> > >
> > > if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
> > > pll = hsw_ddi_wrpll_get_dpll(state, crtc);
> > > @@ -1236,7 +1236,7 @@ static int hsw_get_dpll(struct intel_atomic_state
> > *state,
> > > intel_reference_shared_dpll(state, crtc,
> > > pll, &crtc_state->dpll_hw_state);
> > >
> > > - crtc_state->shared_dpll = pll;
> > > + crtc_state->intel_dpll = pll;
> > >
> > > return 0;
> > > }
> > > @@ -1285,18 +1285,18 @@ static const struct intel_dpll_funcs
> > hsw_ddi_spll_funcs = {
> > > };
> > >
> > > static void hsw_ddi_lcpll_enable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state *hw_state)
> > > {
> > > }
> > >
> > > static void hsw_ddi_lcpll_disable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > }
> > >
> > > static bool hsw_ddi_lcpll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > return true;
> > > @@ -1364,7 +1364,7 @@ static const struct skl_dpll_regs skl_dpll_regs[4] =
> {
> > > };
> > >
> > > static void skl_ddi_pll_write_ctrl1(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct skl_dpll_hw_state *hw_state)
> > > {
> > > const enum intel_dpll_id id = pll->info->id;
> > > @@ -1378,7 +1378,7 @@ static void skl_ddi_pll_write_ctrl1(struct
> > intel_display *display,
> > > }
> > >
> > > static void skl_ddi_pll_enable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > > @@ -1400,7 +1400,7 @@ static void skl_ddi_pll_enable(struct intel_display
> > *display,
> > > }
> > >
> > > static void skl_ddi_dpll0_enable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > > @@ -1409,7 +1409,7 @@ static void skl_ddi_dpll0_enable(struct
> > intel_display *display,
> > > }
> > >
> > > static void skl_ddi_pll_disable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > const struct skl_dpll_regs *regs = skl_dpll_regs;
> > > const enum intel_dpll_id id = pll->info->id;
> > > @@ -1420,12 +1420,12 @@ static void skl_ddi_pll_disable(struct
> > intel_display *display,
> > > }
> > >
> > > static void skl_ddi_dpll0_disable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > }
> > >
> > > static bool skl_ddi_pll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > > @@ -1463,7 +1463,7 @@ static bool skl_ddi_pll_get_hw_state(struct
> > intel_display *display,
> > > }
> > >
> > > static bool skl_ddi_dpll0_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > > @@ -1736,7 +1736,7 @@ skl_ddi_calculate_wrpll(int clock,
> > > }
> > >
> > > static int skl_ddi_wrpll_get_freq(struct intel_display *display,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > > @@ -1884,7 +1884,7 @@ skl_ddi_dp_set_dpll_hw_state(struct
> > intel_crtc_state *crtc_state)
> > > }
> > >
> > > static int skl_ddi_lcpll_get_freq(struct intel_display *display,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > > @@ -1939,7 +1939,7 @@ static int skl_get_dpll(struct intel_atomic_state
> > *state,
> > > {
> > > struct intel_crtc_state *crtc_state =
> > > intel_atomic_get_new_crtc_state(state, crtc);
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > >
> > > if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
> > > pll = intel_find_shared_dpll(state, crtc,
> > > @@ -1957,13 +1957,13 @@ static int skl_get_dpll(struct intel_atomic_state
> > *state,
> > > intel_reference_shared_dpll(state, crtc,
> > > pll, &crtc_state->dpll_hw_state);
> > >
> > > - crtc_state->shared_dpll = pll;
> > > + crtc_state->intel_dpll = pll;
> > >
> > > return 0;
> > > }
> > >
> > > static int skl_ddi_pll_get_freq(struct intel_display *display,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > const struct skl_dpll_hw_state *hw_state = &dpll_hw_state->skl;
> > > @@ -2038,7 +2038,7 @@ static const struct intel_dpll_mgr skl_pll_mgr = {
> > > };
> > >
> > > static void bxt_ddi_pll_enable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > const struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
> > > @@ -2141,7 +2141,7 @@ static void bxt_ddi_pll_enable(struct
> intel_display
> > *display,
> > > }
> > >
> > > static void bxt_ddi_pll_disable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > enum port port = (enum port)pll->info->id; /* 1:1 port->PLL mapping */
> > >
> > > @@ -2160,7 +2160,7 @@ static void bxt_ddi_pll_disable(struct
> intel_display
> > *display,
> > > }
> > >
> > > static bool bxt_ddi_pll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
> > > @@ -2360,7 +2360,7 @@ static int bxt_ddi_set_dpll_hw_state(struct
> > intel_crtc_state *crtc_state,
> > > }
> > >
> > > static int bxt_ddi_pll_get_freq(struct intel_display *display,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > const struct bxt_dpll_hw_state *hw_state = &dpll_hw_state->bxt;
> > > @@ -2429,7 +2429,7 @@ static int bxt_get_dpll(struct intel_atomic_state
> > *state,
> > > struct intel_display *display = to_intel_display(state);
> > > struct intel_crtc_state *crtc_state =
> > > intel_atomic_get_new_crtc_state(state, crtc);
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > enum intel_dpll_id id;
> > >
> > > /* 1:1 mapping between ports and PLLs */
> > > @@ -2442,7 +2442,7 @@ static int bxt_get_dpll(struct intel_atomic_state
> > *state,
> > > intel_reference_shared_dpll(state, crtc,
> > > pll, &crtc_state->dpll_hw_state);
> > >
> > > - crtc_state->shared_dpll = pll;
> > > + crtc_state->intel_dpll = pll;
> > >
> > > return 0;
> > > }
> > > @@ -2755,7 +2755,7 @@ static int icl_calc_tbt_pll(struct intel_crtc_state
> > *crtc_state,
> > > }
> > >
> > > static int icl_ddi_tbt_pll_get_freq(struct intel_display *display,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > /*
> > > @@ -2826,7 +2826,7 @@ icl_calc_wrpll(struct intel_crtc_state *crtc_state,
> > > }
> > >
> > > static int icl_ddi_combo_pll_get_freq(struct intel_display *display,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > > @@ -3199,7 +3199,7 @@ static int icl_calc_mg_pll_state(struct
> > intel_crtc_state *crtc_state,
> > > }
> > >
> > > static int icl_ddi_mg_pll_get_freq(struct intel_display *display,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state
> > *dpll_hw_state)
> > > {
> > > const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > > @@ -3285,7 +3285,7 @@ void icl_set_active_port_dpll(struct
> > intel_crtc_state *crtc_state,
> > > struct icl_port_dpll *port_dpll =
> > > &crtc_state->icl_port_dplls[port_dpll_id];
> > >
> > > - crtc_state->shared_dpll = port_dpll->pll;
> > > + crtc_state->intel_dpll = port_dpll->pll;
> > > crtc_state->dpll_hw_state = port_dpll->hw_state;
> > > }
> > >
> > > @@ -3428,8 +3428,8 @@ static int icl_compute_tc_phy_dplls(struct
> > intel_atomic_state *state,
> > > return ret;
> > >
> > > /* this is mainly for the fastset check */
> > > - if (old_crtc_state->shared_dpll &&
> > > - old_crtc_state->shared_dpll->info->id == DPLL_ID_ICL_TBTPLL)
> > > + if (old_crtc_state->intel_dpll &&
> > > + old_crtc_state->intel_dpll->info->id == DPLL_ID_ICL_TBTPLL)
> > > icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_DEFAULT);
> > > else
> > > icl_set_active_port_dpll(crtc_state, ICL_PORT_DPLL_MG_PHY);
> > > @@ -3521,7 +3521,7 @@ static void icl_put_dplls(struct intel_atomic_state
> > *state,
> > > intel_atomic_get_new_crtc_state(state, crtc);
> > > enum icl_port_dpll_id id;
> > >
> > > - new_crtc_state->shared_dpll = NULL;
> > > + new_crtc_state->intel_dpll = NULL;
> > >
> > > for (id = ICL_PORT_DPLL_DEFAULT; id < ICL_PORT_DPLL_COUNT; id++) {
> > > const struct icl_port_dpll *old_port_dpll =
> > > @@ -3539,7 +3539,7 @@ static void icl_put_dplls(struct intel_atomic_state
> > *state,
> > > }
> > >
> > > static bool mg_pll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > > @@ -3606,7 +3606,7 @@ static bool mg_pll_get_hw_state(struct
> > intel_display *display,
> > > }
> > >
> > > static bool dkl_pll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > > @@ -3678,7 +3678,7 @@ static bool dkl_pll_get_hw_state(struct
> > intel_display *display,
> > > }
> > >
> > > static bool icl_pll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state,
> > > i915_reg_t enable_reg)
> > > {
> > > @@ -3739,7 +3739,7 @@ static bool icl_pll_get_hw_state(struct
> intel_display
> > *display,
> > > }
> > >
> > > static bool combo_pll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > i915_reg_t enable_reg = intel_combo_pll_enable_reg(display, pll);
> > > @@ -3748,14 +3748,14 @@ static bool combo_pll_get_hw_state(struct
> > intel_display *display,
> > > }
> > >
> > > static bool tbt_pll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > return icl_pll_get_hw_state(display, pll, dpll_hw_state,
> > TBT_PLL_ENABLE);
> > > }
> > >
> > > static void icl_dpll_write(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct icl_dpll_hw_state *hw_state)
> > > {
> > > const enum intel_dpll_id id = pll->info->id;
> > > @@ -3797,7 +3797,7 @@ static void icl_dpll_write(struct intel_display
> > *display,
> > > }
> > >
> > > static void icl_mg_pll_write(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct icl_dpll_hw_state *hw_state)
> > > {
> > > enum tc_port tc_port = icl_pll_id_to_tc_port(pll->info->id);
> > > @@ -3840,7 +3840,7 @@ static void icl_mg_pll_write(struct intel_display
> > *display,
> > > }
> > >
> > > static void dkl_pll_write(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct icl_dpll_hw_state *hw_state)
> > > {
> > > enum tc_port tc_port = icl_pll_id_to_tc_port(pll->info->id);
> > > @@ -3905,7 +3905,7 @@ static void dkl_pll_write(struct intel_display
> > *display,
> > > }
> > >
> > > static void icl_pll_power_enable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > i915_reg_t enable_reg)
> > > {
> > > intel_de_rmw(display, enable_reg, 0, PLL_POWER_ENABLE);
> > > @@ -3920,7 +3920,7 @@ static void icl_pll_power_enable(struct
> > intel_display *display,
> > > }
> > >
> > > static void icl_pll_enable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > i915_reg_t enable_reg)
> > > {
> > > intel_de_rmw(display, enable_reg, 0, PLL_ENABLE);
> > > @@ -3930,7 +3930,7 @@ static void icl_pll_enable(struct intel_display
> > *display,
> > > drm_err(display->drm, "PLL %d not locked\n", pll->info->id);
> > > }
> > >
> > > -static void adlp_cmtg_clock_gating_wa(struct intel_display *display, struct
> > intel_shared_dpll *pll)
> > > +static void adlp_cmtg_clock_gating_wa(struct intel_display *display, struct
> > intel_dpll *pll)
> > > {
> > > u32 val;
> > >
> > > @@ -3955,7 +3955,7 @@ static void adlp_cmtg_clock_gating_wa(struct
> > intel_display *display, struct inte
> > > }
> > >
> > > static void combo_pll_enable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > > @@ -3979,7 +3979,7 @@ static void combo_pll_enable(struct intel_display
> > *display,
> > > }
> > >
> > > static void tbt_pll_enable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > > @@ -4000,7 +4000,7 @@ static void tbt_pll_enable(struct intel_display
> > *display,
> > > }
> > >
> > > static void mg_pll_enable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > const struct icl_dpll_hw_state *hw_state = &dpll_hw_state->icl;
> > > @@ -4025,7 +4025,7 @@ static void mg_pll_enable(struct intel_display
> > *display,
> > > }
> > >
> > > static void icl_pll_disable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > i915_reg_t enable_reg)
> > > {
> > > /* The first steps are done by intel_ddi_post_disable(). */
> > > @@ -4056,7 +4056,7 @@ static void icl_pll_disable(struct intel_display
> > *display,
> > > }
> > >
> > > static void combo_pll_disable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > i915_reg_t enable_reg = intel_combo_pll_enable_reg(display, pll);
> > >
> > > @@ -4064,13 +4064,13 @@ static void combo_pll_disable(struct
> > intel_display *display,
> > > }
> > >
> > > static void tbt_pll_disable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > icl_pll_disable(display, pll, TBT_PLL_ENABLE);
> > > }
> > >
> > > static void mg_pll_disable(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > i915_reg_t enable_reg = intel_tc_pll_enable_reg(display, pll);
> > >
> > > @@ -4346,19 +4346,19 @@ void intel_shared_dpll_init(struct intel_display
> > *display)
> > >
> > > for (i = 0; dpll_info[i].name; i++) {
> > > if (drm_WARN_ON(display->drm,
> > > - i >= ARRAY_SIZE(display->dpll.shared_dplls)))
> > > + i >= ARRAY_SIZE(display->dpll.dplls)))
> > > break;
> > >
> > > /* must fit into unsigned long bitmask on 32bit */
> > > if (drm_WARN_ON(display->drm, dpll_info[i].id >= 32))
> > > break;
> > >
> > > - display->dpll.shared_dplls[i].info = &dpll_info[i];
> > > - display->dpll.shared_dplls[i].index = i;
> > > + display->dpll.dplls[i].info = &dpll_info[i];
> > > + display->dpll.dplls[i].index = i;
> > > }
> > >
> > > display->dpll.mgr = dpll_mgr;
> > > - display->dpll.num_shared_dpll = i;
> > > + display->dpll.num_dpll = i;
> > > }
> > >
> > > /**
> > > @@ -4482,7 +4482,7 @@ void intel_update_active_dpll(struct
> > intel_atomic_state *state,
> > > * Return the output frequency corresponding to @pll's passed in
> > @dpll_hw_state.
> > > */
> > > int intel_dpll_get_freq(struct intel_display *display,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > if (drm_WARN_ON(display->drm, !pll->info->funcs->get_freq))
> > > @@ -4500,14 +4500,14 @@ int intel_dpll_get_freq(struct intel_display
> > *display,
> > > * Read out @pll's hardware state into @dpll_hw_state.
> > > */
> > > bool intel_dpll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state)
> > > {
> > > return pll->info->funcs->get_hw_state(display, pll, dpll_hw_state);
> > > }
> > >
> > > static void readout_dpll_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > struct intel_crtc *crtc;
> > >
> > > @@ -4521,7 +4521,7 @@ static void readout_dpll_hw_state(struct
> > intel_display *display,
> > > struct intel_crtc_state *crtc_state =
> > > to_intel_crtc_state(crtc->base.state);
> > >
> > > - if (crtc_state->hw.active && crtc_state->shared_dpll == pll)
> > > + if (crtc_state->hw.active && crtc_state->intel_dpll == pll)
> > > intel_reference_shared_dpll_crtc(crtc, pll, &pll->state);
> > > }
> > > pll->active_mask = pll->state.pipe_mask;
> > > @@ -4539,7 +4539,7 @@ void intel_dpll_update_ref_clks(struct
> > intel_display *display)
> > >
> > > void intel_dpll_readout_hw_state(struct intel_display *display)
> > > {
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > int i;
> > >
> > > for_each_dpll(display, pll, i)
> > > @@ -4547,7 +4547,7 @@ void intel_dpll_readout_hw_state(struct
> > intel_display *display)
> > > }
> > >
> > > static void sanitize_dpll_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll)
> > > + struct intel_dpll *pll)
> > > {
> > > if (!pll->on)
> > > return;
> > > @@ -4566,7 +4566,7 @@ static void sanitize_dpll_state(struct intel_display
> > *display,
> > >
> > > void intel_dpll_sanitize_state(struct intel_display *display)
> > > {
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > int i;
> > >
> > > intel_cx0_pll_power_save_wa(display);
> > > @@ -4623,7 +4623,7 @@ bool intel_dpll_compare_hw_state(struct
> > intel_display *display,
> > >
> > > static void
> > > verify_single_dpll_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_crtc *crtc,
> > > const struct intel_crtc_state *new_crtc_state)
> > > {
> > > @@ -4676,8 +4676,8 @@ verify_single_dpll_state(struct intel_display
> > *display,
> > > pll->info->name);
> > > }
> > >
> > > -static bool has_alt_port_dpll(const struct intel_shared_dpll *old_pll,
> > > - const struct intel_shared_dpll *new_pll)
> > > +static bool has_alt_port_dpll(const struct intel_dpll *old_pll,
> > > + const struct intel_dpll *new_pll)
> > > {
> > > return old_pll && new_pll && old_pll != new_pll &&
> > > (old_pll->info->is_alt_port_dpll || new_pll->info-
> > >is_alt_port_dpll);
> > > @@ -4692,22 +4692,22 @@ void intel_shared_dpll_state_verify(struct
> > intel_atomic_state *state,
> > > const struct intel_crtc_state *new_crtc_state =
> > > intel_atomic_get_new_crtc_state(state, crtc);
> > >
> > > - if (new_crtc_state->shared_dpll)
> > > - verify_single_dpll_state(display, new_crtc_state->shared_dpll,
> > > + if (new_crtc_state->intel_dpll)
> > > + verify_single_dpll_state(display, new_crtc_state->intel_dpll,
> > > crtc, new_crtc_state);
> > >
> > > - if (old_crtc_state->shared_dpll &&
> > > - old_crtc_state->shared_dpll != new_crtc_state->shared_dpll) {
> > > + if (old_crtc_state->intel_dpll &&
> > > + old_crtc_state->intel_dpll != new_crtc_state->intel_dpll) {
> > > u8 pipe_mask = BIT(crtc->pipe);
> > > - struct intel_shared_dpll *pll = old_crtc_state->shared_dpll;
> > > + struct intel_dpll *pll = old_crtc_state->intel_dpll;
> > >
> > > INTEL_DISPLAY_STATE_WARN(display, pll->active_mask &
> > pipe_mask,
> > > "%s: pll active mismatch (didn't expect
> > pipe %c in active mask (0x%x))\n",
> > > pll->info->name, pipe_name(crtc-
> > >pipe), pll->active_mask);
> > >
> > > /* TC ports have both MG/TC and TBT PLL referenced
> > simultaneously */
> > > - INTEL_DISPLAY_STATE_WARN(display,
> > !has_alt_port_dpll(old_crtc_state->shared_dpll,
> > > -
> > new_crtc_state->shared_dpll) &&
> > > + INTEL_DISPLAY_STATE_WARN(display,
> > !has_alt_port_dpll(old_crtc_state->intel_dpll,
> > > +
> > new_crtc_state->intel_dpll) &&
> > > pll->state.pipe_mask & pipe_mask,
> > > "%s: pll enabled crtcs mismatch
> > (found pipe %c in enabled mask (0x%x))\n",
> > > pll->info->name, pipe_name(crtc-
> > >pipe), pll->state.pipe_mask);
> > > @@ -4717,7 +4717,7 @@ void intel_shared_dpll_state_verify(struct
> > intel_atomic_state *state,
> > > void intel_shared_dpll_verify_disabled(struct intel_atomic_state *state)
> > > {
> > > struct intel_display *display = to_intel_display(state);
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > int i;
> > >
> > > for_each_dpll(display, pll, i)
> > > diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> > b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> > > index 28f464d504fb..ea3fb7002e65 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> > > @@ -31,8 +31,8 @@
> > > #include "intel_wakeref.h"
> > >
> > > #define for_each_dpll(__display, __pll, __i) \
> > > - for ((__i) = 0; (__i) < (__display)->dpll.num_shared_dpll && \
> > > - ((__pll) = &(__display)->dpll.shared_dplls[(__i)]) ; (__i)++)
> > > + for ((__i) = 0; (__i) < (__display)->dpll.num_dpll && \
> > > + ((__pll) = &(__display)->dpll.dplls[(__i)]) ; (__i)++)
> > >
> > > enum tc_port;
> > > struct drm_printer;
> > > @@ -344,9 +344,9 @@ struct dpll_info {
> > > };
> > >
> > > /**
> > > - * struct intel_shared_dpll - display PLL with tracked state and users
> > > + * struct intel_dpll - display PLL with tracked state and users
> > > */
> > > -struct intel_shared_dpll {
> > > +struct intel_dpll {
> > > /**
> > > * @state:
> > > *
> > > @@ -388,11 +388,11 @@ struct intel_shared_dpll {
> > > #define SKL_DPLL3 3
> > >
> > > /* shared dpll functions */
> > > -struct intel_shared_dpll *
> > > +struct intel_dpll *
> > > intel_get_shared_dpll_by_id(struct intel_display *display,
> > > enum intel_dpll_id id);
> > > void assert_shared_dpll(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > bool state);
> > > #define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
> > > #define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
> > > @@ -405,7 +405,7 @@ int intel_reserve_shared_dplls(struct
> > intel_atomic_state *state,
> > > void intel_release_shared_dplls(struct intel_atomic_state *state,
> > > struct intel_crtc *crtc);
> > > void intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > struct intel_dpll_state
> > *shared_dpll_state);
> > > void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,
> > > enum icl_port_dpll_id port_dpll_id);
> > > @@ -413,10 +413,10 @@ void intel_update_active_dpll(struct
> > intel_atomic_state *state,
> > > struct intel_crtc *crtc,
> > > struct intel_encoder *encoder);
> > > int intel_dpll_get_freq(struct intel_display *display,
> > > - const struct intel_shared_dpll *pll,
> > > + const struct intel_dpll *pll,
> > > const struct intel_dpll_hw_state *dpll_hw_state);
> > > bool intel_dpll_get_hw_state(struct intel_display *display,
> > > - struct intel_shared_dpll *pll,
> > > + struct intel_dpll *pll,
> > > struct intel_dpll_hw_state *dpll_hw_state);
> > > void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state);
> > > void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_fdi.c
> > b/drivers/gpu/drm/i915/display/intel_fdi.c
> > > index 169bbe154b5c..b1d2ba9b7295 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_fdi.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_fdi.c
> > > @@ -910,7 +910,7 @@ void hsw_fdi_link_train(struct intel_encoder
> > *encoder,
> > > intel_de_write(display, FDI_RX_CTL(PIPE_A), rx_ctl_val);
> > >
> > > /* Configure Port Clock Select */
> > > - drm_WARN_ON(display->drm, crtc_state->shared_dpll->info->id !=
> > DPLL_ID_SPLL);
> > > + drm_WARN_ON(display->drm, crtc_state->intel_dpll->info->id !=
> > DPLL_ID_SPLL);
> > > intel_ddi_enable_clock(encoder, crtc_state);
> > >
> > > /* Start the training iterating through available voltages and emphasis,
> > > diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c
> > b/drivers/gpu/drm/i915/display/intel_lvds.c
> > > index 8ce7c630da52..ec8f38fba178 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_lvds.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_lvds.c
> > > @@ -249,7 +249,7 @@ static void intel_pre_enable_lvds(struct
> > intel_atomic_state *state,
> > >
> > > if (HAS_PCH_SPLIT(display)) {
> > > assert_fdi_rx_pll_disabled(display, pipe);
> > > - assert_shared_dpll_disabled(display, crtc_state->shared_dpll);
> > > + assert_shared_dpll_disabled(display, crtc_state->intel_dpll);
> > > } else {
> > > assert_pll_disabled(display, pipe);
> > > }
> > > diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> > b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> > > index 0325b0c9506d..46e0002a1358 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> > > @@ -92,10 +92,10 @@ static void
> intel_crtc_disable_noatomic_begin(struct
> > intel_crtc *crtc,
> > > crtc->active = false;
> > > crtc->base.enabled = false;
> > >
> > > - if (crtc_state->shared_dpll)
> > > + if (crtc_state->intel_dpll)
> > > intel_unreference_shared_dpll_crtc(crtc,
> > > - crtc_state->shared_dpll,
> > > - &crtc_state->shared_dpll-
> > >state);
> > > + crtc_state->intel_dpll,
> > > + &crtc_state->intel_dpll-
> > >state);
> > > }
> > >
> > > static void set_encoder_for_connector(struct intel_connector *connector,
> > > @@ -565,7 +565,7 @@ static bool has_bogus_dpll_config(const struct
> > intel_crtc_state *crtc_state)
> > > */
> > > return display->platform.sandybridge &&
> > > crtc_state->hw.active &&
> > > - crtc_state->shared_dpll &&
> > > + crtc_state->intel_dpll &&
> > > crtc_state->port_clock == 0;
> > > }
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c
> > b/drivers/gpu/drm/i915/display/intel_pch_display.c
> > > index 1743ebf551cb..b38305c16e77 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_pch_display.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
> > > @@ -251,7 +251,7 @@ static void ilk_enable_pch_transcoder(const struct
> > intel_crtc_state *crtc_state)
> > > u32 val, pipeconf_val;
> > >
> > > /* Make sure PCH DPLL is enabled */
> > > - assert_shared_dpll_enabled(display, crtc_state->shared_dpll);
> > > + assert_shared_dpll_enabled(display, crtc_state->intel_dpll);
> > >
> > > /* FDI must be feeding us bits for PCH ports */
> > > assert_fdi_tx_enabled(display, pipe);
> > > @@ -381,7 +381,7 @@ void ilk_pch_enable(struct intel_atomic_state
> *state,
> > > temp = intel_de_read(display, PCH_DPLL_SEL);
> > > temp |= TRANS_DPLL_ENABLE(pipe);
> > > sel = TRANS_DPLLB_SEL(pipe);
> > > - if (crtc_state->shared_dpll ==
> > > + if (crtc_state->intel_dpll ==
> > > intel_get_shared_dpll_by_id(display, DPLL_ID_PCH_PLL_B))
> > > temp |= sel;
> > > else
> > > @@ -496,7 +496,7 @@ void ilk_pch_get_config(struct intel_crtc_state
> > *crtc_state)
> > > {
> > > struct intel_display *display = to_intel_display(crtc_state);
> > > struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > enum pipe pipe = crtc->pipe;
> > > enum intel_dpll_id pll_id;
> > > bool pll_active;
> > > @@ -528,8 +528,8 @@ void ilk_pch_get_config(struct intel_crtc_state
> > *crtc_state)
> > > pll_id = DPLL_ID_PCH_PLL_A;
> > > }
> > >
> > > - crtc_state->shared_dpll = intel_get_shared_dpll_by_id(display, pll_id);
> > > - pll = crtc_state->shared_dpll;
> > > + crtc_state->intel_dpll = intel_get_shared_dpll_by_id(display, pll_id);
> > > + pll = crtc_state->intel_dpll;
> > >
> > > pll_active = intel_dpll_get_hw_state(display, pll,
> > > &crtc_state->dpll_hw_state);
> > > diff --git a/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> > b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> > > index 8bec55deff9f..9f6102d7c7be 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_pch_refclk.c
> > > @@ -499,7 +499,7 @@ static void lpt_init_pch_refclk(struct intel_display
> > *display)
> > > static void ilk_init_pch_refclk(struct intel_display *display)
> > > {
> > > struct intel_encoder *encoder;
> > > - struct intel_shared_dpll *pll;
> > > + struct intel_dpll *pll;
> > > int i;
> > > u32 val, final;
> > > bool has_lvds = false;
> >
> > --
> > Jani Nikula, Intel
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 07/14] drm/i915/dpll: Move away from using shared dpll
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (5 preceding siblings ...)
2025-05-15 7:17 ` [PATCH 06/14] drm/i915/dpll: Rename intel_shared_dpll Suraj Kandpal
@ 2025-05-15 7:17 ` Suraj Kandpal
2025-05-15 7:17 ` [PATCH 08/14] drm/i915/dpll: Rename crtc_get_shared_dpll Suraj Kandpal
` (23 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:17 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename functions to move away from using shared dpll in the dpll
framework as much as possible since dpll may not always be shared.
--v2
-Use intel_dpll_global instead of global_dpll [Jani]
--v3
-Just use intel_dpll [Jani]
--v4
-Drop the global from comments [Jani]
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 14 +-
drivers/gpu/drm/i915/display/intel_display.c | 8 +-
.../drm/i915/display/intel_display_driver.c | 2 +-
drivers/gpu/drm/i915/display/intel_dpll.c | 10 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 235 +++++++++---------
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 52 ++--
drivers/gpu/drm/i915/display/intel_lvds.c | 2 +-
.../drm/i915/display/intel_modeset_setup.c | 6 +-
.../drm/i915/display/intel_modeset_verify.c | 4 +-
.../gpu/drm/i915/display/intel_pch_display.c | 14 +-
10 files changed, 173 insertions(+), 174 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 4d631cbc81d2..11ebcb40c91f 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -1569,7 +1569,7 @@ _icl_ddi_get_pll(struct intel_display *display, i915_reg_t reg,
id = (intel_de_read(display, reg) & clk_sel_mask) >> clk_sel_shift;
- return intel_get_shared_dpll_by_id(display, id);
+ return intel_get_dpll_by_id(display, id);
}
static void adls_ddi_enable_clock(struct intel_encoder *encoder,
@@ -1723,7 +1723,7 @@ static struct intel_dpll *dg1_ddi_get_pll(struct intel_encoder *encoder)
if (phy >= PHY_C)
id += DPLL_ID_DG1_DPLL2;
- return intel_get_shared_dpll_by_id(display, id);
+ return intel_get_dpll_by_id(display, id);
}
static void icl_ddi_combo_enable_clock(struct intel_encoder *encoder,
@@ -1895,7 +1895,7 @@ static struct intel_dpll *icl_ddi_tc_get_pll(struct intel_encoder *encoder)
return NULL;
}
- return intel_get_shared_dpll_by_id(display, id);
+ return intel_get_dpll_by_id(display, id);
}
static struct intel_dpll *bxt_ddi_get_pll(struct intel_encoder *encoder)
@@ -1918,7 +1918,7 @@ static struct intel_dpll *bxt_ddi_get_pll(struct intel_encoder *encoder)
return NULL;
}
- return intel_get_shared_dpll_by_id(display, id);
+ return intel_get_dpll_by_id(display, id);
}
static void skl_ddi_enable_clock(struct intel_encoder *encoder,
@@ -1986,7 +1986,7 @@ static struct intel_dpll *skl_ddi_get_pll(struct intel_encoder *encoder)
id = (tmp & DPLL_CTRL2_DDI_CLK_SEL_MASK(port)) >>
DPLL_CTRL2_DDI_CLK_SEL_SHIFT(port);
- return intel_get_shared_dpll_by_id(display, id);
+ return intel_get_dpll_by_id(display, id);
}
void hsw_ddi_enable_clock(struct intel_encoder *encoder,
@@ -2053,7 +2053,7 @@ static struct intel_dpll *hsw_ddi_get_pll(struct intel_encoder *encoder)
return NULL;
}
- return intel_get_shared_dpll_by_id(display, id);
+ return intel_get_dpll_by_id(display, id);
}
void intel_ddi_enable_clock(struct intel_encoder *encoder,
@@ -2760,7 +2760,7 @@ static void tgl_ddi_pre_enable_dp(struct intel_atomic_state *state,
* 4. Enable the port PLL.
*
* The PLL enabling itself was already done before this function by
- * hsw_crtc_enable()->intel_enable_shared_dpll(). We need only
+ * hsw_crtc_enable()->intel_enable_dpll(). We need only
* configure the PLL to port mapping here.
*/
intel_ddi_enable_clock(encoder, crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index dcfbd3d2df32..39ecd5e85416 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1664,7 +1664,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
intel_encoders_pre_pll_enable(state, crtc);
if (new_crtc_state->intel_dpll)
- intel_enable_shared_dpll(new_crtc_state);
+ intel_enable_dpll(new_crtc_state);
intel_encoders_pre_enable(state, crtc);
@@ -1793,7 +1793,7 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
intel_encoders_disable(state, crtc);
intel_encoders_post_disable(state, crtc);
- intel_disable_shared_dpll(old_crtc_state);
+ intel_disable_dpll(old_crtc_state);
intel_encoders_post_pll_disable(state, crtc);
@@ -6428,7 +6428,7 @@ int intel_atomic_check(struct drm_device *dev,
any_ms = true;
- intel_release_shared_dplls(state, crtc);
+ intel_release_dplls(state, crtc);
}
if (any_ms && !check_digital_port_conflicts(state)) {
@@ -7525,7 +7525,7 @@ static int intel_atomic_swap_state(struct intel_atomic_state *state)
intel_atomic_swap_global_state(state);
- intel_shared_dpll_swap_state(state);
+ intel_dpll_swap_state(state);
intel_atomic_track_fbs(state);
diff --git a/drivers/gpu/drm/i915/display/intel_display_driver.c b/drivers/gpu/drm/i915/display/intel_display_driver.c
index 5c74ab5fd1aa..16d91be02bb9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_driver.c
+++ b/drivers/gpu/drm/i915/display/intel_display_driver.c
@@ -446,7 +446,7 @@ int intel_display_driver_probe_nogem(struct intel_display *display)
}
intel_plane_possible_crtcs_init(display);
- intel_shared_dpll_init(display);
+ intel_dpll_init(display);
intel_fdi_pll_freq_update(display);
intel_update_czclk(display);
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index 4d1f7fccd28a..db67e92505d2 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -1161,7 +1161,7 @@ static int hsw_crtc_compute_clock(struct intel_atomic_state *state,
intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
return 0;
- ret = intel_compute_shared_dplls(state, crtc, encoder);
+ ret = intel_compute_dplls(state, crtc, encoder);
if (ret)
return ret;
@@ -1189,7 +1189,7 @@ static int hsw_crtc_get_shared_dpll(struct intel_atomic_state *state,
intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
return 0;
- return intel_reserve_shared_dplls(state, crtc, encoder);
+ return intel_reserve_dplls(state, crtc, encoder);
}
static int dg2_crtc_compute_clock(struct intel_atomic_state *state,
@@ -1223,7 +1223,7 @@ static int mtl_crtc_compute_clock(struct intel_atomic_state *state,
if (ret)
return ret;
- /* TODO: Do the readback via intel_compute_shared_dplls() */
+ /* TODO: Do the readback via intel_compute_dplls() */
crtc_state->port_clock = intel_cx0pll_calc_port_clock(encoder, &crtc_state->dpll_hw_state.cx0pll);
crtc_state->hw.adjusted_mode.crtc_clock = intel_crtc_dotclock(crtc_state);
@@ -1394,7 +1394,7 @@ static int ilk_crtc_compute_clock(struct intel_atomic_state *state,
ilk_compute_dpll(crtc_state, &crtc_state->dpll,
&crtc_state->dpll);
- ret = intel_compute_shared_dplls(state, crtc, NULL);
+ ret = intel_compute_dplls(state, crtc, NULL);
if (ret)
return ret;
@@ -1414,7 +1414,7 @@ static int ilk_crtc_get_shared_dpll(struct intel_atomic_state *state,
if (!crtc_state->has_pch_encoder)
return 0;
- return intel_reserve_shared_dplls(state, crtc, NULL);
+ return intel_reserve_dplls(state, crtc, NULL);
}
static u32 vlv_dpll(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 6fbbc5e89f3c..69271892067a 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -52,21 +52,21 @@
* share a PLL if their configurations match.
*
* This file provides an abstraction over display PLLs. The function
- * intel_shared_dpll_init() initializes the PLLs for the given platform. The
+ * intel_dpll_init() initializes the PLLs for the given platform. The
* users of a PLL are tracked and that tracking is integrated with the atomic
* modset interface. During an atomic operation, required PLLs can be reserved
* for a given CRTC and encoder configuration by calling
- * intel_reserve_shared_dplls() and previously reserved PLLs can be released
- * with intel_release_shared_dplls().
+ * intel_reserve_dplls() and previously reserved PLLs can be released
+ * with intel_release_dplls().
* Changes to the users are first staged in the atomic state, and then made
- * effective by calling intel_shared_dpll_swap_state() during the atomic
+ * effective by calling intel_dpll_swap_state() during the atomic
* commit phase.
*/
/* platform specific hooks for managing DPLLs */
struct intel_dpll_funcs {
/*
- * Hook for enabling the pll, called from intel_enable_shared_dpll() if
+ * Hook for enabling the pll, called from intel_enable_dpll() if
* the pll is not already enabled.
*/
void (*enable)(struct intel_display *display,
@@ -74,7 +74,7 @@ struct intel_dpll_funcs {
const struct intel_dpll_hw_state *dpll_hw_state);
/*
- * Hook for disabling the pll, called from intel_disable_shared_dpll()
+ * Hook for disabling the pll, called from intel_disable_dpll()
* only when it is safe to disable the pll, i.e., there are no more
* tracked users for it.
*/
@@ -133,7 +133,7 @@ intel_atomic_duplicate_dpll_state(struct intel_display *display,
}
static struct intel_dpll_state *
-intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s)
+intel_atomic_get_dpll_state(struct drm_atomic_state *s)
{
struct intel_atomic_state *state = to_intel_atomic_state(s);
struct intel_display *display = to_intel_display(state);
@@ -151,7 +151,7 @@ intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s)
}
/**
- * intel_get_shared_dpll_by_id - get a DPLL given its id
+ * intel_get_dpll_by_id - get a DPLL given its id
* @display: intel_display device instance
* @id: pll id
*
@@ -159,8 +159,8 @@ intel_atomic_get_shared_dpll_state(struct drm_atomic_state *s)
* A pointer to the DPLL with @id
*/
struct intel_dpll *
-intel_get_shared_dpll_by_id(struct intel_display *display,
- enum intel_dpll_id id)
+intel_get_dpll_by_id(struct intel_display *display,
+ enum intel_dpll_id id)
{
struct intel_dpll *pll;
int i;
@@ -175,9 +175,9 @@ intel_get_shared_dpll_by_id(struct intel_display *display,
}
/* For ILK+ */
-void assert_shared_dpll(struct intel_display *display,
- struct intel_dpll *pll,
- bool state)
+void assert_dpll(struct intel_display *display,
+ struct intel_dpll *pll,
+ bool state)
{
bool cur_state;
struct intel_dpll_hw_state hw_state;
@@ -250,12 +250,12 @@ static void _intel_disable_shared_dpll(struct intel_display *display,
}
/**
- * intel_enable_shared_dpll - enable a CRTC's shared DPLL
- * @crtc_state: CRTC, and its state, which has a shared DPLL
+ * intel_enable_dpll - enable a CRTC's DPLL
+ * @crtc_state: CRTC, and its state, which has a DPLL
*
- * Enable the shared DPLL used by @crtc.
+ * Enable DPLL used by @crtc.
*/
-void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state)
+void intel_enable_dpll(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -282,7 +282,7 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state)
if (old_mask) {
drm_WARN_ON(display->drm, !pll->on);
- assert_shared_dpll_enabled(display, pll);
+ assert_dpll_enabled(display, pll);
goto out;
}
drm_WARN_ON(display->drm, pll->on);
@@ -296,12 +296,12 @@ void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state)
}
/**
- * intel_disable_shared_dpll - disable a CRTC's shared DPLL
+ * intel_disable_dpll - disable a CRTC's shared DPLL
* @crtc_state: CRTC, and its state, which has a shared DPLL
*
- * Disable the shared DPLL used by @crtc.
+ * Disable DPLL used by @crtc.
*/
-void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state)
+void intel_disable_dpll(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -326,7 +326,7 @@ void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state)
pll->info->name, pll->active_mask, pll->on,
crtc->base.base.id, crtc->base.name);
- assert_shared_dpll_enabled(display, pll);
+ assert_dpll_enabled(display, pll);
drm_WARN_ON(display->drm, !pll->on);
pll->active_mask &= ~pipe_mask;
@@ -358,10 +358,10 @@ intel_dpll_mask_all(struct intel_display *display)
}
static struct intel_dpll *
-intel_find_shared_dpll(struct intel_atomic_state *state,
- const struct intel_crtc *crtc,
- const struct intel_dpll_hw_state *dpll_hw_state,
- unsigned long dpll_mask)
+intel_find_dpll(struct intel_atomic_state *state,
+ const struct intel_crtc *crtc,
+ const struct intel_dpll_hw_state *dpll_hw_state,
+ unsigned long dpll_mask)
{
struct intel_display *display = to_intel_display(crtc);
unsigned long dpll_mask_all = intel_dpll_mask_all(display);
@@ -369,14 +369,14 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
struct intel_dpll *unused_pll = NULL;
enum intel_dpll_id id;
- dpll_state = intel_atomic_get_shared_dpll_state(&state->base);
+ dpll_state = intel_atomic_get_dpll_state(&state->base);
drm_WARN_ON(display->drm, dpll_mask & ~dpll_mask_all);
for_each_set_bit(id, &dpll_mask, fls(dpll_mask_all)) {
struct intel_dpll *pll;
- pll = intel_get_shared_dpll_by_id(display, id);
+ pll = intel_get_dpll_by_id(display, id);
if (!pll)
continue;
@@ -412,7 +412,7 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
}
/**
- * intel_reference_shared_dpll_crtc - Get a DPLL reference for a CRTC
+ * intel_reference_dpll_crtc - Get a DPLL reference for a CRTC
* @crtc: CRTC on which behalf the reference is taken
* @pll: DPLL for which the reference is taken
* @dpll_state: the DPLL atomic state in which the reference is tracked
@@ -420,9 +420,9 @@ intel_find_shared_dpll(struct intel_atomic_state *state,
* Take a reference for @pll tracking the use of it by @crtc.
*/
static void
-intel_reference_shared_dpll_crtc(const struct intel_crtc *crtc,
- const struct intel_dpll *pll,
- struct intel_dpll_state *dpll_state)
+intel_reference_dpll_crtc(const struct intel_crtc *crtc,
+ const struct intel_dpll *pll,
+ struct intel_dpll_state *dpll_state)
{
struct intel_display *display = to_intel_display(crtc);
@@ -435,23 +435,23 @@ intel_reference_shared_dpll_crtc(const struct intel_crtc *crtc,
}
static void
-intel_reference_shared_dpll(struct intel_atomic_state *state,
- const struct intel_crtc *crtc,
- const struct intel_dpll *pll,
- const struct intel_dpll_hw_state *dpll_hw_state)
+intel_reference_dpll(struct intel_atomic_state *state,
+ const struct intel_crtc *crtc,
+ const struct intel_dpll *pll,
+ const struct intel_dpll_hw_state *dpll_hw_state)
{
struct intel_dpll_state *dpll_state;
- dpll_state = intel_atomic_get_shared_dpll_state(&state->base);
+ dpll_state = intel_atomic_get_dpll_state(&state->base);
if (dpll_state[pll->index].pipe_mask == 0)
dpll_state[pll->index].hw_state = *dpll_hw_state;
- intel_reference_shared_dpll_crtc(crtc, pll, &dpll_state[pll->index]);
+ intel_reference_dpll_crtc(crtc, pll, &dpll_state[pll->index]);
}
/**
- * intel_unreference_shared_dpll_crtc - Drop a DPLL reference for a CRTC
+ * intel_unreference_dpll_crtc - Drop a DPLL reference for a CRTC
* @crtc: CRTC on which behalf the reference is dropped
* @pll: DPLL for which the reference is dropped
* @dpll_state: the DPLL atomic state in which the reference is tracked
@@ -459,9 +459,9 @@ intel_reference_shared_dpll(struct intel_atomic_state *state,
* Drop a reference for @pll tracking the end of use of it by @crtc.
*/
void
-intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
- const struct intel_dpll *pll,
- struct intel_dpll_state *dpll_state)
+intel_unreference_dpll_crtc(const struct intel_crtc *crtc,
+ const struct intel_dpll *pll,
+ struct intel_dpll_state *dpll_state)
{
struct intel_display *display = to_intel_display(crtc);
@@ -473,15 +473,15 @@ intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
crtc->base.base.id, crtc->base.name, pll->info->name);
}
-static void intel_unreference_shared_dpll(struct intel_atomic_state *state,
- const struct intel_crtc *crtc,
- const struct intel_dpll *pll)
+static void intel_unreference_dpll(struct intel_atomic_state *state,
+ const struct intel_crtc *crtc,
+ const struct intel_dpll *pll)
{
struct intel_dpll_state *dpll_state;
- dpll_state = intel_atomic_get_shared_dpll_state(&state->base);
+ dpll_state = intel_atomic_get_dpll_state(&state->base);
- intel_unreference_shared_dpll_crtc(crtc, pll, &dpll_state[pll->index]);
+ intel_unreference_dpll_crtc(crtc, pll, &dpll_state[pll->index]);
}
static void intel_put_dpll(struct intel_atomic_state *state,
@@ -497,11 +497,11 @@ static void intel_put_dpll(struct intel_atomic_state *state,
if (!old_crtc_state->intel_dpll)
return;
- intel_unreference_shared_dpll(state, crtc, old_crtc_state->intel_dpll);
+ intel_unreference_dpll(state, crtc, old_crtc_state->intel_dpll);
}
/**
- * intel_shared_dpll_swap_state - make atomic DPLL configuration effective
+ * intel_dpll_swap_state - make atomic DPLL configuration effective
* @state: atomic state
*
* This is the dpll version of drm_atomic_helper_swap_state() since the
@@ -511,7 +511,7 @@ static void intel_put_dpll(struct intel_atomic_state *state,
* i.e. it also puts the current state into @state, even though there is no
* need for that at this moment.
*/
-void intel_shared_dpll_swap_state(struct intel_atomic_state *state)
+void intel_dpll_swap_state(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
struct intel_dpll_state *dpll_state = state->dpll_state;
@@ -620,25 +620,25 @@ static int ibx_get_dpll(struct intel_atomic_state *state,
if (HAS_PCH_IBX(display)) {
/* Ironlake PCH has a fixed PLL->PCH pipe mapping. */
id = (enum intel_dpll_id) crtc->pipe;
- pll = intel_get_shared_dpll_by_id(display, id);
+ pll = intel_get_dpll_by_id(display, id);
drm_dbg_kms(display->drm,
"[CRTC:%d:%s] using pre-allocated %s\n",
crtc->base.base.id, crtc->base.name,
pll->info->name);
} else {
- pll = intel_find_shared_dpll(state, crtc,
- &crtc_state->dpll_hw_state,
- BIT(DPLL_ID_PCH_PLL_B) |
- BIT(DPLL_ID_PCH_PLL_A));
+ pll = intel_find_dpll(state, crtc,
+ &crtc_state->dpll_hw_state,
+ BIT(DPLL_ID_PCH_PLL_B) |
+ BIT(DPLL_ID_PCH_PLL_A));
}
if (!pll)
return -EINVAL;
/* reference the pll */
- intel_reference_shared_dpll(state, crtc,
- pll, &crtc_state->dpll_hw_state);
+ intel_reference_dpll(state, crtc,
+ pll, &crtc_state->dpll_hw_state);
crtc_state->intel_dpll = pll;
@@ -1066,7 +1066,7 @@ hsw_ddi_wrpll_get_dpll(struct intel_atomic_state *state,
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- return intel_find_shared_dpll(state, crtc,
+ return intel_find_dpll(state, crtc,
&crtc_state->dpll_hw_state,
BIT(DPLL_ID_WRPLL2) |
BIT(DPLL_ID_WRPLL1));
@@ -1113,7 +1113,7 @@ hsw_ddi_lcpll_get_dpll(struct intel_crtc_state *crtc_state)
return NULL;
}
- pll = intel_get_shared_dpll_by_id(display, pll_id);
+ pll = intel_get_dpll_by_id(display, pll_id);
if (!pll)
return NULL;
@@ -1169,7 +1169,7 @@ hsw_ddi_spll_get_dpll(struct intel_atomic_state *state,
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
- return intel_find_shared_dpll(state, crtc, &crtc_state->dpll_hw_state,
+ return intel_find_dpll(state, crtc, &crtc_state->dpll_hw_state,
BIT(DPLL_ID_SPLL));
}
@@ -1233,8 +1233,8 @@ static int hsw_get_dpll(struct intel_atomic_state *state,
if (!pll)
return -EINVAL;
- intel_reference_shared_dpll(state, crtc,
- pll, &crtc_state->dpll_hw_state);
+ intel_reference_dpll(state, crtc,
+ pll, &crtc_state->dpll_hw_state);
crtc_state->intel_dpll = pll;
@@ -1942,20 +1942,20 @@ static int skl_get_dpll(struct intel_atomic_state *state,
struct intel_dpll *pll;
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP))
- pll = intel_find_shared_dpll(state, crtc,
- &crtc_state->dpll_hw_state,
- BIT(DPLL_ID_SKL_DPLL0));
+ pll = intel_find_dpll(state, crtc,
+ &crtc_state->dpll_hw_state,
+ BIT(DPLL_ID_SKL_DPLL0));
else
- pll = intel_find_shared_dpll(state, crtc,
- &crtc_state->dpll_hw_state,
- BIT(DPLL_ID_SKL_DPLL3) |
- BIT(DPLL_ID_SKL_DPLL2) |
- BIT(DPLL_ID_SKL_DPLL1));
+ pll = intel_find_dpll(state, crtc,
+ &crtc_state->dpll_hw_state,
+ BIT(DPLL_ID_SKL_DPLL3) |
+ BIT(DPLL_ID_SKL_DPLL2) |
+ BIT(DPLL_ID_SKL_DPLL1));
if (!pll)
return -EINVAL;
- intel_reference_shared_dpll(state, crtc,
- pll, &crtc_state->dpll_hw_state);
+ intel_reference_dpll(state, crtc,
+ pll, &crtc_state->dpll_hw_state);
crtc_state->intel_dpll = pll;
@@ -2434,13 +2434,13 @@ static int bxt_get_dpll(struct intel_atomic_state *state,
/* 1:1 mapping between ports and PLLs */
id = (enum intel_dpll_id) encoder->port;
- pll = intel_get_shared_dpll_by_id(display, id);
+ pll = intel_get_dpll_by_id(display, id);
drm_dbg_kms(display->drm, "[CRTC:%d:%s] using pre-allocated %s\n",
crtc->base.base.id, crtc->base.name, pll->info->name);
- intel_reference_shared_dpll(state, crtc,
- pll, &crtc_state->dpll_hw_state);
+ intel_reference_dpll(state, crtc,
+ pll, &crtc_state->dpll_hw_state);
crtc_state->intel_dpll = pll;
@@ -3388,14 +3388,14 @@ static int icl_get_combo_phy_dpll(struct intel_atomic_state *state,
/* Eliminate DPLLs from consideration if reserved by HTI */
dpll_mask &= ~intel_hti_dpll_mask(display);
- port_dpll->pll = intel_find_shared_dpll(state, crtc,
- &port_dpll->hw_state,
- dpll_mask);
+ port_dpll->pll = intel_find_dpll(state, crtc,
+ &port_dpll->hw_state,
+ dpll_mask);
if (!port_dpll->pll)
return -EINVAL;
- intel_reference_shared_dpll(state, crtc,
- port_dpll->pll, &port_dpll->hw_state);
+ intel_reference_dpll(state, crtc,
+ port_dpll->pll, &port_dpll->hw_state);
icl_update_active_dpll(state, crtc, encoder);
@@ -3452,26 +3452,25 @@ static int icl_get_tc_phy_dplls(struct intel_atomic_state *state,
int ret;
port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];
- port_dpll->pll = intel_find_shared_dpll(state, crtc,
- &port_dpll->hw_state,
- BIT(DPLL_ID_ICL_TBTPLL));
+ port_dpll->pll = intel_find_dpll(state, crtc,
+ &port_dpll->hw_state,
+ BIT(DPLL_ID_ICL_TBTPLL));
if (!port_dpll->pll)
return -EINVAL;
- intel_reference_shared_dpll(state, crtc,
- port_dpll->pll, &port_dpll->hw_state);
-
+ intel_reference_dpll(state, crtc,
+ port_dpll->pll, &port_dpll->hw_state);
port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_MG_PHY];
dpll_id = icl_tc_port_to_pll_id(intel_encoder_to_tc(encoder));
- port_dpll->pll = intel_find_shared_dpll(state, crtc,
- &port_dpll->hw_state,
- BIT(dpll_id));
+ port_dpll->pll = intel_find_dpll(state, crtc,
+ &port_dpll->hw_state,
+ BIT(dpll_id));
if (!port_dpll->pll) {
ret = -EINVAL;
goto err_unreference_tbt_pll;
}
- intel_reference_shared_dpll(state, crtc,
- port_dpll->pll, &port_dpll->hw_state);
+ intel_reference_dpll(state, crtc,
+ port_dpll->pll, &port_dpll->hw_state);
icl_update_active_dpll(state, crtc, encoder);
@@ -3479,7 +3478,7 @@ static int icl_get_tc_phy_dplls(struct intel_atomic_state *state,
err_unreference_tbt_pll:
port_dpll = &crtc_state->icl_port_dplls[ICL_PORT_DPLL_DEFAULT];
- intel_unreference_shared_dpll(state, crtc, port_dpll->pll);
+ intel_unreference_dpll(state, crtc, port_dpll->pll);
return ret;
}
@@ -3534,7 +3533,7 @@ static void icl_put_dplls(struct intel_atomic_state *state,
if (!old_port_dpll->pll)
continue;
- intel_unreference_shared_dpll(state, crtc, old_port_dpll->pll);
+ intel_unreference_dpll(state, crtc, old_port_dpll->pll);
}
}
@@ -4300,12 +4299,12 @@ static const struct intel_dpll_mgr adlp_pll_mgr = {
};
/**
- * intel_shared_dpll_init - Initialize shared DPLLs
+ * intel_dpll_init - Initialize DPLLs
* @display: intel_display device
*
- * Initialize shared DPLLs for @display.
+ * Initialize DPLLs for @display.
*/
-void intel_shared_dpll_init(struct intel_display *display)
+void intel_dpll_init(struct intel_display *display)
{
const struct intel_dpll_mgr *dpll_mgr = NULL;
const struct dpll_info *dpll_info;
@@ -4362,7 +4361,7 @@ void intel_shared_dpll_init(struct intel_display *display)
}
/**
- * intel_compute_shared_dplls - compute DPLL state CRTC and encoder combination
+ * intel_compute_dplls - compute DPLL state CRTC and encoder combination
* @state: atomic state
* @crtc: CRTC to compute DPLLs for
* @encoder: encoder
@@ -4370,14 +4369,14 @@ void intel_shared_dpll_init(struct intel_display *display)
* This function computes the DPLL state for the given CRTC and encoder.
*
* The new configuration in the atomic commit @state is made effective by
- * calling intel_shared_dpll_swap_state().
+ * calling intel_dpll_swap_state().
*
* Returns:
* 0 on success, negative error code on failure.
*/
-int intel_compute_shared_dplls(struct intel_atomic_state *state,
- struct intel_crtc *crtc,
- struct intel_encoder *encoder)
+int intel_compute_dplls(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(state);
const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr;
@@ -4389,7 +4388,7 @@ int intel_compute_shared_dplls(struct intel_atomic_state *state,
}
/**
- * intel_reserve_shared_dplls - reserve DPLLs for CRTC and encoder combination
+ * intel_reserve_dplls - reserve DPLLs for CRTC and encoder combination
* @state: atomic state
* @crtc: CRTC to reserve DPLLs for
* @encoder: encoder
@@ -4399,18 +4398,18 @@ int intel_compute_shared_dplls(struct intel_atomic_state *state,
* state.
*
* The new configuration in the atomic commit @state is made effective by
- * calling intel_shared_dpll_swap_state().
+ * calling intel_dpll_swap_state().
*
* The reserved DPLLs should be released by calling
- * intel_release_shared_dplls().
+ * intel_release_dplls().
*
* Returns:
* 0 if all required DPLLs were successfully reserved,
* negative error code otherwise.
*/
-int intel_reserve_shared_dplls(struct intel_atomic_state *state,
- struct intel_crtc *crtc,
- struct intel_encoder *encoder)
+int intel_reserve_dplls(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(state);
const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr;
@@ -4422,18 +4421,18 @@ int intel_reserve_shared_dplls(struct intel_atomic_state *state,
}
/**
- * intel_release_shared_dplls - end use of DPLLs by CRTC in atomic state
+ * intel_release_dplls - end use of DPLLs by CRTC in atomic state
* @state: atomic state
* @crtc: crtc from which the DPLLs are to be released
*
- * This function releases all DPLLs reserved by intel_reserve_shared_dplls()
+ * This function releases all DPLLs reserved by intel_reserve_dplls()
* from the current atomic commit @state and the old @crtc atomic state.
*
* The new configuration in the atomic commit @state is made effective by
- * calling intel_shared_dpll_swap_state().
+ * calling intel_dpll_swap_state().
*/
-void intel_release_shared_dplls(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+void intel_release_dplls(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(state);
const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr;
@@ -4441,7 +4440,7 @@ void intel_release_shared_dplls(struct intel_atomic_state *state,
/*
* FIXME: this function is called for every platform having a
* compute_clock hook, even though the platform doesn't yet support
- * the shared DPLL framework and intel_reserve_shared_dplls() is not
+ * the DPLL framework and intel_reserve_dplls() is not
* called on those.
*/
if (!dpll_mgr)
@@ -4457,7 +4456,7 @@ void intel_release_shared_dplls(struct intel_atomic_state *state,
* @encoder: encoder determining the type of port DPLL
*
* Update the active DPLL for the given @crtc/@encoder in @crtc's atomic state,
- * from the port DPLLs reserved previously by intel_reserve_shared_dplls(). The
+ * from the port DPLLs reserved previously by intel_reserve_dplls(). The
* DPLL selected will be based on the current mode of the encoder's port.
*/
void intel_update_active_dpll(struct intel_atomic_state *state,
@@ -4522,7 +4521,7 @@ static void readout_dpll_hw_state(struct intel_display *display,
to_intel_crtc_state(crtc->base.state);
if (crtc_state->hw.active && crtc_state->intel_dpll == pll)
- intel_reference_shared_dpll_crtc(crtc, pll, &pll->state);
+ intel_reference_dpll_crtc(crtc, pll, &pll->state);
}
pll->active_mask = pll->state.pipe_mask;
@@ -4683,8 +4682,8 @@ static bool has_alt_port_dpll(const struct intel_dpll *old_pll,
(old_pll->info->is_alt_port_dpll || new_pll->info->is_alt_port_dpll);
}
-void intel_shared_dpll_state_verify(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+void intel_dpll_state_verify(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(state);
const struct intel_crtc_state *old_crtc_state =
@@ -4714,7 +4713,7 @@ void intel_shared_dpll_state_verify(struct intel_atomic_state *state,
}
}
-void intel_shared_dpll_verify_disabled(struct intel_atomic_state *state)
+void intel_dpll_verify_disabled(struct intel_atomic_state *state)
{
struct intel_display *display = to_intel_display(state);
struct intel_dpll *pll;
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index ea3fb7002e65..60391a5b52ff 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -387,26 +387,26 @@ struct intel_dpll {
#define SKL_DPLL2 2
#define SKL_DPLL3 3
-/* shared dpll functions */
+/* dpll functions */
struct intel_dpll *
-intel_get_shared_dpll_by_id(struct intel_display *display,
- enum intel_dpll_id id);
-void assert_shared_dpll(struct intel_display *display,
- struct intel_dpll *pll,
- bool state);
-#define assert_shared_dpll_enabled(d, p) assert_shared_dpll(d, p, true)
-#define assert_shared_dpll_disabled(d, p) assert_shared_dpll(d, p, false)
-int intel_compute_shared_dplls(struct intel_atomic_state *state,
- struct intel_crtc *crtc,
- struct intel_encoder *encoder);
-int intel_reserve_shared_dplls(struct intel_atomic_state *state,
- struct intel_crtc *crtc,
- struct intel_encoder *encoder);
-void intel_release_shared_dplls(struct intel_atomic_state *state,
- struct intel_crtc *crtc);
-void intel_unreference_shared_dpll_crtc(const struct intel_crtc *crtc,
- const struct intel_dpll *pll,
- struct intel_dpll_state *shared_dpll_state);
+intel_get_dpll_by_id(struct intel_display *display,
+ enum intel_dpll_id id);
+void assert_dpll(struct intel_display *display,
+ struct intel_dpll *pll,
+ bool state);
+#define assert_dpll_enabled(d, p) assert_dpll(d, p, true)
+#define assert_dpll_disabled(d, p) assert_dpll(d, p, false)
+int intel_compute_dplls(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ struct intel_encoder *encoder);
+int intel_reserve_dplls(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ struct intel_encoder *encoder);
+void intel_release_dplls(struct intel_atomic_state *state,
+ struct intel_crtc *crtc);
+void intel_unreference_dpll_crtc(const struct intel_crtc *crtc,
+ const struct intel_dpll *pll,
+ struct intel_dpll_state *shared_dpll_state);
void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,
enum icl_port_dpll_id port_dpll_id);
void intel_update_active_dpll(struct intel_atomic_state *state,
@@ -418,10 +418,10 @@ int intel_dpll_get_freq(struct intel_display *display,
bool intel_dpll_get_hw_state(struct intel_display *display,
struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state);
-void intel_enable_shared_dpll(const struct intel_crtc_state *crtc_state);
-void intel_disable_shared_dpll(const struct intel_crtc_state *crtc_state);
-void intel_shared_dpll_swap_state(struct intel_atomic_state *state);
-void intel_shared_dpll_init(struct intel_display *display);
+void intel_enable_dpll(const struct intel_crtc_state *crtc_state);
+void intel_disable_dpll(const struct intel_crtc_state *crtc_state);
+void intel_dpll_swap_state(struct intel_atomic_state *state);
+void intel_dpll_init(struct intel_display *display);
void intel_dpll_update_ref_clks(struct intel_display *display);
void intel_dpll_readout_hw_state(struct intel_display *display);
void intel_dpll_sanitize_state(struct intel_display *display);
@@ -435,8 +435,8 @@ bool intel_dpll_compare_hw_state(struct intel_display *display,
enum intel_dpll_id icl_tc_port_to_pll_id(enum tc_port tc_port);
bool intel_dpll_is_combophy(enum intel_dpll_id id);
-void intel_shared_dpll_state_verify(struct intel_atomic_state *state,
- struct intel_crtc *crtc);
-void intel_shared_dpll_verify_disabled(struct intel_atomic_state *state);
+void intel_dpll_state_verify(struct intel_atomic_state *state,
+ struct intel_crtc *crtc);
+void intel_dpll_verify_disabled(struct intel_atomic_state *state);
#endif /* _INTEL_DPLL_MGR_H_ */
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index ec8f38fba178..f07c7ef56148 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -249,7 +249,7 @@ static void intel_pre_enable_lvds(struct intel_atomic_state *state,
if (HAS_PCH_SPLIT(display)) {
assert_fdi_rx_pll_disabled(display, pipe);
- assert_shared_dpll_disabled(display, crtc_state->intel_dpll);
+ assert_dpll_disabled(display, crtc_state->intel_dpll);
} else {
assert_pll_disabled(display, pipe);
}
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index 46e0002a1358..ed4f305e0d3e 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -93,9 +93,9 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc,
crtc->base.enabled = false;
if (crtc_state->intel_dpll)
- intel_unreference_shared_dpll_crtc(crtc,
- crtc_state->intel_dpll,
- &crtc_state->intel_dpll->state);
+ intel_unreference_dpll_crtc(crtc,
+ crtc_state->intel_dpll,
+ &crtc_state->intel_dpll->state);
}
static void set_encoder_for_connector(struct intel_connector *connector,
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_verify.c b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
index 766a9983665a..f2f6b9d9afa1 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_verify.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_verify.c
@@ -243,7 +243,7 @@ void intel_modeset_verify_crtc(struct intel_atomic_state *state,
intel_wm_state_verify(state, crtc);
verify_connector_state(state, crtc);
verify_crtc_state(state, crtc);
- intel_shared_dpll_state_verify(state, crtc);
+ intel_dpll_state_verify(state, crtc);
intel_mpllb_state_verify(state, crtc);
intel_cx0pll_state_verify(state, crtc);
}
@@ -252,5 +252,5 @@ void intel_modeset_verify_disabled(struct intel_atomic_state *state)
{
verify_encoder_state(state);
verify_connector_state(state, NULL);
- intel_shared_dpll_verify_disabled(state);
+ intel_dpll_verify_disabled(state);
}
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
index b38305c16e77..b59b3c94f711 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
@@ -251,7 +251,7 @@ static void ilk_enable_pch_transcoder(const struct intel_crtc_state *crtc_state)
u32 val, pipeconf_val;
/* Make sure PCH DPLL is enabled */
- assert_shared_dpll_enabled(display, crtc_state->intel_dpll);
+ assert_dpll_enabled(display, crtc_state->intel_dpll);
/* FDI must be feeding us bits for PCH ports */
assert_fdi_tx_enabled(display, pipe);
@@ -382,7 +382,7 @@ void ilk_pch_enable(struct intel_atomic_state *state,
temp |= TRANS_DPLL_ENABLE(pipe);
sel = TRANS_DPLLB_SEL(pipe);
if (crtc_state->intel_dpll ==
- intel_get_shared_dpll_by_id(display, DPLL_ID_PCH_PLL_B))
+ intel_get_dpll_by_id(display, DPLL_ID_PCH_PLL_B))
temp |= sel;
else
temp &= ~sel;
@@ -394,11 +394,11 @@ void ilk_pch_enable(struct intel_atomic_state *state,
* transcoder, and we actually should do this to not upset any PCH
* transcoder that already use the clock when we share it.
*
- * Note that enable_shared_dpll tries to do the right thing, but
- * get_shared_dpll unconditionally resets the pll - we need that
+ * Note that enable_dpll tries to do the right thing, but
+ * get_dpll unconditionally resets the pll - we need that
* to have the right LVDS enable sequence.
*/
- intel_enable_shared_dpll(crtc_state);
+ intel_enable_dpll(crtc_state);
/* set transcoder timing, panel must allow it */
assert_pps_unlocked(display, pipe);
@@ -472,7 +472,7 @@ void ilk_pch_post_disable(struct intel_atomic_state *state,
ilk_fdi_pll_disable(crtc);
- intel_disable_shared_dpll(old_crtc_state);
+ intel_disable_dpll(old_crtc_state);
}
static void ilk_pch_clock_get(struct intel_crtc_state *crtc_state)
@@ -528,7 +528,7 @@ void ilk_pch_get_config(struct intel_crtc_state *crtc_state)
pll_id = DPLL_ID_PCH_PLL_A;
}
- crtc_state->intel_dpll = intel_get_shared_dpll_by_id(display, pll_id);
+ crtc_state->intel_dpll = intel_get_dpll_by_id(display, pll_id);
pll = crtc_state->intel_dpll;
pll_active = intel_dpll_get_hw_state(display, pll,
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 08/14] drm/i915/dpll: Rename crtc_get_shared_dpll
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (6 preceding siblings ...)
2025-05-15 7:17 ` [PATCH 07/14] drm/i915/dpll: Move away from using shared dpll Suraj Kandpal
@ 2025-05-15 7:17 ` Suraj Kandpal
2025-05-15 7:17 ` [PATCH 09/14] drm/i915/dpll: Rename intel_[enable/disable]_dpll Suraj Kandpal
` (22 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:17 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename crtc_get_shared_dpll to take into the individual PLL framework
which came in at DISPLAY_VER >= 14.
Also having shared dpll stuff also in intel_dpll.c is just confusing.
--v2
-Change naming to dpll_global to keep consistency with rest of the
naming
--v3
-Just use intel_dpll [Jani]
--v4
-Modify commit message [Jani]
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_dpll.c | 24 ++++++++++----------
drivers/gpu/drm/i915/display/intel_dpll.h | 4 ++--
3 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 39ecd5e85416..3935508488e7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4225,7 +4225,7 @@ static int intel_crtc_atomic_check(struct intel_atomic_state *state,
crtc_state->update_wm_post = true;
if (intel_crtc_needs_modeset(crtc_state)) {
- ret = intel_dpll_crtc_get_shared_dpll(state, crtc);
+ ret = intel_dpll_crtc_get_dpll(state, crtc);
if (ret)
return ret;
}
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index db67e92505d2..e25411c4171c 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -27,8 +27,8 @@
struct intel_dpll_global_funcs {
int (*crtc_compute_clock)(struct intel_atomic_state *state,
struct intel_crtc *crtc);
- int (*crtc_get_shared_dpll)(struct intel_atomic_state *state,
- struct intel_crtc *crtc);
+ int (*crtc_get_dpll)(struct intel_atomic_state *state,
+ struct intel_crtc *crtc);
};
struct intel_limit {
@@ -1176,8 +1176,8 @@ static int hsw_crtc_compute_clock(struct intel_atomic_state *state,
return 0;
}
-static int hsw_crtc_get_shared_dpll(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+static int hsw_crtc_get_dpll(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(state);
struct intel_crtc_state *crtc_state =
@@ -1404,8 +1404,8 @@ static int ilk_crtc_compute_clock(struct intel_atomic_state *state,
return ret;
}
-static int ilk_crtc_get_shared_dpll(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+static int ilk_crtc_get_dpll(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
@@ -1700,12 +1700,12 @@ static const struct intel_dpll_global_funcs dg2_dpll_funcs = {
static const struct intel_dpll_global_funcs hsw_dpll_funcs = {
.crtc_compute_clock = hsw_crtc_compute_clock,
- .crtc_get_shared_dpll = hsw_crtc_get_shared_dpll,
+ .crtc_get_dpll = hsw_crtc_get_dpll,
};
static const struct intel_dpll_global_funcs ilk_dpll_funcs = {
.crtc_compute_clock = ilk_crtc_compute_clock,
- .crtc_get_shared_dpll = ilk_crtc_get_shared_dpll,
+ .crtc_get_dpll = ilk_crtc_get_dpll,
};
static const struct intel_dpll_global_funcs chv_dpll_funcs = {
@@ -1758,8 +1758,8 @@ int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state,
return 0;
}
-int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+int intel_dpll_crtc_get_dpll(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(state);
struct intel_crtc_state *crtc_state =
@@ -1772,10 +1772,10 @@ int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,
if (!crtc_state->hw.enable || crtc_state->intel_dpll)
return 0;
- if (!display->funcs.dpll->crtc_get_shared_dpll)
+ if (!display->funcs.dpll->crtc_get_dpll)
return 0;
- ret = display->funcs.dpll->crtc_get_shared_dpll(state, crtc);
+ ret = display->funcs.dpll->crtc_get_dpll(state, crtc);
if (ret) {
drm_dbg_kms(display->drm, "[CRTC:%d:%s] Couldn't get a shared DPLL\n",
crtc->base.base.id, crtc->base.name);
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.h b/drivers/gpu/drm/i915/display/intel_dpll.h
index 280e90a57c87..3444a2dd3166 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll.h
@@ -19,8 +19,8 @@ struct intel_dpll_hw_state;
void intel_dpll_init_clock_hook(struct intel_display *display);
int intel_dpll_crtc_compute_clock(struct intel_atomic_state *state,
struct intel_crtc *crtc);
-int intel_dpll_crtc_get_shared_dpll(struct intel_atomic_state *state,
- struct intel_crtc *crtc);
+int intel_dpll_crtc_get_dpll(struct intel_atomic_state *state,
+ struct intel_crtc *crtc);
int i9xx_calc_dpll_params(int refclk, struct dpll *clock);
u32 i9xx_dpll_compute_fp(const struct dpll *dpll);
void i9xx_dpll_get_hw_state(struct intel_crtc *crtc,
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 09/14] drm/i915/dpll: Rename intel_[enable/disable]_dpll
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (7 preceding siblings ...)
2025-05-15 7:17 ` [PATCH 08/14] drm/i915/dpll: Rename crtc_get_shared_dpll Suraj Kandpal
@ 2025-05-15 7:17 ` Suraj Kandpal
2025-05-15 7:17 ` [PATCH 10/14] drm/i915/dpll: Rename intel_unreference_dpll_crtc Suraj Kandpal
` (21 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:17 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename intel_[enable/disable]_dpll to intel_dpll_[enable/disable]
in an effort to make sure all functions that are exported
start with the filename.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 8 ++++----
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 4 ++--
drivers/gpu/drm/i915/display/intel_pch_display.c | 6 +++---
4 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 3935508488e7..7cdb6dc78c5b 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1664,7 +1664,7 @@ static void hsw_crtc_enable(struct intel_atomic_state *state,
intel_encoders_pre_pll_enable(state, crtc);
if (new_crtc_state->intel_dpll)
- intel_enable_dpll(new_crtc_state);
+ intel_dpll_enable(new_crtc_state);
intel_encoders_pre_enable(state, crtc);
@@ -1793,7 +1793,7 @@ static void hsw_crtc_disable(struct intel_atomic_state *state,
intel_encoders_disable(state, crtc);
intel_encoders_post_disable(state, crtc);
- intel_disable_dpll(old_crtc_state);
+ intel_dpll_disable(old_crtc_state);
intel_encoders_post_pll_disable(state, crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 69271892067a..2b592423e1d1 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -250,12 +250,12 @@ static void _intel_disable_shared_dpll(struct intel_display *display,
}
/**
- * intel_enable_dpll - enable a CRTC's DPLL
+ * intel_dpll_enable - enable a CRTC's DPLL
* @crtc_state: CRTC, and its state, which has a DPLL
*
* Enable DPLL used by @crtc.
*/
-void intel_enable_dpll(const struct intel_crtc_state *crtc_state)
+void intel_dpll_enable(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
@@ -296,12 +296,12 @@ void intel_enable_dpll(const struct intel_crtc_state *crtc_state)
}
/**
- * intel_disable_dpll - disable a CRTC's shared DPLL
+ * intel_dpll_disable - disable a CRTC's shared DPLL
* @crtc_state: CRTC, and its state, which has a shared DPLL
*
* Disable DPLL used by @crtc.
*/
-void intel_disable_dpll(const struct intel_crtc_state *crtc_state)
+void intel_dpll_disable(const struct intel_crtc_state *crtc_state)
{
struct intel_display *display = to_intel_display(crtc_state);
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index 60391a5b52ff..88a81c850cf0 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -418,8 +418,8 @@ int intel_dpll_get_freq(struct intel_display *display,
bool intel_dpll_get_hw_state(struct intel_display *display,
struct intel_dpll *pll,
struct intel_dpll_hw_state *dpll_hw_state);
-void intel_enable_dpll(const struct intel_crtc_state *crtc_state);
-void intel_disable_dpll(const struct intel_crtc_state *crtc_state);
+void intel_dpll_enable(const struct intel_crtc_state *crtc_state);
+void intel_dpll_disable(const struct intel_crtc_state *crtc_state);
void intel_dpll_swap_state(struct intel_atomic_state *state);
void intel_dpll_init(struct intel_display *display);
void intel_dpll_update_ref_clks(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c
index b59b3c94f711..ca85596dfc9e 100644
--- a/drivers/gpu/drm/i915/display/intel_pch_display.c
+++ b/drivers/gpu/drm/i915/display/intel_pch_display.c
@@ -394,11 +394,11 @@ void ilk_pch_enable(struct intel_atomic_state *state,
* transcoder, and we actually should do this to not upset any PCH
* transcoder that already use the clock when we share it.
*
- * Note that enable_dpll tries to do the right thing, but
+ * Note that dpll_enable tries to do the right thing, but
* get_dpll unconditionally resets the pll - we need that
* to have the right LVDS enable sequence.
*/
- intel_enable_dpll(crtc_state);
+ intel_dpll_enable(crtc_state);
/* set transcoder timing, panel must allow it */
assert_pps_unlocked(display, pipe);
@@ -472,7 +472,7 @@ void ilk_pch_post_disable(struct intel_atomic_state *state,
ilk_fdi_pll_disable(crtc);
- intel_disable_dpll(old_crtc_state);
+ intel_dpll_disable(old_crtc_state);
}
static void ilk_pch_clock_get(struct intel_crtc_state *crtc_state)
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 10/14] drm/i915/dpll: Rename intel_unreference_dpll_crtc
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (8 preceding siblings ...)
2025-05-15 7:17 ` [PATCH 09/14] drm/i915/dpll: Rename intel_[enable/disable]_dpll Suraj Kandpal
@ 2025-05-15 7:17 ` Suraj Kandpal
2025-05-16 8:17 ` Kahola, Mika
2025-05-15 7:17 ` [PATCH 11/14] drm/i915/dpll: Rename intel_reference_dpll_crtc Suraj Kandpal
` (20 subsequent siblings)
30 siblings, 1 reply; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:17 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename intel_unreference_dpll_crtc to intel_dpll_crtc_put
in an effort to keep names of exported functions start with the filename.
--v2
-Make the new name more sensible [Jani]
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 10 +++++-----
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 6 +++---
drivers/gpu/drm/i915/display/intel_modeset_setup.c | 6 +++---
3 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 2b592423e1d1..1265bc4b4307 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -451,7 +451,7 @@ intel_reference_dpll(struct intel_atomic_state *state,
}
/**
- * intel_unreference_dpll_crtc - Drop a DPLL reference for a CRTC
+ * intel_dpll_crtc_put - Drop a DPLL reference for a CRTC
* @crtc: CRTC on which behalf the reference is dropped
* @pll: DPLL for which the reference is dropped
* @dpll_state: the DPLL atomic state in which the reference is tracked
@@ -459,9 +459,9 @@ intel_reference_dpll(struct intel_atomic_state *state,
* Drop a reference for @pll tracking the end of use of it by @crtc.
*/
void
-intel_unreference_dpll_crtc(const struct intel_crtc *crtc,
- const struct intel_dpll *pll,
- struct intel_dpll_state *dpll_state)
+intel_dpll_crtc_put(const struct intel_crtc *crtc,
+ const struct intel_dpll *pll,
+ struct intel_dpll_state *dpll_state)
{
struct intel_display *display = to_intel_display(crtc);
@@ -481,7 +481,7 @@ static void intel_unreference_dpll(struct intel_atomic_state *state,
dpll_state = intel_atomic_get_dpll_state(&state->base);
- intel_unreference_dpll_crtc(crtc, pll, &dpll_state[pll->index]);
+ intel_dpll_crtc_put(crtc, pll, &dpll_state[pll->index]);
}
static void intel_put_dpll(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index 88a81c850cf0..f8ba7b52a7ad 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -404,9 +404,9 @@ int intel_reserve_dplls(struct intel_atomic_state *state,
struct intel_encoder *encoder);
void intel_release_dplls(struct intel_atomic_state *state,
struct intel_crtc *crtc);
-void intel_unreference_dpll_crtc(const struct intel_crtc *crtc,
- const struct intel_dpll *pll,
- struct intel_dpll_state *shared_dpll_state);
+void intel_dpll_crtc_put(const struct intel_crtc *crtc,
+ const struct intel_dpll *pll,
+ struct intel_dpll_state *shared_dpll_state);
void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,
enum icl_port_dpll_id port_dpll_id);
void intel_update_active_dpll(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
index ed4f305e0d3e..22c5302e3798 100644
--- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
+++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
@@ -93,9 +93,9 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc,
crtc->base.enabled = false;
if (crtc_state->intel_dpll)
- intel_unreference_dpll_crtc(crtc,
- crtc_state->intel_dpll,
- &crtc_state->intel_dpll->state);
+ intel_dpll_crtc_put(crtc,
+ crtc_state->intel_dpll,
+ &crtc_state->intel_dpll->state);
}
static void set_encoder_for_connector(struct intel_connector *connector,
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* RE: [PATCH 10/14] drm/i915/dpll: Rename intel_unreference_dpll_crtc
2025-05-15 7:17 ` [PATCH 10/14] drm/i915/dpll: Rename intel_unreference_dpll_crtc Suraj Kandpal
@ 2025-05-16 8:17 ` Kahola, Mika
0 siblings, 0 replies; 38+ messages in thread
From: Kahola, Mika @ 2025-05-16 8:17 UTC (permalink / raw)
To: Kandpal, Suraj, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Murthy, Arun R, Nikula, Jani
> -----Original Message-----
> From: Kandpal, Suraj <suraj.kandpal@intel.com>
> Sent: Thursday, 15 May 2025 10.18
> To: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>; Kahola, Mika <mika.kahola@intel.com>; Kandpal, Suraj <suraj.kandpal@intel.com>
> Subject: [PATCH 10/14] drm/i915/dpll: Rename intel_unreference_dpll_crtc
>
> Rename intel_unreference_dpll_crtc to intel_dpll_crtc_put in an effort to keep names of exported functions start with the
> filename.
>
> --v2
> -Make the new name more sensible [Jani]
>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 10 +++++-----
> drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 6 +++---
> drivers/gpu/drm/i915/display/intel_modeset_setup.c | 6 +++---
> 3 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 2b592423e1d1..1265bc4b4307 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -451,7 +451,7 @@ intel_reference_dpll(struct intel_atomic_state *state, }
>
> /**
> - * intel_unreference_dpll_crtc - Drop a DPLL reference for a CRTC
> + * intel_dpll_crtc_put - Drop a DPLL reference for a CRTC
> * @crtc: CRTC on which behalf the reference is dropped
> * @pll: DPLL for which the reference is dropped
> * @dpll_state: the DPLL atomic state in which the reference is tracked @@ -459,9 +459,9 @@ intel_reference_dpll(struct
> intel_atomic_state *state,
> * Drop a reference for @pll tracking the end of use of it by @crtc.
> */
> void
> -intel_unreference_dpll_crtc(const struct intel_crtc *crtc,
> - const struct intel_dpll *pll,
> - struct intel_dpll_state *dpll_state)
> +intel_dpll_crtc_put(const struct intel_crtc *crtc,
> + const struct intel_dpll *pll,
> + struct intel_dpll_state *dpll_state)
> {
> struct intel_display *display = to_intel_display(crtc);
>
> @@ -481,7 +481,7 @@ static void intel_unreference_dpll(struct intel_atomic_state *state,
>
> dpll_state = intel_atomic_get_dpll_state(&state->base);
>
> - intel_unreference_dpll_crtc(crtc, pll, &dpll_state[pll->index]);
> + intel_dpll_crtc_put(crtc, pll, &dpll_state[pll->index]);
> }
>
> static void intel_put_dpll(struct intel_atomic_state *state, diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> index 88a81c850cf0..f8ba7b52a7ad 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> @@ -404,9 +404,9 @@ int intel_reserve_dplls(struct intel_atomic_state *state,
> struct intel_encoder *encoder);
> void intel_release_dplls(struct intel_atomic_state *state,
> struct intel_crtc *crtc);
> -void intel_unreference_dpll_crtc(const struct intel_crtc *crtc,
> - const struct intel_dpll *pll,
> - struct intel_dpll_state *shared_dpll_state);
> +void intel_dpll_crtc_put(const struct intel_crtc *crtc,
> + const struct intel_dpll *pll,
> + struct intel_dpll_state *shared_dpll_state);
> void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,
> enum icl_port_dpll_id port_dpll_id); void intel_update_active_dpll(struct intel_atomic_state *state,
> diff --git a/drivers/gpu/drm/i915/display/intel_modeset_setup.c b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> index ed4f305e0d3e..22c5302e3798 100644
> --- a/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> +++ b/drivers/gpu/drm/i915/display/intel_modeset_setup.c
> @@ -93,9 +93,9 @@ static void intel_crtc_disable_noatomic_begin(struct intel_crtc *crtc,
> crtc->base.enabled = false;
>
> if (crtc_state->intel_dpll)
> - intel_unreference_dpll_crtc(crtc,
> - crtc_state->intel_dpll,
> - &crtc_state->intel_dpll->state);
> + intel_dpll_crtc_put(crtc,
> + crtc_state->intel_dpll,
> + &crtc_state->intel_dpll->state);
> }
>
> static void set_encoder_for_connector(struct intel_connector *connector,
> --
> 2.34.1
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 11/14] drm/i915/dpll: Rename intel_reference_dpll_crtc
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (9 preceding siblings ...)
2025-05-15 7:17 ` [PATCH 10/14] drm/i915/dpll: Rename intel_unreference_dpll_crtc Suraj Kandpal
@ 2025-05-15 7:17 ` Suraj Kandpal
2025-05-16 8:18 ` Kahola, Mika
2025-05-15 7:17 ` [PATCH 12/14] drm/i915/dpll: Rename intel_<release/reserve>_dpll Suraj Kandpal
` (19 subsequent siblings)
30 siblings, 1 reply; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:17 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename intel_reference_dpll_crtc to intel_dpll_crtc_get in an
effort to have all the exported functions have the name start
with file name.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 1265bc4b4307..db15d4f0328c 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -412,7 +412,7 @@ intel_find_dpll(struct intel_atomic_state *state,
}
/**
- * intel_reference_dpll_crtc - Get a DPLL reference for a CRTC
+ * intel_dpll_crtc_get - Get a DPLL reference for a CRTC
* @crtc: CRTC on which behalf the reference is taken
* @pll: DPLL for which the reference is taken
* @dpll_state: the DPLL atomic state in which the reference is tracked
@@ -420,9 +420,9 @@ intel_find_dpll(struct intel_atomic_state *state,
* Take a reference for @pll tracking the use of it by @crtc.
*/
static void
-intel_reference_dpll_crtc(const struct intel_crtc *crtc,
- const struct intel_dpll *pll,
- struct intel_dpll_state *dpll_state)
+intel_dpll_crtc_get(const struct intel_crtc *crtc,
+ const struct intel_dpll *pll,
+ struct intel_dpll_state *dpll_state)
{
struct intel_display *display = to_intel_display(crtc);
@@ -447,7 +447,7 @@ intel_reference_dpll(struct intel_atomic_state *state,
if (dpll_state[pll->index].pipe_mask == 0)
dpll_state[pll->index].hw_state = *dpll_hw_state;
- intel_reference_dpll_crtc(crtc, pll, &dpll_state[pll->index]);
+ intel_dpll_crtc_get(crtc, pll, &dpll_state[pll->index]);
}
/**
@@ -4521,7 +4521,7 @@ static void readout_dpll_hw_state(struct intel_display *display,
to_intel_crtc_state(crtc->base.state);
if (crtc_state->hw.active && crtc_state->intel_dpll == pll)
- intel_reference_dpll_crtc(crtc, pll, &pll->state);
+ intel_dpll_crtc_get(crtc, pll, &pll->state);
}
pll->active_mask = pll->state.pipe_mask;
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* RE: [PATCH 11/14] drm/i915/dpll: Rename intel_reference_dpll_crtc
2025-05-15 7:17 ` [PATCH 11/14] drm/i915/dpll: Rename intel_reference_dpll_crtc Suraj Kandpal
@ 2025-05-16 8:18 ` Kahola, Mika
0 siblings, 0 replies; 38+ messages in thread
From: Kahola, Mika @ 2025-05-16 8:18 UTC (permalink / raw)
To: Kandpal, Suraj, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Murthy, Arun R, Nikula, Jani
> -----Original Message-----
> From: Kandpal, Suraj <suraj.kandpal@intel.com>
> Sent: Thursday, 15 May 2025 10.18
> To: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>; Kahola, Mika <mika.kahola@intel.com>; Kandpal, Suraj <suraj.kandpal@intel.com>
> Subject: [PATCH 11/14] drm/i915/dpll: Rename intel_reference_dpll_crtc
>
> Rename intel_reference_dpll_crtc to intel_dpll_crtc_get in an effort to have all the exported functions have the name start with
> file name.
>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 12 ++++++------
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index 1265bc4b4307..db15d4f0328c 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -412,7 +412,7 @@ intel_find_dpll(struct intel_atomic_state *state, }
>
> /**
> - * intel_reference_dpll_crtc - Get a DPLL reference for a CRTC
> + * intel_dpll_crtc_get - Get a DPLL reference for a CRTC
> * @crtc: CRTC on which behalf the reference is taken
> * @pll: DPLL for which the reference is taken
> * @dpll_state: the DPLL atomic state in which the reference is tracked @@ -420,9 +420,9 @@ intel_find_dpll(struct
> intel_atomic_state *state,
> * Take a reference for @pll tracking the use of it by @crtc.
> */
> static void
> -intel_reference_dpll_crtc(const struct intel_crtc *crtc,
> - const struct intel_dpll *pll,
> - struct intel_dpll_state *dpll_state)
> +intel_dpll_crtc_get(const struct intel_crtc *crtc,
> + const struct intel_dpll *pll,
> + struct intel_dpll_state *dpll_state)
> {
> struct intel_display *display = to_intel_display(crtc);
>
> @@ -447,7 +447,7 @@ intel_reference_dpll(struct intel_atomic_state *state,
> if (dpll_state[pll->index].pipe_mask == 0)
> dpll_state[pll->index].hw_state = *dpll_hw_state;
>
> - intel_reference_dpll_crtc(crtc, pll, &dpll_state[pll->index]);
> + intel_dpll_crtc_get(crtc, pll, &dpll_state[pll->index]);
> }
>
> /**
> @@ -4521,7 +4521,7 @@ static void readout_dpll_hw_state(struct intel_display *display,
> to_intel_crtc_state(crtc->base.state);
>
> if (crtc_state->hw.active && crtc_state->intel_dpll == pll)
> - intel_reference_dpll_crtc(crtc, pll, &pll->state);
> + intel_dpll_crtc_get(crtc, pll, &pll->state);
> }
> pll->active_mask = pll->state.pipe_mask;
>
> --
> 2.34.1
^ permalink raw reply [flat|nested] 38+ messages in thread
* [PATCH 12/14] drm/i915/dpll: Rename intel_<release/reserve>_dpll
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (10 preceding siblings ...)
2025-05-15 7:17 ` [PATCH 11/14] drm/i915/dpll: Rename intel_reference_dpll_crtc Suraj Kandpal
@ 2025-05-15 7:17 ` Suraj Kandpal
2025-05-15 7:18 ` [PATCH 13/14] drm/i915/dpll: Rename intel_compute_dpll Suraj Kandpal
` (18 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:17 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename intel_<release/reserve>_dpll to
intel_dpll_<release/reserve> in an effort to keep names of
exported functions start with the filename.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_dpll.c | 4 +--
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 26 +++++++++----------
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 10 +++----
4 files changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 7cdb6dc78c5b..9bbb670c39f3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -6428,7 +6428,7 @@ int intel_atomic_check(struct drm_device *dev,
any_ms = true;
- intel_release_dplls(state, crtc);
+ intel_dpll_release(state, crtc);
}
if (any_ms && !check_digital_port_conflicts(state)) {
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index e25411c4171c..6a0bb12eafc4 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -1189,7 +1189,7 @@ static int hsw_crtc_get_dpll(struct intel_atomic_state *state,
intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
return 0;
- return intel_reserve_dplls(state, crtc, encoder);
+ return intel_dpll_reserve(state, crtc, encoder);
}
static int dg2_crtc_compute_clock(struct intel_atomic_state *state,
@@ -1414,7 +1414,7 @@ static int ilk_crtc_get_dpll(struct intel_atomic_state *state,
if (!crtc_state->has_pch_encoder)
return 0;
- return intel_reserve_dplls(state, crtc, NULL);
+ return intel_dpll_reserve(state, crtc, NULL);
}
static u32 vlv_dpll(const struct intel_crtc_state *crtc_state)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index db15d4f0328c..6f56a8059242 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -56,8 +56,8 @@
* users of a PLL are tracked and that tracking is integrated with the atomic
* modset interface. During an atomic operation, required PLLs can be reserved
* for a given CRTC and encoder configuration by calling
- * intel_reserve_dplls() and previously reserved PLLs can be released
- * with intel_release_dplls().
+ * intel_dpll_reserve() and previously reserved PLLs can be released
+ * with intel_dpll_release().
* Changes to the users are first staged in the atomic state, and then made
* effective by calling intel_dpll_swap_state() during the atomic
* commit phase.
@@ -4388,7 +4388,7 @@ int intel_compute_dplls(struct intel_atomic_state *state,
}
/**
- * intel_reserve_dplls - reserve DPLLs for CRTC and encoder combination
+ * intel_dpll_reserve - reserve DPLLs for CRTC and encoder combination
* @state: atomic state
* @crtc: CRTC to reserve DPLLs for
* @encoder: encoder
@@ -4401,15 +4401,15 @@ int intel_compute_dplls(struct intel_atomic_state *state,
* calling intel_dpll_swap_state().
*
* The reserved DPLLs should be released by calling
- * intel_release_dplls().
+ * intel_dpll_release().
*
* Returns:
* 0 if all required DPLLs were successfully reserved,
* negative error code otherwise.
*/
-int intel_reserve_dplls(struct intel_atomic_state *state,
- struct intel_crtc *crtc,
- struct intel_encoder *encoder)
+int intel_dpll_reserve(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(state);
const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr;
@@ -4421,18 +4421,18 @@ int intel_reserve_dplls(struct intel_atomic_state *state,
}
/**
- * intel_release_dplls - end use of DPLLs by CRTC in atomic state
+ * intel_dpll_release - end use of DPLLs by CRTC in atomic state
* @state: atomic state
* @crtc: crtc from which the DPLLs are to be released
*
- * This function releases all DPLLs reserved by intel_reserve_dplls()
+ * This function releases all DPLLs reserved by intel_dpll_reserve()
* from the current atomic commit @state and the old @crtc atomic state.
*
* The new configuration in the atomic commit @state is made effective by
* calling intel_dpll_swap_state().
*/
-void intel_release_dplls(struct intel_atomic_state *state,
- struct intel_crtc *crtc)
+void intel_dpll_release(struct intel_atomic_state *state,
+ struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(state);
const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr;
@@ -4440,7 +4440,7 @@ void intel_release_dplls(struct intel_atomic_state *state,
/*
* FIXME: this function is called for every platform having a
* compute_clock hook, even though the platform doesn't yet support
- * the DPLL framework and intel_reserve_dplls() is not
+ * the DPLL framework and intel_dpll_reserve() is not
* called on those.
*/
if (!dpll_mgr)
@@ -4456,7 +4456,7 @@ void intel_release_dplls(struct intel_atomic_state *state,
* @encoder: encoder determining the type of port DPLL
*
* Update the active DPLL for the given @crtc/@encoder in @crtc's atomic state,
- * from the port DPLLs reserved previously by intel_reserve_dplls(). The
+ * from the port DPLLs reserved previously by intel_dpll_reserve(). The
* DPLL selected will be based on the current mode of the encoder's port.
*/
void intel_update_active_dpll(struct intel_atomic_state *state,
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index f8ba7b52a7ad..9c8a91b9639c 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -399,11 +399,11 @@ void assert_dpll(struct intel_display *display,
int intel_compute_dplls(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_encoder *encoder);
-int intel_reserve_dplls(struct intel_atomic_state *state,
- struct intel_crtc *crtc,
- struct intel_encoder *encoder);
-void intel_release_dplls(struct intel_atomic_state *state,
- struct intel_crtc *crtc);
+int intel_dpll_reserve(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ struct intel_encoder *encoder);
+void intel_dpll_release(struct intel_atomic_state *state,
+ struct intel_crtc *crtc);
void intel_dpll_crtc_put(const struct intel_crtc *crtc,
const struct intel_dpll *pll,
struct intel_dpll_state *shared_dpll_state);
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 13/14] drm/i915/dpll: Rename intel_compute_dpll
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (11 preceding siblings ...)
2025-05-15 7:17 ` [PATCH 12/14] drm/i915/dpll: Rename intel_<release/reserve>_dpll Suraj Kandpal
@ 2025-05-15 7:18 ` Suraj Kandpal
2025-05-15 7:18 ` [PATCH 14/14] drm/i915/dpll: Rename intel_update_active_dpll Suraj Kandpal
` (17 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:18 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename intel_compute_dpll to intel_dpll_compute in an
effort to make sure all function names that are exported have
the filename at start.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/display/intel_dpll.c | 6 +++---
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 8 ++++----
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 6 +++---
3 files changed, 10 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dpll.c b/drivers/gpu/drm/i915/display/intel_dpll.c
index 6a0bb12eafc4..c15a9af53313 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll.c
@@ -1161,7 +1161,7 @@ static int hsw_crtc_compute_clock(struct intel_atomic_state *state,
intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DSI))
return 0;
- ret = intel_compute_dplls(state, crtc, encoder);
+ ret = intel_dpll_compute(state, crtc, encoder);
if (ret)
return ret;
@@ -1223,7 +1223,7 @@ static int mtl_crtc_compute_clock(struct intel_atomic_state *state,
if (ret)
return ret;
- /* TODO: Do the readback via intel_compute_dplls() */
+ /* TODO: Do the readback via intel_dpll_compute() */
crtc_state->port_clock = intel_cx0pll_calc_port_clock(encoder, &crtc_state->dpll_hw_state.cx0pll);
crtc_state->hw.adjusted_mode.crtc_clock = intel_crtc_dotclock(crtc_state);
@@ -1394,7 +1394,7 @@ static int ilk_crtc_compute_clock(struct intel_atomic_state *state,
ilk_compute_dpll(crtc_state, &crtc_state->dpll,
&crtc_state->dpll);
- ret = intel_compute_dplls(state, crtc, NULL);
+ ret = intel_dpll_compute(state, crtc, NULL);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index 6f56a8059242..bf66cbe5a11c 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -4361,7 +4361,7 @@ void intel_dpll_init(struct intel_display *display)
}
/**
- * intel_compute_dplls - compute DPLL state CRTC and encoder combination
+ * intel_dpll_compute - compute DPLL state CRTC and encoder combination
* @state: atomic state
* @crtc: CRTC to compute DPLLs for
* @encoder: encoder
@@ -4374,9 +4374,9 @@ void intel_dpll_init(struct intel_display *display)
* Returns:
* 0 on success, negative error code on failure.
*/
-int intel_compute_dplls(struct intel_atomic_state *state,
- struct intel_crtc *crtc,
- struct intel_encoder *encoder)
+int intel_dpll_compute(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ struct intel_encoder *encoder)
{
struct intel_display *display = to_intel_display(state);
const struct intel_dpll_mgr *dpll_mgr = display->dpll.mgr;
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index 9c8a91b9639c..b388310af9c3 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -396,9 +396,9 @@ void assert_dpll(struct intel_display *display,
bool state);
#define assert_dpll_enabled(d, p) assert_dpll(d, p, true)
#define assert_dpll_disabled(d, p) assert_dpll(d, p, false)
-int intel_compute_dplls(struct intel_atomic_state *state,
- struct intel_crtc *crtc,
- struct intel_encoder *encoder);
+int intel_dpll_compute(struct intel_atomic_state *state,
+ struct intel_crtc *crtc,
+ struct intel_encoder *encoder);
int intel_dpll_reserve(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_encoder *encoder);
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* [PATCH 14/14] drm/i915/dpll: Rename intel_update_active_dpll
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (12 preceding siblings ...)
2025-05-15 7:18 ` [PATCH 13/14] drm/i915/dpll: Rename intel_compute_dpll Suraj Kandpal
@ 2025-05-15 7:18 ` Suraj Kandpal
2025-05-16 8:26 ` Kahola, Mika
2025-05-15 7:46 ` ✓ CI.Patch_applied: success for DPLL framework redesign Patchwork
` (16 subsequent siblings)
30 siblings, 1 reply; 38+ messages in thread
From: Suraj Kandpal @ 2025-05-15 7:18 UTC (permalink / raw)
To: intel-xe, intel-gfx
Cc: ankit.k.nautiyal, arun.r.murthy, jani.nikula, mika.kahola,
Suraj Kandpal
Rename intel_update_active_dpll to intel_dpll_update_active in an
effort to have function names which are exported to start with
filenames they are exported from.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
---
drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 4 ++--
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 2 +-
3 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 11ebcb40c91f..0e6d618b5356 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3650,7 +3650,7 @@ void intel_ddi_update_active_dpll(struct intel_atomic_state *state,
for_each_intel_crtc_in_pipe_mask(display->drm, pipe_crtc,
intel_crtc_joined_pipe_mask(crtc_state))
- intel_update_active_dpll(state, pipe_crtc, encoder);
+ intel_dpll_update_active(state, pipe_crtc, encoder);
}
/*
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index bf66cbe5a11c..28b3f5ea4219 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -4450,7 +4450,7 @@ void intel_dpll_release(struct intel_atomic_state *state,
}
/**
- * intel_update_active_dpll - update the active DPLL for a CRTC/encoder
+ * intel_dpll_update_active - update the active DPLL for a CRTC/encoder
* @state: atomic state
* @crtc: the CRTC for which to update the active DPLL
* @encoder: encoder determining the type of port DPLL
@@ -4459,7 +4459,7 @@ void intel_dpll_release(struct intel_atomic_state *state,
* from the port DPLLs reserved previously by intel_dpll_reserve(). The
* DPLL selected will be based on the current mode of the encoder's port.
*/
-void intel_update_active_dpll(struct intel_atomic_state *state,
+void intel_dpll_update_active(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_encoder *encoder)
{
diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
index b388310af9c3..f131bdd1c975 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
@@ -409,7 +409,7 @@ void intel_dpll_crtc_put(const struct intel_crtc *crtc,
struct intel_dpll_state *shared_dpll_state);
void icl_set_active_port_dpll(struct intel_crtc_state *crtc_state,
enum icl_port_dpll_id port_dpll_id);
-void intel_update_active_dpll(struct intel_atomic_state *state,
+void intel_dpll_update_active(struct intel_atomic_state *state,
struct intel_crtc *crtc,
struct intel_encoder *encoder);
int intel_dpll_get_freq(struct intel_display *display,
--
2.34.1
^ permalink raw reply related [flat|nested] 38+ messages in thread* RE: [PATCH 14/14] drm/i915/dpll: Rename intel_update_active_dpll
2025-05-15 7:18 ` [PATCH 14/14] drm/i915/dpll: Rename intel_update_active_dpll Suraj Kandpal
@ 2025-05-16 8:26 ` Kahola, Mika
0 siblings, 0 replies; 38+ messages in thread
From: Kahola, Mika @ 2025-05-16 8:26 UTC (permalink / raw)
To: Kandpal, Suraj, intel-xe@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Murthy, Arun R, Nikula, Jani
> -----Original Message-----
> From: Kandpal, Suraj <suraj.kandpal@intel.com>
> Sent: Thursday, 15 May 2025 10.18
> To: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>; Kahola, Mika <mika.kahola@intel.com>; Kandpal, Suraj <suraj.kandpal@intel.com>
> Subject: [PATCH 14/14] drm/i915/dpll: Rename intel_update_active_dpll
>
> Rename intel_update_active_dpll to intel_dpll_update_active in an effort to have function names which are exported to start with
> filenames they are exported from.
>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 4 ++-- drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 2 +-
> 3 files changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 11ebcb40c91f..0e6d618b5356 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -3650,7 +3650,7 @@ void intel_ddi_update_active_dpll(struct intel_atomic_state *state,
>
> for_each_intel_crtc_in_pipe_mask(display->drm, pipe_crtc,
> intel_crtc_joined_pipe_mask(crtc_state))
> - intel_update_active_dpll(state, pipe_crtc, encoder);
> + intel_dpll_update_active(state, pipe_crtc, encoder);
> }
>
> /*
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index bf66cbe5a11c..28b3f5ea4219 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -4450,7 +4450,7 @@ void intel_dpll_release(struct intel_atomic_state *state, }
>
> /**
> - * intel_update_active_dpll - update the active DPLL for a CRTC/encoder
> + * intel_dpll_update_active - update the active DPLL for a CRTC/encoder
> * @state: atomic state
> * @crtc: the CRTC for which to update the active DPLL
> * @encoder: encoder determining the type of port DPLL @@ -4459,7 +4459,7 @@ void intel_dpll_release(struct
> intel_atomic_state *state,
> * from the port DPLLs reserved previously by intel_dpll_reserve(). The
> * DPLL selected will be based on the current mode of the encoder's port.
> */
> -void intel_update_active_dpll(struct intel_atomic_state *state,
> +void intel_dpll_update_active(struct intel_atomic_state *state,
> struct intel_crtc *crtc,
> struct intel_encoder *encoder) { diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> index b388310af9c3..f131bdd1c975 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.h
> @@ -409,7 +409,7 @@ void intel_dpll_crtc_put(const struct intel_crtc *crtc,
> struct intel_dpll_state *shared_dpll_state); void icl_set_active_port_dpll(struct intel_crtc_state
> *crtc_state,
> enum icl_port_dpll_id port_dpll_id); -void intel_update_active_dpll(struct intel_atomic_state *state,
> +void intel_dpll_update_active(struct intel_atomic_state *state,
> struct intel_crtc *crtc,
> struct intel_encoder *encoder); int intel_dpll_get_freq(struct intel_display *display,
> --
> 2.34.1
^ permalink raw reply [flat|nested] 38+ messages in thread
* ✓ CI.Patch_applied: success for DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (13 preceding siblings ...)
2025-05-15 7:18 ` [PATCH 14/14] drm/i915/dpll: Rename intel_update_active_dpll Suraj Kandpal
@ 2025-05-15 7:46 ` Patchwork
2025-05-15 7:47 ` ✗ CI.checkpatch: warning " Patchwork
` (15 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-15 7:46 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
== Series Details ==
Series: DPLL framework redesign
URL : https://patchwork.freedesktop.org/series/149051/
State : success
== Summary ==
=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: 3d6670fab64c drm-tip: 2025y-05m-14d-19h-28m-21s UTC integration manifest
=== git am output follows ===
Applying: drm/i915/dpll: Rename intel_dpll
Applying: drm/i915/dpll: Rename intel_dpll_funcs
Applying: drm/i915/dpll: Rename intel_shared_dpll_state
Applying: drm/i915/dpll: Rename macro for_each_shared_dpll
Applying: drm/i915/dpll: Rename intel_shared_dpll_funcs
Applying: drm/i915/dpll: Rename intel_shared_dpll
Applying: drm/i915/dpll: Move away from using shared dpll
Applying: drm/i915/dpll: Rename crtc_get_shared_dpll
Applying: drm/i915/dpll: Rename intel_[enable/disable]_dpll
Applying: drm/i915/dpll: Rename intel_unreference_dpll_crtc
Applying: drm/i915/dpll: Rename intel_reference_dpll_crtc
Applying: drm/i915/dpll: Rename intel_<release/reserve>_dpll
Applying: drm/i915/dpll: Rename intel_compute_dpll
Applying: drm/i915/dpll: Rename intel_update_active_dpll
^ permalink raw reply [flat|nested] 38+ messages in thread* ✗ CI.checkpatch: warning for DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (14 preceding siblings ...)
2025-05-15 7:46 ` ✓ CI.Patch_applied: success for DPLL framework redesign Patchwork
@ 2025-05-15 7:47 ` Patchwork
2025-05-15 7:48 ` ✓ CI.KUnit: success " Patchwork
` (14 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-15 7:47 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
== Series Details ==
Series: DPLL framework redesign
URL : https://patchwork.freedesktop.org/series/149051/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
202708c00696422fd217223bb679a353a5936e23
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 48fbbd77f4f3e1bb483c06ef665e529ccc39bc83
Author: Suraj Kandpal <suraj.kandpal@intel.com>
Date: Thu May 15 12:48:01 2025 +0530
drm/i915/dpll: Rename intel_update_active_dpll
Rename intel_update_active_dpll to intel_dpll_update_active in an
effort to have function names which are exported to start with
filenames they are exported from.
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
+ /mt/dim checkpatch 3d6670fab64cb00b5e6ed80d2517147db533faf1 drm-intel
cb9643b09d5c drm/i915/dpll: Rename intel_dpll
2cefad8ee2ed drm/i915/dpll: Rename intel_dpll_funcs
e9ee1ad5439b drm/i915/dpll: Rename intel_shared_dpll_state
3d3af853a2de drm/i915/dpll: Rename macro for_each_shared_dpll
-:103: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#103: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.h:33:
+#define for_each_dpll(__display, __pll, __i) \
for ((__i) = 0; (__i) < (__display)->dpll.num_shared_dpll && \
((__pll) = &(__display)->dpll.shared_dplls[(__i)]) ; (__i)++)
-:103: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#103: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.h:33:
+#define for_each_dpll(__display, __pll, __i) \
for ((__i) = 0; (__i) < (__display)->dpll.num_shared_dpll && \
((__pll) = &(__display)->dpll.shared_dplls[(__i)]) ; (__i)++)
total: 0 errors, 0 warnings, 2 checks, 81 lines checked
285588eb392c drm/i915/dpll: Rename intel_shared_dpll_funcs
7aeff800a71b drm/i915/dpll: Rename intel_shared_dpll
a8fd668513a2 drm/i915/dpll: Move away from using shared dpll
2d29283db0e2 drm/i915/dpll: Rename crtc_get_shared_dpll
fcfc6f5fe637 drm/i915/dpll: Rename intel_[enable/disable]_dpll
38597b653493 drm/i915/dpll: Rename intel_unreference_dpll_crtc
2e53aaf90811 drm/i915/dpll: Rename intel_reference_dpll_crtc
61facb52d3f1 drm/i915/dpll: Rename intel_<release/reserve>_dpll
89c3ae84faa5 drm/i915/dpll: Rename intel_compute_dpll
48fbbd77f4f3 drm/i915/dpll: Rename intel_update_active_dpll
^ permalink raw reply [flat|nested] 38+ messages in thread* ✓ CI.KUnit: success for DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (15 preceding siblings ...)
2025-05-15 7:47 ` ✗ CI.checkpatch: warning " Patchwork
@ 2025-05-15 7:48 ` Patchwork
2025-05-15 7:51 ` ✗ Fi.CI.CHECKPATCH: warning " Patchwork
` (13 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-15 7:48 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
== Series Details ==
Series: DPLL framework redesign
URL : https://patchwork.freedesktop.org/series/149051/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[07:47:21] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:47:25] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:47:52] Starting KUnit Kernel (1/1)...
[07:47:52] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:47:52] ================== guc_buf (11 subtests) ===================
[07:47:52] [PASSED] test_smallest
[07:47:52] [PASSED] test_largest
[07:47:52] [PASSED] test_granular
[07:47:52] [PASSED] test_unique
[07:47:52] [PASSED] test_overlap
[07:47:52] [PASSED] test_reusable
[07:47:52] [PASSED] test_too_big
[07:47:52] [PASSED] test_flush
[07:47:52] [PASSED] test_lookup
[07:47:52] [PASSED] test_data
[07:47:52] [PASSED] test_class
[07:47:52] ===================== [PASSED] guc_buf =====================
[07:47:52] =================== guc_dbm (7 subtests) ===================
[07:47:52] [PASSED] test_empty
[07:47:52] [PASSED] test_default
[07:47:52] ======================== test_size ========================
[07:47:52] [PASSED] 4
[07:47:52] [PASSED] 8
[07:47:52] [PASSED] 32
[07:47:52] [PASSED] 256
[07:47:52] ==================== [PASSED] test_size ====================
[07:47:52] ======================= test_reuse ========================
[07:47:52] [PASSED] 4
[07:47:52] [PASSED] 8
[07:47:52] [PASSED] 32
[07:47:52] [PASSED] 256
[07:47:52] =================== [PASSED] test_reuse ====================
[07:47:52] =================== test_range_overlap ====================
[07:47:52] [PASSED] 4
[07:47:52] [PASSED] 8
[07:47:52] [PASSED] 32
[07:47:52] [PASSED] 256
[07:47:52] =============== [PASSED] test_range_overlap ================
[07:47:52] =================== test_range_compact ====================
[07:47:52] [PASSED] 4
[07:47:52] [PASSED] 8
[07:47:52] [PASSED] 32
[07:47:52] [PASSED] 256
[07:47:52] =============== [PASSED] test_range_compact ================
[07:47:52] ==================== test_range_spare =====================
[07:47:52] [PASSED] 4
[07:47:52] [PASSED] 8
[07:47:52] [PASSED] 32
[07:47:52] [PASSED] 256
[07:47:52] ================ [PASSED] test_range_spare =================
[07:47:52] ===================== [PASSED] guc_dbm =====================
[07:47:52] =================== guc_idm (6 subtests) ===================
[07:47:52] [PASSED] bad_init
[07:47:52] [PASSED] no_init
[07:47:52] [PASSED] init_fini
[07:47:52] [PASSED] check_used
[07:47:52] [PASSED] check_quota
[07:47:52] [PASSED] check_all
[07:47:52] ===================== [PASSED] guc_idm =====================
[07:47:52] ================== no_relay (3 subtests) ===================
[07:47:52] [PASSED] xe_drops_guc2pf_if_not_ready
[07:47:52] [PASSED] xe_drops_guc2vf_if_not_ready
[07:47:52] [PASSED] xe_rejects_send_if_not_ready
[07:47:52] ==================== [PASSED] no_relay =====================
[07:47:52] ================== pf_relay (14 subtests) ==================
[07:47:52] [PASSED] pf_rejects_guc2pf_too_short
[07:47:52] [PASSED] pf_rejects_guc2pf_too_long
[07:47:52] [PASSED] pf_rejects_guc2pf_no_payload
[07:47:52] [PASSED] pf_fails_no_payload
[07:47:52] [PASSED] pf_fails_bad_origin
[07:47:52] [PASSED] pf_fails_bad_type
[07:47:52] [PASSED] pf_txn_reports_error
[07:47:52] [PASSED] pf_txn_sends_pf2guc
[07:47:52] [PASSED] pf_sends_pf2guc
[07:47:52] [SKIPPED] pf_loopback_nop
[07:47:52] [SKIPPED] pf_loopback_echo
[07:47:52] [SKIPPED] pf_loopback_fail
[07:47:52] [SKIPPED] pf_loopback_busy
[07:47:52] [SKIPPED] pf_loopback_retry
[07:47:52] ==================== [PASSED] pf_relay =====================
[07:47:52] ================== vf_relay (3 subtests) ===================
[07:47:52] [PASSED] vf_rejects_guc2vf_too_short
[07:47:52] [PASSED] vf_rejects_guc2vf_too_long
[07:47:52] [PASSED] vf_rejects_guc2vf_no_payload
[07:47:52] ==================== [PASSED] vf_relay =====================
[07:47:52] ================= pf_service (11 subtests) =================
[07:47:52] [PASSED] pf_negotiate_any
[07:47:52] [PASSED] pf_negotiate_base_match
[07:47:52] [PASSED] pf_negotiate_base_newer
[07:47:52] [PASSED] pf_negotiate_base_next
[07:47:52] [SKIPPED] pf_negotiate_base_older
[07:47:52] [PASSED] pf_negotiate_base_prev
[07:47:52] [PASSED] pf_negotiate_latest_match
[07:47:52] [PASSED] pf_negotiate_latest_newer
[07:47:52] [PASSED] pf_negotiate_latest_next
[07:47:52] [SKIPPED] pf_negotiate_latest_older
[07:47:52] [SKIPPED] pf_negotiate_latest_prev
[07:47:52] =================== [PASSED] pf_service ====================
[07:47:52] ===================== lmtt (1 subtest) =====================
[07:47:52] ======================== test_ops =========================
[07:47:52] [PASSED] 2-level
[07:47:52] [PASSED] multi-level
[07:47:52] ==================== [PASSED] test_ops =====================
[07:47:52] ====================== [PASSED] lmtt =======================
[07:47:52] =================== xe_mocs (2 subtests) ===================
[07:47:52] ================ xe_live_mocs_kernel_kunit ================
[07:47:52] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[07:47:52] ================ xe_live_mocs_reset_kunit =================
[07:47:52] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[07:47:52] ==================== [SKIPPED] xe_mocs =====================
[07:47:52] ================= xe_migrate (2 subtests) ==================
[07:47:52] ================= xe_migrate_sanity_kunit =================
[07:47:52] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[07:47:52] ================== xe_validate_ccs_kunit ==================
[07:47:52] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[07:47:52] =================== [SKIPPED] xe_migrate ===================
[07:47:52] ================== xe_dma_buf (1 subtest) ==================
[07:47:52] ==================== xe_dma_buf_kunit =====================
[07:47:52] ================ [SKIPPED] xe_dma_buf_kunit ================
[07:47:52] =================== [SKIPPED] xe_dma_buf ===================
[07:47:52] ================= xe_bo_shrink (1 subtest) =================
[07:47:52] =================== xe_bo_shrink_kunit ====================
[07:47:52] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[07:47:52] ================== [SKIPPED] xe_bo_shrink ==================
[07:47:52] ==================== xe_bo (2 subtests) ====================
[07:47:52] ================== xe_ccs_migrate_kunit ===================
[07:47:52] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[07:47:52] ==================== xe_bo_evict_kunit ====================
[07:47:52] =============== [SKIPPED] xe_bo_evict_kunit ================
[07:47:52] ===================== [SKIPPED] xe_bo ======================
[07:47:52] ==================== args (11 subtests) ====================
[07:47:52] [PASSED] count_args_test
[07:47:52] [PASSED] call_args_example
[07:47:52] [PASSED] call_args_test
[07:47:52] [PASSED] drop_first_arg_example
[07:47:52] [PASSED] drop_first_arg_test
[07:47:52] [PASSED] first_arg_example
[07:47:52] [PASSED] first_arg_test
[07:47:52] [PASSED] last_arg_example
[07:47:52] [PASSED] last_arg_test
[07:47:52] [PASSED] pick_arg_example
[07:47:52] [PASSED] sep_comma_example
[07:47:52] ====================== [PASSED] args =======================
[07:47:52] =================== xe_pci (2 subtests) ====================
[07:47:52] [PASSED] xe_gmdid_graphics_ip
[07:47:52] [PASSED] xe_gmdid_media_ip
[07:47:52] ===================== [PASSED] xe_pci ======================
[07:47:52] =================== xe_rtp (2 subtests) ====================
[07:47:52] =============== xe_rtp_process_to_sr_tests ================
[07:47:52] [PASSED] coalesce-same-reg
[07:47:52] [PASSED] no-match-no-add
[07:47:52] [PASSED] match-or
[07:47:52] [PASSED] match-or-xfail
[07:47:52] [PASSED] no-match-no-add-multiple-rules
[07:47:52] [PASSED] two-regs-two-entries
[07:47:52] [PASSED] clr-one-set-other
[07:47:52] [PASSED] set-field
[07:47:52] [PASSED] conflict-duplicate
[07:47:52] [PASSED] conflict-not-disjoint
stty: 'standard input': Inappropriate ioctl for device
[07:47:52] [PASSED] conflict-reg-type
[07:47:52] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[07:47:52] ================== xe_rtp_process_tests ===================
[07:47:52] [PASSED] active1
[07:47:52] [PASSED] active2
[07:47:52] [PASSED] active-inactive
[07:47:52] [PASSED] inactive-active
[07:47:52] [PASSED] inactive-1st_or_active-inactive
[07:47:52] [PASSED] inactive-2nd_or_active-inactive
[07:47:52] [PASSED] inactive-last_or_active-inactive
[07:47:52] [PASSED] inactive-no_or_active-inactive
[07:47:52] ============== [PASSED] xe_rtp_process_tests ===============
[07:47:52] ===================== [PASSED] xe_rtp ======================
[07:47:52] ==================== xe_wa (1 subtest) =====================
[07:47:52] ======================== xe_wa_gt =========================
[07:47:52] [PASSED] TIGERLAKE (B0)
[07:47:52] [PASSED] DG1 (A0)
[07:47:52] [PASSED] DG1 (B0)
[07:47:52] [PASSED] ALDERLAKE_S (A0)
[07:47:52] [PASSED] ALDERLAKE_S (B0)
[07:47:52] [PASSED] ALDERLAKE_S (C0)
[07:47:52] [PASSED] ALDERLAKE_S (D0)
[07:47:52] [PASSED] ALDERLAKE_P (A0)
[07:47:52] [PASSED] ALDERLAKE_P (B0)
[07:47:52] [PASSED] ALDERLAKE_P (C0)
[07:47:52] [PASSED] ALDERLAKE_S_RPLS (D0)
[07:47:52] [PASSED] ALDERLAKE_P_RPLU (E0)
[07:47:52] [PASSED] DG2_G10 (C0)
[07:47:52] [PASSED] DG2_G11 (B1)
[07:47:52] [PASSED] DG2_G12 (A1)
[07:47:52] [PASSED] METEORLAKE (g:A0, m:A0)
[07:47:52] [PASSED] METEORLAKE (g:A0, m:A0)
[07:47:52] [PASSED] METEORLAKE (g:A0, m:A0)
[07:47:52] [PASSED] LUNARLAKE (g:A0, m:A0)
[07:47:52] [PASSED] LUNARLAKE (g:B0, m:A0)
[07:47:52] [PASSED] BATTLEMAGE (g:A0, m:A1)
[07:47:52] ==================== [PASSED] xe_wa_gt =====================
[07:47:52] ====================== [PASSED] xe_wa ======================
[07:47:52] ============================================================
[07:47:52] Testing complete. Ran 133 tests: passed: 117, skipped: 16
[07:47:52] Elapsed time: 31.001s total, 4.277s configuring, 26.407s building, 0.289s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[07:47:52] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:47:54] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:48:15] Starting KUnit Kernel (1/1)...
[07:48:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:48:16] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[07:48:16] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[07:48:16] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[07:48:16] =========== drm_validate_clone_mode (2 subtests) ===========
[07:48:16] ============== drm_test_check_in_clone_mode ===============
[07:48:16] [PASSED] in_clone_mode
[07:48:16] [PASSED] not_in_clone_mode
[07:48:16] ========== [PASSED] drm_test_check_in_clone_mode ===========
[07:48:16] =============== drm_test_check_valid_clones ===============
[07:48:16] [PASSED] not_in_clone_mode
[07:48:16] [PASSED] valid_clone
[07:48:16] [PASSED] invalid_clone
[07:48:16] =========== [PASSED] drm_test_check_valid_clones ===========
[07:48:16] ============= [PASSED] drm_validate_clone_mode =============
[07:48:16] ============= drm_validate_modeset (1 subtest) =============
[07:48:16] [PASSED] drm_test_check_connector_changed_modeset
[07:48:16] ============== [PASSED] drm_validate_modeset ===============
[07:48:16] ====== drm_test_bridge_get_current_state (2 subtests) ======
[07:48:16] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[07:48:16] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[07:48:16] ======== [PASSED] drm_test_bridge_get_current_state ========
[07:48:16] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[07:48:16] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[07:48:16] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[07:48:16] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[07:48:16] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[07:48:16] ================== drm_buddy (7 subtests) ==================
[07:48:16] [PASSED] drm_test_buddy_alloc_limit
[07:48:16] [PASSED] drm_test_buddy_alloc_optimistic
[07:48:16] [PASSED] drm_test_buddy_alloc_pessimistic
[07:48:16] [PASSED] drm_test_buddy_alloc_pathological
[07:48:16] [PASSED] drm_test_buddy_alloc_contiguous
[07:48:16] [PASSED] drm_test_buddy_alloc_clear
[07:48:16] [PASSED] drm_test_buddy_alloc_range_bias
[07:48:16] ==================== [PASSED] drm_buddy ====================
[07:48:16] ============= drm_cmdline_parser (40 subtests) =============
[07:48:16] [PASSED] drm_test_cmdline_force_d_only
[07:48:16] [PASSED] drm_test_cmdline_force_D_only_dvi
[07:48:16] [PASSED] drm_test_cmdline_force_D_only_hdmi
[07:48:16] [PASSED] drm_test_cmdline_force_D_only_not_digital
[07:48:16] [PASSED] drm_test_cmdline_force_e_only
[07:48:16] [PASSED] drm_test_cmdline_res
[07:48:16] [PASSED] drm_test_cmdline_res_vesa
[07:48:16] [PASSED] drm_test_cmdline_res_vesa_rblank
[07:48:16] [PASSED] drm_test_cmdline_res_rblank
[07:48:16] [PASSED] drm_test_cmdline_res_bpp
[07:48:16] [PASSED] drm_test_cmdline_res_refresh
[07:48:16] [PASSED] drm_test_cmdline_res_bpp_refresh
[07:48:16] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[07:48:16] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[07:48:16] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[07:48:16] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[07:48:16] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[07:48:16] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[07:48:16] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[07:48:16] [PASSED] drm_test_cmdline_res_margins_force_on
[07:48:16] [PASSED] drm_test_cmdline_res_vesa_margins
[07:48:16] [PASSED] drm_test_cmdline_name
[07:48:16] [PASSED] drm_test_cmdline_name_bpp
[07:48:16] [PASSED] drm_test_cmdline_name_option
[07:48:16] [PASSED] drm_test_cmdline_name_bpp_option
[07:48:16] [PASSED] drm_test_cmdline_rotate_0
[07:48:16] [PASSED] drm_test_cmdline_rotate_90
[07:48:16] [PASSED] drm_test_cmdline_rotate_180
[07:48:16] [PASSED] drm_test_cmdline_rotate_270
[07:48:16] [PASSED] drm_test_cmdline_hmirror
[07:48:16] [PASSED] drm_test_cmdline_vmirror
[07:48:16] [PASSED] drm_test_cmdline_margin_options
[07:48:16] [PASSED] drm_test_cmdline_multiple_options
[07:48:16] [PASSED] drm_test_cmdline_bpp_extra_and_option
[07:48:16] [PASSED] drm_test_cmdline_extra_and_option
[07:48:16] [PASSED] drm_test_cmdline_freestanding_options
[07:48:16] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[07:48:16] [PASSED] drm_test_cmdline_panel_orientation
[07:48:16] ================ drm_test_cmdline_invalid =================
[07:48:16] [PASSED] margin_only
[07:48:16] [PASSED] interlace_only
[07:48:16] [PASSED] res_missing_x
[07:48:16] [PASSED] res_missing_y
[07:48:16] [PASSED] res_bad_y
[07:48:16] [PASSED] res_missing_y_bpp
[07:48:16] [PASSED] res_bad_bpp
[07:48:16] [PASSED] res_bad_refresh
[07:48:16] [PASSED] res_bpp_refresh_force_on_off
[07:48:16] [PASSED] res_invalid_mode
[07:48:16] [PASSED] res_bpp_wrong_place_mode
[07:48:16] [PASSED] name_bpp_refresh
[07:48:16] [PASSED] name_refresh
[07:48:16] [PASSED] name_refresh_wrong_mode
[07:48:16] [PASSED] name_refresh_invalid_mode
[07:48:16] [PASSED] rotate_multiple
[07:48:16] [PASSED] rotate_invalid_val
[07:48:16] [PASSED] rotate_truncated
[07:48:16] [PASSED] invalid_option
[07:48:16] [PASSED] invalid_tv_option
[07:48:16] [PASSED] truncated_tv_option
[07:48:16] ============ [PASSED] drm_test_cmdline_invalid =============
[07:48:16] =============== drm_test_cmdline_tv_options ===============
[07:48:16] [PASSED] NTSC
[07:48:16] [PASSED] NTSC_443
[07:48:16] [PASSED] NTSC_J
[07:48:16] [PASSED] PAL
[07:48:16] [PASSED] PAL_M
[07:48:16] [PASSED] PAL_N
[07:48:16] [PASSED] SECAM
[07:48:16] [PASSED] MONO_525
[07:48:16] [PASSED] MONO_625
[07:48:16] =========== [PASSED] drm_test_cmdline_tv_options ===========
[07:48:16] =============== [PASSED] drm_cmdline_parser ================
[07:48:16] ========== drmm_connector_hdmi_init (20 subtests) ==========
[07:48:16] [PASSED] drm_test_connector_hdmi_init_valid
[07:48:16] [PASSED] drm_test_connector_hdmi_init_bpc_8
[07:48:16] [PASSED] drm_test_connector_hdmi_init_bpc_10
[07:48:16] [PASSED] drm_test_connector_hdmi_init_bpc_12
[07:48:16] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[07:48:16] [PASSED] drm_test_connector_hdmi_init_bpc_null
[07:48:16] [PASSED] drm_test_connector_hdmi_init_formats_empty
[07:48:16] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[07:48:16] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:48:16] [PASSED] supported_formats=0x9 yuv420_allowed=1
[07:48:16] [PASSED] supported_formats=0x9 yuv420_allowed=0
[07:48:16] [PASSED] supported_formats=0x3 yuv420_allowed=1
[07:48:16] [PASSED] supported_formats=0x3 yuv420_allowed=0
[07:48:16] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[07:48:16] [PASSED] drm_test_connector_hdmi_init_null_ddc
[07:48:16] [PASSED] drm_test_connector_hdmi_init_null_product
[07:48:16] [PASSED] drm_test_connector_hdmi_init_null_vendor
[07:48:16] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[07:48:16] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[07:48:16] [PASSED] drm_test_connector_hdmi_init_product_valid
[07:48:16] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[07:48:16] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[07:48:16] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[07:48:16] ========= drm_test_connector_hdmi_init_type_valid =========
[07:48:16] [PASSED] HDMI-A
[07:48:16] [PASSED] HDMI-B
[07:48:16] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[07:48:16] ======== drm_test_connector_hdmi_init_type_invalid ========
[07:48:16] [PASSED] Unknown
[07:48:16] [PASSED] VGA
[07:48:16] [PASSED] DVI-I
[07:48:16] [PASSED] DVI-D
[07:48:16] [PASSED] DVI-A
[07:48:16] [PASSED] Composite
[07:48:16] [PASSED] SVIDEO
[07:48:16] [PASSED] LVDS
[07:48:16] [PASSED] Component
[07:48:16] [PASSED] DIN
[07:48:16] [PASSED] DP
[07:48:16] [PASSED] TV
[07:48:16] [PASSED] eDP
[07:48:16] [PASSED] Virtual
[07:48:16] [PASSED] DSI
[07:48:16] [PASSED] DPI
[07:48:16] [PASSED] Writeback
[07:48:16] [PASSED] SPI
[07:48:16] [PASSED] USB
[07:48:16] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[07:48:16] ============ [PASSED] drmm_connector_hdmi_init =============
[07:48:16] ============= drmm_connector_init (3 subtests) =============
[07:48:16] [PASSED] drm_test_drmm_connector_init
[07:48:16] [PASSED] drm_test_drmm_connector_init_null_ddc
[07:48:16] ========= drm_test_drmm_connector_init_type_valid =========
[07:48:16] [PASSED] Unknown
[07:48:16] [PASSED] VGA
[07:48:16] [PASSED] DVI-I
[07:48:16] [PASSED] DVI-D
[07:48:16] [PASSED] DVI-A
[07:48:16] [PASSED] Composite
[07:48:16] [PASSED] SVIDEO
[07:48:16] [PASSED] LVDS
[07:48:16] [PASSED] Component
[07:48:16] [PASSED] DIN
[07:48:16] [PASSED] DP
[07:48:16] [PASSED] HDMI-A
[07:48:16] [PASSED] HDMI-B
[07:48:16] [PASSED] TV
[07:48:16] [PASSED] eDP
[07:48:16] [PASSED] Virtual
[07:48:16] [PASSED] DSI
[07:48:16] [PASSED] DPI
[07:48:16] [PASSED] Writeback
[07:48:16] [PASSED] SPI
[07:48:16] [PASSED] USB
[07:48:16] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[07:48:16] =============== [PASSED] drmm_connector_init ===============
[07:48:16] ========= drm_connector_dynamic_init (6 subtests) ==========
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_init
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_init_properties
[07:48:16] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[07:48:16] [PASSED] Unknown
[07:48:16] [PASSED] VGA
[07:48:16] [PASSED] DVI-I
[07:48:16] [PASSED] DVI-D
[07:48:16] [PASSED] DVI-A
[07:48:16] [PASSED] Composite
[07:48:16] [PASSED] SVIDEO
[07:48:16] [PASSED] LVDS
[07:48:16] [PASSED] Component
[07:48:16] [PASSED] DIN
[07:48:16] [PASSED] DP
[07:48:16] [PASSED] HDMI-A
[07:48:16] [PASSED] HDMI-B
[07:48:16] [PASSED] TV
[07:48:16] [PASSED] eDP
[07:48:16] [PASSED] Virtual
[07:48:16] [PASSED] DSI
[07:48:16] [PASSED] DPI
[07:48:16] [PASSED] Writeback
[07:48:16] [PASSED] SPI
[07:48:16] [PASSED] USB
[07:48:16] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[07:48:16] ======== drm_test_drm_connector_dynamic_init_name =========
[07:48:16] [PASSED] Unknown
[07:48:16] [PASSED] VGA
[07:48:16] [PASSED] DVI-I
[07:48:16] [PASSED] DVI-D
[07:48:16] [PASSED] DVI-A
[07:48:16] [PASSED] Composite
[07:48:16] [PASSED] SVIDEO
[07:48:16] [PASSED] LVDS
[07:48:16] [PASSED] Component
[07:48:16] [PASSED] DIN
[07:48:16] [PASSED] DP
[07:48:16] [PASSED] HDMI-A
[07:48:16] [PASSED] HDMI-B
[07:48:16] [PASSED] TV
[07:48:16] [PASSED] eDP
[07:48:16] [PASSED] Virtual
[07:48:16] [PASSED] DSI
[07:48:16] [PASSED] DPI
[07:48:16] [PASSED] Writeback
[07:48:16] [PASSED] SPI
[07:48:16] [PASSED] USB
[07:48:16] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[07:48:16] =========== [PASSED] drm_connector_dynamic_init ============
[07:48:16] ==== drm_connector_dynamic_register_early (4 subtests) =====
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[07:48:16] ====== [PASSED] drm_connector_dynamic_register_early =======
[07:48:16] ======= drm_connector_dynamic_register (7 subtests) ========
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[07:48:16] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[07:48:16] ========= [PASSED] drm_connector_dynamic_register ==========
[07:48:16] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[07:48:16] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[07:48:16] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[07:48:16] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[07:48:16] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[07:48:16] ========== drm_test_get_tv_mode_from_name_valid ===========
[07:48:16] [PASSED] NTSC
[07:48:16] [PASSED] NTSC-443
[07:48:16] [PASSED] NTSC-J
[07:48:16] [PASSED] PAL
[07:48:16] [PASSED] PAL-M
[07:48:16] [PASSED] PAL-N
[07:48:16] [PASSED] SECAM
[07:48:16] [PASSED] Mono
[07:48:16] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[07:48:16] [PASSED] drm_test_get_tv_mode_from_name_truncated
[07:48:16] ============ [PASSED] drm_get_tv_mode_from_name ============
[07:48:16] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[07:48:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[07:48:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[07:48:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[07:48:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[07:48:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[07:48:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[07:48:16] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[07:48:16] [PASSED] VIC 96
[07:48:16] [PASSED] VIC 97
[07:48:16] [PASSED] VIC 101
[07:48:16] [PASSED] VIC 102
[07:48:16] [PASSED] VIC 106
[07:48:16] [PASSED] VIC 107
[07:48:16] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[07:48:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[07:48:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[07:48:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[07:48:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[07:48:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[07:48:16] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[07:48:16] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[07:48:16] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[07:48:16] [PASSED] Automatic
[07:48:16] [PASSED] Full
[07:48:16] [PASSED] Limited 16:235
[07:48:16] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[07:48:16] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[07:48:16] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[07:48:16] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[07:48:16] === drm_test_drm_hdmi_connector_get_output_format_name ====
[07:48:16] [PASSED] RGB
[07:48:16] [PASSED] YUV 4:2:0
[07:48:16] [PASSED] YUV 4:2:2
[07:48:16] [PASSED] YUV 4:4:4
[07:48:16] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[07:48:16] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[07:48:16] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[07:48:16] ============= drm_damage_helper (21 subtests) ==============
[07:48:16] [PASSED] drm_test_damage_iter_no_damage
[07:48:16] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[07:48:16] [PASSED] drm_test_damage_iter_no_damage_src_moved
[07:48:16] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[07:48:16] [PASSED] drm_test_damage_iter_no_damage_not_visible
[07:48:16] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[07:48:16] [PASSED] drm_test_damage_iter_no_damage_no_fb
[07:48:16] [PASSED] drm_test_damage_iter_simple_damage
[07:48:16] [PASSED] drm_test_damage_iter_single_damage
[07:48:16] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[07:48:16] [PASSED] drm_test_damage_iter_single_damage_outside_src
[07:48:16] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[07:48:16] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[07:48:16] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[07:48:16] [PASSED] drm_test_damage_iter_single_damage_src_moved
[07:48:16] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[07:48:16] [PASSED] drm_test_damage_iter_damage
[07:48:16] [PASSED] drm_test_damage_iter_damage_one_intersect
[07:48:16] [PASSED] drm_test_damage_iter_damage_one_outside
[07:48:16] [PASSED] drm_test_damage_iter_damage_src_moved
[07:48:16] [PASSED] drm_test_damage_iter_damage_not_visible
[07:48:16] ================ [PASSED] drm_damage_helper ================
[07:48:16] ============== drm_dp_mst_helper (3 subtests) ==============
[07:48:16] ============== drm_test_dp_mst_calc_pbn_mode ==============
[07:48:16] [PASSED] Clock 154000 BPP 30 DSC disabled
[07:48:16] [PASSED] Clock 234000 BPP 30 DSC disabled
[07:48:16] [PASSED] Clock 297000 BPP 24 DSC disabled
[07:48:16] [PASSED] Clock 332880 BPP 24 DSC enabled
[07:48:16] [PASSED] Clock 324540 BPP 24 DSC enabled
[07:48:16] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[07:48:16] ============== drm_test_dp_mst_calc_pbn_div ===============
[07:48:16] [PASSED] Link rate 2000000 lane count 4
[07:48:16] [PASSED] Link rate 2000000 lane count 2
[07:48:16] [PASSED] Link rate 2000000 lane count 1
[07:48:16] [PASSED] Link rate 1350000 lane count 4
[07:48:16] [PASSED] Link rate 1350000 lane count 2
[07:48:16] [PASSED] Link rate 1350000 lane count 1
[07:48:16] [PASSED] Link rate 1000000 lane count 4
[07:48:16] [PASSED] Link rate 1000000 lane count 2
[07:48:16] [PASSED] Link rate 1000000 lane count 1
[07:48:16] [PASSED] Link rate 810000 lane count 4
[07:48:16] [PASSED] Link rate 810000 lane count 2
[07:48:16] [PASSED] Link rate 810000 lane count 1
[07:48:16] [PASSED] Link rate 540000 lane count 4
[07:48:16] [PASSED] Link rate 540000 lane count 2
[07:48:16] [PASSED] Link rate 540000 lane count 1
[07:48:16] [PASSED] Link rate 270000 lane count 4
[07:48:16] [PASSED] Link rate 270000 lane count 2
[07:48:16] [PASSED] Link rate 270000 lane count 1
[07:48:16] [PASSED] Link rate 162000 lane count 4
[07:48:16] [PASSED] Link rate 162000 lane count 2
[07:48:16] [PASSED] Link rate 162000 lane count 1
[07:48:16] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[07:48:16] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[07:48:16] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[07:48:16] [PASSED] DP_POWER_UP_PHY with port number
[07:48:16] [PASSED] DP_POWER_DOWN_PHY with port number
[07:48:16] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[07:48:16] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[07:48:16] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[07:48:16] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[07:48:16] [PASSED] DP_QUERY_PAYLOAD with port number
[07:48:16] [PASSED] DP_QUERY_PAYLOAD with VCPI
[07:48:16] [PASSED] DP_REMOTE_DPCD_READ with port number
[07:48:16] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[07:48:16] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[07:48:16] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[07:48:16] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[07:48:16] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[07:48:16] [PASSED] DP_REMOTE_I2C_READ with port number
[07:48:16] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[07:48:16] [PASSED] DP_REMOTE_I2C_READ with transactions array
[07:48:16] [PASSED] DP_REMOTE_I2C_WRITE with port number
[07:48:16] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[07:48:16] [PASSED] DP_REMOTE_I2C_WRITE with data array
[07:48:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[07:48:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[07:48:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[07:48:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[07:48:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[07:48:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[07:48:16] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[07:48:16] ================ [PASSED] drm_dp_mst_helper ================
[07:48:16] ================== drm_exec (7 subtests) ===================
[07:48:16] [PASSED] sanitycheck
[07:48:16] [PASSED] test_lock
[07:48:16] [PASSED] test_lock_unlock
[07:48:16] [PASSED] test_duplicates
[07:48:16] [PASSED] test_prepare
[07:48:16] [PASSED] test_prepare_array
[07:48:16] [PASSED] test_multiple_loops
[07:48:16] ==================== [PASSED] drm_exec =====================
[07:48:16] =========== drm_format_helper_test (18 subtests) ===========
[07:48:16] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[07:48:16] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[07:48:16] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[07:48:16] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[07:48:16] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[07:48:16] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[07:48:16] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[07:48:16] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[07:48:16] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[07:48:16] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[07:48:16] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[07:48:16] ============== drm_test_fb_xrgb8888_to_mono ===============
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[07:48:16] ==================== drm_test_fb_swab =====================
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ================ [PASSED] drm_test_fb_swab =================
[07:48:16] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[07:48:16] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[07:48:16] [PASSED] single_pixel_source_buffer
[07:48:16] [PASSED] single_pixel_clip_rectangle
[07:48:16] [PASSED] well_known_colors
[07:48:16] [PASSED] destination_pitch
[07:48:16] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[07:48:16] ================= drm_test_fb_clip_offset =================
[07:48:16] [PASSED] pass through
[07:48:16] [PASSED] horizontal offset
[07:48:16] [PASSED] vertical offset
[07:48:16] [PASSED] horizontal and vertical offset
[07:48:16] [PASSED] horizontal offset (custom pitch)
[07:48:16] [PASSED] vertical offset (custom pitch)
[07:48:16] [PASSED] horizontal and vertical offset (custom pitch)
[07:48:16] ============= [PASSED] drm_test_fb_clip_offset =============
[07:48:16] ============== drm_test_fb_build_fourcc_list ==============
[07:48:16] [PASSED] no native formats
[07:48:16] [PASSED] XRGB8888 as native format
[07:48:16] [PASSED] remove duplicates
[07:48:16] [PASSED] convert alpha formats
[07:48:16] [PASSED] random formats
[07:48:16] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[07:48:16] =================== drm_test_fb_memcpy ====================
[07:48:16] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[07:48:16] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[07:48:16] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[07:48:16] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[07:48:16] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[07:48:16] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[07:48:16] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[07:48:16] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[07:48:16] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[07:48:16] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[07:48:16] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[07:48:16] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[07:48:16] =============== [PASSED] drm_test_fb_memcpy ================
[07:48:16] ============= [PASSED] drm_format_helper_test ==============
[07:48:16] ================= drm_format (18 subtests) =================
[07:48:16] [PASSED] drm_test_format_block_width_invalid
[07:48:16] [PASSED] drm_test_format_block_width_one_plane
[07:48:16] [PASSED] drm_test_format_block_width_two_plane
[07:48:16] [PASSED] drm_test_format_block_width_three_plane
[07:48:16] [PASSED] drm_test_format_block_width_tiled
[07:48:16] [PASSED] drm_test_format_block_height_invalid
[07:48:16] [PASSED] drm_test_format_block_height_one_plane
[07:48:16] [PASSED] drm_test_format_block_height_two_plane
[07:48:16] [PASSED] drm_test_format_block_height_three_plane
[07:48:16] [PASSED] drm_test_format_block_height_tiled
[07:48:16] [PASSED] drm_test_format_min_pitch_invalid
[07:48:16] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[07:48:16] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[07:48:16] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[07:48:16] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[07:48:16] [PASSED] drm_test_format_min_pitch_two_plane
[07:48:16] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[07:48:16] [PASSED] drm_test_format_min_pitch_tiled
[07:48:16] =================== [PASSED] drm_format ====================
[07:48:16] ============== drm_framebuffer (10 subtests) ===============
[07:48:16] ========== drm_test_framebuffer_check_src_coords ==========
[07:48:16] [PASSED] Success: source fits into fb
[07:48:16] [PASSED] Fail: overflowing fb with x-axis coordinate
[07:48:16] [PASSED] Fail: overflowing fb with y-axis coordinate
[07:48:16] [PASSED] Fail: overflowing fb with source width
[07:48:16] [PASSED] Fail: overflowing fb with source height
[07:48:16] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[07:48:16] [PASSED] drm_test_framebuffer_cleanup
[07:48:16] =============== drm_test_framebuffer_create ===============
[07:48:16] [PASSED] ABGR8888 normal sizes
[07:48:16] [PASSED] ABGR8888 max sizes
[07:48:16] [PASSED] ABGR8888 pitch greater than min required
[07:48:16] [PASSED] ABGR8888 pitch less than min required
[07:48:16] [PASSED] ABGR8888 Invalid width
[07:48:16] [PASSED] ABGR8888 Invalid buffer handle
[07:48:16] [PASSED] No pixel format
[07:48:16] [PASSED] ABGR8888 Width 0
[07:48:16] [PASSED] ABGR8888 Height 0
[07:48:16] [PASSED] ABGR8888 Out of bound height * pitch combination
[07:48:16] [PASSED] ABGR8888 Large buffer offset
[07:48:16] [PASSED] ABGR8888 Buffer offset for inexistent plane
[07:48:16] [PASSED] ABGR8888 Invalid flag
[07:48:16] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[07:48:16] [PASSED] ABGR8888 Valid buffer modifier
[07:48:16] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[07:48:16] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[07:48:16] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[07:48:16] [PASSED] NV12 Normal sizes
[07:48:16] [PASSED] NV12 Max sizes
[07:48:16] [PASSED] NV12 Invalid pitch
[07:48:16] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[07:48:16] [PASSED] NV12 different modifier per-plane
[07:48:16] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[07:48:16] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[07:48:16] [PASSED] NV12 Modifier for inexistent plane
[07:48:16] [PASSED] NV12 Handle for inexistent plane
[07:48:16] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[07:48:16] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[07:48:16] [PASSED] YVU420 Normal sizes
[07:48:16] [PASSED] YVU420 Max sizes
[07:48:16] [PASSED] YVU420 Invalid pitch
[07:48:16] [PASSED] YVU420 Different pitches
[07:48:16] [PASSED] YVU420 Different buffer offsets/pitches
[07:48:16] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[07:48:16] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[07:48:16] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[07:48:16] [PASSED] YVU420 Valid modifier
[07:48:16] [PASSED] YVU420 Different modifiers per plane
[07:48:16] [PASSED] YVU420 Modifier for inexistent plane
[07:48:16] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[07:48:16] [PASSED] X0L2 Normal sizes
[07:48:16] [PASSED] X0L2 Max sizes
[07:48:16] [PASSED] X0L2 Invalid pitch
[07:48:16] [PASSED] X0L2 Pitch greater than minimum required
[07:48:16] [PASSED] X0L2 Handle for inexistent plane
[07:48:16] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[07:48:16] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[07:48:16] [PASSED] X0L2 Valid modifier
[07:48:16] [PASSED] X0L2 Modifier for inexistent plane
[07:48:16] =========== [PASSED] drm_test_framebuffer_create ===========
[07:48:16] [PASSED] drm_test_framebuffer_free
[07:48:16] [PASSED] drm_test_framebuffer_init
[07:48:16] [PASSED] drm_test_framebuffer_init_bad_format
[07:48:16] [PASSED] drm_test_framebuffer_init_dev_mismatch
[07:48:16] [PASSED] drm_test_framebuffer_lookup
[07:48:16] [PASSED] drm_test_framebuffer_lookup_inexistent
[07:48:16] [PASSED] drm_test_framebuffer_modifiers_not_supported
[07:48:16] ================= [PASSED] drm_framebuffer =================
[07:48:16] ================ drm_gem_shmem (8 subtests) ================
[07:48:16] [PASSED] drm_gem_shmem_test_obj_create
[07:48:16] [PASSED] drm_gem_shmem_test_obj_create_private
[07:48:16] [PASSED] drm_gem_shmem_test_pin_pages
[07:48:16] [PASSED] drm_gem_shmem_test_vmap
[07:48:16] [PASSED] drm_gem_shmem_test_get_pages_sgt
[07:48:16] [PASSED] drm_gem_shmem_test_get_sg_table
[07:48:16] [PASSED] drm_gem_shmem_test_madvise
[07:48:16] [PASSED] drm_gem_shmem_test_purge
[07:48:16] ================== [PASSED] drm_gem_shmem ==================
[07:48:16] === drm_atomic_helper_connector_hdmi_check (23 subtests) ===
[07:48:16] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[07:48:16] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[07:48:16] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[07:48:16] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[07:48:16] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[07:48:16] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[07:48:16] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[07:48:16] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[07:48:16] [PASSED] drm_test_check_disable_connector
[07:48:16] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[07:48:16] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback
[07:48:16] [PASSED] drm_test_check_max_tmds_rate_format_fallback
[07:48:16] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[07:48:16] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[07:48:16] [PASSED] drm_test_check_output_bpc_dvi
[07:48:16] [PASSED] drm_test_check_output_bpc_format_vic_1
[07:48:16] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[07:48:16] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[07:48:16] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[07:48:16] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[07:48:16] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[07:48:16] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[07:48:16] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[07:48:16] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[07:48:16] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[07:48:16] [PASSED] drm_test_check_broadcast_rgb_value
[07:48:16] [PASSED] drm_test_check_bpc_8_value
[07:48:16] [PASSED] drm_test_check_bpc_10_value
[07:48:16] [PASSED] drm_test_check_bpc_12_value
[07:48:16] [PASSED] drm_test_check_format_value
[07:48:16] [PASSED] drm_test_check_tmds_char_value
[07:48:16] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[07:48:16] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[07:48:16] [PASSED] drm_test_check_mode_valid
[07:48:16] [PASSED] drm_test_check_mode_valid_reject
[07:48:16] [PASSED] drm_test_check_mode_valid_reject_rate
[07:48:16] [PASSED] drm_test_check_mode_valid_reject_max_clock
[07:48:16] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[07:48:16] ================= drm_managed (2 subtests) =================
[07:48:16] [PASSED] drm_test_managed_release_action
[07:48:16] [PASSED] drm_test_managed_run_action
[07:48:16] =================== [PASSED] drm_managed ===================
[07:48:16] =================== drm_mm (6 subtests) ====================
[07:48:16] [PASSED] drm_test_mm_init
[07:48:16] [PASSED] drm_test_mm_debug
[07:48:16] [PASSED] drm_test_mm_align32
[07:48:16] [PASSED] drm_test_mm_align64
[07:48:16] [PASSED] drm_test_mm_lowest
[07:48:16] [PASSED] drm_test_mm_highest
[07:48:16] ===================== [PASSED] drm_mm ======================
[07:48:16] ============= drm_modes_analog_tv (5 subtests) =============
[07:48:16] [PASSED] drm_test_modes_analog_tv_mono_576i
[07:48:16] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[07:48:16] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[07:48:16] [PASSED] drm_test_modes_analog_tv_pal_576i
[07:48:16] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[07:48:16] =============== [PASSED] drm_modes_analog_tv ===============
[07:48:16] ============== drm_plane_helper (2 subtests) ===============
[07:48:16] =============== drm_test_check_plane_state ================
[07:48:16] [PASSED] clipping_simple
[07:48:16] [PASSED] clipping_rotate_reflect
[07:48:16] [PASSED] positioning_simple
[07:48:16] [PASSED] upscaling
[07:48:16] [PASSED] downscaling
[07:48:16] [PASSED] rounding1
[07:48:16] [PASSED] rounding2
[07:48:16] [PASSED] rounding3
[07:48:16] [PASSED] rounding4
[07:48:16] =========== [PASSED] drm_test_check_plane_state ============
[07:48:16] =========== drm_test_check_invalid_plane_state ============
[07:48:16] [PASSED] positioning_invalid
[07:48:16] [PASSED] upscaling_invalid
[07:48:16] [PASSED] downscaling_invalid
[07:48:16] ======= [PASSED] drm_test_check_invalid_plane_state ========
[07:48:16] ================ [PASSED] drm_plane_helper =================
[07:48:16] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[07:48:16] ====== drm_test_connector_helper_tv_get_modes_check =======
[07:48:16] [PASSED] None
[07:48:16] [PASSED] PAL
[07:48:16] [PASSED] NTSC
[07:48:16] [PASSED] Both, NTSC Default
[07:48:16] [PASSED] Both, PAL Default
[07:48:16] [PASSED] Both, NTSC Default, with PAL on command-line
[07:48:16] [PASSED] Both, PAL Default, with NTSC on command-line
[07:48:16] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[07:48:16] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[07:48:16] ================== drm_rect (9 subtests) ===================
[07:48:16] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[07:48:16] [PASSED] drm_test_rect_clip_scaled_not_clipped
[07:48:16] [PASSED] drm_test_rect_clip_scaled_clipped
[07:48:16] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[07:48:16] ================= drm_test_rect_intersect =================
[07:48:16] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[07:48:16] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[07:48:16] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[07:48:16] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[07:48:16] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[07:48:16] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[07:48:16] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[07:48:16] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[07:48:16] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[07:48:16] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[07:48:16] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[07:48:16] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[07:48:16] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[07:48:16] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[07:48:16] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[07:48:16] ============= [PASSED] drm_test_rect_intersect =============
[07:48:16] ================ drm_test_rect_calc_hscale ================
[07:48:16] [PASSED] normal use
[07:48:16] [PASSED] out of max range
[07:48:16] [PASSED] out of min range
[07:48:16] [PASSED] zero dst
[07:48:16] [PASSED] negative src
[07:48:16] [PASSED] negative dst
[07:48:16] ============ [PASSED] drm_test_rect_calc_hscale ============
[07:48:16] ================ drm_test_rect_calc_vscale ================
[07:48:16] [PASSED] normal use
[07:48:16] [PASSED] out of max range
[07:48:16] [PASSED] out of min range
[07:48:16] [PASSED] zero dst
[07:48:16] [PASSED] negative src
[07:48:16] [PASSED] negative dst
[07:48:16] ============ [PASSED] drm_test_rect_calc_vscale ============
[07:48:16] ================== drm_test_rect_rotate ===================
[07:48:16] [PASSED] reflect-x
[07:48:16] [PASSED] reflect-y
[07:48:16] [PASSED] rotate-0
[07:48:16] [PASSED] rotate-90
[07:48:16] [PASSED] rotate-180
[07:48:16] [PASSED] rotate-270
[07:48:16] ============== [PASSED] drm_test_rect_rotate ===============
[07:48:16] ================ drm_test_rect_rotate_inv =================
[07:48:16] [PASSED] reflect-x
[07:48:16] [PASSED] reflect-y
[07:48:16] [PASSED] rotate-0
[07:48:16] [PASSED] rotate-90
[07:48:16] [PASSED] rotate-180
[07:48:16] [PASSED] rotate-270
[07:48:16] ============ [PASSED] drm_test_rect_rotate_inv =============
stty: 'standard input': Inappropriate ioctl for device
[07:48:16] ==================== [PASSED] drm_rect =====================
[07:48:16] ============================================================
[07:48:16] Testing complete. Ran 608 tests: passed: 608
[07:48:16] Elapsed time: 23.355s total, 1.748s configuring, 21.440s building, 0.144s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[07:48:16] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[07:48:17] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[07:48:25] Starting KUnit Kernel (1/1)...
[07:48:25] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[07:48:25] ================= ttm_device (5 subtests) ==================
[07:48:25] [PASSED] ttm_device_init_basic
[07:48:25] [PASSED] ttm_device_init_multiple
[07:48:25] [PASSED] ttm_device_fini_basic
[07:48:25] [PASSED] ttm_device_init_no_vma_man
[07:48:25] ================== ttm_device_init_pools ==================
[07:48:25] [PASSED] No DMA allocations, no DMA32 required
[07:48:25] [PASSED] DMA allocations, DMA32 required
[07:48:25] [PASSED] No DMA allocations, DMA32 required
[07:48:25] [PASSED] DMA allocations, no DMA32 required
[07:48:25] ============== [PASSED] ttm_device_init_pools ==============
[07:48:25] =================== [PASSED] ttm_device ====================
[07:48:25] ================== ttm_pool (8 subtests) ===================
[07:48:25] ================== ttm_pool_alloc_basic ===================
[07:48:25] [PASSED] One page
[07:48:25] [PASSED] More than one page
[07:48:25] [PASSED] Above the allocation limit
[07:48:25] [PASSED] One page, with coherent DMA mappings enabled
[07:48:25] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:48:25] ============== [PASSED] ttm_pool_alloc_basic ===============
[07:48:25] ============== ttm_pool_alloc_basic_dma_addr ==============
[07:48:25] [PASSED] One page
[07:48:25] [PASSED] More than one page
[07:48:25] [PASSED] Above the allocation limit
[07:48:25] [PASSED] One page, with coherent DMA mappings enabled
[07:48:25] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[07:48:25] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[07:48:25] [PASSED] ttm_pool_alloc_order_caching_match
[07:48:25] [PASSED] ttm_pool_alloc_caching_mismatch
[07:48:25] [PASSED] ttm_pool_alloc_order_mismatch
[07:48:25] [PASSED] ttm_pool_free_dma_alloc
[07:48:25] [PASSED] ttm_pool_free_no_dma_alloc
[07:48:25] [PASSED] ttm_pool_fini_basic
[07:48:25] ==================== [PASSED] ttm_pool =====================
[07:48:25] ================ ttm_resource (8 subtests) =================
[07:48:25] ================= ttm_resource_init_basic =================
[07:48:25] [PASSED] Init resource in TTM_PL_SYSTEM
[07:48:25] [PASSED] Init resource in TTM_PL_VRAM
[07:48:25] [PASSED] Init resource in a private placement
[07:48:25] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[07:48:25] ============= [PASSED] ttm_resource_init_basic =============
[07:48:25] [PASSED] ttm_resource_init_pinned
[07:48:25] [PASSED] ttm_resource_fini_basic
[07:48:25] [PASSED] ttm_resource_manager_init_basic
[07:48:25] [PASSED] ttm_resource_manager_usage_basic
[07:48:25] [PASSED] ttm_resource_manager_set_used_basic
[07:48:25] [PASSED] ttm_sys_man_alloc_basic
[07:48:25] [PASSED] ttm_sys_man_free_basic
[07:48:25] ================== [PASSED] ttm_resource ===================
[07:48:25] =================== ttm_tt (15 subtests) ===================
[07:48:25] ==================== ttm_tt_init_basic ====================
[07:48:25] [PASSED] Page-aligned size
[07:48:25] [PASSED] Extra pages requested
[07:48:25] ================ [PASSED] ttm_tt_init_basic ================
[07:48:25] [PASSED] ttm_tt_init_misaligned
[07:48:25] [PASSED] ttm_tt_fini_basic
[07:48:25] [PASSED] ttm_tt_fini_sg
[07:48:25] [PASSED] ttm_tt_fini_shmem
[07:48:25] [PASSED] ttm_tt_create_basic
[07:48:25] [PASSED] ttm_tt_create_invalid_bo_type
[07:48:25] [PASSED] ttm_tt_create_ttm_exists
[07:48:25] [PASSED] ttm_tt_create_failed
[07:48:25] [PASSED] ttm_tt_destroy_basic
[07:48:25] [PASSED] ttm_tt_populate_null_ttm
[07:48:25] [PASSED] ttm_tt_populate_populated_ttm
[07:48:25] [PASSED] ttm_tt_unpopulate_basic
[07:48:25] [PASSED] ttm_tt_unpopulate_empty_ttm
[07:48:25] [PASSED] ttm_tt_swapin_basic
[07:48:25] ===================== [PASSED] ttm_tt ======================
[07:48:25] =================== ttm_bo (14 subtests) ===================
[07:48:25] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[07:48:25] [PASSED] Cannot be interrupted and sleeps
[07:48:25] [PASSED] Cannot be interrupted, locks straight away
[07:48:25] [PASSED] Can be interrupted, sleeps
[07:48:25] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[07:48:25] [PASSED] ttm_bo_reserve_locked_no_sleep
[07:48:25] [PASSED] ttm_bo_reserve_no_wait_ticket
[07:48:26] [PASSED] ttm_bo_reserve_double_resv
[07:48:26] [PASSED] ttm_bo_reserve_interrupted
[07:48:26] [PASSED] ttm_bo_reserve_deadlock
[07:48:26] [PASSED] ttm_bo_unreserve_basic
[07:48:26] [PASSED] ttm_bo_unreserve_pinned
[07:48:26] [PASSED] ttm_bo_unreserve_bulk
[07:48:26] [PASSED] ttm_bo_put_basic
[07:48:26] [PASSED] ttm_bo_put_shared_resv
[07:48:26] [PASSED] ttm_bo_pin_basic
[07:48:26] [PASSED] ttm_bo_pin_unpin_resource
[07:48:26] [PASSED] ttm_bo_multiple_pin_one_unpin
[07:48:26] ===================== [PASSED] ttm_bo ======================
[07:48:26] ============== ttm_bo_validate (22 subtests) ===============
[07:48:26] ============== ttm_bo_init_reserved_sys_man ===============
[07:48:26] [PASSED] Buffer object for userspace
[07:48:26] [PASSED] Kernel buffer object
[07:48:26] [PASSED] Shared buffer object
[07:48:26] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[07:48:26] ============== ttm_bo_init_reserved_mock_man ==============
[07:48:26] [PASSED] Buffer object for userspace
[07:48:26] [PASSED] Kernel buffer object
[07:48:26] [PASSED] Shared buffer object
[07:48:26] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[07:48:26] [PASSED] ttm_bo_init_reserved_resv
[07:48:26] ================== ttm_bo_validate_basic ==================
[07:48:26] [PASSED] Buffer object for userspace
[07:48:26] [PASSED] Kernel buffer object
[07:48:26] [PASSED] Shared buffer object
[07:48:26] ============== [PASSED] ttm_bo_validate_basic ==============
[07:48:26] [PASSED] ttm_bo_validate_invalid_placement
[07:48:26] ============= ttm_bo_validate_same_placement ==============
[07:48:26] [PASSED] System manager
[07:48:26] [PASSED] VRAM manager
[07:48:26] ========= [PASSED] ttm_bo_validate_same_placement ==========
[07:48:26] [PASSED] ttm_bo_validate_failed_alloc
[07:48:26] [PASSED] ttm_bo_validate_pinned
[07:48:26] [PASSED] ttm_bo_validate_busy_placement
[07:48:26] ================ ttm_bo_validate_multihop =================
[07:48:26] [PASSED] Buffer object for userspace
[07:48:26] [PASSED] Kernel buffer object
[07:48:26] [PASSED] Shared buffer object
[07:48:26] ============ [PASSED] ttm_bo_validate_multihop =============
[07:48:26] ========== ttm_bo_validate_no_placement_signaled ==========
[07:48:26] [PASSED] Buffer object in system domain, no page vector
[07:48:26] [PASSED] Buffer object in system domain with an existing page vector
[07:48:26] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[07:48:26] ======== ttm_bo_validate_no_placement_not_signaled ========
[07:48:26] [PASSED] Buffer object for userspace
[07:48:26] [PASSED] Kernel buffer object
[07:48:26] [PASSED] Shared buffer object
[07:48:26] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[07:48:26] [PASSED] ttm_bo_validate_move_fence_signaled
[07:48:26] ========= ttm_bo_validate_move_fence_not_signaled =========
[07:48:26] [PASSED] Waits for GPU
[07:48:26] [PASSED] Tries to lock straight away
[07:48:26] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[07:48:26] [PASSED] ttm_bo_validate_swapout
[07:48:26] [PASSED] ttm_bo_validate_happy_evict
[07:48:26] [PASSED] ttm_bo_validate_all_pinned_evict
[07:48:26] [PASSED] ttm_bo_validate_allowed_only_evict
[07:48:26] [PASSED] ttm_bo_validate_deleted_evict
[07:48:26] [PASSED] ttm_bo_validate_busy_domain_evict
[07:48:26] [PASSED] ttm_bo_validate_evict_gutting
[07:48:26] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[07:48:26] ================= [PASSED] ttm_bo_validate =================
[07:48:26] ============================================================
[07:48:26] Testing complete. Ran 102 tests: passed: 102
[07:48:26] Elapsed time: 10.282s total, 1.729s configuring, 7.935s building, 0.534s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 38+ messages in thread* ✗ Fi.CI.CHECKPATCH: warning for DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (16 preceding siblings ...)
2025-05-15 7:48 ` ✓ CI.KUnit: success " Patchwork
@ 2025-05-15 7:51 ` Patchwork
2025-05-15 7:51 ` ✗ Fi.CI.SPARSE: " Patchwork
` (12 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-15 7:51 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-gfx
== Series Details ==
Series: DPLL framework redesign
URL : https://patchwork.freedesktop.org/series/149052/
State : warning
== Summary ==
Error: dim checkpatch failed
c8fd0a76fae2 drm/i915/dpll: Rename intel_dpll
f2f768c37475 drm/i915/dpll: Rename intel_dpll_funcs
62446e56b431 drm/i915/dpll: Rename intel_shared_dpll_state
be6f1f619ffc drm/i915/dpll: Rename macro for_each_shared_dpll
-:103: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#103: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.h:33:
+#define for_each_dpll(__display, __pll, __i) \
for ((__i) = 0; (__i) < (__display)->dpll.num_shared_dpll && \
((__pll) = &(__display)->dpll.shared_dplls[(__i)]) ; (__i)++)
-:103: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#103: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.h:33:
+#define for_each_dpll(__display, __pll, __i) \
for ((__i) = 0; (__i) < (__display)->dpll.num_shared_dpll && \
((__pll) = &(__display)->dpll.shared_dplls[(__i)]) ; (__i)++)
total: 0 errors, 0 warnings, 2 checks, 81 lines checked
fdb7eb744fc2 drm/i915/dpll: Rename intel_shared_dpll_funcs
30f7b1e101da drm/i915/dpll: Rename intel_shared_dpll
9b2e11873e90 drm/i915/dpll: Move away from using shared dpll
495e129328ba drm/i915/dpll: Rename crtc_get_shared_dpll
b46019338007 drm/i915/dpll: Rename intel_[enable/disable]_dpll
bad908ede2e9 drm/i915/dpll: Rename intel_unreference_dpll_crtc
dad4e80c80f4 drm/i915/dpll: Rename intel_reference_dpll_crtc
4ccaa1997e75 drm/i915/dpll: Rename intel_<release/reserve>_dpll
4ff1c7ce6d10 drm/i915/dpll: Rename intel_compute_dpll
2cf687ea9faf drm/i915/dpll: Rename intel_update_active_dpll
^ permalink raw reply [flat|nested] 38+ messages in thread* ✗ Fi.CI.SPARSE: warning for DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (17 preceding siblings ...)
2025-05-15 7:51 ` ✗ Fi.CI.CHECKPATCH: warning " Patchwork
@ 2025-05-15 7:51 ` Patchwork
2025-05-15 7:58 ` ✓ CI.Build: success " Patchwork
` (11 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-15 7:51 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-gfx
== Series Details ==
Series: DPLL framework redesign
URL : https://patchwork.freedesktop.org/series/149052/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 38+ messages in thread* ✓ CI.Build: success for DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (18 preceding siblings ...)
2025-05-15 7:51 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2025-05-15 7:58 ` Patchwork
2025-05-15 8:01 ` ✓ CI.Hooks: " Patchwork
` (10 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-15 7:58 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
== Series Details ==
Series: DPLL framework redesign
URL : https://patchwork.freedesktop.org/series/149051/
State : success
^ permalink raw reply [flat|nested] 38+ messages in thread* ✓ CI.Hooks: success for DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (19 preceding siblings ...)
2025-05-15 7:58 ` ✓ CI.Build: success " Patchwork
@ 2025-05-15 8:01 ` Patchwork
2025-05-15 8:03 ` ✓ CI.checksparse: " Patchwork
` (9 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-15 8:01 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
== Series Details ==
Series: DPLL framework redesign
URL : https://patchwork.freedesktop.org/series/149051/
State : success
== Summary ==
run-parts: executing /workspace/ci/hooks/00-showenv
+ export
+ grep -Ei '(^|\W)CI_'
declare -x CI_KERNEL_BUILD_DIR="/workspace/kernel/build64-debug"
declare -x CI_KERNEL_SRC_DIR="/workspace/kernel"
declare -x CI_TOOLS_SRC_DIR="/workspace/ci"
declare -x CI_WORKSPACE_DIR="/workspace"
run-parts: executing /workspace/ci/hooks/10-build-W1
+ SRC_DIR=/workspace/kernel
+ RESTORE_DISPLAY_CONFIG=0
+ '[' -n /workspace/kernel/build64-debug ']'
+ BUILD_DIR=/workspace/kernel/build64-debug
+ cd /workspace/kernel
++ nproc
+ make -j48 O=/workspace/kernel/build64-debug modules_prepare
make[1]: Entering directory '/workspace/kernel/build64-debug'
GEN Makefile
DESCEND objtool
CALL ../scripts/checksyscalls.sh
INSTALL libsubcmd_headers
CC /workspace/kernel/build64-debug/tools/objtool/libsubcmd/exec-cmd.o
CC /workspace/kernel/build64-debug/tools/objtool/libsubcmd/help.o
CC /workspace/kernel/build64-debug/tools/objtool/libsubcmd/pager.o
CC /workspace/kernel/build64-debug/tools/objtool/libsubcmd/parse-options.o
CC /workspace/kernel/build64-debug/tools/objtool/libsubcmd/run-command.o
CC /workspace/kernel/build64-debug/tools/objtool/libsubcmd/sigchain.o
CC /workspace/kernel/build64-debug/tools/objtool/libsubcmd/subcmd-config.o
LD /workspace/kernel/build64-debug/tools/objtool/libsubcmd/libsubcmd-in.o
AR /workspace/kernel/build64-debug/tools/objtool/libsubcmd/libsubcmd.a
CC /workspace/kernel/build64-debug/tools/objtool/weak.o
CC /workspace/kernel/build64-debug/tools/objtool/check.o
CC /workspace/kernel/build64-debug/tools/objtool/special.o
CC /workspace/kernel/build64-debug/tools/objtool/builtin-check.o
CC /workspace/kernel/build64-debug/tools/objtool/arch/x86/special.o
CC /workspace/kernel/build64-debug/tools/objtool/elf.o
CC /workspace/kernel/build64-debug/tools/objtool/arch/x86/decode.o
CC /workspace/kernel/build64-debug/tools/objtool/objtool.o
CC /workspace/kernel/build64-debug/tools/objtool/orc_gen.o
CC /workspace/kernel/build64-debug/tools/objtool/arch/x86/orc.o
CC /workspace/kernel/build64-debug/tools/objtool/orc_dump.o
CC /workspace/kernel/build64-debug/tools/objtool/libstring.o
CC /workspace/kernel/build64-debug/tools/objtool/libctype.o
CC /workspace/kernel/build64-debug/tools/objtool/str_error_r.o
CC /workspace/kernel/build64-debug/tools/objtool/librbtree.o
LD /workspace/kernel/build64-debug/tools/objtool/arch/x86/objtool-in.o
LD /workspace/kernel/build64-debug/tools/objtool/objtool-in.o
LINK /workspace/kernel/build64-debug/tools/objtool/objtool
make[1]: Leaving directory '/workspace/kernel/build64-debug'
++ nproc
+ make -j48 O=/workspace/kernel/build64-debug W=1 drivers/gpu/drm/xe
make[1]: Entering directory '/workspace/kernel/build64-debug'
make[2]: Nothing to be done for 'drivers/gpu/drm/xe'.
make[1]: Leaving directory '/workspace/kernel/build64-debug'
run-parts: executing /workspace/ci/hooks/11-build-32b
+++ realpath /workspace/ci/hooks/11-build-32b
++ dirname /workspace/ci/hooks/11-build-32b
+ THIS_SCRIPT_DIR=/workspace/ci/hooks
+ SRC_DIR=/workspace/kernel
+ TOOLS_SRC_DIR=/workspace/ci
+ '[' -n /workspace/kernel/build64-debug ']'
+ BUILD_DIR=/workspace/kernel/build64-debug
+ BUILD_DIR=/workspace/kernel/build64-debug/build32
+ cd /workspace/kernel
+ mkdir -p /workspace/kernel/build64-debug/build32
++ nproc
+ make -j48 ARCH=i386 O=/workspace/kernel/build64-debug/build32 defconfig
make[1]: Entering directory '/workspace/kernel/build64-debug/build32'
GEN Makefile
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.[ch]
HOSTCC scripts/kconfig/menu.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTCC scripts/kconfig/util.o
HOSTCC scripts/kconfig/lexer.lex.o
HOSTCC scripts/kconfig/parser.tab.o
HOSTLD scripts/kconfig/conf
*** Default configuration is based on 'i386_defconfig'
#
# configuration written to .config
#
make[1]: Leaving directory '/workspace/kernel/build64-debug/build32'
+ cd /workspace/kernel/build64-debug/build32
+ /workspace/kernel/scripts/kconfig/merge_config.sh .config /workspace/ci/kernel/fragments/10-xe.fragment
Using .config as base
Merging /workspace/ci/kernel/fragments/10-xe.fragment
Value of CONFIG_DRM_XE is redefined by fragment /workspace/ci/kernel/fragments/10-xe.fragment:
Previous value: # CONFIG_DRM_XE is not set
New value: CONFIG_DRM_XE=m
GEN Makefile
#
# configuration written to .config
#
Value requested for CONFIG_HAVE_UID16 not in final .config
Requested value: CONFIG_HAVE_UID16=y
Actual value:
Value requested for CONFIG_UID16 not in final .config
Requested value: CONFIG_UID16=y
Actual value:
Value requested for CONFIG_X86_32 not in final .config
Requested value: CONFIG_X86_32=y
Actual value:
Value requested for CONFIG_OUTPUT_FORMAT not in final .config
Requested value: CONFIG_OUTPUT_FORMAT="elf32-i386"
Actual value: CONFIG_OUTPUT_FORMAT="elf64-x86-64"
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MIN not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MIN=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MIN=28
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MAX not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MAX=16
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MAX=32
Value requested for CONFIG_PGTABLE_LEVELS not in final .config
Requested value: CONFIG_PGTABLE_LEVELS=2
Actual value: CONFIG_PGTABLE_LEVELS=5
Value requested for CONFIG_X86_INTEL_QUARK not in final .config
Requested value: # CONFIG_X86_INTEL_QUARK is not set
Actual value:
Value requested for CONFIG_X86_RDC321X not in final .config
Requested value: # CONFIG_X86_RDC321X is not set
Actual value:
Value requested for CONFIG_X86_32_IRIS not in final .config
Requested value: # CONFIG_X86_32_IRIS is not set
Actual value:
Value requested for CONFIG_M486SX not in final .config
Requested value: # CONFIG_M486SX is not set
Actual value:
Value requested for CONFIG_M486 not in final .config
Requested value: # CONFIG_M486 is not set
Actual value:
Value requested for CONFIG_M586 not in final .config
Requested value: # CONFIG_M586 is not set
Actual value:
Value requested for CONFIG_M586TSC not in final .config
Requested value: # CONFIG_M586TSC is not set
Actual value:
Value requested for CONFIG_M586MMX not in final .config
Requested value: # CONFIG_M586MMX is not set
Actual value:
Value requested for CONFIG_M686 not in final .config
Requested value: CONFIG_M686=y
Actual value:
Value requested for CONFIG_MPENTIUMII not in final .config
Requested value: # CONFIG_MPENTIUMII is not set
Actual value:
Value requested for CONFIG_MPENTIUMIII not in final .config
Requested value: # CONFIG_MPENTIUMIII is not set
Actual value:
Value requested for CONFIG_MPENTIUMM not in final .config
Requested value: # CONFIG_MPENTIUMM is not set
Actual value:
Value requested for CONFIG_MPENTIUM4 not in final .config
Requested value: # CONFIG_MPENTIUM4 is not set
Actual value:
Value requested for CONFIG_MK6 not in final .config
Requested value: # CONFIG_MK6 is not set
Actual value:
Value requested for CONFIG_MK7 not in final .config
Requested value: # CONFIG_MK7 is not set
Actual value:
Value requested for CONFIG_MCRUSOE not in final .config
Requested value: # CONFIG_MCRUSOE is not set
Actual value:
Value requested for CONFIG_MEFFICEON not in final .config
Requested value: # CONFIG_MEFFICEON is not set
Actual value:
Value requested for CONFIG_MWINCHIPC6 not in final .config
Requested value: # CONFIG_MWINCHIPC6 is not set
Actual value:
Value requested for CONFIG_MWINCHIP3D not in final .config
Requested value: # CONFIG_MWINCHIP3D is not set
Actual value:
Value requested for CONFIG_MELAN not in final .config
Requested value: # CONFIG_MELAN is not set
Actual value:
Value requested for CONFIG_MGEODEGX1 not in final .config
Requested value: # CONFIG_MGEODEGX1 is not set
Actual value:
Value requested for CONFIG_MGEODE_LX not in final .config
Requested value: # CONFIG_MGEODE_LX is not set
Actual value:
Value requested for CONFIG_MCYRIXIII not in final .config
Requested value: # CONFIG_MCYRIXIII is not set
Actual value:
Value requested for CONFIG_MVIAC3_2 not in final .config
Requested value: # CONFIG_MVIAC3_2 is not set
Actual value:
Value requested for CONFIG_MVIAC7 not in final .config
Requested value: # CONFIG_MVIAC7 is not set
Actual value:
Value requested for CONFIG_MATOM not in final .config
Requested value: # CONFIG_MATOM is not set
Actual value:
Value requested for CONFIG_X86_GENERIC not in final .config
Requested value: # CONFIG_X86_GENERIC is not set
Actual value:
Value requested for CONFIG_X86_INTERNODE_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_INTERNODE_CACHE_SHIFT=5
Actual value: CONFIG_X86_INTERNODE_CACHE_SHIFT=6
Value requested for CONFIG_X86_L1_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_L1_CACHE_SHIFT=5
Actual value: CONFIG_X86_L1_CACHE_SHIFT=6
Value requested for CONFIG_X86_USE_PPRO_CHECKSUM not in final .config
Requested value: CONFIG_X86_USE_PPRO_CHECKSUM=y
Actual value:
Value requested for CONFIG_X86_MINIMUM_CPU_FAMILY not in final .config
Requested value: CONFIG_X86_MINIMUM_CPU_FAMILY=6
Actual value: CONFIG_X86_MINIMUM_CPU_FAMILY=64
Value requested for CONFIG_CPU_SUP_TRANSMETA_32 not in final .config
Requested value: CONFIG_CPU_SUP_TRANSMETA_32=y
Actual value:
Value requested for CONFIG_CPU_SUP_VORTEX_32 not in final .config
Requested value: CONFIG_CPU_SUP_VORTEX_32=y
Actual value:
Value requested for CONFIG_HPET_TIMER not in final .config
Requested value: # CONFIG_HPET_TIMER is not set
Actual value: CONFIG_HPET_TIMER=y
Value requested for CONFIG_NR_CPUS_RANGE_END not in final .config
Requested value: CONFIG_NR_CPUS_RANGE_END=8
Actual value: CONFIG_NR_CPUS_RANGE_END=512
Value requested for CONFIG_NR_CPUS_DEFAULT not in final .config
Requested value: CONFIG_NR_CPUS_DEFAULT=8
Actual value: CONFIG_NR_CPUS_DEFAULT=64
Value requested for CONFIG_X86_ANCIENT_MCE not in final .config
Requested value: # CONFIG_X86_ANCIENT_MCE is not set
Actual value:
Value requested for CONFIG_X86_LEGACY_VM86 not in final .config
Requested value: # CONFIG_X86_LEGACY_VM86 is not set
Actual value:
Value requested for CONFIG_X86_ESPFIX32 not in final .config
Requested value: CONFIG_X86_ESPFIX32=y
Actual value:
Value requested for CONFIG_TOSHIBA not in final .config
Requested value: # CONFIG_TOSHIBA is not set
Actual value:
Value requested for CONFIG_X86_REBOOTFIXUPS not in final .config
Requested value: # CONFIG_X86_REBOOTFIXUPS is not set
Actual value:
Value requested for CONFIG_MICROCODE_INITRD32 not in final .config
Requested value: CONFIG_MICROCODE_INITRD32=y
Actual value:
Value requested for CONFIG_HIGHMEM4G not in final .config
Requested value: # CONFIG_HIGHMEM4G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_3G not in final .config
Requested value: CONFIG_VMSPLIT_3G=y
Actual value:
Value requested for CONFIG_VMSPLIT_3G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_3G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G not in final .config
Requested value: # CONFIG_VMSPLIT_2G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_2G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_1G not in final .config
Requested value: # CONFIG_VMSPLIT_1G is not set
Actual value:
Value requested for CONFIG_PAGE_OFFSET not in final .config
Requested value: CONFIG_PAGE_OFFSET=0xC0000000
Actual value:
Value requested for CONFIG_X86_PAE not in final .config
Requested value: # CONFIG_X86_PAE is not set
Actual value:
Value requested for CONFIG_ARCH_FLATMEM_ENABLE not in final .config
Requested value: CONFIG_ARCH_FLATMEM_ENABLE=y
Actual value:
Value requested for CONFIG_ARCH_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_ARCH_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_ILLEGAL_POINTER_VALUE not in final .config
Requested value: CONFIG_ILLEGAL_POINTER_VALUE=0
Actual value: CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
Value requested for CONFIG_COMPAT_VDSO not in final .config
Requested value: # CONFIG_COMPAT_VDSO is not set
Actual value:
Value requested for CONFIG_FUNCTION_PADDING_CFI not in final .config
Requested value: CONFIG_FUNCTION_PADDING_CFI=0
Actual value: CONFIG_FUNCTION_PADDING_CFI=11
Value requested for CONFIG_FUNCTION_PADDING_BYTES not in final .config
Requested value: CONFIG_FUNCTION_PADDING_BYTES=4
Actual value: CONFIG_FUNCTION_PADDING_BYTES=16
Value requested for CONFIG_APM not in final .config
Requested value: # CONFIG_APM is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K6 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K6 is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K7 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K7 is not set
Actual value:
Value requested for CONFIG_X86_GX_SUSPMOD not in final .config
Requested value: # CONFIG_X86_GX_SUSPMOD is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_ICH not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_ICH is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_SMI not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_SMI is not set
Actual value:
Value requested for CONFIG_X86_CPUFREQ_NFORCE2 not in final .config
Requested value: # CONFIG_X86_CPUFREQ_NFORCE2 is not set
Actual value:
Value requested for CONFIG_X86_LONGRUN not in final .config
Requested value: # CONFIG_X86_LONGRUN is not set
Actual value:
Value requested for CONFIG_X86_LONGHAUL not in final .config
Requested value: # CONFIG_X86_LONGHAUL is not set
Actual value:
Value requested for CONFIG_X86_E_POWERSAVER not in final .config
Requested value: # CONFIG_X86_E_POWERSAVER is not set
Actual value:
Value requested for CONFIG_PCI_GOBIOS not in final .config
Requested value: # CONFIG_PCI_GOBIOS is not set
Actual value:
Value requested for CONFIG_PCI_GOMMCONFIG not in final .config
Requested value: # CONFIG_PCI_GOMMCONFIG is not set
Actual value:
Value requested for CONFIG_PCI_GODIRECT not in final .config
Requested value: # CONFIG_PCI_GODIRECT is not set
Actual value:
Value requested for CONFIG_PCI_GOANY not in final .config
Requested value: CONFIG_PCI_GOANY=y
Actual value:
Value requested for CONFIG_PCI_BIOS not in final .config
Requested value: CONFIG_PCI_BIOS=y
Actual value:
Value requested for CONFIG_ISA not in final .config
Requested value: # CONFIG_ISA is not set
Actual value:
Value requested for CONFIG_SCx200 not in final .config
Requested value: # CONFIG_SCx200 is not set
Actual value:
Value requested for CONFIG_OLPC not in final .config
Requested value: # CONFIG_OLPC is not set
Actual value:
Value requested for CONFIG_ALIX not in final .config
Requested value: # CONFIG_ALIX is not set
Actual value:
Value requested for CONFIG_NET5501 not in final .config
Requested value: # CONFIG_NET5501 is not set
Actual value:
Value requested for CONFIG_GEOS not in final .config
Requested value: # CONFIG_GEOS is not set
Actual value:
Value requested for CONFIG_COMPAT_32 not in final .config
Requested value: CONFIG_COMPAT_32=y
Actual value:
Value requested for CONFIG_HAVE_ATOMIC_IOMAP not in final .config
Requested value: CONFIG_HAVE_ATOMIC_IOMAP=y
Actual value:
Value requested for CONFIG_X86_DISABLED_FEATURE_PCID not in final .config
Requested value: CONFIG_X86_DISABLED_FEATURE_PCID=y
Actual value:
Value requested for CONFIG_X86_DISABLED_FEATURE_PKU not in final .config
Requested value: CONFIG_X86_DISABLED_FEATURE_PKU=y
Actual value:
Value requested for CONFIG_X86_DISABLED_FEATURE_OSPKE not in final .config
Requested value: CONFIG_X86_DISABLED_FEATURE_OSPKE=y
Actual value:
Value requested for CONFIG_X86_DISABLED_FEATURE_LA57 not in final .config
Requested value: CONFIG_X86_DISABLED_FEATURE_LA57=y
Actual value:
Value requested for CONFIG_X86_DISABLED_FEATURE_PTI not in final .config
Requested value: CONFIG_X86_DISABLED_FEATURE_PTI=y
Actual value:
Value requested for CONFIG_X86_DISABLED_FEATURE_IBT not in final .config
Requested value: CONFIG_X86_DISABLED_FEATURE_IBT=y
Actual value:
Value requested for CONFIG_X86_DISABLED_FEATURE_INVLPGB not in final .config
Requested value: CONFIG_X86_DISABLED_FEATURE_INVLPGB=y
Actual value:
Value requested for CONFIG_ARCH_32BIT_OFF_T not in final .config
Requested value: CONFIG_ARCH_32BIT_OFF_T=y
Actual value:
Value requested for CONFIG_ARCH_WANT_IPC_PARSE_VERSION not in final .config
Requested value: CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
Actual value:
Value requested for CONFIG_MODULES_USE_ELF_REL not in final .config
Requested value: CONFIG_MODULES_USE_ELF_REL=y
Actual value:
Value requested for CONFIG_ARCH_MMAP_RND_BITS not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS=28
Value requested for CONFIG_CLONE_BACKWARDS not in final .config
Requested value: CONFIG_CLONE_BACKWARDS=y
Actual value:
Value requested for CONFIG_OLD_SIGSUSPEND3 not in final .config
Requested value: CONFIG_OLD_SIGSUSPEND3=y
Actual value:
Value requested for CONFIG_OLD_SIGACTION not in final .config
Requested value: CONFIG_OLD_SIGACTION=y
Actual value:
Value requested for CONFIG_ARCH_SPLIT_ARG64 not in final .config
Requested value: CONFIG_ARCH_SPLIT_ARG64=y
Actual value:
Value requested for CONFIG_FUNCTION_ALIGNMENT not in final .config
Requested value: CONFIG_FUNCTION_ALIGNMENT=4
Actual value: CONFIG_FUNCTION_ALIGNMENT=16
Value requested for CONFIG_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_FLATMEM_MANUAL not in final .config
Requested value: CONFIG_FLATMEM_MANUAL=y
Actual value:
Value requested for CONFIG_SPARSEMEM_MANUAL not in final .config
Requested value: # CONFIG_SPARSEMEM_MANUAL is not set
Actual value:
Value requested for CONFIG_FLATMEM not in final .config
Requested value: CONFIG_FLATMEM=y
Actual value:
Value requested for CONFIG_SPARSEMEM_STATIC not in final .config
Requested value: CONFIG_SPARSEMEM_STATIC=y
Actual value:
Value requested for CONFIG_KMAP_LOCAL not in final .config
Requested value: CONFIG_KMAP_LOCAL=y
Actual value:
Value requested for CONFIG_HAVE_EISA not in final .config
Requested value: CONFIG_HAVE_EISA=y
Actual value:
Value requested for CONFIG_EISA not in final .config
Requested value: # CONFIG_EISA is not set
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_COMPAQ not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_COMPAQ is not set
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_IBM not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_IBM is not set
Actual value:
Value requested for CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH not in final .config
Requested value: CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH=y
Actual value:
Value requested for CONFIG_PCH_PHUB not in final .config
Requested value: # CONFIG_PCH_PHUB is not set
Actual value:
Value requested for CONFIG_SCSI_NSP32 not in final .config
Requested value: # CONFIG_SCSI_NSP32 is not set
Actual value:
Value requested for CONFIG_PATA_CS5520 not in final .config
Requested value: # CONFIG_PATA_CS5520 is not set
Actual value:
Value requested for CONFIG_PATA_CS5530 not in final .config
Requested value: # CONFIG_PATA_CS5530 is not set
Actual value:
Value requested for CONFIG_PATA_CS5535 not in final .config
Requested value: # CONFIG_PATA_CS5535 is not set
Actual value:
Value requested for CONFIG_PATA_CS5536 not in final .config
Requested value: # CONFIG_PATA_CS5536 is not set
Actual value:
Value requested for CONFIG_PATA_SC1200 not in final .config
Requested value: # CONFIG_PATA_SC1200 is not set
Actual value:
Value requested for CONFIG_PCH_GBE not in final .config
Requested value: # CONFIG_PCH_GBE is not set
Actual value:
Value requested for CONFIG_INPUT_WISTRON_BTNS not in final .config
Requested value: # CONFIG_INPUT_WISTRON_BTNS is not set
Actual value:
Value requested for CONFIG_SERIAL_TIMBERDALE not in final .config
Requested value: # CONFIG_SERIAL_TIMBERDALE is not set
Actual value:
Value requested for CONFIG_SERIAL_PCH_UART not in final .config
Requested value: # CONFIG_SERIAL_PCH_UART is not set
Actual value:
Value requested for CONFIG_HW_RANDOM_GEODE not in final .config
Requested value: CONFIG_HW_RANDOM_GEODE=y
Actual value:
Value requested for CONFIG_SONYPI not in final .config
Requested value: # CONFIG_SONYPI is not set
Actual value:
Value requested for CONFIG_PC8736x_GPIO not in final .config
Requested value: # CONFIG_PC8736x_GPIO is not set
Actual value:
Value requested for CONFIG_NSC_GPIO not in final .config
Requested value: # CONFIG_NSC_GPIO is not set
Actual value:
Value requested for CONFIG_I2C_EG20T not in final .config
Requested value: # CONFIG_I2C_EG20T is not set
Actual value:
Value requested for CONFIG_SCx200_ACB not in final .config
Requested value: # CONFIG_SCx200_ACB is not set
Actual value:
Value requested for CONFIG_PTP_1588_CLOCK_PCH not in final .config
Requested value: # CONFIG_PTP_1588_CLOCK_PCH is not set
Actual value:
Value requested for CONFIG_SBC8360_WDT not in final .config
Requested value: # CONFIG_SBC8360_WDT is not set
Actual value:
Value requested for CONFIG_SBC7240_WDT not in final .config
Requested value: # CONFIG_SBC7240_WDT is not set
Actual value:
Value requested for CONFIG_MFD_CS5535 not in final .config
Requested value: # CONFIG_MFD_CS5535 is not set
Actual value:
Value requested for CONFIG_AGP_ALI not in final .config
Requested value: # CONFIG_AGP_ALI is not set
Actual value:
Value requested for CONFIG_AGP_ATI not in final .config
Requested value: # CONFIG_AGP_ATI is not set
Actual value:
Value requested for CONFIG_AGP_AMD not in final .config
Requested value: # CONFIG_AGP_AMD is not set
Actual value:
Value requested for CONFIG_AGP_NVIDIA not in final .config
Requested value: # CONFIG_AGP_NVIDIA is not set
Actual value:
Value requested for CONFIG_AGP_SWORKS not in final .config
Requested value: # CONFIG_AGP_SWORKS is not set
Actual value:
Value requested for CONFIG_AGP_EFFICEON not in final .config
Requested value: # CONFIG_AGP_EFFICEON is not set
Actual value:
Value requested for CONFIG_SND_CS5530 not in final .config
Requested value: # CONFIG_SND_CS5530 is not set
Actual value:
Value requested for CONFIG_SND_CS5535AUDIO not in final .config
Requested value: # CONFIG_SND_CS5535AUDIO is not set
Actual value:
Value requested for CONFIG_SND_SIS7019 not in final .config
Requested value: # CONFIG_SND_SIS7019 is not set
Actual value:
Value requested for CONFIG_LEDS_OT200 not in final .config
Requested value: # CONFIG_LEDS_OT200 is not set
Actual value:
Value requested for CONFIG_PCH_DMA not in final .config
Requested value: # CONFIG_PCH_DMA is not set
Actual value:
Value requested for CONFIG_CLKSRC_I8253 not in final .config
Requested value: CONFIG_CLKSRC_I8253=y
Actual value:
Value requested for CONFIG_MAILBOX not in final .config
Requested value: # CONFIG_MAILBOX is not set
Actual value: CONFIG_MAILBOX=y
Value requested for CONFIG_CRYPTO_SERPENT_SSE2_586 not in final .config
Requested value: # CONFIG_CRYPTO_SERPENT_SSE2_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_TWOFISH_586 not in final .config
Requested value: # CONFIG_CRYPTO_TWOFISH_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_GEODE not in final .config
Requested value: # CONFIG_CRYPTO_DEV_GEODE is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_HIFN_795X not in final .config
Requested value: # CONFIG_CRYPTO_DEV_HIFN_795X is not set
Actual value:
Value requested for CONFIG_CRYPTO_LIB_POLY1305_RSIZE not in final .config
Requested value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
Actual value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11
Value requested for CONFIG_AUDIT_GENERIC not in final .config
Requested value: CONFIG_AUDIT_GENERIC=y
Actual value:
Value requested for CONFIG_GENERIC_VDSO_32 not in final .config
Requested value: CONFIG_GENERIC_VDSO_32=y
Actual value:
Value requested for CONFIG_DEBUG_KMAP_LOCAL not in final .config
Requested value: # CONFIG_DEBUG_KMAP_LOCAL is not set
Actual value:
Value requested for CONFIG_HAVE_DEBUG_STACKOVERFLOW not in final .config
Requested value: CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
Actual value:
Value requested for CONFIG_DEBUG_STACKOVERFLOW not in final .config
Requested value: # CONFIG_DEBUG_STACKOVERFLOW is not set
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_TRACER not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_FREGS not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_FREGS=y
Actual value:
Value requested for CONFIG_HAVE_FTRACE_GRAPH_FUNC not in final .config
Requested value: CONFIG_HAVE_FTRACE_GRAPH_FUNC=y
Actual value:
Value requested for CONFIG_DRM_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_KUNIT_TEST=m
Actual value:
Value requested for CONFIG_DRM_XE_WERROR not in final .config
Requested value: CONFIG_DRM_XE_WERROR=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG not in final .config
Requested value: CONFIG_DRM_XE_DEBUG=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG_MEM not in final .config
Requested value: CONFIG_DRM_XE_DEBUG_MEM=y
Actual value:
Value requested for CONFIG_DRM_XE_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_XE_KUNIT_TEST=m
Actual value:
++ nproc
+ make -j48 ARCH=i386 olddefconfig
GEN Makefile
#
# configuration written to .config
#
++ nproc
+ make -j48 ARCH=i386
SYNC include/config/auto.conf.cmd
GEN Makefile
GEN Makefile
WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h
WRAP arch/x86/include/generated/uapi/asm/errno.h
WRAP arch/x86/include/generated/uapi/asm/fcntl.h
WRAP arch/x86/include/generated/uapi/asm/ioctl.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_32.h
WRAP arch/x86/include/generated/uapi/asm/ioctls.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_64.h
WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_x32.h
SYSTBL arch/x86/include/generated/asm/syscalls_32.h
WRAP arch/x86/include/generated/uapi/asm/param.h
WRAP arch/x86/include/generated/uapi/asm/poll.h
WRAP arch/x86/include/generated/uapi/asm/resource.h
WRAP arch/x86/include/generated/uapi/asm/socket.h
WRAP arch/x86/include/generated/uapi/asm/sockios.h
UPD include/generated/uapi/linux/version.h
WRAP arch/x86/include/generated/uapi/asm/termbits.h
WRAP arch/x86/include/generated/uapi/asm/termios.h
WRAP arch/x86/include/generated/uapi/asm/types.h
UPD arch/x86/include/generated/asm/cpufeaturemasks.h
WRAP arch/x86/include/generated/asm/early_ioremap.h
WRAP arch/x86/include/generated/asm/fprobe.h
WRAP arch/x86/include/generated/asm/mcs_spinlock.h
WRAP arch/x86/include/generated/asm/mmzone.h
HOSTCC arch/x86/tools/relocs_32.o
WRAP arch/x86/include/generated/asm/irq_regs.h
WRAP arch/x86/include/generated/asm/kmap_size.h
HOSTCC arch/x86/tools/relocs_64.o
UPD include/generated/compile.h
WRAP arch/x86/include/generated/asm/local64.h
HOSTCC arch/x86/tools/relocs_common.o
WRAP arch/x86/include/generated/asm/mmiowb.h
WRAP arch/x86/include/generated/asm/module.lds.h
WRAP arch/x86/include/generated/asm/rwonce.h
HOSTCC scripts/kallsyms
HOSTCC scripts/sorttable
HOSTCC scripts/asn1_compiler
HOSTCC scripts/selinux/mdp/mdp
HOSTLD arch/x86/tools/relocs
UPD include/config/kernel.release
UPD include/generated/utsrelease.h
CC scripts/mod/empty.o
HOSTCC scripts/mod/mk_elfconfig
CC scripts/mod/devicetable-offsets.s
UPD scripts/mod/devicetable-offsets.h
MKELF scripts/mod/elfconfig.h
HOSTCC scripts/mod/modpost.o
HOSTCC scripts/mod/file2alias.o
HOSTCC scripts/mod/sumversion.o
HOSTCC scripts/mod/symsearch.o
HOSTLD scripts/mod/modpost
CC kernel/bounds.s
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-arch-fallback.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-instrumented.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-long.h
UPD include/generated/timeconst.h
UPD include/generated/bounds.h
CC arch/x86/kernel/asm-offsets.s
UPD include/generated/asm-offsets.h
CALL /workspace/kernel/scripts/checksyscalls.sh
LDS scripts/module.lds
HOSTCC usr/gen_init_cpio
CC init/main.o
CC certs/system_keyring.o
CC ipc/util.o
CC init/do_mounts.o
CC init/do_mounts_initrd.o
UPD init/utsversion-tmp.h
CC ipc/msgutil.o
CC init/initramfs.o
CC ipc/msg.o
CC security/commoncap.o
CC init/calibrate.o
CC mm/filemap.o
CC security/lsm_syscalls.o
CC ipc/sem.o
CC arch/x86/realmode/init.o
AS arch/x86/entry/entry.o
CC io_uring/io_uring.o
CC mm/mempool.o
AR arch/x86/crypto/built-in.a
CC init/init_task.o
CC security/min_addr.o
CC arch/x86/video/video-common.o
AS arch/x86/lib/atomic64_cx8_32.o
CC arch/x86/pci/i386.o
AR arch/x86/net/built-in.a
CC security/keys/gc.o
CC arch/x86/power/cpu.o
AR arch/x86/entry/vsyscall/built-in.a
HOSTCC security/selinux/genheaders
CC security/integrity/iint.o
CC arch/x86/events/amd/core.o
CC block/partitions/core.o
CC fs/nfs_common/nfsacl.o
AR arch/x86/platform/atom/built-in.a
CC arch/x86/mm/init.o
CC arch/x86/events/intel/core.o
AR virt/lib/built-in.a
AR drivers/cache/built-in.a
AS arch/x86/realmode/rm/header.o
CC arch/x86/mm/init_32.o
CC arch/x86/virt/svm/cmdline.o
CC arch/x86/mm/pat/set_memory.o
CC ipc/shm.o
CC fs/notify/dnotify/dnotify.o
CC arch/x86/kernel/fpu/init.o
AR virt/built-in.a
AR lib/math/tests/built-in.a
CC sound/core/seq/seq.o
CC net/core/sock.o
AR arch/x86/platform/ce4100/built-in.a
CC lib/math/div64.o
AR drivers/irqchip/built-in.a
CC lib/math/gcd.o
CC arch/x86/entry/vdso/vma.o
AS arch/x86/lib/checksum_32.o
CC sound/core/sound.o
AS arch/x86/realmode/rm/trampoline_32.o
CC arch/x86/platform/efi/memmap.o
CC kernel/sched/core.o
AR drivers/bus/mhi/built-in.a
AR drivers/bus/built-in.a
AS arch/x86/realmode/rm/stack.o
CC arch/x86/lib/cmdline.o
CC crypto/asymmetric_keys/asymmetric_type.o
AR drivers/pwm/built-in.a
AS arch/x86/realmode/rm/reboot.o
CC arch/x86/mm/pat/memtype.o
AR drivers/leds/trigger/built-in.a
AR drivers/leds/blink/built-in.a
AS arch/x86/realmode/rm/wakeup_asm.o
AR drivers/leds/simatic/built-in.a
AR arch/x86/virt/svm/built-in.a
CC drivers/leds/led-core.o
AR arch/x86/virt/vmx/built-in.a
AR arch/x86/virt/built-in.a
CC io_uring/opdef.o
CC arch/x86/realmode/rm/wakemain.o
AS arch/x86/lib/cmpxchg8b_emu.o
GEN security/selinux/flask.h security/selinux/av_permissions.h
CC lib/math/lcm.o
CC security/selinux/avc.o
CC arch/x86/lib/cpu.o
CC arch/x86/realmode/rm/video-mode.o
CC lib/math/int_log.o
CC io_uring/kbuf.o
CC lib/math/int_pow.o
GEN usr/initramfs_data.cpio
AS arch/x86/realmode/rm/copy.o
COPY usr/initramfs_inc_data
AS usr/initramfs_data.o
CC arch/x86/kernel/fpu/bugs.o
AS arch/x86/realmode/rm/bioscall.o
AR usr/built-in.a
CC io_uring/rsrc.o
HOSTCC certs/extract-cert
CC arch/x86/realmode/rm/regs.o
CC lib/math/int_sqrt.o
CC arch/x86/realmode/rm/video-vga.o
CC arch/x86/kernel/fpu/core.o
CC lib/math/reciprocal_div.o
CC arch/x86/realmode/rm/video-vesa.o
CC lib/math/rational.o
CC sound/core/seq/seq_lock.o
CC arch/x86/lib/delay.o
CC fs/notify/inotify/inotify_fsnotify.o
AR arch/x86/video/built-in.a
AR fs/notify/fanotify/built-in.a
CC arch/x86/realmode/rm/video-bios.o
CC arch/x86/pci/init.o
CC mm/oom_kill.o
CC fs/notify/fsnotify.o
CERT certs/x509_certificate_list
CERT certs/signing_key.x509
AS certs/system_certificates.o
PASYMS arch/x86/realmode/rm/pasyms.h
CC fs/notify/notification.o
CC security/integrity/integrity_audit.o
AR certs/built-in.a
CC block/partitions/msdos.o
CC drivers/leds/led-class.o
CC fs/nfs_common/grace.o
CC arch/x86/mm/fault.o
LDS arch/x86/realmode/rm/realmode.lds
CC arch/x86/events/amd/lbr.o
LD arch/x86/realmode/rm/realmode.elf
CC crypto/api.o
CC arch/x86/events/amd/ibs.o
RELOCS arch/x86/realmode/rm/realmode.relocs
OBJCOPY arch/x86/realmode/rm/realmode.bin
CC crypto/asymmetric_keys/restrict.o
AS arch/x86/realmode/rmpiggy.o
CC arch/x86/entry/vdso/extable.o
CC security/keys/key.o
AR arch/x86/realmode/built-in.a
AR fs/notify/dnotify/built-in.a
CC arch/x86/events/intel/bts.o
CC fs/notify/inotify/inotify_user.o
CC arch/x86/kernel/cpu/mce/core.o
CC arch/x86/platform/efi/quirks.o
CC arch/x86/power/hibernate_32.o
CC arch/x86/kernel/cpu/mce/severity.o
AS arch/x86/lib/getuser.o
CC arch/x86/kernel/acpi/boot.o
GEN arch/x86/lib/inat-tables.c
AR lib/math/built-in.a
CC arch/x86/lib/insn-eval.o
CC drivers/leds/led-triggers.o
AS arch/x86/power/hibernate_asm_32.o
CC lib/crypto/mpi/generic_mpih-lshift.o
CC sound/core/seq/seq_clientmgr.o
AS arch/x86/entry/entry_32.o
AR sound/i2c/other/built-in.a
AR sound/i2c/built-in.a
CC arch/x86/platform/efi/efi.o
AR arch/x86/platform/geode/built-in.a
AR arch/x86/platform/iris/built-in.a
CC security/security.o
CC drivers/pci/msi/pcidev_msi.o
CC crypto/asymmetric_keys/signature.o
CC kernel/sched/fair.o
CC block/bdev.o
CC sound/core/init.o
CC fs/iomap/trace.o
CC arch/x86/kernel/fpu/regset.o
CC arch/x86/pci/pcbios.o
AR lib/tests/built-in.a
CC arch/x86/platform/efi/efi_32.o
CC arch/x86/pci/mmconfig_32.o
CC lib/vdso/datastore.o
CC arch/x86/platform/intel/iosf_mbi.o
CC drivers/pci/pcie/portdrv.o
CC arch/x86/mm/pat/memtype_interval.o
CC fs/nfs_common/common.o
AR security/integrity/built-in.a
CC lib/crypto/memneq.o
CC init/version.o
LDS arch/x86/entry/vdso/vdso32/vdso32.lds
CC crypto/asymmetric_keys/public_key.o
AS arch/x86/entry/vdso/vdso32/note.o
CC arch/x86/power/hibernate.o
AS arch/x86/entry/vdso/vdso32/system_call.o
CC lib/crypto/mpi/generic_mpih-mul1.o
CC block/partitions/efi.o
AS arch/x86/platform/efi/efi_stub_32.o
AS arch/x86/entry/vdso/vdso32/sigreturn.o
CC arch/x86/events/intel/ds.o
CC arch/x86/entry/vdso/vdso32/vclock_gettime.o
CC arch/x86/events/zhaoxin/core.o
CC mm/fadvise.o
CC arch/x86/pci/direct.o
CC drivers/pci/msi/api.o
AR init/built-in.a
AR drivers/leds/built-in.a
CC arch/x86/entry/vdso/vdso32/vgetcpu.o
CC sound/core/seq/seq_memory.o
CC arch/x86/kernel/apic/apic.o
CC ipc/syscall.o
CC io_uring/notif.o
CC io_uring/tctx.o
AR fs/notify/inotify/built-in.a
CC fs/notify/group.o
CC security/keys/keyring.o
CC arch/x86/lib/insn.o
CC fs/notify/mark.o
CC security/selinux/hooks.o
CC arch/x86/kernel/apic/apic_common.o
AR lib/vdso/built-in.a
CC net/ethernet/eth.o
AR net/802/built-in.a
CC arch/x86/kernel/acpi/sleep.o
CC arch/x86/pci/mmconfig-shared.o
CC arch/x86/mm/ioremap.o
CC drivers/pci/msi/msi.o
CC arch/x86/kernel/fpu/signal.o
CC arch/x86/platform/efi/runtime-map.o
CC security/keys/keyctl.o
CC lib/crypto/mpi/generic_mpih-mul2.o
CC arch/x86/events/amd/uncore.o
AR arch/x86/mm/pat/built-in.a
AR arch/x86/platform/intel/built-in.a
CC sound/core/seq/seq_queue.o
CC block/fops.o
CC arch/x86/lib/kaslr.o
AR fs/nfs_common/built-in.a
CC arch/x86/lib/memcpy_32.o
CC mm/maccess.o
CC drivers/pci/pcie/rcec.o
CC block/bio.o
CC block/elevator.o
ASN.1 crypto/asymmetric_keys/x509.asn1.[ch]
ASN.1 crypto/asymmetric_keys/x509_akid.asn1.[ch]
CC crypto/asymmetric_keys/x509_loader.o
CC net/sched/sch_generic.o
AR arch/x86/power/built-in.a
CC net/netlink/af_netlink.o
CC fs/iomap/iter.o
HOSTCC arch/x86/entry/vdso/vdso2c
CC arch/x86/pci/fixup.o
CC drivers/pci/msi/irqdomain.o
AS arch/x86/lib/memmove_32.o
CC crypto/cipher.o
CC arch/x86/lib/misc.o
CC drivers/pci/pcie/bwctrl.o
CC arch/x86/lib/pc-conf-reg.o
CC crypto/asymmetric_keys/x509_public_key.o
CC block/blk-core.o
CC arch/x86/pci/acpi.o
CC arch/x86/kernel/kprobes/core.o
CC ipc/ipc_sysctl.o
AR block/partitions/built-in.a
CC lib/zlib_inflate/inffast.o
CC sound/core/seq/seq_fifo.o
AR arch/x86/events/zhaoxin/built-in.a
CC arch/x86/pci/legacy.o
AS arch/x86/lib/putuser.o
AS arch/x86/kernel/acpi/wakeup_32.o
CC lib/crypto/mpi/generic_mpih-mul3.o
AS arch/x86/lib/retpoline.o
CC arch/x86/kernel/kprobes/opt.o
CC arch/x86/kernel/acpi/cstate.o
CC arch/x86/lib/string_32.o
CC arch/x86/kernel/cpu/mce/genpool.o
CC lib/zlib_inflate/inflate.o
CC arch/x86/entry/vdso/vdso32-setup.o
CC arch/x86/lib/strstr_32.o
CC fs/notify/fdinfo.o
AR arch/x86/platform/efi/built-in.a
AR arch/x86/platform/intel-mid/built-in.a
AR arch/x86/platform/intel-quark/built-in.a
CC arch/x86/lib/usercopy.o
CC arch/x86/mm/extable.o
AR arch/x86/platform/olpc/built-in.a
AR arch/x86/platform/scx200/built-in.a
AR arch/x86/platform/ts5500/built-in.a
AR arch/x86/platform/uv/built-in.a
CC lib/crypto/mpi/generic_mpih-rshift.o
CC arch/x86/kernel/fpu/xstate.o
AR arch/x86/platform/built-in.a
CC arch/x86/kernel/cpu/mce/intel.o
CC arch/x86/kernel/cpu/mce/amd.o
CC kernel/sched/build_policy.o
AR net/bpf/built-in.a
CC fs/iomap/buffered-io.o
CC lib/crypto/utils.o
CC arch/x86/entry/syscall_32.o
CC arch/x86/kernel/apic/apic_noop.o
CC ipc/mqueue.o
ASN.1 crypto/asymmetric_keys/pkcs7.asn1.[ch]
CC crypto/asymmetric_keys/pkcs7_trust.o
CC arch/x86/kernel/apic/ipi.o
VDSO arch/x86/entry/vdso/vdso32.so.dbg
CC fs/quota/dquot.o
OBJCOPY arch/x86/entry/vdso/vdso32.so
VDSO2C arch/x86/entry/vdso/vdso-image-32.c
CC arch/x86/entry/vdso/vdso-image-32.o
CC arch/x86/lib/usercopy_32.o
CC mm/page-writeback.o
CC net/core/request_sock.o
CC drivers/pci/pcie/aspm.o
AR drivers/pci/msi/built-in.a
CC arch/x86/kernel/cpu/mce/threshold.o
CC sound/core/seq/seq_prioq.o
CC lib/zlib_inflate/infutil.o
AR arch/x86/events/amd/built-in.a
CC lib/zlib_inflate/inftrees.o
CC security/keys/permission.o
CC arch/x86/kernel/apic/vector.o
AR arch/x86/kernel/acpi/built-in.a
CC crypto/asymmetric_keys/pkcs7_verify.o
CC lib/crypto/chacha.o
CC kernel/locking/mutex.o
AR net/ethernet/built-in.a
CC fs/proc/task_mmu.o
CC ipc/namespace.o
CC arch/x86/pci/irq.o
CC fs/quota/quota_v2.o
CC kernel/power/qos.o
AR arch/x86/entry/vdso/built-in.a
CC net/core/skbuff.o
CC lib/crypto/mpi/generic_mpih-sub1.o
CC lib/crypto/mpi/generic_mpih-add1.o
CC arch/x86/lib/msr-smp.o
AR sound/drivers/opl3/built-in.a
CC drivers/pci/pcie/pme.o
AR fs/notify/built-in.a
AR sound/drivers/opl4/built-in.a
CC arch/x86/mm/mmap.o
AR sound/drivers/mpu401/built-in.a
CC security/lsm_audit.o
CC mm/folio-compat.o
AR sound/drivers/vx/built-in.a
CC kernel/printk/printk.o
AR sound/drivers/pcsp/built-in.a
CC kernel/irq/irqdesc.o
AR sound/drivers/built-in.a
CC kernel/rcu/update.o
AR kernel/livepatch/built-in.a
CC kernel/dma/mapping.o
CC arch/x86/events/core.o
CC lib/zlib_inflate/inflate_syms.o
AR arch/x86/kernel/kprobes/built-in.a
CC ipc/mq_sysctl.o
CC security/selinux/selinuxfs.o
CC arch/x86/events/intel/knc.o
CC arch/x86/lib/cache-smp.o
CC crypto/asymmetric_keys/x509.asn1.o
CC crypto/asymmetric_keys/x509_akid.asn1.o
CC crypto/asymmetric_keys/x509_cert_parser.o
CC kernel/power/main.o
CC sound/core/seq/seq_timer.o
CC arch/x86/lib/crc32-glue.o
CC net/core/datagram.o
CC lib/crypto/mpi/mpicoder.o
AR lib/zlib_inflate/built-in.a
CC fs/quota/quota_tree.o
CC io_uring/filetable.o
CC crypto/asymmetric_keys/pkcs7.asn1.o
CC security/keys/process_keys.o
CC kernel/sched/build_utility.o
CC net/core/stream.o
CC arch/x86/pci/common.o
AR arch/x86/kernel/fpu/built-in.a
CC crypto/algapi.o
CC crypto/scatterwalk.o
CC arch/x86/mm/pgtable.o
CC net/ethtool/ioctl.o
CC drivers/video/console/dummycon.o
AS arch/x86/entry/thunk.o
CC drivers/video/backlight/backlight.o
AR drivers/video/fbdev/core/built-in.a
AR arch/x86/entry/built-in.a
AR drivers/video/fbdev/omap/built-in.a
CC arch/x86/events/probe.o
CC kernel/irq/handle.o
AR drivers/video/fbdev/omap2/omapfb/dss/built-in.a
CC drivers/video/aperture.o
AR drivers/video/fbdev/omap2/omapfb/displays/built-in.a
AR drivers/video/fbdev/omap2/omapfb/built-in.a
AR drivers/video/fbdev/omap2/built-in.a
AR drivers/video/fbdev/built-in.a
AR arch/x86/kernel/cpu/mce/built-in.a
CC block/blk-sysfs.o
CC crypto/asymmetric_keys/pkcs7_parser.o
CC arch/x86/kernel/cpu/mtrr/mtrr.o
CC net/sched/sch_mq.o
AS arch/x86/lib/crc32-pclmul.o
CC arch/x86/lib/msr.o
AR drivers/pci/pcie/built-in.a
CC arch/x86/events/intel/lbr.o
CC arch/x86/kernel/cpu/microcode/core.o
AR drivers/pci/pwrctrl/built-in.a
CC drivers/pci/hotplug/pci_hotplug_core.o
CC arch/x86/kernel/cpu/cacheinfo.o
CC kernel/irq/manage.o
CC kernel/locking/semaphore.o
CC kernel/locking/rwsem.o
CC sound/core/seq/seq_system.o
CC lib/crypto/mpi/mpi-add.o
AR ipc/built-in.a
CC security/keys/request_key.o
CC kernel/rcu/sync.o
CC net/netlink/genetlink.o
CC arch/x86/kernel/apic/init.o
CC drivers/video/console/vgacon.o
CC arch/x86/events/intel/p4.o
CC io_uring/rw.o
CC fs/iomap/direct-io.o
CC arch/x86/mm/physaddr.o
CC arch/x86/pci/early.o
AR crypto/asymmetric_keys/built-in.a
CC security/selinux/netlink.o
LDS arch/x86/kernel/vmlinux.lds
CC lib/crypto/aes.o
CC kernel/rcu/srcutree.o
CC mm/readahead.o
CC arch/x86/events/utils.o
CC kernel/power/console.o
CC io_uring/net.o
CC io_uring/poll.o
AR drivers/video/backlight/built-in.a
CC security/selinux/nlmsgtab.o
CC arch/x86/kernel/cpu/mtrr/if.o
CC fs/proc/inode.o
CC fs/proc/root.o
CC arch/x86/kernel/apic/hw_nmi.o
CC arch/x86/kernel/cpu/microcode/intel.o
CC fs/quota/quota.o
CC sound/core/seq/seq_ports.o
AS arch/x86/lib/msr-reg.o
CC arch/x86/lib/msr-reg-export.o
CC crypto/proc.o
CC arch/x86/kernel/apic/io_apic.o
CC lib/crypto/mpi/mpi-bit.o
CC fs/proc/base.o
CC drivers/pci/hotplug/acpi_pcihp.o
CC block/blk-flush.o
CC net/sched/sch_frag.o
CC arch/x86/mm/tlb.o
AS arch/x86/lib/hweight.o
CC kernel/locking/percpu-rwsem.o
CC arch/x86/lib/iomem.o
CC arch/x86/pci/bus_numa.o
CC arch/x86/pci/amd_bus.o
CC drivers/video/cmdline.o
CC security/keys/request_key_auth.o
AR drivers/pci/controller/dwc/built-in.a
AR drivers/pci/controller/mobiveil/built-in.a
AR drivers/pci/controller/plda/built-in.a
AR drivers/pci/controller/built-in.a
CC kernel/dma/direct.o
CC net/sched/sch_api.o
CC kernel/irq/spurious.o
CC arch/x86/lib/atomic64_32.o
CC fs/kernfs/mount.o
CC kernel/power/process.o
CC arch/x86/kernel/cpu/mtrr/generic.o
CC fs/kernfs/inode.o
CC kernel/printk/printk_safe.o
CC security/device_cgroup.o
CC kernel/locking/spinlock.o
AR drivers/video/console/built-in.a
CC kernel/irq/resend.o
CC arch/x86/mm/cpu_entry_area.o
CC fs/iomap/ioend.o
CC arch/x86/events/intel/p6.o
CC crypto/aead.o
CC arch/x86/lib/inat.o
CC lib/zlib_deflate/deflate.o
AR drivers/idle/built-in.a
CC lib/crypto/mpi/mpi-cmp.o
CC security/keys/user_defined.o
CC arch/x86/kernel/cpu/microcode/amd.o
AR drivers/pci/switch/built-in.a
CC block/blk-settings.o
CC drivers/video/nomodeset.o
AR arch/x86/lib/built-in.a
CC sound/core/seq/seq_info.o
AR arch/x86/lib/lib.a
CC mm/swap.o
CC fs/quota/kqid.o
CC fs/quota/netlink.o
CC fs/proc/generic.o
CC security/selinux/netif.o
AR drivers/pci/hotplug/built-in.a
CC io_uring/eventfd.o
CC drivers/pci/access.o
CC kernel/rcu/tree.o
CC kernel/locking/osq_lock.o
CC arch/x86/kernel/apic/msi.o
CC kernel/entry/common.o
CC fs/sysfs/file.o
CC kernel/entry/syscall_user_dispatch.o
CC fs/devpts/inode.o
CC net/ethtool/common.o
CC kernel/irq/chip.o
AR arch/x86/pci/built-in.a
CC kernel/irq/dummychip.o
CC drivers/video/hdmi.o
CC kernel/printk/nbcon.o
CC kernel/locking/qspinlock.o
CC crypto/geniv.o
CC net/netlink/policy.o
CC arch/x86/kernel/apic/probe_32.o
CC fs/iomap/fiemap.o
CC lib/crypto/mpi/mpi-sub-ui.o
AR drivers/char/ipmi/built-in.a
CC arch/x86/kernel/cpu/mtrr/cleanup.o
CC kernel/dma/ops_helpers.o
CC sound/core/seq/seq_dummy.o
CC fs/netfs/buffered_read.o
CC arch/x86/events/intel/pt.o
CC security/keys/proc.o
CC arch/x86/mm/maccess.o
CC fs/kernfs/dir.o
CC fs/netfs/buffered_write.o
AR sound/isa/ad1816a/built-in.a
AR sound/isa/ad1848/built-in.a
CC fs/netfs/direct_read.o
AR sound/isa/cs423x/built-in.a
CC kernel/power/suspend.o
AR sound/isa/es1688/built-in.a
CC kernel/dma/remap.o
AR sound/isa/galaxy/built-in.a
CC fs/kernfs/file.o
CC drivers/pci/bus.o
AS arch/x86/kernel/head_32.o
AR sound/isa/gus/built-in.a
AR sound/isa/msnd/built-in.a
CC lib/zlib_deflate/deftree.o
AR sound/isa/opti9xx/built-in.a
CC fs/proc/array.o
AR sound/isa/sb/built-in.a
CC lib/crypto/mpi/mpi-div.o
AR sound/isa/wavefront/built-in.a
AR sound/isa/wss/built-in.a
AR sound/isa/built-in.a
CC kernel/locking/rtmutex_api.o
AR fs/quota/built-in.a
CC block/blk-ioc.o
CC io_uring/uring_cmd.o
CC arch/x86/mm/pgprot.o
CC io_uring/openclose.o
CC net/core/scm.o
CC arch/x86/kernel/cpu/scattered.o
CC security/selinux/netnode.o
CC lib/lzo/lzo1x_compress.o
CC fs/kernfs/symlink.o
CC fs/proc/fd.o
AR arch/x86/kernel/cpu/microcode/built-in.a
CC fs/sysfs/dir.o
CC fs/proc/proc_tty.o
AR arch/x86/kernel/apic/built-in.a
CC kernel/power/hibernate.o
AR fs/devpts/built-in.a
AR sound/pci/ac97/built-in.a
AR sound/pci/ali5451/built-in.a
AR sound/pci/asihpi/built-in.a
AR drivers/video/built-in.a
AR sound/pci/au88x0/built-in.a
AR sound/ppc/built-in.a
CC net/ethtool/netlink.o
CC kernel/module/main.o
AR sound/core/seq/built-in.a
AR sound/pci/aw2/built-in.a
CC sound/core/memory.o
AR sound/pci/ctxfi/built-in.a
AR sound/pci/ca0106/built-in.a
CC fs/iomap/seek.o
AR sound/pci/cs46xx/built-in.a
CC kernel/printk/printk_ringbuffer.o
CC arch/x86/events/rapl.o
AR sound/pci/cs5535audio/built-in.a
AR kernel/entry/built-in.a
CC lib/crypto/mpi/mpi-mod.o
CC kernel/rcu/rcu_segcblist.o
AR sound/pci/lola/built-in.a
CC security/keys/sysctl.o
AR sound/pci/lx6464es/built-in.a
CC kernel/irq/devres.o
CC kernel/irq/kexec.o
AR sound/pci/echoaudio/built-in.a
AR sound/pci/emu10k1/built-in.a
CC sound/pci/hda/hda_bind.o
CC crypto/lskcipher.o
CC arch/x86/kernel/cpu/mtrr/amd.o
CC lib/crypto/arc4.o
AR net/netlink/built-in.a
CC mm/truncate.o
AR kernel/dma/built-in.a
AR sound/arm/built-in.a
CC lib/zlib_deflate/deflate_syms.o
CC kernel/time/time.o
CC crypto/skcipher.o
CC arch/x86/mm/pgtable_32.o
CC lib/lzo/lzo1x_compress_safe.o
CC arch/x86/mm/iomap_32.o
CC kernel/locking/qrwlock.o
CC fs/sysfs/symlink.o
CC drivers/pci/probe.o
CC net/core/gen_stats.o
CC net/netfilter/core.o
CC arch/x86/events/msr.o
CC kernel/printk/sysctl.o
CC arch/x86/events/intel/uncore.o
CC block/blk-map.o
CC net/sched/sch_blackhole.o
CC drivers/pci/host-bridge.o
CC kernel/irq/autoprobe.o
CC kernel/irq/irqdomain.o
CC fs/netfs/direct_write.o
AR lib/zlib_deflate/built-in.a
CC arch/x86/kernel/cpu/topology_common.o
CC sound/core/control.o
CC net/xfrm/xfrm_policy.o
CC lib/crypto/mpi/mpi-mul.o
CC security/keys/keyctl_pkey.o
CC net/xfrm/xfrm_state.o
CC net/ipv4/netfilter/nf_defrag_ipv4.o
CC kernel/time/timer.o
CC fs/proc/cmdline.o
CC fs/iomap/swapfile.o
CC lib/crypto/mpi/mpih-cmp.o
CC arch/x86/kernel/cpu/mtrr/cyrix.o
CC net/ipv4/route.o
CC lib/lz4/lz4_decompress.o
AR kernel/locking/built-in.a
CC lib/zstd/zstd_decompress_module.o
CC lib/xz/xz_dec_syms.o
AR fs/kernfs/built-in.a
CC lib/lzo/lzo1x_decompress_safe.o
AR kernel/printk/built-in.a
CC lib/dim/dim.o
CC lib/fonts/fonts.o
CC fs/proc/consoles.o
CC sound/pci/hda/hda_codec.o
CC kernel/power/snapshot.o
CC security/selinux/netport.o
CC io_uring/sqpoll.o
CC arch/x86/mm/hugetlbpage.o
CC mm/vmscan.o
CC net/ipv4/netfilter/nf_reject_ipv4.o
CC fs/sysfs/mount.o
CC arch/x86/kernel/head32.o
CC block/blk-merge.o
CC sound/pci/hda/hda_jack.o
CC lib/xz/xz_dec_stream.o
CC net/ethtool/bitset.o
CC security/selinux/status.o
CC lib/dim/net_dim.o
CC net/core/gen_estimator.o
CC lib/zstd/decompress/huf_decompress.o
CC arch/x86/events/intel/uncore_nhmex.o
CC lib/fonts/font_8x16.o
CC arch/x86/events/intel/uncore_snb.o
CC lib/crypto/mpi/mpih-div.o
CC arch/x86/kernel/cpu/topology_ext.o
CC net/ipv4/inetpeer.o
AR security/keys/built-in.a
CC block/blk-timeout.o
AR lib/lzo/built-in.a
CC arch/x86/kernel/cpu/mtrr/centaur.o
CC kernel/time/hrtimer.o
CC crypto/seqiv.o
CC mm/shrinker.o
CC kernel/module/strict_rwx.o
CC net/sched/cls_api.o
CC fs/proc/cpuinfo.o
AR fs/iomap/built-in.a
CC lib/xz/xz_dec_lzma2.o
CC fs/netfs/iterator.o
CC security/selinux/ss/ebitmap.o
AR arch/x86/mm/built-in.a
AR lib/fonts/built-in.a
CC net/ipv4/netfilter/ip_tables.o
CC fs/sysfs/group.o
CC arch/x86/kernel/ebda.o
CC kernel/irq/proc.o
CC net/netfilter/nf_log.o
CC arch/x86/kernel/platform-quirks.o
CC net/unix/af_unix.o
CC net/xfrm/xfrm_hash.o
CC arch/x86/kernel/cpu/mtrr/legacy.o
CC crypto/echainiv.o
AR sound/sh/built-in.a
CC kernel/time/sleep_timeout.o
CC lib/zstd/decompress/zstd_ddict.o
CC fs/proc/devices.o
CC fs/proc/interrupts.o
CC sound/core/misc.o
CC lib/argv_split.o
CC kernel/irq/migration.o
CC lib/crypto/mpi/mpih-mul.o
AR lib/lz4/built-in.a
CC crypto/ahash.o
CC drivers/pci/remove.o
CC arch/x86/kernel/cpu/topology_amd.o
CC kernel/module/kmod.o
CC lib/dim/rdma_dim.o
CC drivers/acpi/acpica/dsargs.o
CC lib/xz/xz_dec_bcj.o
AR drivers/acpi/pmic/built-in.a
CC net/core/net_namespace.o
CC net/core/secure_seq.o
CC net/packet/af_packet.o
CC net/ipv6/netfilter/ip6_tables.o
AR arch/x86/kernel/cpu/mtrr/built-in.a
CC drivers/acpi/dptf/int340x_thermal.o
AR kernel/sched/built-in.a
CC io_uring/xattr.o
CC net/ipv4/protocol.o
AR fs/sysfs/built-in.a
CC net/xfrm/xfrm_input.o
CC lib/zstd/decompress/zstd_decompress.o
CC net/core/flow_dissector.o
CC fs/netfs/locking.o
AR sound/synth/emux/built-in.a
AR sound/synth/built-in.a
CC io_uring/nop.o
CC arch/x86/kernel/cpu/common.o
CC kernel/power/swap.o
CC arch/x86/events/intel/uncore_snbep.o
CC kernel/power/user.o
CC drivers/pci/pci.o
CC fs/ext4/balloc.o
CC net/ipv6/af_inet6.o
CC net/ipv4/ip_input.o
CC net/sched/act_api.o
CC net/ethtool/strset.o
CC kernel/irq/cpuhotplug.o
AR lib/dim/built-in.a
CC sound/core/device.o
CC sound/core/info.o
CC drivers/acpi/acpica/dscontrol.o
CC lib/zstd/decompress/zstd_decompress_block.o
CC block/blk-lib.o
AR kernel/rcu/built-in.a
CC kernel/time/timekeeping.o
CC fs/proc/loadavg.o
AR lib/xz/built-in.a
CC sound/pci/hda/hda_auto_parser.o
AR drivers/acpi/dptf/built-in.a
CC net/core/sysctl_net_core.o
CC net/ethtool/linkinfo.o
CC security/selinux/ss/hashtab.o
CC net/sched/sch_fifo.o
CC net/core/dev.o
CC net/netfilter/nf_queue.o
CC lib/crypto/mpi/mpi-pow.o
CC kernel/module/tree_lookup.o
CC drivers/acpi/acpica/dsdebug.o
CC fs/ext4/bitmap.o
CC fs/ext4/block_validity.o
AR sound/pci/ice1712/built-in.a
CC io_uring/fs.o
CC net/ipv4/ip_fragment.o
CC security/selinux/ss/symtab.o
CC fs/netfs/main.o
CC kernel/irq/pm.o
CC net/ipv4/netfilter/iptable_filter.o
CC fs/proc/meminfo.o
CC net/unix/garbage.o
CC net/core/dev_api.o
CC net/ipv6/anycast.o
CC crypto/shash.o
CC drivers/acpi/acpica/dsfield.o
CC security/selinux/ss/sidtab.o
CC block/blk-mq.o
CC kernel/power/poweroff.o
CC sound/core/isadma.o
CC net/xfrm/xfrm_output.o
CC kernel/module/kallsyms.o
CC mm/shmem.o
CC lib/crypto/mpi/mpiutil.o
CC kernel/time/ntp.o
CC lib/crypto/gf128mul.o
CC lib/bug.o
AR sound/usb/misc/built-in.a
AR sound/usb/usx2y/built-in.a
CC net/ethtool/linkmodes.o
AR sound/usb/caiaq/built-in.a
CC fs/ext4/dir.o
AR sound/usb/6fire/built-in.a
CC drivers/acpi/acpica/dsinit.o
AR sound/usb/hiface/built-in.a
AR kernel/power/built-in.a
AR sound/usb/bcd2000/built-in.a
CC sound/pci/hda/hda_sysfs.o
AR sound/usb/built-in.a
CC sound/pci/hda/hda_controller.o
CC lib/zstd/zstd_common_module.o
CC fs/jbd2/transaction.o
CC arch/x86/kernel/cpu/rdrand.o
CC net/ipv4/ip_forward.o
CC net/xfrm/xfrm_sysctl.o
CC net/unix/sysctl_net_unix.o
CC sound/core/vmaster.o
CC kernel/irq/msi.o
CC fs/proc/stat.o
CC io_uring/splice.o
CC sound/pci/hda/hda_proc.o
CC arch/x86/kernel/cpu/match.o
CC net/ipv6/netfilter/ip6table_filter.o
CC security/selinux/ss/avtab.o
CC lib/crypto/blake2s.o
CC arch/x86/kernel/cpu/bugs.o
CC net/netfilter/nf_sockopt.o
CC net/netfilter/utils.o
CC drivers/acpi/acpica/dsmethod.o
AR sound/pci/korg1212/built-in.a
AR sound/pci/mixart/built-in.a
CC drivers/acpi/acpica/dsmthdat.o
AR sound/pci/nm256/built-in.a
CC net/ipv6/netfilter/ip6table_mangle.o
CC fs/netfs/misc.o
CC crypto/akcipher.o
CC net/ipv4/netfilter/iptable_mangle.o
CC crypto/sig.o
CC drivers/pnp/pnpacpi/core.o
CC drivers/pnp/core.o
AR lib/crypto/mpi/built-in.a
AR drivers/amba/built-in.a
CC lib/zstd/common/debug.o
CC kernel/module/procfs.o
CC arch/x86/kernel/process_32.o
CC drivers/pnp/card.o
CC net/sched/cls_cgroup.o
CC net/xfrm/xfrm_replay.o
CC lib/crypto/blake2s-generic.o
AR drivers/clk/actions/built-in.a
AR drivers/clk/analogbits/built-in.a
CC fs/ext4/ext4_jbd2.o
AR drivers/clk/bcm/built-in.a
AR drivers/clk/imgtec/built-in.a
AR drivers/clk/imx/built-in.a
AR drivers/clk/ingenic/built-in.a
AR drivers/clk/mediatek/built-in.a
CC drivers/pnp/pnpacpi/rsparser.o
AR drivers/clk/microchip/built-in.a
CC kernel/time/clocksource.o
AR drivers/clk/mstar/built-in.a
CC drivers/dma/dw/core.o
AR drivers/clk/mvebu/built-in.a
CC sound/core/ctljack.o
AR drivers/clk/ralink/built-in.a
CC arch/x86/events/intel/uncore_discovery.o
AR drivers/clk/renesas/built-in.a
AR drivers/clk/socfpga/built-in.a
CC fs/proc/uptime.o
AR drivers/clk/sophgo/built-in.a
AR drivers/clk/sprd/built-in.a
AR drivers/clk/starfive/built-in.a
AR drivers/dma/idxd/built-in.a
CC drivers/dma/hsu/hsu.o
AR drivers/clk/sunxi-ng/built-in.a
CC lib/buildid.o
AR drivers/clk/ti/built-in.a
AR drivers/soc/apple/built-in.a
CC drivers/acpi/acpica/dsobject.o
AR drivers/clk/versatile/built-in.a
AR drivers/soc/aspeed/built-in.a
AR drivers/clk/xilinx/built-in.a
AR drivers/soc/bcm/built-in.a
AR drivers/clk/built-in.a
AR drivers/soc/fsl/built-in.a
AR drivers/soc/fujitsu/built-in.a
CC drivers/acpi/acpica/dsopcode.o
AR drivers/soc/hisilicon/built-in.a
CC drivers/pnp/driver.o
AR drivers/soc/imx/built-in.a
AR drivers/soc/ixp4xx/built-in.a
AR drivers/soc/loongson/built-in.a
CC net/ethtool/rss.o
AR drivers/soc/mediatek/built-in.a
CC io_uring/sync.o
AR drivers/soc/microchip/built-in.a
CC mm/util.o
AR drivers/soc/nuvoton/built-in.a
AR drivers/soc/pxa/built-in.a
AR drivers/soc/amlogic/built-in.a
AR net/unix/built-in.a
AR drivers/soc/qcom/built-in.a
CC security/selinux/ss/policydb.o
AR drivers/soc/renesas/built-in.a
CC net/core/dev_addr_lists.o
AR drivers/soc/rockchip/built-in.a
CC lib/crypto/sha1.o
AR drivers/soc/sunxi/built-in.a
AR drivers/soc/ti/built-in.a
AR drivers/soc/versatile/built-in.a
CC crypto/kpp.o
CC sound/core/jack.o
AR drivers/soc/xilinx/built-in.a
AR drivers/soc/built-in.a
CC kernel/module/sysfs.o
CC mm/mmzone.o
CC drivers/acpi/acpica/dspkginit.o
CC fs/ramfs/inode.o
CC drivers/pnp/resource.o
CC drivers/pci/pci-driver.o
AR sound/pci/oxygen/built-in.a
CC net/ipv4/netfilter/ipt_REJECT.o
CC net/ipv6/ip6_output.o
CC arch/x86/events/intel/cstate.o
CC kernel/irq/affinity.o
CC fs/netfs/objects.o
CC fs/netfs/read_collect.o
CC io_uring/msg_ring.o
CC mm/vmstat.o
CC security/selinux/ss/services.o
CC drivers/acpi/x86/apple.o
CC fs/proc/util.o
CC fs/netfs/read_pgpriv2.o
CC sound/pci/hda/hda_hwdep.o
CC fs/hugetlbfs/inode.o
CC fs/fat/cache.o
CC lib/crypto/sha256.o
CC fs/isofs/namei.o
CC block/blk-mq-tag.o
CC fs/jbd2/commit.o
CC drivers/acpi/acpica/dsutils.o
CC net/ipv6/netfilter/nf_defrag_ipv6_hooks.o
AR drivers/pnp/pnpacpi/built-in.a
AR net/packet/built-in.a
CC drivers/acpi/tables.o
CC sound/core/hwdep.o
CC kernel/time/jiffies.o
CC net/netfilter/nfnetlink.o
AR drivers/dma/hsu/built-in.a
CC net/sched/ematch.o
CC fs/ext4/extents.o
CC fs/nfs/client.o
CC net/netfilter/nfnetlink_log.o
CC sound/pci/hda/hda_intel.o
CC kernel/irq/matrix.o
AR sound/pci/pcxhr/built-in.a
CC net/xfrm/xfrm_device.o
CC arch/x86/kernel/cpu/aperfmperf.o
CC net/ipv4/ip_options.o
CC drivers/dma/dw/dw.o
AR kernel/module/built-in.a
CC net/xfrm/xfrm_nat_keepalive.o
ASN.1 crypto/rsapubkey.asn1.[ch]
ASN.1 crypto/rsaprivkey.asn1.[ch]
CC crypto/rsa.o
CC drivers/acpi/x86/cmos_rtc.o
CC fs/proc/version.o
CC net/ethtool/linkstate.o
CC fs/ramfs/file-mmu.o
CC kernel/time/timer_list.o
CC net/ipv6/netfilter/nf_conntrack_reasm.o
CC drivers/acpi/acpica/dswexec.o
CC drivers/acpi/osi.o
AR lib/crypto/built-in.a
CC drivers/dma/dw/idma32.o
CC security/selinux/ss/conditional.o
AR arch/x86/events/intel/built-in.a
AR arch/x86/events/built-in.a
CC drivers/pnp/manager.o
CC fs/isofs/inode.o
CC fs/proc/softirqs.o
CC fs/fat/dir.o
CC io_uring/advise.o
CC fs/jbd2/recovery.o
CC drivers/pci/search.o
CC block/blk-stat.o
CC [M] net/ipv4/netfilter/iptable_nat.o
CC sound/core/timer.o
CC drivers/acpi/osl.o
CC fs/exportfs/expfs.o
CC drivers/acpi/acpica/dswload.o
CC kernel/futex/core.o
CC arch/x86/kernel/cpu/cpuid-deps.o
AR net/ipv4/netfilter/built-in.a
CC arch/x86/kernel/cpu/umwait.o
AR sound/firewire/built-in.a
CC net/ethtool/debug.o
CC drivers/acpi/x86/lpss.o
CC lib/zstd/common/entropy_common.o
CC crypto/rsa_helper.o
CC kernel/time/timeconv.o
CC fs/netfs/read_retry.o
CC lib/zstd/common/error_private.o
CC drivers/dma/dw/acpi.o
AR net/sched/built-in.a
CC kernel/time/timecounter.o
AR fs/ramfs/built-in.a
CC fs/isofs/dir.o
AR sound/sparc/built-in.a
AR sound/spi/built-in.a
CC net/ethtool/wol.o
CC fs/fat/fatent.o
AR sound/pci/riptide/built-in.a
CC drivers/pci/rom.o
AR net/dsa/built-in.a
CC fs/fat/file.o
CC fs/proc/namespaces.o
CC mm/backing-dev.o
CC drivers/pnp/support.o
CC lib/zstd/common/fse_decompress.o
CC kernel/cgroup/cgroup.o
CC net/ethtool/features.o
CC drivers/acpi/acpica/dswload2.o
CC io_uring/statx.o
AR sound/pci/rme9652/built-in.a
AR sound/parisc/built-in.a
CC net/core/dst.o
CC fs/lockd/clntlock.o
CC crypto/rsa-pkcs1pad.o
CC kernel/time/alarmtimer.o
CC kernel/trace/trace_clock.o
CC net/xfrm/xfrm_algo.o
CC kernel/trace/ring_buffer.o
AR kernel/irq/built-in.a
AR fs/hugetlbfs/built-in.a
CC io_uring/timeout.o
CC fs/lockd/clntproc.o
CC block/blk-mq-sysfs.o
CC net/xfrm/xfrm_user.o
AR fs/exportfs/built-in.a
CC drivers/acpi/x86/s2idle.o
CC fs/jbd2/checkpoint.o
MKCAP arch/x86/kernel/cpu/capflags.c
CC net/netfilter/nf_conntrack_core.o
CC fs/isofs/util.o
AR sound/pci/hda/built-in.a
CC net/ipv6/ip6_input.o
AR drivers/dma/dw/built-in.a
AR sound/pci/trident/built-in.a
AR drivers/dma/amd/built-in.a
AR sound/pci/ymfpci/built-in.a
AR drivers/dma/mediatek/built-in.a
AR sound/pci/vx222/built-in.a
CC fs/nfs/dir.o
AR drivers/dma/qcom/built-in.a
CC drivers/acpi/acpica/dswscope.o
AR sound/pci/built-in.a
AR drivers/dma/stm32/built-in.a
AR drivers/dma/ti/built-in.a
AR drivers/dma/xilinx/built-in.a
CC drivers/pnp/interface.o
CC kernel/bpf/core.o
CC kernel/futex/syscalls.o
CC drivers/dma/dmaengine.o
CC fs/fat/inode.o
CC net/ethtool/privflags.o
CC lib/zstd/common/zstd_common.o
CC net/ipv4/ip_output.o
CC drivers/pci/setup-res.o
CC fs/proc/self.o
CC mm/mm_init.o
CC kernel/cgroup/rstat.o
AR lib/zstd/built-in.a
CC lib/clz_tab.o
CC lib/cmdline.o
CC fs/netfs/read_single.o
CC fs/lockd/clntxdr.o
CC net/ipv6/netfilter/nf_reject_ipv6.o
CC fs/nfs/file.o
CC crypto/rsassa-pkcs1.o
CC fs/ext4/extents_status.o
CC lib/cpumask.o
CC net/ipv6/netfilter/ip6t_ipv6header.o
CC drivers/acpi/acpica/dswstate.o
CC net/sunrpc/auth_gss/auth_gss.o
CC net/sunrpc/clnt.o
CC sound/core/hrtimer.o
CC net/ethtool/rings.o
CC block/blk-mq-cpumap.o
CC fs/isofs/rock.o
CC net/sunrpc/auth_gss/gss_mech_switch.o
CC drivers/pnp/quirks.o
CC security/selinux/ss/mls.o
CC kernel/events/core.o
CC fs/fat/misc.o
CC fs/proc/thread_self.o
CC drivers/acpi/x86/utils.o
CC drivers/acpi/x86/blacklist.o
CC fs/jbd2/revoke.o
CC io_uring/fdinfo.o
CC drivers/acpi/acpica/evevent.o
AR sound/pcmcia/vx/built-in.a
CC kernel/time/posix-timers.o
AR sound/pcmcia/pdaudiocf/built-in.a
AR sound/pcmcia/built-in.a
CC fs/isofs/export.o
CC net/sunrpc/xprt.o
CC drivers/pci/irq.o
CC lib/ctype.o
CC drivers/virtio/virtio.o
CC sound/core/pcm.o
CC kernel/futex/pi.o
CC lib/dec_and_lock.o
CC crypto/acompress.o
CC drivers/tty/vt/vt_ioctl.o
CC drivers/tty/hvc/hvc_console.o
CC fs/netfs/rolling_buffer.o
CC lib/decompress.o
CC drivers/tty/vt/vc_screen.o
CC block/blk-mq-sched.o
CC drivers/acpi/acpica/evgpe.o
CC lib/decompress_bunzip2.o
AR sound/mips/built-in.a
CC net/ipv4/ip_sockglue.o
CC drivers/dma/virt-dma.o
CC fs/proc/proc_sysctl.o
CC fs/lockd/host.o
CC drivers/pnp/system.o
AR drivers/acpi/x86/built-in.a
CC fs/lockd/svc.o
CC net/ipv6/netfilter/ip6t_REJECT.o
CC mm/percpu.o
CC sound/core/pcm_native.o
CC fs/isofs/joliet.o
CC fs/fat/nfs.o
CC net/ethtool/channels.o
CC fs/netfs/write_collect.o
CC drivers/virtio/virtio_ring.o
CC kernel/fork.o
CC drivers/pci/vpd.o
CC fs/jbd2/journal.o
CC drivers/acpi/acpica/evgpeblk.o
CC io_uring/cancel.o
CC kernel/futex/requeue.o
CC net/sunrpc/auth_gss/svcauth_gss.o
CC kernel/events/ring_buffer.o
CC security/selinux/ss/context.o
AR drivers/pnp/built-in.a
CC drivers/dma/acpi-dma.o
CC kernel/trace/trace.o
CC arch/x86/kernel/signal.o
CC lib/decompress_inflate.o
AR drivers/tty/hvc/built-in.a
CC net/ipv6/addrconf.o
CC crypto/scompress.o
CC fs/netfs/write_issue.o
CC fs/isofs/compress.o
CC drivers/tty/vt/selection.o
CC drivers/acpi/acpica/evgpeinit.o
CC net/ethtool/coalesce.o
CC net/netfilter/nf_conntrack_standalone.o
CC fs/nls/nls_base.o
CC kernel/time/posix-cpu-timers.o
CC block/ioctl.o
CC kernel/time/posix-clock.o
CC fs/fat/namei_vfat.o
AR net/xfrm/built-in.a
CC fs/nls/nls_cp437.o
CC fs/ext4/file.o
AR net/wireless/tests/built-in.a
CC net/wireless/core.o
CC drivers/pci/setup-bus.o
CC kernel/futex/waitwake.o
CC drivers/acpi/acpica/evgpeutil.o
CC net/wireless/sysfs.o
CC lib/decompress_unlz4.o
CC fs/proc/proc_net.o
CC fs/fat/namei_msdos.o
CC io_uring/waitid.o
CC io_uring/register.o
AR drivers/dma/built-in.a
CC fs/netfs/write_retry.o
CC io_uring/truncate.o
CC drivers/tty/serial/8250/8250_core.o
CC fs/nls/nls_ascii.o
AR net/ipv6/netfilter/built-in.a
CC kernel/cgroup/namespace.o
CC fs/lockd/svclock.o
CC fs/proc/kcore.o
CC security/selinux/netlabel.o
AR kernel/bpf/built-in.a
CC kernel/cgroup/cgroup-v1.o
CC fs/nfs/getroot.o
CC drivers/tty/vt/keyboard.o
CC drivers/acpi/acpica/evglock.o
AR fs/isofs/built-in.a
CC kernel/trace/trace_output.o
CC net/netfilter/nf_conntrack_expect.o
CC crypto/algboss.o
CC net/ethtool/pause.o
CC kernel/cgroup/freezer.o
CC lib/decompress_unlzma.o
CC fs/nls/nls_iso8859-1.o
CC net/core/netevent.o
CC net/ipv4/inet_hashtables.o
CC sound/core/pcm_lib.o
CC block/genhd.o
AR kernel/futex/built-in.a
CC drivers/acpi/utils.o
AR net/mac80211/tests/built-in.a
CC net/mac80211/main.o
CC drivers/acpi/acpica/evhandler.o
CC net/ethtool/eee.o
CC arch/x86/kernel/signal_32.o
CC kernel/time/itimer.o
CC drivers/virtio/virtio_anchor.o
CC net/sunrpc/auth_gss/gss_rpc_upcall.o
CC block/ioprio.o
CC fs/ext4/fsmap.o
CC fs/nls/nls_utf8.o
CC drivers/acpi/reboot.o
CC mm/slab_common.o
AR drivers/tty/ipwireless/built-in.a
CC drivers/tty/serial/serial_core.o
CC mm/compaction.o
AR fs/netfs/built-in.a
AR sound/soc/built-in.a
AR fs/fat/built-in.a
CC net/ipv6/addrlabel.o
CC net/sunrpc/socklib.o
CC drivers/tty/serial/8250/8250_platform.o
CC drivers/tty/serial/8250/8250_pnp.o
CC drivers/acpi/acpica/evmisc.o
CC fs/proc/kmsg.o
CC net/core/neighbour.o
CC fs/proc/page.o
CC fs/lockd/svcshare.o
AR fs/nls/built-in.a
CC net/wireless/radiotap.o
CC lib/decompress_unlzo.o
CC crypto/testmgr.o
CC fs/nfs/inode.o
CC crypto/cmac.o
CC drivers/virtio/virtio_pci_modern_dev.o
CC kernel/events/callchain.o
CC net/ipv4/inet_timewait_sock.o
CC sound/core/pcm_misc.o
CC net/ipv4/inet_connection_sock.o
CC net/mac80211/status.o
CC drivers/acpi/acpica/evregion.o
AR fs/jbd2/built-in.a
CC net/mac80211/driver-ops.o
AR security/selinux/built-in.a
CC net/netlabel/netlabel_user.o
CC drivers/pci/vc.o
AR security/built-in.a
CC block/badblocks.o
CC kernel/cgroup/legacy_freezer.o
CC block/blk-rq-qos.o
CC drivers/tty/tty_io.o
CC lib/decompress_unxz.o
CC drivers/tty/vt/vt.o
CC kernel/time/clockevents.o
CC io_uring/memmap.o
CC net/netfilter/nf_conntrack_helper.o
CC net/ethtool/tsinfo.o
CC drivers/char/hw_random/core.o
CC drivers/char/hw_random/intel-rng.o
CC arch/x86/kernel/cpu/powerflags.o
AR drivers/iommu/amd/built-in.a
CC drivers/tty/serial/8250/8250_rsa.o
AR drivers/iommu/intel/built-in.a
CC net/netlabel/netlabel_kapi.o
AR drivers/iommu/arm/arm-smmu/built-in.a
CC net/sunrpc/auth_gss/gss_rpc_xdr.o
AR drivers/iommu/arm/arm-smmu-v3/built-in.a
AR fs/proc/built-in.a
AR drivers/iommu/arm/built-in.a
CC net/netlabel/netlabel_domainhash.o
CC kernel/time/tick-common.o
CC crypto/hmac.o
AR drivers/iommu/iommufd/built-in.a
AR drivers/iommu/riscv/built-in.a
CC fs/nfs/super.o
CC drivers/iommu/iommu.o
CC drivers/acpi/acpica/evrgnini.o
CC kernel/time/tick-broadcast.o
CC drivers/pci/mmap.o
CC arch/x86/kernel/cpu/topology.o
CC drivers/virtio/virtio_pci_legacy_dev.o
CC lib/decompress_unzstd.o
CC block/disk-events.o
COPY drivers/tty/vt/defkeymap.c
CC kernel/cgroup/pids.o
CC net/ipv4/tcp.o
CC drivers/tty/n_tty.o
CC sound/core/pcm_memory.o
CC fs/lockd/svcproc.o
CC kernel/exec_domain.o
CC drivers/iommu/iommu-traces.o
CC net/ipv6/route.o
CC fs/ext4/fsync.o
CC drivers/acpi/acpica/evsci.o
CC net/netfilter/nf_conntrack_proto.o
CC net/wireless/util.o
CC crypto/crypto_null.o
CC io_uring/alloc_cache.o
AR drivers/gpu/host1x/built-in.a
CC drivers/tty/serial/8250/8250_port.o
AR drivers/gpu/vga/built-in.a
CC drivers/acpi/nvs.o
CC drivers/virtio/virtio_pci_modern.o
CC arch/x86/kernel/traps.o
CC drivers/char/hw_random/amd-rng.o
AR drivers/gpu/drm/tests/built-in.a
CC arch/x86/kernel/cpu/proc.o
AR drivers/gpu/drm/arm/built-in.a
AR drivers/gpu/drm/clients/built-in.a
CC lib/dump_stack.o
CC drivers/pci/devres.o
CC drivers/gpu/drm/display/drm_display_helper_mod.o
CC arch/x86/kernel/cpu/feat_ctl.o
CC fs/lockd/svcsubs.o
CC drivers/acpi/acpica/evxface.o
CC kernel/cgroup/rdma.o
CC crypto/md5.o
CC kernel/time/tick-broadcast-hrtimer.o
CC net/ethtool/cabletest.o
CC block/blk-ia-ranges.o
CC mm/show_mem.o
CC kernel/trace/trace_seq.o
CC sound/core/memalloc.o
CC net/sunrpc/auth_gss/trace.o
CC drivers/gpu/drm/display/drm_dp_dual_mode_helper.o
CC mm/interval_tree.o
AR sound/atmel/built-in.a
CC net/mac80211/sta_info.o
CC net/wireless/reg.o
CC drivers/char/agp/backend.o
CC io_uring/io-wq.o
CC net/netlabel/netlabel_addrlist.o
CC sound/core/pcm_timer.o
CC kernel/trace/trace_stat.o
CC drivers/char/hw_random/geode-rng.o
CC kernel/time/tick-oneshot.o
CC drivers/virtio/virtio_pci_common.o
CC drivers/acpi/acpica/evxfevnt.o
CC lib/earlycpio.o
CC block/early-lookup.o
CC drivers/acpi/acpica/evxfgpe.o
CC arch/x86/kernel/cpu/intel.o
CC sound/core/seq_device.o
CC net/ethtool/tunnels.o
CC net/core/rtnetlink.o
CC lib/extable.o
CC crypto/sha256_generic.o
CC kernel/trace/trace_printk.o
CC net/wireless/scan.o
CC drivers/tty/serial/8250/8250_dma.o
CC drivers/pci/proc.o
CC net/ethtool/fec.o
CC kernel/cgroup/cpuset.o
CC fs/ext4/hash.o
CC net/sunrpc/auth_gss/gss_krb5_mech.o
AR fs/unicode/built-in.a
CC drivers/gpu/drm/display/drm_dp_helper.o
CC net/rfkill/core.o
CC net/ipv4/tcp_input.o
CC kernel/time/tick-sched.o
CC drivers/pci/pci-sysfs.o
CC drivers/pci/slot.o
CC drivers/acpi/acpica/evxfregn.o
CC fs/nfs/io.o
CC lib/flex_proportions.o
CC drivers/iommu/iommu-sysfs.o
CC net/sunrpc/xprtsock.o
CC kernel/events/hw_breakpoint.o
CC net/netfilter/nf_conntrack_proto_generic.o
CC drivers/char/hw_random/via-rng.o
CC io_uring/futex.o
CC drivers/tty/vt/consolemap.o
CC fs/lockd/mon.o
CC drivers/char/agp/generic.o
CC net/9p/mod.o
CC arch/x86/kernel/cpu/tsx.o
AR sound/core/built-in.a
CC net/dns_resolver/dns_key.o
CC mm/list_lru.o
CC sound/hda/hda_bus_type.o
CC crypto/sha512_generic.o
CC mm/workingset.o
CC block/bsg.o
CC mm/debug.o
CC drivers/virtio/virtio_pci_legacy.o
CC lib/idr.o
CC drivers/acpi/acpica/exconcat.o
CC lib/iomem_copy.o
CC kernel/trace/pid_list.o
AR drivers/char/hw_random/built-in.a
CC net/sunrpc/auth_gss/gss_krb5_seal.o
CC net/netlabel/netlabel_mgmt.o
CC drivers/tty/serial/serial_base_bus.o
CC kernel/cgroup/misc.o
CC drivers/tty/serial/8250/8250_dwlib.o
CC arch/x86/kernel/cpu/intel_epb.o
CC fs/ext4/ialloc.o
CC drivers/iommu/dma-iommu.o
CC net/9p/client.o
CC drivers/iommu/iova.o
CC net/ethtool/eeprom.o
CC fs/autofs/init.o
CC net/dns_resolver/dns_query.o
CC net/rfkill/input.o
CC fs/9p/vfs_super.o
CC drivers/acpi/acpica/exconfig.o
CC sound/hda/hdac_bus.o
CC kernel/panic.o
CC block/blk-cgroup.o
CC kernel/time/timer_migration.o
CC lib/irq_regs.o
CC drivers/gpu/drm/ttm/ttm_tt.o
HOSTCC drivers/tty/vt/conmakehash
CC io_uring/epoll.o
CC crypto/sha3_generic.o
CC drivers/gpu/drm/ttm/ttm_bo.o
CC drivers/virtio/virtio_pci_admin_legacy_io.o
CC arch/x86/kernel/cpu/amd.o
CC mm/gup.o
CC fs/nfs/direct.o
CC fs/9p/vfs_inode.o
CC drivers/pci/pci-acpi.o
CC net/netfilter/nf_conntrack_proto_tcp.o
CC lib/is_single_threaded.o
CC drivers/char/agp/isoch.o
CC net/core/utils.o
CC drivers/tty/vt/defkeymap.o
CC fs/lockd/trace.o
CC drivers/gpu/drm/ttm/ttm_bo_util.o
CC kernel/events/uprobes.o
CC drivers/acpi/acpica/exconvrt.o
CC kernel/trace/trace_sched_switch.o
CC drivers/tty/serial/8250/8250_pcilib.o
CC drivers/tty/serial/serial_ctrl.o
CONMK drivers/tty/vt/consolemap_deftbl.c
CC drivers/tty/vt/consolemap_deftbl.o
AR net/rfkill/built-in.a
CC fs/autofs/inode.o
AR drivers/tty/vt/built-in.a
AR sound/x86/built-in.a
CC net/ipv6/ip6_fib.o
CC net/ipv4/tcp_output.o
CC net/sunrpc/auth_gss/gss_krb5_unseal.o
AR net/dns_resolver/built-in.a
CC crypto/ecb.o
CC crypto/cbc.o
CC lib/klist.o
CC drivers/char/agp/amd64-agp.o
CC sound/hda/hdac_device.o
CC mm/mmap_lock.o
CC drivers/acpi/acpica/excreate.o
CC drivers/virtio/virtio_input.o
CC net/netlabel/netlabel_unlabeled.o
CC kernel/cgroup/debug.o
CC fs/lockd/xdr.o
CC io_uring/napi.o
CC drivers/gpu/drm/display/drm_dp_mst_topology.o
CC net/ethtool/stats.o
CC lib/kobject.o
CC net/9p/error.o
AR fs/hostfs/built-in.a
CC drivers/tty/serial/serial_port.o
CC mm/highmem.o
CC mm/memory.o
CC net/netfilter/nf_conntrack_proto_udp.o
CC crypto/ctr.o
CC drivers/tty/serial/8250/8250_early.o
CC arch/x86/kernel/cpu/hygon.o
CC kernel/cpu.o
AR drivers/iommu/built-in.a
CC sound/hda/hdac_sysfs.o
CC drivers/char/agp/intel-agp.o
CC drivers/acpi/acpica/exdebug.o
CC drivers/pci/iomap.o
CC fs/autofs/root.o
CC fs/9p/vfs_inode_dotl.o
CC drivers/gpu/drm/ttm/ttm_bo_vm.o
CC mm/mincore.o
CC drivers/virtio/virtio_dma_buf.o
CC drivers/tty/tty_ioctl.o
CC drivers/acpi/wakeup.o
CC net/9p/protocol.o
CC block/blk-ioprio.o
CC crypto/gcm.o
CC kernel/trace/trace_nop.o
CC net/netfilter/nf_conntrack_proto_icmp.o
CC arch/x86/kernel/cpu/centaur.o
CC drivers/acpi/acpica/exdump.o
CC net/netfilter/nf_conntrack_extend.o
CC lib/kobject_uevent.o
CC net/sunrpc/auth_gss/gss_krb5_wrap.o
AR kernel/cgroup/built-in.a
CC kernel/time/vsyscall.o
CC arch/x86/kernel/idt.o
CC drivers/tty/serial/8250/8250_exar.o
CC fs/ext4/indirect.o
CC net/mac80211/wep.o
CC drivers/acpi/sleep.o
CC net/core/link_watch.o
CC net/sunrpc/auth_gss/gss_krb5_crypto.o
CC drivers/char/agp/intel-gtt.o
CC drivers/acpi/acpica/exfield.o
CC kernel/exit.o
CC drivers/pci/quirks.o
CC fs/debugfs/inode.o
CC kernel/time/timekeeping_debug.o
CC sound/hda/hdac_regmap.o
CC net/core/filter.o
CC arch/x86/kernel/cpu/transmeta.o
CC fs/lockd/netlink.o
CC fs/tracefs/inode.o
AR drivers/virtio/built-in.a
CC fs/lockd/clnt4xdr.o
CC fs/debugfs/file.o
CC fs/nfs/pagelist.o
CC drivers/gpu/drm/ttm/ttm_module.o
AR kernel/events/built-in.a
CC net/ethtool/phc_vclocks.o
CC kernel/softirq.o
CC net/handshake/alert.o
CC block/blk-iolatency.o
CC fs/autofs/symlink.o
CC net/9p/trans_common.o
CC net/netlabel/netlabel_cipso_v4.o
AR io_uring/built-in.a
CC net/wireless/nl80211.o
CC [M] fs/efivarfs/inode.o
CC fs/9p/vfs_addr.o
CC fs/open.o
CC kernel/trace/blktrace.o
CC drivers/acpi/acpica/exfldio.o
CC drivers/gpu/drm/ttm/ttm_execbuf_util.o
CC drivers/gpu/drm/i915/i915_config.o
CC net/ipv6/ipv6_sockglue.o
CC net/netlabel/netlabel_calipso.o
CC crypto/ccm.o
CC arch/x86/kernel/cpu/zhaoxin.o
AR sound/xen/built-in.a
CC kernel/time/namespace.o
CC drivers/acpi/device_sysfs.o
CC net/ethtool/mm.o
CC net/9p/trans_fd.o
CC drivers/tty/serial/8250/8250_lpss.o
CC drivers/gpu/drm/i915/i915_driver.o
CC lib/logic_pio.o
CC net/netfilter/nf_conntrack_acct.o
CC kernel/trace/trace_events.o
AR drivers/char/agp/built-in.a
CC sound/hda/hdac_controller.o
CC drivers/char/mem.o
CC sound/hda/hdac_stream.o
CC sound/hda/array.o
CC net/sunrpc/sched.o
CC net/mac80211/aead_api.o
CC drivers/acpi/acpica/exmisc.o
CC net/sunrpc/auth_gss/gss_krb5_keys.o
CC drivers/pci/pci-label.o
CC [M] fs/efivarfs/file.o
CC fs/autofs/waitq.o
CC fs/tracefs/event_inode.o
CC arch/x86/kernel/cpu/vortex.o
CC drivers/gpu/drm/ttm/ttm_range_manager.o
CC arch/x86/kernel/cpu/perfctr-watchdog.o
CC sound/hda/hdmi_chmap.o
CC fs/9p/vfs_file.o
CC drivers/gpu/drm/ttm/ttm_resource.o
CC fs/lockd/xdr4.o
AR fs/debugfs/built-in.a
CC drivers/acpi/acpica/exmutex.o
CC net/devres.o
CC fs/autofs/expire.o
CC lib/maple_tree.o
CC net/ipv6/ndisc.o
AR kernel/time/built-in.a
CC drivers/gpu/drm/display/drm_dsc_helper.o
CC drivers/tty/serial/8250/8250_mid.o
CC drivers/acpi/acpica/exnames.o
AR drivers/gpu/drm/renesas/rcar-du/built-in.a
CC crypto/aes_generic.o
AR drivers/gpu/drm/renesas/rz-du/built-in.a
AR drivers/gpu/drm/renesas/built-in.a
CC net/handshake/genl.o
CC fs/read_write.o
CC net/9p/trans_virtio.o
CC net/wireless/mlme.o
CC net/mac80211/wpa.o
CC fs/ext4/inline.o
CC block/blk-iocost.o
CC [M] fs/efivarfs/super.o
AR net/netlabel/built-in.a
CC drivers/gpu/drm/display/drm_hdcp_helper.o
CC drivers/char/random.o
CC drivers/tty/serial/8250/8250_pci.o
CC net/sunrpc/auth.o
CC net/ethtool/module.o
CC drivers/connector/cn_queue.o
CC net/ethtool/cmis_fw_update.o
CC arch/x86/kernel/cpu/vmware.o
CC fs/ext4/inode.o
CC drivers/pci/vgaarb.o
CC drivers/tty/serial/8250/8250_pericom.o
CC net/netfilter/nf_conntrack_seqadj.o
CC net/socket.o
CC net/ipv4/tcp_timer.o
CC drivers/acpi/acpica/exoparg1.o
CC fs/9p/vfs_dir.o
CC drivers/gpu/drm/display/drm_hdmi_helper.o
AR fs/tracefs/built-in.a
CC kernel/resource.o
CC kernel/sysctl.o
CC kernel/capability.o
CC sound/hda/trace.o
CC sound/hda/hdac_component.o
AR net/sunrpc/auth_gss/built-in.a
CC fs/ext4/ioctl.o
CC drivers/gpu/drm/ttm/ttm_pool.o
CC drivers/connector/connector.o
CC fs/nfs/read.o
CC fs/autofs/dev-ioctl.o
CC [M] fs/efivarfs/vars.o
CC drivers/gpu/drm/i915/i915_drm_client.o
CC crypto/authenc.o
CC net/handshake/netlink.o
CC fs/lockd/svc4proc.o
CC drivers/base/power/sysfs.o
CC drivers/acpi/acpica/exoparg2.o
CC block/mq-deadline.o
CC drivers/block/loop.o
CC drivers/base/firmware_loader/builtin/main.o
CC mm/mlock.o
CC crypto/authencesn.o
CC arch/x86/kernel/cpu/hypervisor.o
CC drivers/gpu/drm/display/drm_scdc_helper.o
CC fs/9p/vfs_dentry.o
CC net/mac80211/scan.o
CC crypto/lzo.o
AR net/9p/built-in.a
CC crypto/lzo-rle.o
CC drivers/char/misc.o
CC arch/x86/kernel/cpu/mshyperv.o
CC drivers/acpi/acpica/exoparg3.o
CC net/ethtool/cmis_cdb.o
AR drivers/base/firmware_loader/builtin/built-in.a
CC drivers/base/firmware_loader/main.o
AR drivers/pci/built-in.a
CC sound/hda/hdac_i915.o
CC fs/nfs/symlink.o
CC drivers/base/power/generic_ops.o
LD [M] fs/efivarfs/efivarfs.o
CC net/ipv4/tcp_ipv4.o
CC net/ipv4/tcp_minisocks.o
CC fs/nfs/unlink.o
AR fs/autofs/built-in.a
AR drivers/tty/serial/8250/built-in.a
CC drivers/gpu/drm/ttm/ttm_device.o
CC drivers/tty/serial/earlycon.o
CC lib/memcat_p.o
CC lib/nmi_backtrace.o
CC kernel/trace/trace_export.o
CC drivers/block/virtio_blk.o
CC drivers/connector/cn_proc.o
CC net/netfilter/nf_conntrack_proto_icmpv6.o
CC drivers/gpu/drm/i915/i915_getparam.o
CC drivers/acpi/acpica/exoparg6.o
CC mm/mmap.o
CC fs/9p/v9fs.o
AR sound/virtio/built-in.a
CC arch/x86/kernel/cpu/debugfs.o
CC net/core/sock_diag.o
CC kernel/trace/trace_event_perf.o
CC fs/nfs/write.o
CC drivers/base/power/common.o
CC drivers/char/virtio_console.o
CC net/sunrpc/auth_null.o
AR drivers/gpu/drm/display/built-in.a
CC net/sunrpc/auth_tls.o
CC sound/hda/intel-dsp-config.o
CC net/handshake/request.o
CC net/ipv6/udp.o
CC fs/lockd/procfs.o
CC crypto/rng.o
CC arch/x86/kernel/cpu/bus_lock.o
CC drivers/acpi/acpica/exprep.o
CC net/ethtool/pse-pd.o
CC fs/9p/fid.o
CC fs/nfs/namespace.o
CC net/ipv6/udplite.o
AR drivers/tty/serial/built-in.a
CC drivers/tty/tty_ldisc.o
CC fs/ext4/mballoc.o
CC drivers/gpu/drm/ttm/ttm_sys_manager.o
CC drivers/acpi/acpica/exregion.o
CC kernel/ptrace.o
AR drivers/base/firmware_loader/built-in.a
CC fs/ext4/migrate.o
CC sound/sound_core.o
CC net/core/dev_ioctl.o
CC drivers/base/power/qos.o
CC drivers/base/power/runtime.o
CC kernel/trace/trace_events_filter.o
CC drivers/gpu/drm/ttm/ttm_backup.o
AR drivers/gpu/drm/omapdrm/built-in.a
CC sound/hda/intel-nhlt.o
CC arch/x86/kernel/irq.o
CC block/kyber-iosched.o
CC net/ipv4/tcp_cong.o
CC drivers/base/power/wakeirq.o
CC drivers/gpu/drm/i915/i915_ioctl.o
CC drivers/base/power/main.o
AR fs/lockd/built-in.a
CC net/ipv6/raw.o
CC drivers/acpi/acpica/exresnte.o
CC drivers/gpu/drm/i915/i915_irq.o
AR drivers/connector/built-in.a
CC kernel/trace/trace_events_trigger.o
CC crypto/drbg.o
CC net/ipv6/icmp.o
CC net/ipv6/mcast.o
AR drivers/block/built-in.a
CC net/core/tso.o
CC fs/9p/xattr.o
CC drivers/tty/tty_buffer.o
CC drivers/gpu/drm/i915/i915_mitigations.o
CC arch/x86/kernel/cpu/capflags.o
CC net/netfilter/nf_conntrack_netlink.o
AR arch/x86/kernel/cpu/built-in.a
AR drivers/gpu/drm/tilcdc/built-in.a
CC net/netfilter/nf_conntrack_ftp.o
CC sound/hda/intel-sdw-acpi.o
CC net/netfilter/nf_conntrack_irc.o
CC kernel/user.o
CC drivers/gpu/drm/virtio/virtgpu_drv.o
CC net/sunrpc/auth_unix.o
CC drivers/acpi/acpica/exresolv.o
CC drivers/acpi/acpica/exresop.o
CC net/wireless/ibss.o
CC net/ethtool/plca.o
CC drivers/gpu/drm/ttm/ttm_agp_backend.o
CC drivers/char/hpet.o
CC drivers/base/regmap/regmap.o
CC net/mac80211/offchannel.o
CC net/handshake/tlshd.o
CC mm/mmu_gather.o
CC block/blk-mq-debugfs.o
CC drivers/misc/eeprom/eeprom_93cx6.o
AR drivers/mfd/built-in.a
CC sound/last.o
CC net/sysctl_net.o
CC net/mac80211/ht.o
AR sound/hda/built-in.a
CC drivers/base/regmap/regcache.o
CC drivers/acpi/acpica/exserial.o
AR drivers/misc/cb710/built-in.a
CC mm/mprotect.o
AR fs/9p/built-in.a
CC block/blk-pm.o
AR drivers/misc/lis3lv02d/built-in.a
CC net/handshake/trace.o
CC drivers/tty/tty_port.o
CC net/netfilter/nf_conntrack_sip.o
CC crypto/jitterentropy.o
CC crypto/jitterentropy-kcapi.o
CC drivers/acpi/acpica/exstore.o
CC drivers/gpu/drm/virtio/virtgpu_kms.o
AR drivers/gpu/drm/ttm/built-in.a
CC drivers/acpi/device_pm.o
AR sound/built-in.a
AR drivers/misc/eeprom/built-in.a
AR drivers/misc/cardreader/built-in.a
AR drivers/nfc/built-in.a
CC drivers/tty/tty_mutex.o
CC drivers/base/regmap/regcache-rbtree.o
AR drivers/misc/keba/built-in.a
CC net/ipv4/tcp_metrics.o
AR drivers/dax/hmem/built-in.a
AR drivers/misc/built-in.a
AR drivers/dax/built-in.a
CC block/holder.o
CC fs/nfs/mount_clnt.o
CC drivers/gpu/drm/i915/i915_module.o
AR drivers/base/test/built-in.a
CC net/sunrpc/svc.o
CC lib/objpool.o
CC kernel/trace/trace_eprobe.o
CC drivers/base/regmap/regcache-flat.o
AR drivers/gpu/drm/imx/built-in.a
CC net/mac80211/agg-tx.o
CC drivers/acpi/acpica/exstoren.o
CC drivers/char/nvram.o
CC crypto/ghash-generic.o
CC net/ethtool/phy.o
CC arch/x86/kernel/irq_32.o
CC arch/x86/kernel/dumpstack_32.o
CC kernel/trace/trace_kprobe.o
CC drivers/acpi/acpica/exstorob.o
CC drivers/base/power/wakeup.o
CC net/mac80211/agg-rx.o
CC drivers/tty/tty_ldsem.o
CC drivers/dma-buf/dma-buf.o
CC net/wireless/sme.o
CC fs/ext4/mmp.o
CC fs/file_table.o
CC drivers/acpi/acpica/exsystem.o
CC drivers/acpi/proc.o
CC drivers/acpi/acpica/extrace.o
CC net/wireless/chan.o
CC drivers/dma-buf/dma-fence.o
CC drivers/base/component.o
CC net/netfilter/nf_nat_core.o
CC drivers/base/power/wakeup_stats.o
CC net/ipv4/tcp_fastopen.o
CC drivers/gpu/drm/virtio/virtgpu_gem.o
AR block/built-in.a
CC crypto/hash_info.o
CC fs/super.o
CC drivers/base/core.o
AR drivers/cxl/core/built-in.a
AR drivers/cxl/built-in.a
CC crypto/rsapubkey.asn1.o
CC crypto/rsaprivkey.asn1.o
CC arch/x86/kernel/time.o
AR crypto/built-in.a
CC drivers/base/bus.o
CC fs/char_dev.o
CC mm/mremap.o
CC kernel/signal.o
CC drivers/acpi/acpica/exutils.o
CC drivers/base/dd.o
CC drivers/base/power/trace.o
CC drivers/gpu/drm/virtio/virtgpu_vram.o
CC drivers/tty/tty_baudrate.o
AR net/handshake/built-in.a
CC drivers/gpu/drm/i915/i915_params.o
CC fs/ext4/move_extent.o
AR drivers/char/built-in.a
CC drivers/macintosh/mac_hid.o
CC fs/nfs/nfstrace.o
CC arch/x86/kernel/ioport.o
AR drivers/scsi/pcmcia/built-in.a
CC drivers/scsi/scsi.o
CC arch/x86/kernel/dumpstack.o
CC net/sunrpc/svcsock.o
CC net/ethtool/tsconfig.o
CC drivers/acpi/acpica/hwacpi.o
CC net/ipv4/tcp_rate.o
CC fs/nfs/export.o
CC drivers/gpu/drm/virtio/virtgpu_display.o
CC kernel/sys.o
CC lib/plist.o
CC drivers/base/regmap/regcache-maple.o
CC net/wireless/ethtool.o
CC net/mac80211/vht.o
CC drivers/acpi/bus.o
CC lib/radix-tree.o
CC drivers/tty/tty_jobctrl.o
CC net/netfilter/nf_nat_proto.o
CC drivers/dma-buf/dma-fence-array.o
CC drivers/acpi/glue.o
CC fs/nfs/sysfs.o
CC drivers/dma-buf/dma-fence-chain.o
CC net/ipv6/reassembly.o
AR drivers/macintosh/built-in.a
CC drivers/acpi/acpica/hwesleep.o
CC drivers/dma-buf/dma-fence-unwrap.o
CC arch/x86/kernel/nmi.o
AR drivers/base/power/built-in.a
CC kernel/trace/error_report-traces.o
CC drivers/acpi/scan.o
CC net/sunrpc/svcauth.o
CC drivers/scsi/hosts.o
CC drivers/gpu/drm/virtio/virtgpu_vq.o
CC net/core/sock_reuseport.o
CC drivers/gpu/drm/virtio/virtgpu_fence.o
CC mm/msync.o
CC kernel/trace/power-traces.o
CC drivers/gpu/drm/i915/i915_pci.o
CC drivers/dma-buf/dma-resv.o
CC drivers/acpi/acpica/hwgpe.o
CC drivers/tty/n_null.o
CC net/sunrpc/svcauth_unix.o
CC drivers/scsi/scsi_ioctl.o
CC net/core/fib_notifier.o
CC drivers/acpi/mipi-disco-img.o
CC drivers/base/regmap/regmap-debugfs.o
CC net/ipv6/tcp_ipv6.o
CC net/wireless/mesh.o
CC mm/page_vma_mapped.o
CC net/sunrpc/addr.o
CC drivers/acpi/acpica/hwregs.o
CC net/ipv4/tcp_recovery.o
CC fs/nfs/fs_context.o
AR net/ethtool/built-in.a
CC kernel/umh.o
CC drivers/gpu/drm/virtio/virtgpu_object.o
CC kernel/trace/rpm-traces.o
CC drivers/gpu/drm/virtio/virtgpu_debugfs.o
CC lib/ratelimit.o
CC net/core/xdp.o
CC fs/ext4/namei.o
CC drivers/acpi/resource.o
CC net/ipv6/ping.o
CC drivers/tty/pty.o
AR drivers/gpu/drm/panel/built-in.a
CC net/wireless/ap.o
CC lib/rbtree.o
CC arch/x86/kernel/ldt.o
CC drivers/acpi/acpica/hwsleep.o
CC net/mac80211/he.o
CC drivers/dma-buf/sync_file.o
CC net/ipv6/exthdrs.o
CC drivers/gpu/drm/i915/i915_scatterlist.o
CC drivers/acpi/acpi_processor.o
CC net/core/flow_offload.o
CC kernel/trace/trace_dynevent.o
AR drivers/base/regmap/built-in.a
CC net/wireless/trace.o
AR drivers/gpu/drm/bridge/analogix/built-in.a
CC mm/pagewalk.o
CC net/wireless/ocb.o
AR drivers/gpu/drm/bridge/cadence/built-in.a
CC drivers/scsi/scsicam.o
AR drivers/gpu/drm/bridge/imx/built-in.a
CC net/sunrpc/rpcb_clnt.o
AR drivers/gpu/drm/bridge/synopsys/built-in.a
AR drivers/gpu/drm/bridge/built-in.a
AR drivers/gpu/drm/hisilicon/built-in.a
CC fs/stat.o
CC fs/exec.o
CC lib/seq_buf.o
CC drivers/acpi/acpica/hwvalid.o
CC kernel/trace/trace_probe.o
CC arch/x86/kernel/setup.o
CC net/netfilter/nf_nat_helper.o
CC drivers/gpu/drm/virtio/virtgpu_plane.o
CC net/mac80211/s1g.o
CC drivers/base/syscore.o
CC net/mac80211/ibss.o
CC net/core/gro.o
CC net/wireless/pmsr.o
AR drivers/nvme/common/built-in.a
AR drivers/nvme/host/built-in.a
CC net/mac80211/iface.o
AR drivers/nvme/target/built-in.a
CC mm/pgtable-generic.o
AR drivers/nvme/built-in.a
AR drivers/dma-buf/built-in.a
CC net/ipv4/tcp_ulp.o
CC drivers/acpi/processor_core.o
CC drivers/acpi/acpica/hwxface.o
CC drivers/gpu/drm/i915/i915_switcheroo.o
CC kernel/trace/trace_uprobe.o
CC drivers/tty/tty_audit.o
CC net/ipv6/datagram.o
CC drivers/gpu/drm/virtio/virtgpu_ioctl.o
GEN net/wireless/shipped-certs.c
CC fs/nfs/nfsroot.o
CC net/ipv4/tcp_offload.o
CC drivers/tty/sysrq.o
AR drivers/gpu/drm/mxsfb/built-in.a
CC mm/rmap.o
CC fs/ext4/page-io.o
CC lib/siphash.o
CC drivers/scsi/scsi_error.o
CC net/core/netdev-genl.o
CC drivers/ata/libata-core.o
CC drivers/ata/libata-scsi.o
CC drivers/acpi/acpica/hwxfsleep.o
CC lib/string.o
CC kernel/workqueue.o
CC net/mac80211/link.o
AR drivers/gpu/drm/sysfb/built-in.a
CC fs/pipe.o
CC drivers/ata/libata-eh.o
CC net/ipv6/ip6_flowlabel.o
CC drivers/gpu/drm/i915/i915_sysfs.o
CC net/ipv4/tcp_plb.o
CC lib/timerqueue.o
CC drivers/base/driver.o
CC fs/ext4/readpage.o
CC net/mac80211/rate.o
CC drivers/acpi/acpica/hwpci.o
CC arch/x86/kernel/x86_init.o
CC kernel/pid.o
CC drivers/ata/libata-transport.o
CC drivers/ata/libata-trace.o
CC lib/union_find.o
CC lib/vsprintf.o
CC drivers/gpu/drm/virtio/virtgpu_prime.o
CC net/netfilter/nf_nat_masquerade.o
CC drivers/acpi/processor_pdc.o
CC drivers/base/class.o
AR drivers/net/phy/mediatek/built-in.a
AR drivers/tty/built-in.a
CC drivers/acpi/acpica/nsaccess.o
AR drivers/net/pse-pd/built-in.a
AR drivers/net/phy/qcom/built-in.a
CC net/sunrpc/timer.o
AR drivers/net/pcs/built-in.a
CC drivers/net/mdio/acpi_mdio.o
CC drivers/net/phy/realtek/realtek_main.o
CC drivers/net/mdio/fwnode_mdio.o
CC fs/ext4/resize.o
CC net/core/netdev-genl-gen.o
CC net/ipv4/datagram.o
AR drivers/net/ethernet/3com/built-in.a
CC drivers/net/ethernet/8390/ne2k-pci.o
AR drivers/net/ethernet/adaptec/built-in.a
AR drivers/gpu/drm/tiny/built-in.a
CC lib/win_minmax.o
CC drivers/acpi/acpica/nsalloc.o
CC arch/x86/kernel/i8259.o
CC net/netfilter/nf_nat_ftp.o
CC drivers/firewire/init_ohci1394_dma.o
CC kernel/trace/rethook.o
CC mm/vmalloc.o
CC drivers/gpu/drm/i915/i915_utils.o
CC net/sunrpc/xdr.o
CC drivers/net/phy/mdio-boardinfo.o
CC fs/nfs/sysctl.o
CC drivers/base/platform.o
CC drivers/scsi/scsi_lib.o
CC drivers/gpu/drm/virtio/virtgpu_trace_points.o
CC mm/vma.o
CC lib/xarray.o
CC drivers/acpi/acpica/nsarguments.o
AR drivers/net/ethernet/agere/built-in.a
CC drivers/acpi/acpica/nsconvert.o
AR drivers/net/ethernet/alacritech/built-in.a
CC net/wireless/shipped-certs.o
AR drivers/net/wireless/admtek/built-in.a
AR drivers/net/wireless/ath/built-in.a
AR drivers/net/wireless/atmel/built-in.a
AR drivers/net/wireless/broadcom/built-in.a
AR drivers/net/wireless/intel/built-in.a
CC drivers/ata/libata-sata.o
CC drivers/cdrom/cdrom.o
AR drivers/net/wireless/intersil/built-in.a
CC drivers/acpi/acpica/nsdump.o
CC drivers/acpi/acpica/nseval.o
AR drivers/net/wireless/marvell/built-in.a
AR drivers/net/ethernet/alteon/built-in.a
CC mm/process_vm_access.o
AR drivers/net/wireless/mediatek/built-in.a
AR drivers/net/wireless/microchip/built-in.a
AR drivers/net/wireless/purelifi/built-in.a
CC net/ipv6/inet6_connection_sock.o
AR drivers/net/wireless/quantenna/built-in.a
AR drivers/net/wireless/ralink/built-in.a
AR drivers/net/wireless/realtek/built-in.a
AR drivers/net/wireless/rsi/built-in.a
AR drivers/net/wireless/silabs/built-in.a
CC mm/page_alloc.o
AR drivers/net/wireless/st/built-in.a
CC arch/x86/kernel/irqinit.o
CC net/core/gso.o
CC net/core/net-sysfs.o
CC net/ipv6/udp_offload.o
AR drivers/net/mdio/built-in.a
AR drivers/net/wireless/ti/built-in.a
CC mm/page_frag_cache.o
AR drivers/net/wireless/zydas/built-in.a
CC drivers/net/phy/stubs.o
AR drivers/net/wireless/virtual/built-in.a
AR drivers/net/wireless/built-in.a
CC drivers/acpi/ec.o
AR drivers/firewire/built-in.a
CC net/ipv6/seg6.o
CC fs/nfs/nfs3super.o
CC drivers/acpi/dock.o
AR drivers/net/ethernet/amazon/built-in.a
CC drivers/gpu/drm/i915/intel_clock_gating.o
CC net/core/hotdata.o
AR drivers/net/ethernet/amd/built-in.a
CC net/netfilter/nf_nat_irc.o
CC drivers/acpi/acpica/nsinit.o
CC arch/x86/kernel/jump_label.o
AR drivers/gpu/drm/xlnx/built-in.a
CC arch/x86/kernel/irq_work.o
AR kernel/trace/built-in.a
CC drivers/net/ethernet/8390/8390.o
CC drivers/acpi/pci_root.o
AR drivers/net/phy/realtek/built-in.a
AR drivers/net/ethernet/aquantia/built-in.a
CC net/netfilter/nf_nat_sip.o
CC mm/init-mm.o
CC fs/namei.o
CC net/ipv4/raw.o
CC net/sunrpc/sunrpc_syms.o
CC drivers/gpu/drm/virtio/virtgpu_submit.o
CC drivers/scsi/constants.o
CC fs/nfs/nfs3client.o
CC drivers/acpi/acpica/nsload.o
AR drivers/net/usb/built-in.a
CC drivers/net/phy/mdio_devres.o
CC drivers/base/cpu.o
AR drivers/auxdisplay/built-in.a
CC net/ipv4/udp.o
CC net/core/netdev_rx_queue.o
CC fs/fcntl.o
CC lib/lockref.o
AR drivers/net/ethernet/arc/built-in.a
CC kernel/task_work.o
CC mm/memblock.o
CC drivers/acpi/acpica/nsnames.o
CC net/ipv6/fib6_notifier.o
CC net/sunrpc/cache.o
CC net/mac80211/michael.o
CC net/ipv4/udplite.o
CC net/core/net-procfs.o
CC fs/ext4/super.o
CC drivers/gpu/drm/i915/intel_cpu_info.o
CC net/sunrpc/rpc_pipe.o
CC drivers/acpi/pci_link.o
CC drivers/base/firmware.o
CC kernel/extable.o
CC fs/ioctl.o
CC mm/slub.o
CC arch/x86/kernel/probe_roms.o
CC fs/ext4/symlink.o
CC drivers/acpi/pci_irq.o
CC arch/x86/kernel/sys_ia32.o
AR drivers/gpu/drm/gud/built-in.a
CC net/ipv6/rpl.o
CC drivers/ata/libata-sff.o
AR drivers/gpu/drm/virtio/built-in.a
CC drivers/net/phy/phy.o
CC drivers/gpu/drm/i915/intel_device_info.o
CC kernel/params.o
CC drivers/acpi/acpica/nsobject.o
CC arch/x86/kernel/ksysfs.o
AR drivers/net/ethernet/8390/built-in.a
CC fs/nfs/nfs3proc.o
CC drivers/scsi/scsi_lib_dma.o
AR drivers/net/ethernet/asix/built-in.a
CC fs/readdir.o
AR drivers/net/ethernet/atheros/built-in.a
AR drivers/gpu/drm/sitronix/built-in.a
AR drivers/net/ethernet/cadence/built-in.a
CC net/core/netpoll.o
CC arch/x86/kernel/bootflag.o
CC drivers/net/ethernet/broadcom/bnx2.o
CC drivers/base/init.o
CC fs/ext4/sysfs.o
AR drivers/cdrom/built-in.a
CC net/sunrpc/sysfs.o
CC drivers/acpi/acpi_apd.o
CC lib/bcd.o
CC mm/madvise.o
CC net/sunrpc/svc_xprt.o
CC lib/sort.o
CC net/netfilter/x_tables.o
CC drivers/acpi/acpica/nsparse.o
CC net/sunrpc/xprtmultipath.o
CC net/netfilter/xt_tcpudp.o
CC net/mac80211/tkip.o
CC net/netfilter/xt_CONNSECMARK.o
CC net/sunrpc/stats.o
CC net/sunrpc/sysctl.o
CC net/core/fib_rules.o
CC fs/nfs/nfs3xdr.o
CC fs/select.o
CC mm/page_io.o
CC drivers/scsi/scsi_scan.o
CC drivers/acpi/acpica/nspredef.o
CC drivers/gpu/drm/i915/intel_memory_region.o
CC lib/parser.o
CC drivers/base/map.o
CC drivers/net/phy/phy-c45.o
CC arch/x86/kernel/e820.o
AR drivers/net/ethernet/brocade/built-in.a
CC drivers/net/ethernet/broadcom/tg3.o
CC net/ipv4/udp_offload.o
CC net/ipv6/ioam6.o
CC kernel/kthread.o
CC arch/x86/kernel/pci-dma.o
CC drivers/acpi/acpi_platform.o
CC fs/ext4/xattr.o
CC net/ipv4/arp.o
CC net/mac80211/aes_cmac.o
AR drivers/gpu/drm/solomon/built-in.a
CC net/ipv6/sysctl_net_ipv6.o
CC net/core/net-traces.o
CC drivers/acpi/acpica/nsprepkg.o
CC drivers/acpi/acpi_pnp.o
CC drivers/ata/libata-pmp.o
GEN drivers/scsi/scsi_devinfo_tbl.c
CC net/ipv4/icmp.o
CC fs/ext4/xattr_hurd.o
CC lib/debug_locks.o
CC drivers/base/devres.o
CC lib/random32.o
CC lib/bust_spinlocks.o
CC drivers/net/mii.o
AR drivers/net/ethernet/cavium/common/built-in.a
AR drivers/net/ethernet/cavium/thunder/built-in.a
AR drivers/net/ethernet/cavium/liquidio/built-in.a
AR drivers/net/ethernet/cavium/octeon/built-in.a
AR drivers/net/ethernet/cavium/built-in.a
CC net/ipv6/xfrm6_policy.o
CC mm/swap_state.o
CC drivers/acpi/acpica/nsrepair.o
CC drivers/pcmcia/cs.o
CC net/core/selftests.o
CC drivers/base/attribute_container.o
CC kernel/sys_ni.o
CC drivers/usb/common/common.o
CC drivers/usb/core/usb.o
CC drivers/net/phy/phy-core.o
AR drivers/usb/phy/built-in.a
CC drivers/scsi/scsi_devinfo.o
CC drivers/acpi/acpica/nsrepair2.o
CC drivers/gpu/drm/i915/intel_pcode.o
CC arch/x86/kernel/quirks.o
CC net/ipv4/devinet.o
CC fs/nfs/nfs3acl.o
CC drivers/usb/common/debug.o
AR drivers/net/ethernet/chelsio/built-in.a
CC arch/x86/kernel/kdebugfs.o
CC drivers/gpu/drm/i915/intel_region_ttm.o
CC fs/dcache.o
CC net/ipv4/af_inet.o
CC drivers/pcmcia/socket_sysfs.o
CC fs/ext4/xattr_trusted.o
CC lib/kasprintf.o
CC drivers/input/serio/serio.o
CC drivers/base/transport_class.o
CC [M] drivers/gpu/drm/scheduler/sched_main.o
CC fs/ext4/xattr_user.o
CC arch/x86/kernel/alternative.o
CC drivers/ata/libata-acpi.o
CC kernel/nsproxy.o
CC net/netfilter/xt_NFLOG.o
CC drivers/gpu/drm/i915/intel_runtime_pm.o
CC drivers/acpi/acpica/nssearch.o
CC fs/nfs/nfs4proc.o
CC drivers/scsi/scsi_sysctl.o
CC mm/swapfile.o
CC fs/ext4/fast_commit.o
CC lib/bitmap.o
CC [M] drivers/gpu/drm/scheduler/sched_fence.o
CC fs/nfs/nfs4xdr.o
AR drivers/usb/common/built-in.a
CC drivers/input/serio/i8042.o
CC mm/dmapool.o
CC drivers/base/topology.o
CC net/mac80211/aes_gmac.o
CC net/netfilter/xt_SECMARK.o
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
CC fs/inode.o
CC drivers/pcmcia/cardbus.o
CC drivers/acpi/acpica/nsutils.o
CC drivers/acpi/power.o
CC fs/nfs/nfs4state.o
CC drivers/net/loopback.o
AR net/sunrpc/built-in.a
CC drivers/usb/core/hub.o
CC net/mac80211/fils_aead.o
CC net/ipv6/xfrm6_state.o
CC net/mac80211/cfg.o
GEN xe_wa_oob.c xe_wa_oob.h
CC lib/scatterlist.o
CC [M] drivers/gpu/drm/xe/xe_bb.o
CC kernel/notifier.o
CC drivers/net/phy/phy_device.o
CC net/core/ptp_classifier.o
CC [M] drivers/gpu/drm/scheduler/sched_entity.o
CC fs/attr.o
CC drivers/input/keyboard/atkbd.o
CC drivers/input/mouse/psmouse-base.o
CC drivers/scsi/scsi_proc.o
AR drivers/input/joystick/built-in.a
CC drivers/ata/libata-pata-timings.o
CC drivers/usb/mon/mon_main.o
CC net/mac80211/ethtool.o
CC drivers/acpi/acpica/nswalk.o
CC mm/hugetlb.o
CC drivers/base/container.o
CC drivers/input/mouse/synaptics.o
CC lib/list_sort.o
CC drivers/usb/core/hcd.o
CC arch/x86/kernel/i8253.o
CC fs/ext4/orphan.o
CC drivers/pcmcia/ds.o
CC fs/ext4/acl.o
CC drivers/gpu/drm/i915/intel_sbi.o
CC net/core/netprio_cgroup.o
CC arch/x86/kernel/hw_breakpoint.o
CC drivers/scsi/scsi_debugfs.o
CC net/netfilter/xt_TCPMSS.o
CC drivers/acpi/acpica/nsxfeval.o
LD [M] drivers/gpu/drm/scheduler/gpu-sched.o
CC drivers/acpi/acpica/nsxfname.o
CC drivers/base/property.o
CC net/ipv4/igmp.o
CC [M] drivers/gpu/drm/xe/xe_bo.o
CC kernel/ksysfs.o
CC drivers/input/serio/serport.o
CC drivers/usb/mon/mon_stat.o
CC kernel/cred.o
CC drivers/acpi/acpica/nsxfobj.o
CC drivers/base/cacheinfo.o
CC net/ipv6/xfrm6_input.o
CC drivers/acpi/acpica/psargs.o
CC fs/ext4/xattr_security.o
CC drivers/ata/ahci.o
CC drivers/pcmcia/pcmcia_resource.o
CC lib/uuid.o
CC lib/iov_iter.o
CC drivers/usb/mon/mon_text.o
CC drivers/base/swnode.o
CC kernel/reboot.o
AR drivers/input/keyboard/built-in.a
CC kernel/async.o
CC [M] drivers/gpu/drm/xe/xe_bo_evict.o
CC drivers/net/netconsole.o
CC drivers/usb/core/urb.o
CC drivers/usb/mon/mon_bin.o
CC drivers/usb/host/pci-quirks.o
CC drivers/scsi/scsi_trace.o
CC drivers/input/serio/libps2.o
CC arch/x86/kernel/tsc.o
CC drivers/usb/class/usblp.o
CC drivers/acpi/acpica/psloop.o
CC drivers/gpu/drm/drm_atomic.o
CC net/core/netclassid_cgroup.o
CC drivers/gpu/drm/i915/intel_step.o
CC lib/clz_ctz.o
CC drivers/usb/core/message.o
CC drivers/input/mouse/focaltech.o
CC drivers/usb/host/ehci-hcd.o
CC drivers/usb/storage/scsiglue.o
CC fs/nfs/nfs4renewd.o
CC fs/bad_inode.o
CC mm/mmu_notifier.o
CC drivers/ata/libahci.o
CC drivers/usb/host/ehci-pci.o
AR drivers/net/ethernet/cisco/built-in.a
CC drivers/acpi/acpica/psobject.o
CC drivers/net/phy/linkmode.o
CC drivers/input/mouse/alps.o
CC drivers/usb/storage/protocol.o
CC mm/migrate.o
CC net/netfilter/xt_conntrack.o
CC net/ipv4/fib_frontend.o
CC drivers/scsi/scsi_logging.o
CC net/core/dst_cache.o
CC drivers/base/faux.o
CC drivers/net/phy/phy_link_topology.o
CC drivers/gpu/drm/i915/intel_uncore.o
CC drivers/input/mouse/byd.o
AR drivers/input/serio/built-in.a
CC drivers/acpi/event.o
CC drivers/acpi/evged.o
AR drivers/usb/misc/built-in.a
CC drivers/pcmcia/cistpl.o
CC drivers/acpi/acpica/psopcode.o
CC drivers/gpu/drm/i915/intel_uncore_trace.o
CC kernel/range.o
CC net/ipv6/xfrm6_output.o
CC fs/file.o
CC drivers/acpi/sysfs.o
CC drivers/usb/storage/transport.o
CC net/core/gro_cells.o
AR drivers/usb/mon/built-in.a
CC net/netfilter/xt_policy.o
AR drivers/usb/class/built-in.a
CC kernel/smpboot.o
CC net/mac80211/rx.o
CC fs/nfs/nfs4super.o
CC net/ipv6/xfrm6_protocol.o
CC net/ipv6/netfilter.o
CC drivers/base/auxiliary.o
CC drivers/scsi/scsi_pm.o
CC drivers/scsi/scsi_bsg.o
CC arch/x86/kernel/tsc_msr.o
CC kernel/ucount.o
CC drivers/acpi/acpica/psopinfo.o
CC net/ipv4/fib_semantics.o
CC drivers/pcmcia/pcmcia_cis.o
CC net/netfilter/xt_state.o
CC drivers/rtc/lib.o
AR drivers/net/ethernet/cortina/built-in.a
CC drivers/gpu/drm/i915/intel_wakeref.o
CC arch/x86/kernel/io_delay.o
CC [M] drivers/gpu/drm/xe/xe_devcoredump.o
CC drivers/rtc/class.o
CC drivers/acpi/acpica/psparse.o
CC net/ipv6/proc.o
CC net/mac80211/spectmgmt.o
CC drivers/acpi/property.o
CC drivers/base/devtmpfs.o
CC drivers/gpu/drm/i915/vlv_iosf_sb.o
CC drivers/ata/ata_piix.o
CC kernel/regset.o
CC drivers/usb/core/driver.o
CC drivers/net/phy/phy_package.o
CC drivers/ata/pata_amd.o
CC net/core/failover.o
CC drivers/scsi/scsi_common.o
CC arch/x86/kernel/rtc.o
CC drivers/base/module.o
CC drivers/gpu/drm/i915/vlv_suspend.o
CC drivers/scsi/scsi_transport_spi.o
CC drivers/acpi/acpica/psscope.o
CC lib/bsearch.o
CC drivers/usb/storage/usb.o
CC drivers/input/mouse/logips2pp.o
CC drivers/input/mouse/lifebook.o
CC [M] drivers/gpu/drm/xe/xe_device.o
CC arch/x86/kernel/resource.o
CC kernel/ksyms_common.o
AR net/wireless/built-in.a
CC net/ipv6/syncookies.o
CC drivers/usb/storage/initializers.o
CC drivers/input/mouse/trackpoint.o
CC drivers/net/virtio_net.o
CC drivers/rtc/interface.o
CC drivers/gpu/drm/drm_atomic_uapi.o
CC mm/page_counter.o
CC drivers/scsi/virtio_scsi.o
CC net/ipv4/fib_trie.o
CC drivers/pcmcia/rsrc_mgr.o
CC drivers/rtc/nvmem.o
CC drivers/acpi/acpica/pstree.o
CC drivers/usb/storage/sierra_ms.o
CC drivers/usb/host/ohci-hcd.o
CC lib/find_bit.o
AS arch/x86/kernel/irqflags.o
CC [M] net/netfilter/nf_log_syslog.o
CC drivers/ata/pata_oldpiix.o
CC arch/x86/kernel/static_call.o
CC drivers/ata/pata_sch.o
CC drivers/input/mouse/cypress_ps2.o
CC drivers/base/auxiliary_sysfs.o
CC mm/hugetlb_cgroup.o
CC [M] net/netfilter/xt_mark.o
CC net/ipv6/calipso.o
CC drivers/net/net_failover.o
CC lib/llist.o
CC fs/nfs/nfs4file.o
CC drivers/ata/pata_mpiix.o
CC drivers/acpi/acpica/psutils.o
CC fs/filesystems.o
CC drivers/pcmcia/rsrc_nonstatic.o
CC drivers/usb/host/ohci-pci.o
CC drivers/net/phy/phy_caps.o
CC drivers/usb/core/config.o
CC lib/lwq.o
AR drivers/net/ethernet/dec/tulip/built-in.a
AR drivers/net/ethernet/dec/built-in.a
CC drivers/usb/host/uhci-hcd.o
AR net/core/built-in.a
AR drivers/input/tablet/built-in.a
CC drivers/scsi/sd.o
CC kernel/groups.o
CC drivers/gpu/drm/i915/soc/intel_dram.o
CC drivers/i2c/algos/i2c-algo-bit.o
CC drivers/acpi/debugfs.o
AR drivers/i3c/built-in.a
CC drivers/base/devcoredump.o
CC lib/memweight.o
CC drivers/usb/storage/option_ms.o
CC arch/x86/kernel/process.o
AR drivers/input/touchscreen/built-in.a
CC drivers/usb/storage/usual-tables.o
CC drivers/net/phy/mdio_bus.o
CC arch/x86/kernel/ptrace.o
CC drivers/usb/early/ehci-dbgp.o
CC lib/kfifo.o
CC net/ipv6/ah6.o
CC drivers/pcmcia/yenta_socket.o
CC drivers/acpi/acpica/pswalk.o
AR drivers/input/misc/built-in.a
CC drivers/acpi/acpi_lpat.o
CC drivers/usb/host/xhci.o
CC drivers/i2c/busses/i2c-i801.o
CC drivers/input/mouse/psmouse-smbus.o
CC [M] net/netfilter/xt_nat.o
CC arch/x86/kernel/tls.o
AR drivers/media/i2c/built-in.a
AR drivers/media/tuners/built-in.a
AR drivers/media/rc/keymaps/built-in.a
AR drivers/media/common/b2c2/built-in.a
AR drivers/media/rc/built-in.a
CC drivers/base/platform-msi.o
CC drivers/net/phy/mdio_device.o
AR drivers/media/common/saa7146/built-in.a
CC [M] drivers/gpu/drm/xe/xe_device_sysfs.o
AR drivers/media/common/siano/built-in.a
CC drivers/ata/ata_generic.o
AR drivers/media/common/v4l2-tpg/built-in.a
AR drivers/media/common/videobuf2/built-in.a
CC drivers/acpi/acpica/psxface.o
CC [M] drivers/gpu/drm/xe/xe_dma_buf.o
AR drivers/media/common/built-in.a
AR drivers/media/platform/allegro-dvt/built-in.a
CC [M] drivers/gpu/drm/xe/xe_drm_client.o
AR drivers/media/platform/amphion/built-in.a
AR drivers/media/platform/amlogic/meson-ge2d/built-in.a
CC [M] drivers/gpu/drm/xe/xe_eu_stall.o
AR drivers/media/platform/amlogic/built-in.a
CC [M] drivers/gpu/drm/xe/xe_exec.o
AR drivers/media/platform/aspeed/built-in.a
AR drivers/media/pci/ttpci/built-in.a
AR drivers/media/platform/atmel/built-in.a
AR drivers/media/pci/b2c2/built-in.a
AR drivers/media/platform/broadcom/built-in.a
CC mm/early_ioremap.o
AR drivers/media/pci/pluto2/built-in.a
CC net/mac80211/tx.o
CC drivers/net/phy/swphy.o
AR drivers/media/platform/cadence/built-in.a
AR drivers/media/pci/dm1105/built-in.a
AR drivers/media/platform/chips-media/coda/built-in.a
AR drivers/media/usb/b2c2/built-in.a
AR drivers/media/pci/pt1/built-in.a
AR drivers/media/platform/chips-media/wave5/built-in.a
AR drivers/media/usb/dvb-usb/built-in.a
AR drivers/media/pci/pt3/built-in.a
AR drivers/media/mmc/siano/built-in.a
AR drivers/media/platform/chips-media/built-in.a
AR drivers/media/usb/dvb-usb-v2/built-in.a
AR drivers/media/mmc/built-in.a
AR drivers/media/pci/mantis/built-in.a
CC kernel/kcmp.o
CC kernel/freezer.o
AR drivers/usb/storage/built-in.a
AR drivers/media/platform/imagination/built-in.a
AR drivers/media/usb/s2255/built-in.a
AR drivers/media/pci/ngene/built-in.a
AR drivers/media/pci/ddbridge/built-in.a
AR drivers/media/pci/saa7146/built-in.a
AR drivers/media/platform/intel/built-in.a
AR drivers/media/usb/siano/built-in.a
CC net/ipv4/fib_notifier.o
AR drivers/media/platform/marvell/built-in.a
CC fs/namespace.o
CC drivers/base/physical_location.o
AR drivers/media/pci/smipcie/built-in.a
AR drivers/media/usb/ttusb-budget/built-in.a
AR drivers/media/platform/mediatek/jpeg/built-in.a
AR drivers/media/pci/netup_unidvb/built-in.a
AR drivers/media/platform/mediatek/mdp/built-in.a
AR drivers/media/usb/ttusb-dec/built-in.a
AR drivers/media/usb/built-in.a
AR drivers/media/pci/intel/ipu3/built-in.a
AR drivers/media/platform/mediatek/vcodec/common/built-in.a
CC drivers/base/trace.o
AR drivers/media/pci/intel/ivsc/built-in.a
AR drivers/media/platform/mediatek/vcodec/encoder/built-in.a
AR drivers/media/pci/intel/built-in.a
CC drivers/rtc/dev.o
AR drivers/media/platform/mediatek/vcodec/decoder/built-in.a
AR drivers/media/pci/built-in.a
AR drivers/media/platform/mediatek/vcodec/built-in.a
AR drivers/media/platform/mediatek/vpu/built-in.a
CC fs/seq_file.o
AR drivers/media/platform/mediatek/mdp3/built-in.a
AR drivers/media/platform/mediatek/built-in.a
AR drivers/i2c/algos/built-in.a
AR drivers/media/platform/microchip/built-in.a
CC net/mac80211/key.o
AR fs/ext4/built-in.a
CC net/mac80211/util.o
CC [M] net/netfilter/xt_LOG.o
AR drivers/media/platform/nuvoton/built-in.a
AR drivers/media/platform/nvidia/tegra-vde/built-in.a
CC lib/percpu-refcount.o
CC drivers/acpi/acpica/rsaddr.o
AR drivers/media/platform/nvidia/built-in.a
CC [M] net/netfilter/xt_MASQUERADE.o
AR drivers/media/platform/nxp/dw100/built-in.a
CC drivers/usb/core/file.o
AR drivers/media/platform/nxp/imx-jpeg/built-in.a
AR drivers/media/platform/nxp/imx8-isi/built-in.a
AR drivers/media/platform/nxp/built-in.a
AR drivers/media/platform/qcom/camss/built-in.a
AR drivers/usb/early/built-in.a
CC [M] net/netfilter/xt_addrtype.o
AR drivers/media/platform/qcom/iris/built-in.a
AR drivers/media/platform/qcom/venus/built-in.a
AR drivers/media/platform/qcom/built-in.a
CC drivers/usb/host/xhci-mem.o
AR drivers/media/platform/raspberrypi/pisp_be/built-in.a
AR drivers/media/platform/raspberrypi/rp1-cfe/built-in.a
AR drivers/media/platform/raspberrypi/built-in.a
CC drivers/gpu/drm/i915/soc/intel_gmch.o
AR drivers/media/platform/renesas/rcar-vin/built-in.a
AR drivers/media/platform/renesas/rzg2l-cru/built-in.a
AR drivers/media/platform/renesas/vsp1/built-in.a
AR drivers/media/platform/renesas/built-in.a
AR drivers/media/platform/rockchip/rga/built-in.a
AR drivers/input/mouse/built-in.a
AR drivers/media/platform/rockchip/rkisp1/built-in.a
AR drivers/media/platform/rockchip/built-in.a
CC drivers/input/input.o
AR drivers/media/platform/samsung/exynos-gsc/built-in.a
CC net/ipv4/inet_fragment.o
AR drivers/media/platform/samsung/exynos4-is/built-in.a
CC net/ipv4/ping.o
AR drivers/media/platform/samsung/s3c-camif/built-in.a
AR drivers/ata/built-in.a
CC fs/nfs/delegation.o
CC net/ipv4/ip_tunnel_core.o
AR drivers/media/platform/samsung/s5p-g2d/built-in.a
CC drivers/acpi/acpica/rscalc.o
AR drivers/media/platform/samsung/s5p-jpeg/built-in.a
AR drivers/media/platform/samsung/s5p-mfc/built-in.a
AR drivers/media/platform/samsung/built-in.a
CC net/mac80211/parse.o
AR drivers/media/platform/st/sti/bdisp/built-in.a
CC drivers/rtc/proc.o
AR drivers/media/platform/sunxi/sun4i-csi/built-in.a
AR drivers/media/platform/st/sti/c8sectpfe/built-in.a
AR drivers/media/platform/st/sti/delta/built-in.a
AR drivers/media/platform/sunxi/sun6i-csi/built-in.a
CC drivers/rtc/sysfs.o
AR drivers/media/platform/st/sti/hva/built-in.a
AR drivers/media/platform/sunxi/sun6i-mipi-csi2/built-in.a
AR drivers/media/platform/st/stm32/built-in.a
CC mm/secretmem.o
AR drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/built-in.a
AR drivers/media/platform/st/built-in.a
AR drivers/media/platform/sunxi/sun8i-di/built-in.a
CC drivers/usb/host/xhci-ext-caps.o
AR drivers/media/platform/sunxi/sun8i-rotate/built-in.a
CC drivers/scsi/sr.o
CC net/mac80211/wme.o
AR drivers/media/platform/sunxi/built-in.a
CC arch/x86/kernel/step.o
AR drivers/pcmcia/built-in.a
AR drivers/media/platform/synopsys/hdmirx/built-in.a
AR drivers/media/platform/synopsys/built-in.a
AR drivers/media/platform/ti/am437x/built-in.a
AR drivers/pps/clients/built-in.a
CC net/ipv6/esp6.o
CC kernel/profile.o
CC drivers/pps/pps.o
AR drivers/media/platform/ti/cal/built-in.a
CC drivers/usb/host/xhci-ring.o
AR drivers/media/platform/ti/vpe/built-in.a
CC drivers/usb/core/buffer.o
CC net/mac80211/chan.o
AR drivers/i2c/busses/built-in.a
AR drivers/media/platform/ti/davinci/built-in.a
CC drivers/net/phy/fixed_phy.o
AR drivers/media/platform/ti/j721e-csi2rx/built-in.a
AR drivers/i2c/muxes/built-in.a
CC drivers/i2c/i2c-boardinfo.o
AR drivers/media/platform/ti/omap/built-in.a
CC [M] drivers/gpu/drm/xe/xe_exec_queue.o
AR drivers/media/platform/ti/omap3isp/built-in.a
AR drivers/media/platform/ti/built-in.a
AR drivers/net/ethernet/dlink/built-in.a
AR drivers/base/built-in.a
CC drivers/usb/core/sysfs.o
CC drivers/pps/kapi.o
AR drivers/media/platform/verisilicon/built-in.a
CC lib/rhashtable.o
CC net/ipv4/gre_offload.o
CC kernel/stacktrace.o
AR drivers/media/platform/via/built-in.a
AR drivers/media/platform/xilinx/built-in.a
AR drivers/media/platform/built-in.a
CC drivers/rtc/rtc-mc146818-lib.o
AR drivers/media/firewire/built-in.a
AR drivers/media/spi/built-in.a
AR drivers/media/test-drivers/built-in.a
AR drivers/media/built-in.a
CC net/ipv6/sit.o
CC drivers/acpi/acpi_pcc.o
CC drivers/acpi/acpica/rscreate.o
CC drivers/gpu/drm/drm_auth.o
CC drivers/i2c/i2c-core-base.o
AR drivers/net/ethernet/emulex/built-in.a
CC net/mac80211/trace.o
CC lib/base64.o
CC drivers/pps/sysfs.o
CC fs/nfs/nfs4idmap.o
CC drivers/scsi/sr_ioctl.o
CC drivers/gpu/drm/i915/soc/intel_rom.o
CC arch/x86/kernel/i8237.o
CC net/ipv6/addrconf_core.o
CC drivers/input/input-compat.o
CC fs/nfs/callback.o
CC drivers/rtc/rtc-cmos.o
CC drivers/acpi/acpica/rsdumpinfo.o
CC net/mac80211/mlme.o
CC fs/xattr.o
CC lib/once.o
CC arch/x86/kernel/stacktrace.o
CC mm/hmm.o
CC drivers/usb/host/xhci-hub.o
CC kernel/dma.o
CC kernel/smp.o
AR net/netfilter/built-in.a
CC kernel/uid16.o
CC net/ipv6/exthdrs_core.o
AR drivers/pps/built-in.a
CC drivers/input/input-mt.o
CC drivers/usb/core/endpoint.o
CC net/ipv4/metrics.o
CC drivers/acpi/acpica/rsinfo.o
AR drivers/net/phy/built-in.a
CC fs/libfs.o
CC mm/memfd.o
CC lib/refcount.o
CC drivers/usb/host/xhci-dbg.o
CC drivers/acpi/ac.o
CC drivers/i2c/i2c-core-smbus.o
CC drivers/input/input-poller.o
CC net/ipv6/ip6_checksum.o
CC fs/nfs/callback_xdr.o
AR drivers/net/ethernet/broadcom/built-in.a
AR drivers/net/ethernet/engleder/built-in.a
CC drivers/gpu/drm/i915/i915_memcpy.o
CC arch/x86/kernel/reboot.o
AR drivers/net/ethernet/ezchip/built-in.a
AR drivers/net/ethernet/fujitsu/built-in.a
CC drivers/acpi/acpica/rsio.o
AR drivers/net/ethernet/fungible/built-in.a
AR drivers/net/ethernet/google/built-in.a
AR drivers/net/ethernet/hisilicon/built-in.a
CC fs/fs-writeback.o
CC drivers/usb/core/devio.o
AR drivers/net/ethernet/huawei/built-in.a
CC drivers/acpi/button.o
CC drivers/net/ethernet/intel/e1000/e1000_main.o
CC lib/rcuref.o
CC drivers/scsi/sr_vendor.o
CC drivers/net/ethernet/intel/e1000e/82571.o
CC fs/nfs/callback_proc.o
CC drivers/gpu/drm/i915/i915_mm.o
CC [M] drivers/gpu/drm/xe/xe_execlist.o
CC lib/usercopy.o
CC drivers/usb/core/notify.o
CC drivers/acpi/acpica/rsirq.o
CC fs/pnode.o
CC net/mac80211/tdls.o
CC drivers/net/ethernet/intel/e1000e/ich8lan.o
CC drivers/input/ff-core.o
AR drivers/rtc/built-in.a
CC fs/splice.o
CC drivers/scsi/sg.o
CC net/ipv4/netlink.o
CC net/ipv4/nexthop.o
CC arch/x86/kernel/msr.o
CC net/mac80211/ocb.o
CC drivers/acpi/fan_core.o
CC drivers/acpi/fan_attr.o
CC drivers/acpi/acpica/rslist.o
CC drivers/net/ethernet/intel/e100.o
CC lib/errseq.o
CC kernel/kallsyms.o
CC kernel/acct.o
CC drivers/gpu/drm/drm_blend.o
CC [M] drivers/gpu/drm/xe/xe_force_wake.o
CC mm/execmem.o
CC lib/bucket_locks.o
CC drivers/net/ethernet/intel/e1000/e1000_hw.o
CC fs/sync.o
CC fs/utimes.o
CC drivers/net/ethernet/intel/e1000e/80003es2lan.o
CC drivers/usb/core/generic.o
CC drivers/acpi/acpica/rsmemory.o
AR drivers/net/ethernet/i825xx/built-in.a
CC drivers/usb/host/xhci-trace.o
CC [M] drivers/gpu/drm/xe/xe_ggtt.o
CC kernel/vmcore_info.o
CC drivers/input/touchscreen.o
CC lib/generic-radix-tree.o
CC net/ipv6/ip6_icmp.o
CC drivers/i2c/i2c-core-acpi.o
CC drivers/acpi/acpica/rsmisc.o
CC drivers/acpi/acpica/rsserial.o
AR drivers/net/ethernet/microsoft/built-in.a
CC drivers/net/ethernet/intel/e1000/e1000_ethtool.o
CC net/ipv6/output_core.o
CC arch/x86/kernel/cpuid.o
CC drivers/gpu/drm/i915/i915_sw_fence.o
CC arch/x86/kernel/early-quirks.o
CC fs/nfs/nfs4namespace.o
CC net/mac80211/airtime.o
CC net/ipv4/udp_tunnel_stub.o
CC drivers/usb/core/quirks.o
CC drivers/acpi/fan_hwmon.o
CC fs/nfs/nfs4getroot.o
CC net/ipv4/ip_tunnel.o
CC net/ipv6/protocol.o
AR mm/built-in.a
CC drivers/usb/core/devices.o
CC drivers/usb/core/phy.o
CC drivers/acpi/acpi_video.o
CC lib/bitmap-str.o
AR drivers/net/ethernet/litex/built-in.a
CC fs/d_path.o
CC net/ipv6/ip6_offload.o
CC drivers/input/ff-memless.o
CC drivers/acpi/acpica/rsutils.o
CC drivers/ptp/ptp_clock.o
CC drivers/scsi/scsi_sysfs.o
CC drivers/net/ethernet/intel/e1000e/mac.o
CC drivers/net/ethernet/intel/e1000e/manage.o
CC drivers/net/ethernet/intel/e1000e/nvm.o
AR drivers/net/ethernet/marvell/octeon_ep/built-in.a
AR drivers/net/ethernet/marvell/octeon_ep_vf/built-in.a
AR drivers/net/ethernet/marvell/octeontx2/built-in.a
AR drivers/net/ethernet/marvell/prestera/built-in.a
CC drivers/net/ethernet/marvell/sky2.o
CC drivers/power/supply/power_supply_core.o
CC drivers/gpu/drm/i915/i915_sw_fence_work.o
CC kernel/elfcorehdr.o
CC drivers/net/ethernet/intel/e1000e/phy.o
CC drivers/input/sparse-keymap.o
CC net/mac80211/eht.o
CC arch/x86/kernel/smp.o
CC drivers/i2c/i2c-smbus.o
CC arch/x86/kernel/smpboot.o
CC drivers/acpi/acpica/rsxface.o
CC [M] drivers/gpu/drm/xe/xe_gpu_scheduler.o
CC arch/x86/kernel/tsc_sync.o
CC drivers/gpu/drm/i915/i915_syncmap.o
CC lib/string_helpers.o
CC [M] drivers/gpu/drm/xe/xe_gsc.o
CC drivers/hwmon/hwmon.o
AR drivers/thermal/broadcom/built-in.a
CC drivers/net/ethernet/intel/e1000e/param.o
AR drivers/thermal/renesas/built-in.a
AR drivers/thermal/samsung/built-in.a
CC drivers/usb/core/port.o
CC drivers/thermal/intel/intel_tcc.o
CC [M] drivers/gpu/drm/xe/xe_gsc_debugfs.o
CC arch/x86/kernel/setup_percpu.o
AR drivers/watchdog/built-in.a
CC fs/stack.o
CC drivers/thermal/intel/therm_throt.o
CC lib/hexdump.o
AR drivers/thermal/st/built-in.a
CC drivers/power/supply/power_supply_sysfs.o
CC kernel/kexec_core.o
CC kernel/kexec.o
CC drivers/acpi/acpica/tbdata.o
AR drivers/thermal/qcom/built-in.a
CC net/mac80211/led.o
CC drivers/net/ethernet/intel/e1000/e1000_param.o
CC net/ipv4/sysctl_net_ipv4.o
CC fs/nfs/nfs4client.o
CC drivers/input/vivaldi-fmap.o
CC drivers/usb/core/hcd-pci.o
CC drivers/usb/core/usb-acpi.o
CC fs/fs_struct.o
CC drivers/gpu/drm/i915/i915_user_extensions.o
CC drivers/ptp/ptp_chardev.o
CC fs/statfs.o
CC drivers/acpi/video_detect.o
AR drivers/i2c/built-in.a
AR drivers/thermal/tegra/built-in.a
CC drivers/input/input-leds.o
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.o
CC [M] drivers/gpu/drm/xe/xe_gsc_proxy.o
CC drivers/usb/host/xhci-debugfs.o
CC drivers/gpu/drm/drm_bridge.o
CC drivers/net/ethernet/intel/e1000e/ethtool.o
AR drivers/scsi/built-in.a
CC drivers/input/evdev.o
CC net/mac80211/pm.o
CC drivers/md/md.o
CC drivers/md/md-bitmap.o
CC drivers/power/supply/power_supply_leds.o
CC drivers/gpu/drm/i915/i915_debugfs.o
CC net/mac80211/rc80211_minstrel_ht.o
CC drivers/acpi/acpica/tbfadt.o
CC drivers/md/md-autodetect.o
CC drivers/power/supply/power_supply_hwmon.o
AR drivers/net/ethernet/mellanox/built-in.a
CC lib/kstrtox.o
CC lib/iomap.o
CC fs/nfs/nfs4session.o
AR drivers/thermal/mediatek/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gsc_submit.o
CC net/ipv6/tcpv6_offload.o
CC drivers/gpu/drm/drm_cache.o
CC fs/nfs/dns_resolve.o
CC net/mac80211/wbrf.o
CC drivers/ptp/ptp_sysfs.o
CC arch/x86/kernel/mpparse.o
AR drivers/net/ethernet/meta/built-in.a
CC lib/iomap_copy.o
CC drivers/thermal/thermal_core.o
CC drivers/net/ethernet/intel/e1000e/netdev.o
CC net/ipv4/proc.o
CC net/ipv6/exthdrs_offload.o
CC fs/nfs/nfs4trace.o
AR drivers/usb/core/built-in.a
CC drivers/usb/host/xhci-pci.o
CC drivers/acpi/processor_driver.o
CC drivers/thermal/thermal_sysfs.o
CC drivers/acpi/acpica/tbfind.o
AR drivers/thermal/intel/built-in.a
CC drivers/ptp/ptp_vclock.o
CC drivers/gpu/drm/i915/i915_debugfs_params.o
CC net/ipv4/fib_rules.o
CC kernel/utsname.o
AR drivers/power/supply/built-in.a
AR drivers/power/built-in.a
CC fs/fs_pin.o
AR drivers/hwmon/built-in.a
CC net/ipv4/ipmr.o
CC [M] drivers/gpu/drm/xe/xe_gt.o
CC drivers/cpufreq/cpufreq.o
CC net/ipv4/ipmr_base.o
CC arch/x86/kernel/trace_clock.o
CC drivers/acpi/processor_thermal.o
CC [M] drivers/gpu/drm/xe/xe_gt_ccs_mode.o
AR drivers/net/ethernet/intel/e1000/built-in.a
CC drivers/md/dm.o
CC drivers/acpi/processor_idle.o
CC drivers/acpi/acpica/tbinstal.o
CC drivers/acpi/processor_throttling.o
CC lib/devres.o
CC fs/nsfs.o
CC net/ipv6/inet6_hashtables.o
CC drivers/md/dm-table.o
CC drivers/cpuidle/cpuidle.o
CC drivers/cpuidle/governors/menu.o
CC drivers/cpufreq/freq_table.o
AR drivers/input/built-in.a
CC drivers/acpi/acpica/tbprint.o
CC kernel/pid_namespace.o
CC drivers/cpuidle/driver.o
CC fs/fs_types.o
CC arch/x86/kernel/trace.o
CC drivers/gpu/drm/drm_color_mgmt.o
CC drivers/md/dm-target.o
CC lib/check_signature.o
CC net/ipv4/syncookies.o
CC kernel/stop_machine.o
CC net/ipv6/mcast_snoop.o
AR drivers/mmc/built-in.a
CC drivers/gpu/drm/drm_connector.o
CC drivers/ptp/ptp_kvm_x86.o
CC drivers/ptp/ptp_kvm_common.o
CC net/ipv4/tunnel4.o
CC drivers/cpuidle/governors/haltpoll.o
CC lib/interval_tree.o
CC drivers/acpi/acpica/tbutils.o
AR drivers/net/ethernet/micrel/built-in.a
CC drivers/acpi/acpica/tbxface.o
AR drivers/net/ethernet/microchip/built-in.a
CC drivers/cpuidle/governor.o
CC drivers/gpu/drm/i915/i915_pmu.o
CC drivers/thermal/thermal_trip.o
CC drivers/md/dm-linear.o
CC drivers/thermal/thermal_helpers.o
CC drivers/net/ethernet/intel/e1000e/ptp.o
CC drivers/gpu/drm/drm_crtc.o
CC [M] drivers/gpu/drm/xe/xe_gt_clock.o
CC lib/assoc_array.o
CC arch/x86/kernel/rethook.o
CC arch/x86/kernel/vmcore_info_32.o
CC drivers/acpi/acpica/tbxfload.o
AR drivers/usb/host/built-in.a
AR drivers/usb/built-in.a
AR drivers/net/ethernet/mscc/built-in.a
CC drivers/cpufreq/cpufreq_performance.o
AR drivers/net/ethernet/myricom/built-in.a
CC drivers/cpuidle/sysfs.o
CC net/ipv4/ipconfig.o
AR drivers/net/ethernet/marvell/built-in.a
CC kernel/audit.o
AR drivers/net/ethernet/natsemi/built-in.a
CC drivers/thermal/thermal_thresholds.o
CC drivers/gpu/drm/drm_displayid.o
CC net/ipv4/netfilter.o
AR drivers/ufs/built-in.a
CC drivers/cpuidle/poll_state.o
CC drivers/gpu/drm/drm_drv.o
CC lib/bitrev.o
CC fs/fs_context.o
CC [M] drivers/gpu/drm/xe/xe_gt_freq.o
CC kernel/auditfilter.o
AR drivers/net/ethernet/neterion/built-in.a
CC drivers/acpi/processor_perflib.o
CC drivers/gpu/drm/i915/gt/gen2_engine_cs.o
AR drivers/firmware/arm_ffa/built-in.a
AR drivers/firmware/arm_scmi/built-in.a
AR drivers/firmware/broadcom/built-in.a
CC lib/crc-ccitt.o
CC fs/nfs/nfs4sysctl.o
AR drivers/net/ethernet/netronome/built-in.a
AR drivers/ptp/built-in.a
AR drivers/firmware/cirrus/test/built-in.a
CC drivers/gpu/drm/drm_dumb_buffers.o
AR drivers/firmware/cirrus/built-in.a
AR drivers/crypto/stm32/built-in.a
CC drivers/cpuidle/cpuidle-haltpoll.o
AR drivers/firmware/meson/built-in.a
AR drivers/crypto/inside-secure/eip93/built-in.a
AR drivers/firmware/microchip/built-in.a
AR drivers/crypto/inside-secure/built-in.a
CC drivers/cpufreq/cpufreq_userspace.o
AR drivers/crypto/xilinx/built-in.a
AR drivers/crypto/hisilicon/built-in.a
CC arch/x86/kernel/machine_kexec_32.o
CC drivers/cpufreq/cpufreq_ondemand.o
AR drivers/crypto/intel/keembay/built-in.a
AR drivers/crypto/intel/ixp4xx/built-in.a
CC drivers/acpi/acpica/tbxfroot.o
AR drivers/crypto/intel/built-in.a
AR drivers/crypto/starfive/built-in.a
CC drivers/cpufreq/cpufreq_governor.o
AR drivers/crypto/built-in.a
CC drivers/firmware/efi/libstub/efi-stub-helper.o
CC fs/fs_parser.o
CC drivers/acpi/acpica/utaddress.o
CC [M] drivers/gpu/drm/xe/xe_gt_idle.o
CC kernel/auditsc.o
AR drivers/cpuidle/governors/built-in.a
CC fs/fsopen.o
CC net/ipv4/tcp_cubic.o
CC drivers/clocksource/acpi_pm.o
CC drivers/gpu/drm/drm_edid.o
CC drivers/thermal/thermal_netlink.o
CC drivers/gpu/drm/i915/gt/gen6_engine_cs.o
AR net/ipv6/built-in.a
AR drivers/net/ethernet/ni/built-in.a
CC drivers/net/ethernet/nvidia/forcedeth.o
CC drivers/firmware/efi/efi-bgrt.o
CC drivers/gpu/drm/drm_eld.o
CC lib/crc16.o
HOSTCC lib/gen_crc32table
CC drivers/firmware/efi/libstub/gop.o
CC drivers/md/dm-stripe.o
AR drivers/cpuidle/built-in.a
CC drivers/acpi/container.o
CC drivers/acpi/acpica/utalloc.o
CC drivers/acpi/acpica/utascii.o
CC drivers/firmware/efi/efi.o
CC drivers/gpu/drm/i915/gt/gen6_ppgtt.o
CC drivers/hid/usbhid/hid-core.o
CC drivers/acpi/thermal_lib.o
CC drivers/hid/hid-core.o
CC drivers/cpufreq/cpufreq_governor_attr_set.o
CC drivers/gpu/drm/drm_encoder.o
AS arch/x86/kernel/relocate_kernel_32.o
CC lib/xxhash.o
CC drivers/acpi/acpica/utbuffer.o
CC drivers/firmware/efi/vars.o
CC kernel/audit_watch.o
CC drivers/firmware/efi/libstub/secureboot.o
CC fs/init.o
CC arch/x86/kernel/module.o
CC net/ipv4/tcp_sigpool.o
CC drivers/firmware/efi/reboot.o
AR drivers/net/ethernet/oki-semi/built-in.a
AR drivers/platform/x86/amd/built-in.a
CC net/ipv4/cipso_ipv4.o
CC drivers/md/dm-ioctl.o
AR drivers/firmware/imx/built-in.a
AR drivers/platform/x86/intel/built-in.a
CC drivers/hid/hid-input.o
CC arch/x86/kernel/doublefault_32.o
CC drivers/platform/x86/wmi.o
AR drivers/net/ethernet/packetengines/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o
CC fs/kernel_read_file.o
CC lib/genalloc.o
CC drivers/acpi/acpica/utcksum.o
CC drivers/clocksource/i8253.o
CC drivers/acpi/acpica/utcopy.o
CC kernel/audit_fsnotify.o
CC drivers/firmware/efi/libstub/tpm.o
CC drivers/thermal/thermal_hwmon.o
CC drivers/hid/hid-quirks.o
AR drivers/platform/surface/built-in.a
AR drivers/firmware/psci/built-in.a
CC drivers/cpufreq/acpi-cpufreq.o
AR drivers/firmware/qcom/built-in.a
CC drivers/gpu/drm/drm_file.o
CC net/ipv4/xfrm4_policy.o
CC net/ipv4/xfrm4_state.o
CC drivers/firmware/efi/libstub/file.o
CC drivers/hid/usbhid/hiddev.o
CC kernel/audit_tree.o
CC drivers/mailbox/mailbox.o
CC drivers/mailbox/pcc.o
CC lib/percpu_counter.o
CC drivers/hid/usbhid/hid-pidff.o
CC drivers/cpufreq/amd-pstate.o
AR drivers/clocksource/built-in.a
CC drivers/cpufreq/amd-pstate-trace.o
CC drivers/firmware/efi/libstub/mem.o
AR drivers/net/ethernet/qlogic/built-in.a
CC drivers/thermal/gov_step_wise.o
CC fs/mnt_idmapping.o
CC drivers/acpi/acpica/utexcep.o
AR drivers/perf/built-in.a
CC drivers/cpufreq/intel_pstate.o
CC drivers/acpi/acpica/utdebug.o
AR fs/nfs/built-in.a
CC drivers/hid/hid-debug.o
AR drivers/firmware/samsung/built-in.a
CC drivers/hid/hidraw.o
CC drivers/acpi/thermal.o
CC drivers/acpi/nhlt.o
AR drivers/net/ethernet/qualcomm/emac/built-in.a
AR drivers/net/ethernet/qualcomm/built-in.a
CC net/ipv4/xfrm4_input.o
CC drivers/hid/hid-generic.o
CC drivers/firmware/efi/libstub/random.o
CC arch/x86/kernel/early_printk.o
CC drivers/gpu/drm/i915/gt/gen7_renderclear.o
CC drivers/acpi/acpica/utdecode.o
CC drivers/net/ethernet/realtek/8139too.o
AR drivers/hwtracing/intel_th/built-in.a
CC lib/audit.o
CC fs/remap_range.o
CC drivers/gpu/drm/drm_fourcc.o
CC drivers/platform/x86/wmi-bmof.o
CC drivers/net/ethernet/realtek/r8169_main.o
CC net/ipv4/xfrm4_output.o
CC fs/pidfs.o
CC drivers/gpu/drm/drm_framebuffer.o
AR drivers/firmware/smccc/built-in.a
AR drivers/android/built-in.a
CC drivers/firmware/efi/memattr.o
CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o
CC drivers/platform/x86/eeepc-laptop.o
AR drivers/thermal/built-in.a
CC arch/x86/kernel/hpet.o
CC kernel/kprobes.o
AR drivers/mailbox/built-in.a
CC kernel/seccomp.o
CC drivers/gpu/drm/i915/gt/gen8_engine_cs.o
CC fs/buffer.o
CC drivers/net/ethernet/realtek/r8169_firmware.o
CC drivers/platform/x86/p2sb.o
CC drivers/acpi/acpica/utdelete.o
CC kernel/relay.o
AR drivers/net/ethernet/renesas/built-in.a
AR net/mac80211/built-in.a
CC drivers/firmware/efi/tpm.o
CC lib/syscall.o
CC drivers/gpu/drm/i915/gt/gen8_ppgtt.o
AR drivers/nvmem/layouts/built-in.a
CC drivers/nvmem/core.o
CC drivers/firmware/efi/memmap.o
CC drivers/firmware/efi/capsule.o
CC drivers/md/dm-io.o
CC drivers/net/ethernet/realtek/r8169_phy_config.o
CC drivers/hid/hid-a4tech.o
CC drivers/firmware/efi/libstub/randomalloc.o
CC lib/errname.o
CC drivers/md/dm-kcopyd.o
CC drivers/gpu/drm/i915/gt/intel_breadcrumbs.o
CC drivers/gpu/drm/drm_gem.o
AR drivers/net/ethernet/rdc/built-in.a
CC arch/x86/kernel/amd_nb.o
CC fs/mpage.o
CC drivers/hid/hid-apple.o
CC drivers/firmware/efi/esrt.o
CC arch/x86/kernel/amd_node.o
CC drivers/acpi/acpica/uterror.o
CC lib/nlattr.o
AR drivers/hid/usbhid/built-in.a
CC drivers/acpi/acpi_memhotplug.o
CC net/ipv4/xfrm4_protocol.o
AR drivers/net/ethernet/rocker/built-in.a
AR drivers/firmware/tegra/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o
CC drivers/hid/hid-belkin.o
CC drivers/firmware/efi/libstub/pci.o
CC drivers/md/dm-sysfs.o
CC fs/proc_namespace.o
CC kernel/utsname_sysctl.o
CC arch/x86/kernel/kvm.o
CC drivers/firmware/efi/runtime-wrappers.o
AR drivers/net/ethernet/intel/e1000e/built-in.a
AR drivers/net/ethernet/intel/built-in.a
CC drivers/gpu/drm/drm_ioctl.o
CC fs/direct-io.o
CC drivers/acpi/acpica/uteval.o
CC [M] drivers/gpu/drm/xe/xe_gt_throttle.o
CC drivers/acpi/ioapic.o
CC drivers/firmware/efi/capsule-loader.o
CC drivers/gpu/drm/i915/gt/intel_context.o
CC arch/x86/kernel/kvmclock.o
CC drivers/md/dm-stats.o
CC drivers/hid/hid-cherry.o
AR drivers/firmware/xilinx/built-in.a
CC kernel/delayacct.o
CC arch/x86/kernel/paravirt.o
AR drivers/platform/x86/built-in.a
CC drivers/gpu/drm/i915/gt/intel_context_sseu.o
AR drivers/platform/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o
CC fs/eventpoll.o
CC lib/cpu_rmap.o
CC drivers/firmware/efi/libstub/skip_spaces.o
CC drivers/gpu/drm/drm_lease.o
AR drivers/net/ethernet/samsung/built-in.a
CC drivers/md/dm-rq.o
CC fs/anon_inodes.o
CC arch/x86/kernel/pvclock.o
CC drivers/firmware/dmi_scan.o
CC drivers/md/dm-io-rewind.o
CC drivers/hid/hid-chicony.o
CC drivers/firmware/efi/earlycon.o
CC drivers/acpi/acpica/utglobal.o
CC fs/signalfd.o
CC drivers/firmware/dmi-id.o
CC kernel/taskstats.o
AR drivers/nvmem/built-in.a
CC drivers/firmware/efi/libstub/lib-cmdline.o
CC [M] drivers/gpu/drm/xe/xe_gt_topology.o
CC lib/dynamic_queue_limits.o
CC drivers/gpu/drm/i915/gt/intel_engine_cs.o
AR drivers/cpufreq/built-in.a
CC drivers/firmware/efi/libstub/lib-ctype.o
CC drivers/acpi/battery.o
AR drivers/net/ethernet/nvidia/built-in.a
CC kernel/tsacct.o
CC drivers/acpi/acpica/uthex.o
CC drivers/acpi/acpica/utids.o
CC drivers/firmware/memmap.o
CC drivers/firmware/efi/libstub/alignedmem.o
CC drivers/hid/hid-cypress.o
CC drivers/gpu/drm/drm_managed.o
CC drivers/gpu/drm/drm_mm.o
CC drivers/gpu/drm/i915/gt/intel_engine_heartbeat.o
CC arch/x86/kernel/pcspeaker.o
CC fs/timerfd.o
CC drivers/hid/hid-ezkey.o
CC drivers/hid/hid-gyration.o
CC drivers/gpu/drm/i915/gt/intel_engine_pm.o
CC drivers/firmware/efi/libstub/relocate.o
AR net/ipv4/built-in.a
AR net/built-in.a
CC kernel/tracepoint.o
CC [M] drivers/gpu/drm/xe/xe_guc.o
CC fs/eventfd.o
CC drivers/md/dm-builtin.o
AR drivers/net/ethernet/seeq/built-in.a
AR drivers/net/ethernet/silan/built-in.a
CC fs/aio.o
CC kernel/irq_work.o
CC drivers/hid/hid-ite.o
CC drivers/firmware/efi/libstub/printk.o
CC drivers/md/dm-raid1.o
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
CC drivers/gpu/drm/i915/gt/intel_engine_user.o
CC drivers/acpi/acpica/utinit.o
CC fs/locks.o
CC drivers/firmware/efi/libstub/vsprintf.o
CC drivers/acpi/bgrt.o
AR drivers/net/ethernet/sis/built-in.a
CC lib/glob.o
CC [M] drivers/gpu/drm/xe/xe_guc_buf.o
CC arch/x86/kernel/check.o
CC drivers/acpi/spcr.o
CC kernel/static_call.o
CC drivers/gpu/drm/i915/gt/intel_execlists_submission.o
CC kernel/padata.o
CC drivers/firmware/efi/libstub/x86-stub.o
CC fs/binfmt_misc.o
CC drivers/hid/hid-kensington.o
CC drivers/firmware/efi/libstub/smbios.o
CC drivers/gpu/drm/i915/gt/intel_ggtt.o
CC drivers/md/dm-log.o
CC fs/binfmt_script.o
CC [M] drivers/gpu/drm/xe/xe_guc_capture.o
CC drivers/gpu/drm/drm_mode_config.o
CC drivers/acpi/acpica/utlock.o
CC drivers/hid/hid-microsoft.o
AR drivers/net/ethernet/sfc/built-in.a
CC drivers/md/dm-region-hash.o
AR drivers/net/ethernet/smsc/built-in.a
CC fs/binfmt_elf.o
AR drivers/firmware/efi/built-in.a
CC fs/mbcache.o
CC arch/x86/kernel/uprobes.o
CC [M] drivers/gpu/drm/xe/xe_guc_ct.o
CC drivers/acpi/acpica/utmath.o
AR drivers/net/ethernet/socionext/built-in.a
CC fs/posix_acl.o
CC drivers/acpi/acpica/utmisc.o
CC drivers/gpu/drm/drm_mode_object.o
CC lib/strncpy_from_user.o
CC lib/strnlen_user.o
CC drivers/gpu/drm/drm_modes.o
CC [M] drivers/gpu/drm/xe/xe_guc_db_mgr.o
CC fs/coredump.o
CC arch/x86/kernel/perf_regs.o
AR drivers/net/ethernet/stmicro/built-in.a
CC kernel/jump_label.o
CC arch/x86/kernel/tracepoint.o
CC lib/net_utils.o
CC fs/drop_caches.o
CC drivers/gpu/drm/i915/gt/intel_ggtt_fencing.o
STUBCPY drivers/firmware/efi/libstub/alignedmem.stub.o
CC [M] drivers/gpu/drm/xe/xe_guc_engine_activity.o
CC drivers/acpi/acpica/utmutex.o
CC drivers/gpu/drm/drm_modeset_lock.o
AR drivers/net/ethernet/sun/built-in.a
CC drivers/hid/hid-monterey.o
CC lib/sg_pool.o
CC kernel/context_tracking.o
CC drivers/md/dm-zero.o
CC kernel/iomem.o
STUBCPY drivers/firmware/efi/libstub/efi-stub-helper.stub.o
CC fs/sysctls.o
CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o
CC drivers/gpu/drm/i915/gt/intel_gt.o
CC arch/x86/kernel/itmt.o
AR drivers/net/ethernet/realtek/built-in.a
CC drivers/gpu/drm/drm_plane.o
CC lib/stackdepot.o
AR drivers/net/ethernet/tehuti/built-in.a
CC lib/asn1_decoder.o
CC drivers/gpu/drm/drm_prime.o
AR drivers/net/ethernet/ti/built-in.a
AR drivers/net/ethernet/vertexcom/built-in.a
CC drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.o
AR drivers/net/ethernet/via/built-in.a
CC drivers/hid/hid-ntrig.o
AR drivers/net/ethernet/wangxun/built-in.a
AR drivers/net/ethernet/wiznet/built-in.a
AR drivers/net/ethernet/xilinx/built-in.a
AR drivers/net/ethernet/xircom/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_id_mgr.o
AR drivers/net/ethernet/synopsys/built-in.a
AR drivers/net/ethernet/pensando/built-in.a
CC drivers/acpi/acpica/utnonansi.o
STUBCPY drivers/firmware/efi/libstub/file.stub.o
AR drivers/net/ethernet/built-in.a
STUBCPY drivers/firmware/efi/libstub/gop.stub.o
CC kernel/rseq.o
CC drivers/hid/hid-pl.o
STUBCPY drivers/firmware/efi/libstub/lib-cmdline.stub.o
STUBCPY drivers/firmware/efi/libstub/lib-ctype.stub.o
STUBCPY drivers/firmware/efi/libstub/mem.stub.o
STUBCPY drivers/firmware/efi/libstub/pci.stub.o
CC arch/x86/kernel/umip.o
STUBCPY drivers/firmware/efi/libstub/printk.stub.o
CC drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.o
CC drivers/hid/hid-petalynx.o
STUBCPY drivers/firmware/efi/libstub/random.stub.o
AR drivers/net/built-in.a
STUBCPY drivers/firmware/efi/libstub/randomalloc.stub.o
STUBCPY drivers/firmware/efi/libstub/relocate.stub.o
CC drivers/gpu/drm/drm_print.o
CC fs/fhandle.o
STUBCPY drivers/firmware/efi/libstub/secureboot.stub.o
CC drivers/hid/hid-redragon.o
STUBCPY drivers/firmware/efi/libstub/skip_spaces.stub.o
CC arch/x86/kernel/unwind_frame.o
STUBCPY drivers/firmware/efi/libstub/smbios.stub.o
STUBCPY drivers/firmware/efi/libstub/tpm.stub.o
CC [M] drivers/gpu/drm/xe/xe_guc_klv_helpers.o
STUBCPY drivers/firmware/efi/libstub/vsprintf.stub.o
GEN lib/oid_registry_data.c
CC drivers/acpi/acpica/utobject.o
STUBCPY drivers/firmware/efi/libstub/x86-stub.stub.o
AR drivers/firmware/efi/libstub/lib.a
CC drivers/gpu/drm/drm_property.o
CC [M] drivers/gpu/drm/xe/xe_guc_log.o
AR drivers/firmware/built-in.a
CC lib/ucs2_string.o
CC drivers/acpi/acpica/utosi.o
CC drivers/gpu/drm/i915/gt/intel_gt_clock_utils.o
CC lib/sbitmap.o
CC [M] drivers/gpu/drm/xe/xe_guc_pc.o
CC drivers/gpu/drm/drm_rect.o
CC drivers/acpi/acpica/utownerid.o
CC drivers/hid/hid-samsung.o
AR drivers/md/built-in.a
CC drivers/hid/hid-sony.o
CC lib/group_cpus.o
CC lib/fw_table.o
CC drivers/gpu/drm/drm_syncobj.o
CC drivers/acpi/acpica/utpredef.o
CC drivers/acpi/acpica/utresdecode.o
CC drivers/gpu/drm/drm_sysfs.o
CC drivers/hid/hid-sunplus.o
CC drivers/gpu/drm/drm_trace_points.o
CC [M] drivers/gpu/drm/xe/xe_guc_submit.o
AR lib/lib.a
GEN lib/crc32table.h
CC drivers/gpu/drm/i915/gt/intel_gt_debugfs.o
CC drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.o
CC drivers/hid/hid-topseed.o
CC lib/oid_registry.o
CC lib/crc32.o
CC drivers/gpu/drm/drm_vblank.o
CC [M] drivers/gpu/drm/xe/xe_heci_gsc.o
CC drivers/acpi/acpica/utresrc.o
CC drivers/gpu/drm/drm_vblank_work.o
CC drivers/gpu/drm/drm_vma_manager.o
CC [M] drivers/gpu/drm/xe/xe_huc.o
CC drivers/acpi/acpica/utstate.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine.o
CC drivers/gpu/drm/drm_writeback.o
CC drivers/gpu/drm/i915/gt/intel_gt_irq.o
CC drivers/gpu/drm/i915/gt/intel_gt_mcr.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_group.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm.o
CC [M] drivers/gpu/drm/xe/xe_hw_fence.o
CC drivers/acpi/acpica/utstring.o
CC drivers/gpu/drm/drm_panel.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.o
AR arch/x86/kernel/built-in.a
CC drivers/acpi/acpica/utstrsuppt.o
CC [M] drivers/gpu/drm/xe/xe_irq.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm_irq.o
AR arch/x86/built-in.a
CC drivers/gpu/drm/drm_pci.o
CC drivers/gpu/drm/i915/gt/intel_gt_requests.o
CC drivers/gpu/drm/i915/gt/intel_gt_sysfs.o
CC drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.o
AR kernel/built-in.a
CC [M] drivers/gpu/drm/xe/xe_lrc.o
CC drivers/gpu/drm/drm_debugfs.o
CC drivers/acpi/acpica/utstrtoul64.o
CC drivers/gpu/drm/drm_debugfs_crc.o
AR fs/built-in.a
CC drivers/gpu/drm/i915/gt/intel_gtt.o
AR lib/built-in.a
CC drivers/gpu/drm/drm_panel_orientation_quirks.o
CC [M] drivers/gpu/drm/xe/xe_migrate.o
CC drivers/acpi/acpica/utxface.o
CC [M] drivers/gpu/drm/xe/xe_mmio.o
CC drivers/acpi/acpica/utxfinit.o
CC drivers/gpu/drm/drm_buddy.o
CC drivers/acpi/acpica/utxferror.o
CC drivers/acpi/acpica/utxfmutex.o
CC [M] drivers/gpu/drm/xe/xe_mocs.o
CC drivers/gpu/drm/drm_gem_shmem_helper.o
CC [M] drivers/gpu/drm/xe/xe_module.o
CC drivers/gpu/drm/i915/gt/intel_llc.o
CC drivers/gpu/drm/drm_atomic_helper.o
CC drivers/gpu/drm/drm_atomic_state_helper.o
CC drivers/gpu/drm/i915/gt/intel_lrc.o
CC [M] drivers/gpu/drm/xe/xe_oa.o
CC drivers/gpu/drm/drm_bridge_helper.o
CC [M] drivers/gpu/drm/xe/xe_observation.o
CC drivers/gpu/drm/i915/gt/intel_migrate.o
CC drivers/gpu/drm/drm_crtc_helper.o
CC [M] drivers/gpu/drm/xe/xe_pat.o
CC drivers/gpu/drm/i915/gt/intel_mocs.o
CC drivers/gpu/drm/drm_damage_helper.o
CC [M] drivers/gpu/drm/xe/xe_pci.o
CC drivers/gpu/drm/i915/gt/intel_ppgtt.o
CC drivers/gpu/drm/drm_flip_work.o
CC [M] drivers/gpu/drm/xe/xe_pcode.o
CC drivers/gpu/drm/i915/gt/intel_rc6.o
AR drivers/acpi/acpica/built-in.a
AR drivers/acpi/built-in.a
AR drivers/hid/built-in.a
CC drivers/gpu/drm/i915/gt/intel_region_lmem.o
CC [M] drivers/gpu/drm/xe/xe_pm.o
CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o
CC drivers/gpu/drm/i915/gt/intel_renderstate.o
CC drivers/gpu/drm/drm_format_helper.o
CC [M] drivers/gpu/drm/xe/xe_pt.o
CC drivers/gpu/drm/i915/gt/intel_reset.o
CC drivers/gpu/drm/drm_gem_atomic_helper.o
CC drivers/gpu/drm/i915/gt/intel_ring.o
CC [M] drivers/gpu/drm/xe/xe_pt_walk.o
CC drivers/gpu/drm/drm_gem_framebuffer_helper.o
CC [M] drivers/gpu/drm/xe/xe_pxp.o
CC drivers/gpu/drm/drm_kms_helper_common.o
CC drivers/gpu/drm/i915/gt/intel_ring_submission.o
CC drivers/gpu/drm/i915/gt/intel_rps.o
CC drivers/gpu/drm/i915/gt/intel_sa_media.o
CC drivers/gpu/drm/i915/gt/intel_sseu.o
CC [M] drivers/gpu/drm/xe/xe_pxp_debugfs.o
CC drivers/gpu/drm/drm_modeset_helper.o
CC drivers/gpu/drm/i915/gt/intel_sseu_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_pxp_submit.o
CC drivers/gpu/drm/drm_plane_helper.o
CC drivers/gpu/drm/i915/gt/intel_timeline.o
CC drivers/gpu/drm/drm_probe_helper.o
CC [M] drivers/gpu/drm/xe/xe_query.o
CC drivers/gpu/drm/drm_self_refresh_helper.o
CC drivers/gpu/drm/i915/gt/intel_tlb.o
CC [M] drivers/gpu/drm/xe/xe_range_fence.o
CC drivers/gpu/drm/i915/gt/intel_wopcm.o
CC drivers/gpu/drm/drm_simple_kms_helper.o
CC drivers/gpu/drm/i915/gt/intel_workarounds.o
CC [M] drivers/gpu/drm/xe/xe_reg_sr.o
CC [M] drivers/gpu/drm/xe/xe_reg_whitelist.o
CC drivers/gpu/drm/bridge/panel.o
CC [M] drivers/gpu/drm/xe/xe_ring_ops.o
CC drivers/gpu/drm/i915/gt/shmem_utils.o
CC drivers/gpu/drm/i915/gt/sysfs_engines.o
CC drivers/gpu/drm/drm_mipi_dsi.o
CC [M] drivers/gpu/drm/xe/xe_rtp.o
CC [M] drivers/gpu/drm/drm_exec.o
CC [M] drivers/gpu/drm/xe/xe_sa.o
CC drivers/gpu/drm/i915/gt/intel_ggtt_gmch.o
CC [M] drivers/gpu/drm/drm_gpuvm.o
CC drivers/gpu/drm/i915/gt/gen6_renderstate.o
CC [M] drivers/gpu/drm/xe/xe_sched_job.o
CC [M] drivers/gpu/drm/xe/xe_shrinker.o
CC drivers/gpu/drm/i915/gt/gen7_renderstate.o
CC drivers/gpu/drm/i915/gt/gen8_renderstate.o
CC [M] drivers/gpu/drm/xe/xe_step.o
CC [M] drivers/gpu/drm/drm_suballoc.o
CC drivers/gpu/drm/i915/gt/gen9_renderstate.o
CC [M] drivers/gpu/drm/xe/xe_survivability_mode.o
CC drivers/gpu/drm/i915/gem/i915_gem_busy.o
CC [M] drivers/gpu/drm/xe/xe_sync.o
CC drivers/gpu/drm/i915/gem/i915_gem_clflush.o
CC [M] drivers/gpu/drm/drm_gem_ttm_helper.o
CC [M] drivers/gpu/drm/xe/xe_tile.o
CC drivers/gpu/drm/i915/gem/i915_gem_context.o
CC drivers/gpu/drm/i915/gem/i915_gem_create.o
CC [M] drivers/gpu/drm/xe/xe_tile_sysfs.o
CC drivers/gpu/drm/i915/gem/i915_gem_dmabuf.o
CC [M] drivers/gpu/drm/xe/xe_trace.o
CC drivers/gpu/drm/i915/gem/i915_gem_domain.o
CC [M] drivers/gpu/drm/xe/xe_trace_bo.o
CC drivers/gpu/drm/i915/gem/i915_gem_execbuffer.o
CC drivers/gpu/drm/i915/gem/i915_gem_internal.o
CC [M] drivers/gpu/drm/xe/xe_trace_guc.o
CC drivers/gpu/drm/i915/gem/i915_gem_lmem.o
CC [M] drivers/gpu/drm/xe/xe_trace_lrc.o
CC [M] drivers/gpu/drm/xe/xe_ttm_stolen_mgr.o
CC drivers/gpu/drm/i915/gem/i915_gem_mman.o
CC drivers/gpu/drm/i915/gem/i915_gem_object.o
CC [M] drivers/gpu/drm/xe/xe_ttm_sys_mgr.o
CC [M] drivers/gpu/drm/xe/xe_ttm_vram_mgr.o
CC [M] drivers/gpu/drm/xe/xe_tuning.o
CC drivers/gpu/drm/i915/gem/i915_gem_pages.o
LD [M] drivers/gpu/drm/drm_suballoc_helper.o
CC [M] drivers/gpu/drm/xe/xe_uc.o
CC drivers/gpu/drm/i915/gem/i915_gem_phys.o
CC [M] drivers/gpu/drm/xe/xe_uc_fw.o
CC [M] drivers/gpu/drm/xe/xe_vm.o
CC drivers/gpu/drm/i915/gem/i915_gem_pm.o
CC drivers/gpu/drm/i915/gem/i915_gem_region.o
CC drivers/gpu/drm/i915/gem/i915_gem_shmem.o
CC [M] drivers/gpu/drm/xe/xe_vram.o
CC [M] drivers/gpu/drm/xe/xe_vram_freq.o
CC drivers/gpu/drm/i915/gem/i915_gem_shrinker.o
CC [M] drivers/gpu/drm/xe/xe_vsec.o
CC drivers/gpu/drm/i915/gem/i915_gem_stolen.o
CC drivers/gpu/drm/i915/gem/i915_gem_throttle.o
CC [M] drivers/gpu/drm/xe/xe_wa.o
CC drivers/gpu/drm/i915/gem/i915_gem_tiling.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm.o
CC [M] drivers/gpu/drm/xe/xe_wait_user_fence.o
LD [M] drivers/gpu/drm/drm_ttm_helper.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm_move.o
CC [M] drivers/gpu/drm/xe/xe_wopcm.o
CC [M] drivers/gpu/drm/xe/xe_hmm.o
CC [M] drivers/gpu/drm/xe/xe_hwmon.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.o
CC drivers/gpu/drm/i915/gem/i915_gem_userptr.o
CC drivers/gpu/drm/i915/gem/i915_gem_wait.o
CC [M] drivers/gpu/drm/xe/xe_pmu.o
CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf.o
CC [M] drivers/gpu/drm/xe/xe_guc_relay.o
CC drivers/gpu/drm/i915/gem/i915_gemfs.o
CC [M] drivers/gpu/drm/xe/xe_memirq.o
CC drivers/gpu/drm/i915/i915_active.o
CC drivers/gpu/drm/i915/i915_cmd_parser.o
CC [M] drivers/gpu/drm/xe/xe_sriov.o
CC drivers/gpu/drm/i915/i915_deps.o
CC [M] drivers/gpu/drm/xe/xe_sriov_vf.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_irq.o
CC drivers/gpu/drm/i915/i915_gem.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_utils.o
CC [M] drivers/gpu/drm/xe/display/intel_bo.o
CC [M] drivers/gpu/drm/xe/display/intel_fb_bo.o
CC drivers/gpu/drm/i915/i915_gem_evict.o
CC [M] drivers/gpu/drm/xe/display/intel_fbdev_fb.o
CC [M] drivers/gpu/drm/xe/display/xe_display.o
CC [M] drivers/gpu/drm/xe/display/xe_display_misc.o
CC drivers/gpu/drm/i915/i915_gem_gtt.o
CC drivers/gpu/drm/i915/i915_gem_ww.o
CC [M] drivers/gpu/drm/xe/display/xe_display_rpm.o
CC [M] drivers/gpu/drm/xe/display/xe_display_wa.o
CC drivers/gpu/drm/i915/i915_query.o
CC [M] drivers/gpu/drm/xe/display/xe_dsb_buffer.o
CC [M] drivers/gpu/drm/xe/display/xe_fb_pin.o
CC drivers/gpu/drm/i915/i915_request.o
CC drivers/gpu/drm/i915/i915_scheduler.o
CC drivers/gpu/drm/i915/i915_trace_points.o
CC [M] drivers/gpu/drm/xe/display/xe_hdcp_gsc.o
CC [M] drivers/gpu/drm/xe/display/xe_plane_initial.o
CC drivers/gpu/drm/i915/i915_ttm_buddy_manager.o
CC drivers/gpu/drm/i915/i915_vma.o
CC drivers/gpu/drm/i915/i915_vma_resource.o
CC [M] drivers/gpu/drm/xe/display/xe_tdf.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_dram.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_debugfs.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_rom.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_ads.o
CC [M] drivers/gpu/drm/xe/i915-display/icl_dsi.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_capture.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_alpm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_ct.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_audio.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_backlight.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bios.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bw.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_fw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cdclk.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cmtg.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_color.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_combo_phy.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_log.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_connector.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_rc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cursor.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_submission.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cx0_phy.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc_fw.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi_buf_trans.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc_fw.o
CC drivers/gpu/drm/i915/gt/intel_gsc.o
CC drivers/gpu/drm/i915/i915_hwmon.o
CC drivers/gpu/drm/i915/display/hsw_ips.o
CC drivers/gpu/drm/i915/display/i9xx_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_conversion.o
CC drivers/gpu/drm/i915/display/i9xx_display_sr.o
CC drivers/gpu/drm/i915/display/i9xx_wm.o
CC drivers/gpu/drm/i915/display/intel_alpm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_device.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_driver.o
CC drivers/gpu/drm/i915/display/intel_atomic.o
CC drivers/gpu/drm/i915/display/intel_atomic_plane.o
CC drivers/gpu/drm/i915/display/intel_audio.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_irq.o
CC drivers/gpu/drm/i915/display/intel_bios.o
CC drivers/gpu/drm/i915/display/intel_bo.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_params.o
CC drivers/gpu/drm/i915/display/intel_bw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_map.o
CC drivers/gpu/drm/i915/display/intel_cdclk.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_well.o
CC drivers/gpu/drm/i915/display/intel_cmtg.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_trace.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_wa.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dkl_phy.o
CC drivers/gpu/drm/i915/display/intel_color.o
CC drivers/gpu/drm/i915/display/intel_combo_phy.o
CC drivers/gpu/drm/i915/display/intel_connector.o
CC drivers/gpu/drm/i915/display/intel_crtc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc.o
CC drivers/gpu/drm/i915/display/intel_crtc_state_dump.o
CC drivers/gpu/drm/i915/display/intel_cursor.o
CC drivers/gpu/drm/i915/display/intel_display.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc_wl.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp.o
CC drivers/gpu/drm/i915/display/intel_display_conversion.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux.o
CC drivers/gpu/drm/i915/display/intel_display_driver.o
CC drivers/gpu/drm/i915/display/intel_display_irq.o
CC drivers/gpu/drm/i915/display/intel_display_params.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux_backlight.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_hdcp.o
CC drivers/gpu/drm/i915/display/intel_display_power.o
CC drivers/gpu/drm/i915/display/intel_display_power_map.o
CC drivers/gpu/drm/i915/display/intel_display_power_well.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_link_training.o
CC drivers/gpu/drm/i915/display/intel_display_reset.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_mst.o
CC drivers/gpu/drm/i915/display/intel_display_rpm.o
CC drivers/gpu/drm/i915/display/intel_display_rps.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_test.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll.o
CC drivers/gpu/drm/i915/display/intel_display_snapshot.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll_mgr.o
CC drivers/gpu/drm/i915/display/intel_display_wa.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpt_common.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_drrs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsb.o
CC drivers/gpu/drm/i915/display/intel_dmc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_dcs_backlight.o
CC drivers/gpu/drm/i915/display/intel_dmc_wl.o
CC drivers/gpu/drm/i915/display/intel_dpio_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_vbt.o
CC drivers/gpu/drm/i915/display/intel_dpll.o
CC drivers/gpu/drm/i915/display/intel_dpll_mgr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_encoder.o
CC drivers/gpu/drm/i915/display/intel_dpt.o
CC drivers/gpu/drm/i915/display/intel_dpt_common.o
CC drivers/gpu/drm/i915/display/intel_drrs.o
CC drivers/gpu/drm/i915/display/intel_dsb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fbc.o
CC drivers/gpu/drm/i915/display/intel_dsb_buffer.o
CC drivers/gpu/drm/i915/display/intel_fb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fdi.o
CC drivers/gpu/drm/i915/display/intel_fb_bo.o
CC drivers/gpu/drm/i915/display/intel_fb_pin.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_frontbuffer.o
CC drivers/gpu/drm/i915/display/intel_fbc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_global_state.o
CC drivers/gpu/drm/i915/display/intel_fdi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_gmbus.o
CC drivers/gpu/drm/i915/display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp.o
CC drivers/gpu/drm/i915/display/intel_frontbuffer.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp_gsc_message.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdmi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug.o
CC drivers/gpu/drm/i915/display/intel_global_state.o
CC drivers/gpu/drm/i915/display/intel_hdcp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hti.o
CC drivers/gpu/drm/i915/display/intel_hdcp_gsc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_link_bw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_lspcon.o
CC drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.o
CC drivers/gpu/drm/i915/display/intel_hotplug.o
CC drivers/gpu/drm/i915/display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_lock.o
CC drivers/gpu/drm/i915/display/intel_hti.o
CC drivers/gpu/drm/i915/display/intel_link_bw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_setup.o
CC drivers/gpu/drm/i915/display/intel_load_detect.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_verify.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_panel.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pfit.o
CC drivers/gpu/drm/i915/display/intel_lpe_audio.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pmdemand.o
CC drivers/gpu/drm/i915/display/intel_modeset_lock.o
CC drivers/gpu/drm/i915/display/intel_modeset_setup.o
CC drivers/gpu/drm/i915/display/intel_modeset_verify.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pch.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pps.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_psr.o
CC drivers/gpu/drm/i915/display/intel_overlay.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_qp_tables.o
CC drivers/gpu/drm/i915/display/intel_pch.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_quirks.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_hdmi_pll.o
CC drivers/gpu/drm/i915/display/intel_pch_display.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_phy.o
CC drivers/gpu/drm/i915/display/intel_pch_refclk.o
CC drivers/gpu/drm/i915/display/intel_plane_initial.o
CC drivers/gpu/drm/i915/display/intel_pmdemand.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_tc.o
CC drivers/gpu/drm/i915/display/intel_psr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vblank.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vdsc.o
CC drivers/gpu/drm/i915/display/intel_quirks.o
CC drivers/gpu/drm/i915/display/intel_sprite.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vga.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vrr.o
CC drivers/gpu/drm/i915/display/intel_sprite_uapi.o
CC drivers/gpu/drm/i915/display/intel_tc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_wm.o
CC drivers/gpu/drm/i915/display/intel_vblank.o
CC drivers/gpu/drm/i915/display/intel_vga.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_scaler.o
CC drivers/gpu/drm/i915/display/intel_wm.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_universal_plane.o
CC drivers/gpu/drm/i915/display/skl_scaler.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_watermark.o
CC drivers/gpu/drm/i915/display/skl_universal_plane.o
CC drivers/gpu/drm/i915/display/skl_watermark.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_acpi.o
CC drivers/gpu/drm/i915/display/vlv_sideband.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_opregion.o
CC [M] drivers/gpu/drm/xe/xe_debugfs.o
CC drivers/gpu/drm/i915/display/intel_acpi.o
CC drivers/gpu/drm/i915/display/intel_opregion.o
CC drivers/gpu/drm/i915/display/intel_display_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o
CC drivers/gpu/drm/i915/display/intel_display_debugfs_params.o
CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf_debugfs.o
CC drivers/gpu/drm/i915/display/intel_pipe_crc.o
CC drivers/gpu/drm/i915/display/dvo_ch7017.o
CC drivers/gpu/drm/i915/display/dvo_ch7xxx.o
CC [M] drivers/gpu/drm/xe/xe_gt_stats.o
CC drivers/gpu/drm/i915/display/dvo_ivch.o
CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o
CC drivers/gpu/drm/i915/display/dvo_ns2501.o
CC drivers/gpu/drm/i915/display/dvo_sil164.o
CC drivers/gpu/drm/i915/display/dvo_tfp410.o
CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o
CC drivers/gpu/drm/i915/display/g4x_dp.o
CC drivers/gpu/drm/i915/display/g4x_hdmi.o
CC drivers/gpu/drm/i915/display/icl_dsi.o
CC drivers/gpu/drm/i915/display/intel_backlight.o
CC [M] drivers/gpu/drm/xe/xe_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs.o
CC drivers/gpu/drm/i915/display/intel_crt.o
CC drivers/gpu/drm/i915/display/intel_cx0_phy.o
CC drivers/gpu/drm/i915/display/intel_ddi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs_params.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pipe_crc.o
CC drivers/gpu/drm/i915/display/intel_ddi_buf_trans.o
CC drivers/gpu/drm/i915/display/intel_display_device.o
CC drivers/gpu/drm/i915/display/intel_display_trace.o
CC drivers/gpu/drm/i915/display/intel_dkl_phy.o
CC drivers/gpu/drm/i915/display/intel_dp.o
CC drivers/gpu/drm/i915/display/intel_dp_aux.o
CC drivers/gpu/drm/i915/display/intel_dp_aux_backlight.o
CC drivers/gpu/drm/i915/display/intel_dp_hdcp.o
CC drivers/gpu/drm/i915/display/intel_dp_link_training.o
CC drivers/gpu/drm/i915/display/intel_dp_mst.o
CC drivers/gpu/drm/i915/display/intel_dp_test.o
CC drivers/gpu/drm/i915/display/intel_dsi.o
CC drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.o
CC drivers/gpu/drm/i915/display/intel_dsi_vbt.o
CC drivers/gpu/drm/i915/display/intel_dvo.o
CC drivers/gpu/drm/i915/display/intel_encoder.o
CC drivers/gpu/drm/i915/display/intel_gmbus.o
CC drivers/gpu/drm/i915/display/intel_hdmi.o
CC drivers/gpu/drm/i915/display/intel_lspcon.o
CC drivers/gpu/drm/i915/display/intel_lvds.o
CC drivers/gpu/drm/i915/display/intel_panel.o
CC drivers/gpu/drm/i915/display/intel_pfit.o
CC drivers/gpu/drm/i915/display/intel_pps.o
CC drivers/gpu/drm/i915/display/intel_qp_tables.o
CC drivers/gpu/drm/i915/display/intel_sdvo.o
CC drivers/gpu/drm/i915/display/intel_snps_hdmi_pll.o
CC drivers/gpu/drm/i915/display/intel_snps_phy.o
CC drivers/gpu/drm/i915/display/intel_tv.o
CC drivers/gpu/drm/i915/display/intel_vdsc.o
CC drivers/gpu/drm/i915/display/intel_vrr.o
CC drivers/gpu/drm/i915/display/vlv_dsi.o
CC drivers/gpu/drm/i915/display/vlv_dsi_pll.o
CC drivers/gpu/drm/i915/i915_perf.o
CC drivers/gpu/drm/i915/pxp/intel_pxp.o
CC drivers/gpu/drm/i915/pxp/intel_pxp_huc.o
CC drivers/gpu/drm/i915/pxp/intel_pxp_tee.o
CC drivers/gpu/drm/i915/i915_gpu_error.o
CC drivers/gpu/drm/i915/i915_vgpu.o
LD [M] drivers/gpu/drm/xe/xe.o
AR drivers/gpu/drm/i915/built-in.a
AR drivers/gpu/drm/built-in.a
AR drivers/gpu/built-in.a
AR drivers/built-in.a
AR built-in.a
AR vmlinux.a
LD vmlinux.o
OBJCOPY modules.builtin.modinfo
GEN modules.builtin
MODPOST Module.symvers
CC .vmlinux.export.o
CC [M] fs/efivarfs/efivarfs.mod.o
CC [M] .module-common.o
CC [M] drivers/gpu/drm/drm_exec.mod.o
CC [M] drivers/gpu/drm/drm_gpuvm.mod.o
CC [M] drivers/gpu/drm/drm_suballoc_helper.mod.o
CC [M] drivers/gpu/drm/drm_ttm_helper.mod.o
CC [M] drivers/gpu/drm/scheduler/gpu-sched.mod.o
CC [M] drivers/gpu/drm/xe/xe.mod.o
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.mod.o
CC [M] net/netfilter/nf_log_syslog.mod.o
CC [M] net/netfilter/xt_mark.mod.o
CC [M] net/netfilter/xt_nat.mod.o
CC [M] net/netfilter/xt_LOG.mod.o
CC [M] net/netfilter/xt_MASQUERADE.mod.o
CC [M] net/netfilter/xt_addrtype.mod.o
CC [M] net/ipv4/netfilter/iptable_nat.mod.o
LD [M] drivers/gpu/drm/drm_suballoc_helper.ko
LD [M] drivers/gpu/drm/scheduler/gpu-sched.ko
LD [M] drivers/thermal/intel/x86_pkg_temp_thermal.ko
LD [M] net/netfilter/xt_mark.ko
LD [M] net/netfilter/xt_nat.ko
LD [M] fs/efivarfs/efivarfs.ko
LD [M] drivers/gpu/drm/drm_gpuvm.ko
LD [M] net/netfilter/xt_LOG.ko
LD [M] net/ipv4/netfilter/iptable_nat.ko
LD [M] drivers/gpu/drm/drm_ttm_helper.ko
LD [M] drivers/gpu/drm/xe/xe.ko
LD [M] net/netfilter/xt_addrtype.ko
LD [M] drivers/gpu/drm/drm_exec.ko
LD [M] net/netfilter/nf_log_syslog.ko
LD [M] net/netfilter/xt_MASQUERADE.ko
UPD include/generated/utsversion.h
CC init/version-timestamp.o
KSYMS .tmp_vmlinux0.kallsyms.S
AS .tmp_vmlinux0.kallsyms.o
LD .tmp_vmlinux1
NM .tmp_vmlinux1.syms
KSYMS .tmp_vmlinux1.kallsyms.S
AS .tmp_vmlinux1.kallsyms.o
LD .tmp_vmlinux2
NM .tmp_vmlinux2.syms
KSYMS .tmp_vmlinux2.kallsyms.S
AS .tmp_vmlinux2.kallsyms.o
LD vmlinux.unstripped
NM System.map
SORTTAB vmlinux.unstripped
RSTRIP vmlinux
CC arch/x86/boot/a20.o
AS arch/x86/boot/bioscall.o
CC arch/x86/boot/cmdline.o
AS arch/x86/boot/copy.o
HOSTCC arch/x86/boot/mkcpustr
CC arch/x86/boot/cpuflags.o
CC arch/x86/boot/cpucheck.o
CC arch/x86/boot/early_serial_console.o
CC arch/x86/boot/edd.o
CC arch/x86/boot/main.o
CC arch/x86/boot/memory.o
CC arch/x86/boot/pm.o
AS arch/x86/boot/pmjump.o
CC arch/x86/boot/printf.o
CC arch/x86/boot/regs.o
CC arch/x86/boot/string.o
CC arch/x86/boot/tty.o
CC arch/x86/boot/video.o
CC arch/x86/boot/video-mode.o
CC arch/x86/boot/version.o
CC arch/x86/boot/video-vga.o
CC arch/x86/boot/video-vesa.o
CC arch/x86/boot/video-bios.o
LDS arch/x86/boot/compressed/vmlinux.lds
AS arch/x86/boot/compressed/kernel_info.o
AS arch/x86/boot/compressed/head_32.o
VOFFSET arch/x86/boot/compressed/../voffset.h
CC arch/x86/boot/compressed/string.o
CC arch/x86/boot/compressed/cmdline.o
CC arch/x86/boot/compressed/error.o
OBJCOPY arch/x86/boot/compressed/vmlinux.bin
RELOCS arch/x86/boot/compressed/vmlinux.relocs
HOSTCC arch/x86/boot/compressed/mkpiggy
CC arch/x86/boot/compressed/cpuflags.o
CC arch/x86/boot/compressed/early_serial_console.o
CC arch/x86/boot/compressed/kaslr.o
CC arch/x86/boot/compressed/acpi.o
CC arch/x86/boot/compressed/efi.o
CPUSTR arch/x86/boot/cpustr.h
CC arch/x86/boot/cpu.o
GZIP arch/x86/boot/compressed/vmlinux.bin.gz
CC arch/x86/boot/compressed/misc.o
MKPIGGY arch/x86/boot/compressed/piggy.S
AS arch/x86/boot/compressed/piggy.o
LD arch/x86/boot/compressed/vmlinux
ZOFFSET arch/x86/boot/zoffset.h
OBJCOPY arch/x86/boot/vmlinux.bin
AS arch/x86/boot/header.o
LD arch/x86/boot/setup.elf
OBJCOPY arch/x86/boot/setup.bin
BUILD arch/x86/boot/bzImage
Kernel: arch/x86/boot/bzImage is ready (#1)
run-parts: executing /workspace/ci/hooks/20-kernel-doc
+ SRC_DIR=/workspace/kernel
+ cd /workspace/kernel
+ find drivers/gpu/drm/xe/ -name '*.[ch]' -not -path 'drivers/gpu/drm/xe/display/*'
+ xargs ./scripts/kernel-doc -Werror -none include/uapi/drm/xe_drm.h
All hooks done
^ permalink raw reply [flat|nested] 38+ messages in thread* ✓ CI.checksparse: success for DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (20 preceding siblings ...)
2025-05-15 8:01 ` ✓ CI.Hooks: " Patchwork
@ 2025-05-15 8:03 ` Patchwork
2025-05-15 8:12 ` ✗ i915.CI.BAT: failure " Patchwork
` (8 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-15 8:03 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
== Series Details ==
Series: DPLL framework redesign
URL : https://patchwork.freedesktop.org/series/149051/
State : success
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 3d6670fab64cb00b5e6ed80d2517147db533faf1
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
Okay!
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 38+ messages in thread* ✗ i915.CI.BAT: failure for DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (21 preceding siblings ...)
2025-05-15 8:03 ` ✓ CI.checksparse: " Patchwork
@ 2025-05-15 8:12 ` Patchwork
2025-05-15 8:26 ` ✓ Xe.CI.BAT: success " Patchwork
` (7 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-15 8:12 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 6262 bytes --]
== Series Details ==
Series: DPLL framework redesign
URL : https://patchwork.freedesktop.org/series/149052/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_16546 -> Patchwork_149052v1
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_149052v1 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_149052v1, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/index.html
Participating hosts (46 -> 45)
------------------------------
Missing (1): fi-snb-2520m
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_149052v1:
### IGT changes ###
#### Possible regressions ####
* igt@i915_module_load@load:
- bat-mtlp-9: [PASS][1] -> [ABORT][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16546/bat-mtlp-9/igt@i915_module_load@load.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/bat-mtlp-9/igt@i915_module_load@load.html
* igt@kms_pm_rpm@basic-rte:
- bat-arls-6: [PASS][3] -> [FAIL][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16546/bat-arls-6/igt@kms_pm_rpm@basic-rte.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/bat-arls-6/igt@kms_pm_rpm@basic-rte.html
Known issues
------------
Here are the changes found in Patchwork_149052v1 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_auth@basic-auth:
- bat-adlp-6: [PASS][5] -> [DMESG-WARN][6] ([i915#13890])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16546/bat-adlp-6/igt@core_auth@basic-auth.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/bat-adlp-6/igt@core_auth@basic-auth.html
* igt@i915_module_load@load:
- bat-twl-1: [PASS][7] -> [DMESG-WARN][8] ([i915#13736])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16546/bat-twl-1/igt@i915_module_load@load.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/bat-twl-1/igt@i915_module_load@load.html
* igt@i915_selftest@live:
- bat-mtlp-8: [PASS][9] -> [DMESG-FAIL][10] ([i915#12061]) +1 other test dmesg-fail
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16546/bat-mtlp-8/igt@i915_selftest@live.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/bat-mtlp-8/igt@i915_selftest@live.html
- bat-dg2-8: [PASS][11] -> [ABORT][12] ([i915#13696] / [i915#14201])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16546/bat-dg2-8/igt@i915_selftest@live.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/bat-dg2-8/igt@i915_selftest@live.html
* igt@i915_selftest@live@dmabuf:
- bat-dg2-8: [PASS][13] -> [ABORT][14] ([i915#14201])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16546/bat-dg2-8/igt@i915_selftest@live@dmabuf.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/bat-dg2-8/igt@i915_selftest@live@dmabuf.html
#### Possible fixes ####
* igt@dmabuf@all-tests@dma_fence_chain:
- fi-bsw-n3050: [INCOMPLETE][15] ([i915#12904]) -> [PASS][16] +1 other test pass
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16546/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/fi-bsw-n3050/igt@dmabuf@all-tests@dma_fence_chain.html
* igt@fbdev@eof:
- bat-adlp-6: [DMESG-WARN][17] ([i915#13890]) -> [PASS][18]
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16546/bat-adlp-6/igt@fbdev@eof.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/bat-adlp-6/igt@fbdev@eof.html
* igt@i915_selftest@live@hugepages:
- bat-arlh-2: [DMESG-FAIL][19] ([i915#14243]) -> [PASS][20] +1 other test pass
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16546/bat-arlh-2/igt@i915_selftest@live@hugepages.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/bat-arlh-2/igt@i915_selftest@live@hugepages.html
#### Warnings ####
* igt@i915_selftest@live:
- bat-atsm-1: [DMESG-FAIL][21] ([i915#12061] / [i915#14204]) -> [DMESG-FAIL][22] ([i915#12061] / [i915#13929])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16546/bat-atsm-1/igt@i915_selftest@live.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/bat-atsm-1/igt@i915_selftest@live.html
* igt@i915_selftest@live@mman:
- bat-atsm-1: [DMESG-FAIL][23] ([i915#14204]) -> [DMESG-FAIL][24] ([i915#13929])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16546/bat-atsm-1/igt@i915_selftest@live@mman.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/bat-atsm-1/igt@i915_selftest@live@mman.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904
[i915#13696]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13696
[i915#13736]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13736
[i915#13890]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13890
[i915#13929]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929
[i915#14201]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14201
[i915#14204]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204
[i915#14243]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14243
Build changes
-------------
* Linux: CI_DRM_16546 -> Patchwork_149052v1
CI-20190529: 20190529
CI_DRM_16546: 3d6670fab64cb00b5e6ed80d2517147db533faf1 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8364: 8364
Patchwork_149052v1: 3d6670fab64cb00b5e6ed80d2517147db533faf1 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v1/index.html
[-- Attachment #2: Type: text/html, Size: 7596 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread* ✓ Xe.CI.BAT: success for DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (22 preceding siblings ...)
2025-05-15 8:12 ` ✗ i915.CI.BAT: failure " Patchwork
@ 2025-05-15 8:26 ` Patchwork
2025-05-15 15:30 ` ✗ Xe.CI.Full: failure " Patchwork
` (6 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-15 8:26 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 3666 bytes --]
== Series Details ==
Series: DPLL framework redesign
URL : https://patchwork.freedesktop.org/series/149051/
State : success
== Summary ==
CI Bug Log - changes from xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1_BAT -> xe-pw-149051v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (10 -> 9)
------------------------------
Missing (1): bat-adlp-vm
Known issues
------------
Here are the changes found in xe-pw-149051v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@xe_evict@evict-beng-small-cm:
- bat-adlp-vf: NOTRUN -> [SKIP][1] ([Intel XE#261] / [Intel XE#688]) +9 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/bat-adlp-vf/igt@xe_evict@evict-beng-small-cm.html
* igt@xe_exec_fault_mode@twice-rebind:
- bat-adlp-vf: NOTRUN -> [SKIP][2] ([Intel XE#288]) +32 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/bat-adlp-vf/igt@xe_exec_fault_mode@twice-rebind.html
* igt@xe_live_ktest@xe_bo:
- bat-adlp-vf: NOTRUN -> [SKIP][3] ([Intel XE#2229] / [Intel XE#455]) +2 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/bat-adlp-vf/igt@xe_live_ktest@xe_bo.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- bat-adlp-vf: NOTRUN -> [SKIP][4] ([Intel XE#2229])
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/bat-adlp-vf/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
* igt@xe_pat@pat-index-xe2:
- bat-adlp-vf: NOTRUN -> [SKIP][5] ([Intel XE#977])
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/bat-adlp-vf/igt@xe_pat@pat-index-xe2.html
* igt@xe_pat@pat-index-xehpc:
- bat-adlp-vf: NOTRUN -> [SKIP][6] ([Intel XE#2838] / [Intel XE#979])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/bat-adlp-vf/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pat@pat-index-xelpg:
- bat-adlp-vf: NOTRUN -> [SKIP][7] ([Intel XE#979])
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/bat-adlp-vf/igt@xe_pat@pat-index-xelpg.html
#### Possible fixes ####
* igt@xe_pat@pat-index-xelp@render:
- bat-adlp-vf: [ABORT][8] ([Intel XE#3970]) -> [PASS][9] +1 other test pass
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/bat-adlp-vf/igt@xe_pat@pat-index-xelp@render.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/bat-adlp-vf/igt@xe_pat@pat-index-xelp@render.html
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
Build changes
-------------
* Linux: xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1 -> xe-pw-149051v1
IGT_8364: 8364
xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1: 3d6670fab64cb00b5e6ed80d2517147db533faf1
xe-pw-149051v1: 149051v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/index.html
[-- Attachment #2: Type: text/html, Size: 4541 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread* ✗ Xe.CI.Full: failure for DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (23 preceding siblings ...)
2025-05-15 8:26 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2025-05-15 15:30 ` Patchwork
2025-05-16 10:26 ` ✗ Fi.CI.CHECKPATCH: warning for DPLL framework redesign (rev2) Patchwork
` (5 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-15 15:30 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 101705 bytes --]
== Series Details ==
Series: DPLL framework redesign
URL : https://patchwork.freedesktop.org/series/149051/
State : failure
== Summary ==
CI Bug Log - changes from xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1_FULL -> xe-pw-149051v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-149051v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-149051v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-149051v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@runner@aborted:
- shard-bmg: NOTRUN -> ([FAIL][1], [FAIL][2], [FAIL][3], [FAIL][4], [FAIL][5], [FAIL][6], [FAIL][7], [FAIL][8], [FAIL][9], [FAIL][10], [FAIL][11], [FAIL][12], [FAIL][13], [FAIL][14], [FAIL][15], [FAIL][16], [FAIL][17], [FAIL][18], [FAIL][19], [FAIL][20], [FAIL][21], [FAIL][22], [FAIL][23], [FAIL][24], [FAIL][25])
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-5/igt@runner@aborted.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-8/igt@runner@aborted.html
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-3/igt@runner@aborted.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-5/igt@runner@aborted.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-6/igt@runner@aborted.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-8/igt@runner@aborted.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-7/igt@runner@aborted.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-4/igt@runner@aborted.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-2/igt@runner@aborted.html
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-4/igt@runner@aborted.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-8/igt@runner@aborted.html
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-6/igt@runner@aborted.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-1/igt@runner@aborted.html
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-3/igt@runner@aborted.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-1/igt@runner@aborted.html
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-5/igt@runner@aborted.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-7/igt@runner@aborted.html
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-7/igt@runner@aborted.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-3/igt@runner@aborted.html
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-2/igt@runner@aborted.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-6/igt@runner@aborted.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-4/igt@runner@aborted.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-2/igt@runner@aborted.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-1/igt@runner@aborted.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-1/igt@runner@aborted.html
Known issues
------------
Here are the changes found in xe-pw-149051v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@fbdev@unaligned-write:
- shard-dg2-set2: [PASS][26] -> [SKIP][27] ([Intel XE#2134])
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@fbdev@unaligned-write.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@fbdev@unaligned-write.html
* igt@kms_addfb_basic@addfb25-modifier-no-flag:
- shard-dg2-set2: [PASS][28] -> [SKIP][29] ([Intel XE#4208] / [i915#2575]) +15 other tests skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_addfb_basic@addfb25-modifier-no-flag.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_addfb_basic@addfb25-modifier-no-flag.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#1466])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-d-hdmi-a-6-4-mc-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][31] ([Intel XE#3767]) +7 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-d-hdmi-a-6-4-mc-ccs.html
* igt@kms_atomic_transition@plane-toggle-modeset-transition:
- shard-adlp: [PASS][32] -> [FAIL][33] ([Intel XE#3908]) +1 other test fail
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-adlp-2/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-2/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-90:
- shard-adlp: NOTRUN -> [SKIP][34] ([Intel XE#1124]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-dg2-set2: [PASS][35] -> [SKIP][36] ([Intel XE#2351] / [Intel XE#4208])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-180:
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#1124])
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@kms_big_fb@yf-tiled-16bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-dg2-set2: NOTRUN -> [SKIP][38] ([Intel XE#1124]) +4 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
- shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#1512])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-1-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][40] ([Intel XE#367]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_bw@linear-tiling-1-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-2-displays-2560x1440p:
- shard-adlp: NOTRUN -> [SKIP][41] ([Intel XE#367])
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
* igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc:
- shard-adlp: NOTRUN -> [SKIP][42] ([Intel XE#455] / [Intel XE#787]) +7 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][43] ([Intel XE#2887])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-basic-y-tiled-ccs@pipe-d-hdmi-a-2:
- shard-dg2-set2: NOTRUN -> [SKIP][44] ([Intel XE#787]) +244 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_ccs@crc-primary-basic-y-tiled-ccs@pipe-d-hdmi-a-2.html
* igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][45] ([Intel XE#787]) +11 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_ccs@crc-primary-rotation-180-y-tiled-gen12-rc-ccs-cc@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][46] ([Intel XE#3442])
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-d-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][47] ([Intel XE#455] / [Intel XE#787]) +40 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs@pipe-d-dp-2.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-adlp: NOTRUN -> [SKIP][48] ([Intel XE#4418])
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@mode-transition@pipe-a-dp-2:
- shard-dg2-set2: NOTRUN -> [SKIP][49] ([Intel XE#4417]) +3 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_cdclk@mode-transition@pipe-a-dp-2.html
* igt@kms_cdclk@plane-scaling@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][50] ([Intel XE#4416]) +3 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_cdclk@plane-scaling@pipe-b-dp-4.html
* igt@kms_chamelium_color@ctm-negative:
- shard-dg2-set2: NOTRUN -> [SKIP][51] ([Intel XE#306])
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_chamelium_color@ctm-negative.html
* igt@kms_chamelium_hpd@hdmi-hpd:
- shard-dg2-set2: NOTRUN -> [SKIP][52] ([Intel XE#373]) +3 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_chamelium_hpd@hdmi-hpd.html
* igt@kms_chamelium_hpd@hdmi-hpd-after-hibernate:
- shard-adlp: NOTRUN -> [SKIP][53] ([Intel XE#373]) +2 other tests skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_chamelium_hpd@hdmi-hpd-after-hibernate.html
* igt@kms_content_protection@atomic:
- shard-dg2-set2: NOTRUN -> [FAIL][54] ([Intel XE#1178]) +3 other tests fail
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@lic-type-0@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][55] ([Intel XE#3304])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_content_protection@lic-type-0@pipe-a-dp-4.html
* igt@kms_cursor_crc@cursor-onscreen-128x42:
- shard-lnl: NOTRUN -> [SKIP][56] ([Intel XE#1424])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@kms_cursor_crc@cursor-onscreen-128x42.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-adlp: NOTRUN -> [SKIP][57] ([Intel XE#308])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- shard-lnl: NOTRUN -> [SKIP][58] ([Intel XE#323])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
- shard-adlp: NOTRUN -> [SKIP][59] ([Intel XE#309]) +1 other test skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][60] ([Intel XE#4494] / [i915#3804])
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][61] ([Intel XE#776])
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop:
- shard-adlp: NOTRUN -> [SKIP][62] ([Intel XE#310]) +2 other tests skip
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_flip@2x-flip-vs-dpms-on-nop.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a6-dp4:
- shard-dg2-set2: [PASS][63] -> [FAIL][64] ([Intel XE#301]) +11 other tests fail
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-434/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a6-dp4.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a6-dp4.html
* igt@kms_flip@flip-vs-absolute-wf_vblank:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][65] ([Intel XE#2049]) +1 other test incomplete
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_flip@flip-vs-absolute-wf_vblank.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4:
- shard-dg2-set2: NOTRUN -> [FAIL][66] ([Intel XE#301]) +6 other tests fail
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp4.html
* igt@kms_flip@flip-vs-expired-vblank@a-dp4:
- shard-dg2-set2: [PASS][67] -> [FAIL][68] ([Intel XE#301] / [Intel XE#3321]) +3 other tests fail
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-434/igt@kms_flip@flip-vs-expired-vblank@a-dp4.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_flip@flip-vs-expired-vblank@a-dp4.html
* igt@kms_flip@plain-flip-ts-check@a-edp1:
- shard-lnl: [PASS][69] -> [FAIL][70] ([Intel XE#886]) +1 other test fail
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-lnl-5/igt@kms_flip@plain-flip-ts-check@a-edp1.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-2/igt@kms_flip@plain-flip-ts-check@a-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
- shard-lnl: NOTRUN -> [SKIP][71] ([Intel XE#1401] / [Intel XE#1745])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][72] ([Intel XE#1401])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling@pipe-a-default-mode.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y:
- shard-adlp: [PASS][73] -> [DMESG-FAIL][74] ([Intel XE#4543]) +1 other test dmesg-fail
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y.html
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-b-hdmi-a-1-y-to-y.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y:
- shard-adlp: [PASS][75] -> [FAIL][76] ([Intel XE#1874]) +1 other test fail
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][77] ([Intel XE#651]) +2 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][78] ([Intel XE#651]) +13 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-suspend.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][79] ([Intel XE#651])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][80] ([Intel XE#656]) +2 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-render:
- shard-adlp: NOTRUN -> [SKIP][81] ([Intel XE#653]) +1 other test skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][82] ([Intel XE#653]) +15 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@plane-fbc-rte:
- shard-dg2-set2: NOTRUN -> [SKIP][83] ([Intel XE#1158])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_frontbuffer_tracking@plane-fbc-rte.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
- shard-adlp: NOTRUN -> [SKIP][84] ([Intel XE#656]) +8 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-lnl: NOTRUN -> [SKIP][85] ([Intel XE#2927])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_panel_fitting@legacy:
- shard-adlp: NOTRUN -> [SKIP][86] ([Intel XE#455]) +5 other tests skip
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_panel_fitting@legacy.html
* igt@kms_plane_cursor@primary@pipe-a-hdmi-a-2-size-256:
- shard-dg2-set2: NOTRUN -> [FAIL][87] ([Intel XE#616]) +2 other tests fail
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_plane_cursor@primary@pipe-a-hdmi-a-2-size-256.html
* igt@kms_plane_multiple@tiling-none:
- shard-adlp: [PASS][88] -> [DMESG-WARN][89] ([Intel XE#4173]) +12 other tests dmesg-warn
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-adlp-4/igt@kms_plane_multiple@tiling-none.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_plane_multiple@tiling-none.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b:
- shard-dg2-set2: NOTRUN -> [SKIP][90] ([Intel XE#2763]) +11 other tests skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d:
- shard-dg2-set2: NOTRUN -> [SKIP][91] ([Intel XE#2763] / [Intel XE#455]) +3 other tests skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-d.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b:
- shard-lnl: NOTRUN -> [SKIP][92] ([Intel XE#2763]) +3 other tests skip
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b.html
* igt@kms_pm_backlight@basic-brightness:
- shard-adlp: NOTRUN -> [SKIP][93] ([Intel XE#870]) +1 other test skip
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_pm_backlight@fade-with-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][94] ([Intel XE#870])
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_pm_backlight@fade-with-dpms.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][95] ([Intel XE#1489]) +3 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb:
- shard-adlp: NOTRUN -> [SKIP][96] ([Intel XE#1489]) +2 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_psr2_sf@pr-primary-plane-update-sf-dmg-area-big-fb.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-dg2-set2: NOTRUN -> [SKIP][97] ([Intel XE#1122])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@fbc-psr2-no-drrs:
- shard-dg2-set2: NOTRUN -> [SKIP][98] ([Intel XE#2850] / [Intel XE#929]) +4 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_psr@fbc-psr2-no-drrs.html
* igt@kms_psr@psr2-cursor-blt:
- shard-adlp: NOTRUN -> [SKIP][99] ([Intel XE#2850] / [Intel XE#929]) +3 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@kms_psr@psr2-cursor-blt.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-dg2-set2: NOTRUN -> [SKIP][100] ([Intel XE#2939]) +1 other test skip
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-dg2-set2: NOTRUN -> [SKIP][101] ([Intel XE#3414]) +2 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_rotation_crc@bad-pixel-format.html
* igt@xe_compute_preempt@compute-preempt-many-all-ram@engine-drm_xe_engine_class_compute:
- shard-dg2-set2: NOTRUN -> [SKIP][102] ([Intel XE#455]) +14 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_compute_preempt@compute-preempt-many-all-ram@engine-drm_xe_engine_class_compute.html
* igt@xe_compute_preempt@compute-preempt@engine-drm_xe_engine_class_compute:
- shard-dg2-set2: NOTRUN -> [SKIP][103] ([Intel XE#1280] / [Intel XE#455])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_compute_preempt@compute-preempt@engine-drm_xe_engine_class_compute.html
* igt@xe_eu_stall@unprivileged-access:
- shard-dg2-set2: NOTRUN -> [SKIP][104] ([Intel XE#4497])
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@xe_eu_stall@unprivileged-access.html
* igt@xe_eudebug@basic-vm-bind-extended:
- shard-lnl: NOTRUN -> [SKIP][105] ([Intel XE#4837])
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@xe_eudebug@basic-vm-bind-extended.html
* igt@xe_eudebug_online@interrupt-all-set-breakpoint:
- shard-dg2-set2: NOTRUN -> [SKIP][106] ([Intel XE#4837]) +3 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@xe_eudebug_online@interrupt-all-set-breakpoint.html
* igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
- shard-adlp: NOTRUN -> [SKIP][107] ([Intel XE#4837]) +2 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html
* igt@xe_evict_ccs@evict-overcommit-standalone-nofree-samefd:
- shard-adlp: NOTRUN -> [SKIP][108] ([Intel XE#688])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@xe_evict_ccs@evict-overcommit-standalone-nofree-samefd.html
* igt@xe_exec_basic@multigpu-once-null-defer-bind:
- shard-adlp: NOTRUN -> [SKIP][109] ([Intel XE#1392]) +2 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@xe_exec_basic@multigpu-once-null-defer-bind.html
* igt@xe_exec_fault_mode@many-execqueues-bindexecqueue:
- shard-adlp: NOTRUN -> [SKIP][110] ([Intel XE#288]) +5 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue.html
* igt@xe_exec_fault_mode@twice-bindexecqueue-userptr:
- shard-dg2-set2: NOTRUN -> [SKIP][111] ([Intel XE#288]) +9 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr.html
* igt@xe_exec_system_allocator@many-new-bo-map:
- shard-adlp: NOTRUN -> [SKIP][112] ([Intel XE#4915]) +44 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@xe_exec_system_allocator@many-new-bo-map.html
* igt@xe_exec_system_allocator@threads-many-large-mmap-new-huge:
- shard-lnl: NOTRUN -> [SKIP][113] ([Intel XE#4943])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@xe_exec_system_allocator@threads-many-large-mmap-new-huge.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-shared-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][114] ([Intel XE#4915]) +78 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@xe_exec_system_allocator@threads-shared-vm-many-execqueues-mmap-shared-nomemset.html
* igt@xe_exec_threads@threads-hang-shared-vm-rebind:
- shard-dg2-set2: [PASS][115] -> [SKIP][116] ([Intel XE#4208]) +35 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@xe_exec_threads@threads-hang-shared-vm-rebind.html
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_exec_threads@threads-hang-shared-vm-rebind.html
* igt@xe_mmap@pci-membarrier-bad-object:
- shard-adlp: NOTRUN -> [SKIP][117] ([Intel XE#4045])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@xe_mmap@pci-membarrier-bad-object.html
* igt@xe_oa@polling-small-buf:
- shard-dg2-set2: NOTRUN -> [SKIP][118] ([Intel XE#2541] / [Intel XE#3573])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@xe_oa@polling-small-buf.html
* igt@xe_oa@syncs-syncobj-cfg:
- shard-dg2-set2: NOTRUN -> [SKIP][119] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@xe_oa@syncs-syncobj-cfg.html
* igt@xe_oa@syncs-ufence-wait:
- shard-adlp: NOTRUN -> [SKIP][120] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@xe_oa@syncs-ufence-wait.html
* igt@xe_pat@pat-index-xehpc:
- shard-dg2-set2: NOTRUN -> [SKIP][121] ([Intel XE#2838] / [Intel XE#979])
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pm@d3cold-mmap-system:
- shard-dg2-set2: NOTRUN -> [SKIP][122] ([Intel XE#2284] / [Intel XE#366])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@xe_pm@d3cold-mmap-system.html
* igt@xe_pm@d3hot-mmap-system:
- shard-adlp: [PASS][123] -> [DMESG-WARN][124] ([Intel XE#2953] / [Intel XE#4173])
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-adlp-4/igt@xe_pm@d3hot-mmap-system.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@xe_pm@d3hot-mmap-system.html
* igt@xe_pm@s4-multiple-execs:
- shard-adlp: [PASS][125] -> [ABORT][126] ([Intel XE#1794])
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-adlp-2/igt@xe_pm@s4-multiple-execs.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-9/igt@xe_pm@s4-multiple-execs.html
* igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
- shard-adlp: NOTRUN -> [SKIP][127] ([Intel XE#4733])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html
* igt@xe_pxp@regular-src-to-pxp-dest-rendercopy:
- shard-dg2-set2: NOTRUN -> [SKIP][128] ([Intel XE#4733])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@xe_pxp@regular-src-to-pxp-dest-rendercopy.html
* igt@xe_query@multigpu-query-invalid-extension:
- shard-adlp: NOTRUN -> [SKIP][129] ([Intel XE#944])
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-8/igt@xe_query@multigpu-query-invalid-extension.html
* igt@xe_query@multigpu-query-uc-fw-version-guc:
- shard-dg2-set2: NOTRUN -> [SKIP][130] ([Intel XE#944]) +1 other test skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@xe_query@multigpu-query-uc-fw-version-guc.html
* igt@xe_sriov_scheduling@equal-throughput:
- shard-dg2-set2: NOTRUN -> [SKIP][131] ([Intel XE#4351])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@xe_sriov_scheduling@equal-throughput.html
#### Possible fixes ####
* igt@fbdev@read:
- shard-dg2-set2: [SKIP][132] ([Intel XE#2134]) -> [PASS][133] +2 other tests pass
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@fbdev@read.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@fbdev@read.html
* igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries-display-on:
- shard-dg2-set2: [SKIP][134] ([Intel XE#4208] / [Intel XE#4618]) -> [PASS][135] +1 other test pass
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries-display-on.html
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries-display-on.html
* igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- shard-adlp: [DMESG-WARN][136] ([Intel XE#4173]) -> [PASS][137] +1 other test pass
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-adlp-1/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-6/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
* {igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1}:
- shard-lnl: [FAIL][138] ([Intel XE#911]) -> [PASS][139] +3 other tests pass
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-lnl-5/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-2/igt@kms_async_flips@async-flip-with-page-flip-events-linear-atomic@pipe-c-edp-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [INCOMPLETE][140] ([Intel XE#3862]) -> [PASS][141] +1 other test pass
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-463/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: [INCOMPLETE][142] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345]) -> [PASS][143]
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6:
- shard-dg2-set2: [INCOMPLETE][144] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124]) -> [PASS][145]
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-a-hdmi-a-6.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4:
- shard-dg2-set2: [FAIL][146] ([Intel XE#301] / [Intel XE#3321]) -> [PASS][147]
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-435/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4.html
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@ab-hdmi-a6-dp4.html
* igt@kms_flip@busy-flip:
- shard-dg2-set2: [SKIP][148] ([Intel XE#4208] / [i915#2575]) -> [PASS][149] +167 other tests pass
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_flip@busy-flip.html
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_flip@busy-flip.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y:
- shard-adlp: [DMESG-FAIL][150] ([Intel XE#4543]) -> [PASS][151] +3 other tests pass
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y.html
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-y-to-y.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y:
- shard-adlp: [FAIL][152] ([Intel XE#1874]) -> [PASS][153] +1 other test pass
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y.html
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-adlp-4/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-x-to-y.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc:
- shard-dg2-set2: [SKIP][154] ([Intel XE#2351] / [Intel XE#4208]) -> [PASS][155] +17 other tests pass
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-lnl: [FAIL][156] ([Intel XE#2883]) -> [PASS][157] +2 other tests pass
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-lnl-5/igt@kms_setmode@basic@pipe-b-edp-1.html
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-2/igt@kms_setmode@basic@pipe-b-edp-1.html
* igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-a-hdmi-a-6-dp-4:
- shard-dg2-set2: [ABORT][158] -> [PASS][159] +1 other test pass
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-463/igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-a-hdmi-a-6-dp-4.html
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-a-hdmi-a-6-dp-4.html
* igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-b-hdmi-a-6-dp-4:
- shard-dg2-set2: [DMESG-WARN][160] ([Intel XE#4212]) -> [PASS][161]
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-463/igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-b-hdmi-a-6-dp-4.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-435/igt@kms_setmode@invalid-clone-single-crtc-stealing@pipe-b-hdmi-a-6-dp-4.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null:
- shard-dg2-set2: [SKIP][162] ([Intel XE#1392]) -> [PASS][163] +1 other test pass
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null.html
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset:
- shard-lnl: [FAIL][164] ([Intel XE#5018]) -> [PASS][165]
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-lnl-8/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-1/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
* igt@xe_module_load@load:
- shard-bmg: ([PASS][166], [PASS][167], [PASS][168], [PASS][169], [PASS][170], [PASS][171], [PASS][172], [PASS][173], [PASS][174], [PASS][175], [PASS][176], [PASS][177], [PASS][178], [PASS][179], [SKIP][180], [PASS][181], [PASS][182], [PASS][183], [PASS][184], [PASS][185], [PASS][186], [PASS][187], [PASS][188], [PASS][189], [PASS][190], [PASS][191]) ([Intel XE#2457]) -> ([PASS][192], [PASS][193], [PASS][194], [PASS][195], [PASS][196], [PASS][197], [PASS][198], [PASS][199], [PASS][200], [PASS][201], [PASS][202], [PASS][203], [PASS][204], [PASS][205], [PASS][206], [PASS][207], [PASS][208], [PASS][209], [PASS][210], [PASS][211], [PASS][212], [PASS][213], [PASS][214], [PASS][215], [PASS][216])
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-2/igt@xe_module_load@load.html
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-8/igt@xe_module_load@load.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-6/igt@xe_module_load@load.html
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-6/igt@xe_module_load@load.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-2/igt@xe_module_load@load.html
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-5/igt@xe_module_load@load.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-4/igt@xe_module_load@load.html
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-7/igt@xe_module_load@load.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-8/igt@xe_module_load@load.html
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-5/igt@xe_module_load@load.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-1/igt@xe_module_load@load.html
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-1/igt@xe_module_load@load.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-7/igt@xe_module_load@load.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-7/igt@xe_module_load@load.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-1/igt@xe_module_load@load.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-5/igt@xe_module_load@load.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-2/igt@xe_module_load@load.html
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-8/igt@xe_module_load@load.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-4/igt@xe_module_load@load.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-4/igt@xe_module_load@load.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-3/igt@xe_module_load@load.html
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-6/igt@xe_module_load@load.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-3/igt@xe_module_load@load.html
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-6/igt@xe_module_load@load.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-3/igt@xe_module_load@load.html
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-bmg-6/igt@xe_module_load@load.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-6/igt@xe_module_load@load.html
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-1/igt@xe_module_load@load.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-1/igt@xe_module_load@load.html
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-5/igt@xe_module_load@load.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-5/igt@xe_module_load@load.html
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-1/igt@xe_module_load@load.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-1/igt@xe_module_load@load.html
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-6/igt@xe_module_load@load.html
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-6/igt@xe_module_load@load.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-4/igt@xe_module_load@load.html
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-4/igt@xe_module_load@load.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-3/igt@xe_module_load@load.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-7/igt@xe_module_load@load.html
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-3/igt@xe_module_load@load.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-5/igt@xe_module_load@load.html
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-2/igt@xe_module_load@load.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-2/igt@xe_module_load@load.html
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-7/igt@xe_module_load@load.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-4/igt@xe_module_load@load.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-7/igt@xe_module_load@load.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-3/igt@xe_module_load@load.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-2/igt@xe_module_load@load.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-8/igt@xe_module_load@load.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-8/igt@xe_module_load@load.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-bmg-8/igt@xe_module_load@load.html
* igt@xe_module_load@many-reload:
- shard-dg2-set2: [FAIL][217] ([Intel XE#4208]) -> [PASS][218]
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_module_load@many-reload.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_module_load@many-reload.html
* igt@xe_oa@buffer-fill@rcs-0:
- shard-lnl: [FAIL][219] ([Intel XE#4565]) -> [PASS][220] +1 other test pass
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-lnl-7/igt@xe_oa@buffer-fill@rcs-0.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-7/igt@xe_oa@buffer-fill@rcs-0.html
* igt@xe_pm@s4-basic:
- shard-lnl: [ABORT][221] ([Intel XE#1794]) -> [PASS][222]
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-lnl-2/igt@xe_pm@s4-basic.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-lnl-4/igt@xe_pm@s4-basic.html
* igt@xe_vm@munmap-style-unbind-many-either-side-partial:
- shard-dg2-set2: [SKIP][223] ([Intel XE#4208]) -> [PASS][224] +369 other tests pass
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_vm@munmap-style-unbind-many-either-side-partial.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_vm@munmap-style-unbind-many-either-side-partial.html
#### Warnings ####
* igt@kms_async_flips@invalid-async-flip-atomic:
- shard-dg2-set2: [SKIP][225] ([Intel XE#4208] / [i915#2575]) -> [SKIP][226] ([Intel XE#3768])
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_async_flips@invalid-async-flip-atomic.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_async_flips@invalid-async-flip-atomic.html
* igt@kms_big_fb@linear-16bpp-rotate-90:
- shard-dg2-set2: [SKIP][227] ([Intel XE#316]) -> [SKIP][228] ([Intel XE#2351] / [Intel XE#4208]) +1 other test skip
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_big_fb@linear-16bpp-rotate-90.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_big_fb@linear-16bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-90:
- shard-dg2-set2: [SKIP][229] ([Intel XE#4208]) -> [SKIP][230] ([Intel XE#316]) +2 other tests skip
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_big_fb@x-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-90:
- shard-dg2-set2: [SKIP][231] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][232] ([Intel XE#316]) +2 other tests skip
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-8bpp-rotate-0:
- shard-dg2-set2: [SKIP][233] ([Intel XE#1124]) -> [SKIP][234] ([Intel XE#2351] / [Intel XE#4208])
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_big_fb@y-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-addfb-size-overflow:
- shard-dg2-set2: [SKIP][235] ([Intel XE#4208]) -> [SKIP][236] ([Intel XE#610])
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_big_fb@y-tiled-addfb-size-overflow.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180:
- shard-dg2-set2: [SKIP][237] ([Intel XE#1124]) -> [SKIP][238] ([Intel XE#4208])
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
- shard-dg2-set2: [SKIP][239] ([Intel XE#4208]) -> [SKIP][240] ([Intel XE#1124]) +13 other tests skip
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
- shard-dg2-set2: [SKIP][241] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][242] ([Intel XE#1124]) +6 other tests skip
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-dg2-set2: [SKIP][243] ([Intel XE#619]) -> [SKIP][244] ([Intel XE#2351] / [Intel XE#4208])
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_big_fb@yf-tiled-addfb.html
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-dg2-set2: [SKIP][245] ([Intel XE#4208]) -> [SKIP][246] ([Intel XE#607])
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p:
- shard-dg2-set2: [SKIP][247] ([Intel XE#4208] / [i915#2575]) -> [SKIP][248] ([Intel XE#2191]) +1 other test skip
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_bw@connected-linear-tiling-4-displays-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
- shard-dg2-set2: [SKIP][249] ([Intel XE#2191]) -> [SKIP][250] ([Intel XE#4208] / [i915#2575])
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-4-displays-2560x1440p:
- shard-dg2-set2: [SKIP][251] ([Intel XE#4208] / [i915#2575]) -> [SKIP][252] ([Intel XE#367]) +4 other tests skip
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_bw@linear-tiling-4-displays-2560x1440p.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
- shard-dg2-set2: [SKIP][253] ([Intel XE#2907]) -> [SKIP][254] ([Intel XE#4208])
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs:
- shard-dg2-set2: [SKIP][255] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][256] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs.html
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs:
- shard-dg2-set2: [SKIP][257] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][258] ([Intel XE#4208]) +1 other test skip
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs.html
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-dg2-set2: [SKIP][259] ([Intel XE#4208]) -> [SKIP][260] ([Intel XE#2907]) +2 other tests skip
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc:
- shard-dg2-set2: [SKIP][261] ([Intel XE#4208]) -> [SKIP][262] ([Intel XE#455] / [Intel XE#787]) +21 other tests skip
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc.html
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs:
- shard-dg2-set2: [SKIP][263] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][264] ([Intel XE#2351] / [Intel XE#4208])
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs.html
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-dg2-set2: [SKIP][265] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][266] ([Intel XE#4418])
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_cdclk@mode-transition-all-outputs.html
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-dg2-set2: [SKIP][267] ([Intel XE#4208] / [i915#2575]) -> [SKIP][268] ([Intel XE#306]) +2 other tests skip
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_chamelium_color@ctm-0-75.html
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode:
- shard-dg2-set2: [SKIP][269] ([Intel XE#373]) -> [SKIP][270] ([Intel XE#4208] / [i915#2575])
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode.html
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_chamelium_hpd@hdmi-hpd-enable-disable-mode.html
* igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
- shard-dg2-set2: [SKIP][271] ([Intel XE#4208] / [i915#2575]) -> [SKIP][272] ([Intel XE#373]) +21 other tests skip
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2-set2: [SKIP][273] ([Intel XE#4208] / [i915#2575]) -> [FAIL][274] ([Intel XE#1178]) +2 other tests fail
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_content_protection@lic-type-0.html
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@lic-type-1:
- shard-dg2-set2: [SKIP][275] ([Intel XE#4208] / [i915#2575]) -> [SKIP][276] ([Intel XE#455]) +8 other tests skip
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_content_protection@lic-type-1.html
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_content_protection@lic-type-1.html
* igt@kms_cursor_crc@cursor-onscreen-512x512:
- shard-dg2-set2: [SKIP][277] ([Intel XE#4208] / [i915#2575]) -> [SKIP][278] ([Intel XE#308]) +2 other tests skip
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_cursor_crc@cursor-onscreen-512x512.html
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_cursor_crc@cursor-onscreen-512x512.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-dg2-set2: [SKIP][279] ([Intel XE#4208] / [i915#2575]) -> [SKIP][280] ([Intel XE#323]) +2 other tests skip
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_dp_link_training@non-uhbr-mst:
- shard-dg2-set2: [SKIP][281] ([Intel XE#4208]) -> [SKIP][282] ([Intel XE#4354])
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_dp_link_training@non-uhbr-mst.html
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_dp_link_training@non-uhbr-mst.html
* igt@kms_dp_link_training@uhbr-sst:
- shard-dg2-set2: [SKIP][283] ([Intel XE#4208]) -> [SKIP][284] ([Intel XE#4356]) +1 other test skip
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_dp_link_training@uhbr-sst.html
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_dp_link_training@uhbr-sst.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-dg2-set2: [SKIP][285] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][286] ([Intel XE#455]) +3 other tests skip
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_dsc@dsc-with-bpc-formats.html
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats:
- shard-dg2-set2: [SKIP][287] ([Intel XE#4208]) -> [SKIP][288] ([Intel XE#4422])
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-different-formats.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
- shard-dg2-set2: [SKIP][289] ([Intel XE#4422]) -> [SKIP][290] ([Intel XE#4208])
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
* igt@kms_fbcon_fbt@psr:
- shard-dg2-set2: [SKIP][291] ([Intel XE#4208]) -> [SKIP][292] ([Intel XE#776])
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_fbcon_fbt@psr.html
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_fbcon_fbt@psr.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-dg2-set2: [SKIP][293] ([Intel XE#4208] / [i915#2575]) -> [FAIL][294] ([Intel XE#301])
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling:
- shard-dg2-set2: [SKIP][295] ([Intel XE#455]) -> [SKIP][296] ([Intel XE#4208])
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling:
- shard-dg2-set2: [SKIP][297] ([Intel XE#4208]) -> [SKIP][298] ([Intel XE#455]) +7 other tests skip
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling.html
* igt@kms_frontbuffer_tracking@drrs-1p-pri-indfb-multidraw:
- shard-dg2-set2: [SKIP][299] ([Intel XE#651]) -> [SKIP][300] ([Intel XE#4208]) +5 other tests skip
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_frontbuffer_tracking@drrs-1p-pri-indfb-multidraw.html
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-1p-pri-indfb-multidraw.html
* igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary:
- shard-dg2-set2: [SKIP][301] ([Intel XE#4208]) -> [SKIP][302] ([Intel XE#651]) +41 other tests skip
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary.html
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-mmap-wc:
- shard-dg2-set2: [SKIP][303] ([Intel XE#651]) -> [SKIP][304] ([Intel XE#2351] / [Intel XE#4208]) +1 other test skip
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-mmap-wc.html
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-onoff:
- shard-dg2-set2: [SKIP][305] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][306] ([Intel XE#651]) +14 other tests skip
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-onoff.html
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-render:
- shard-dg2-set2: [SKIP][307] ([Intel XE#653]) -> [SKIP][308] ([Intel XE#4208]) +6 other tests skip
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-render.html
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-4:
- shard-dg2-set2: [SKIP][309] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][310] ([Intel XE#653]) +14 other tests skip
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcpsr-tiling-4.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt:
- shard-dg2-set2: [SKIP][311] ([Intel XE#4208]) -> [SKIP][312] ([Intel XE#653]) +44 other tests skip
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html
* igt@kms_getfb@getfb-reject-ccs:
- shard-dg2-set2: [SKIP][313] ([Intel XE#4208] / [i915#2575]) -> [SKIP][314] ([Intel XE#605])
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_getfb@getfb-reject-ccs.html
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_getfb@getfb-reject-ccs.html
* igt@kms_joiner@basic-big-joiner:
- shard-dg2-set2: [SKIP][315] ([Intel XE#346]) -> [SKIP][316] ([Intel XE#4208])
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_joiner@basic-big-joiner.html
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-dg2-set2: [SKIP][317] ([Intel XE#4208]) -> [SKIP][318] ([Intel XE#346])
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_joiner@invalid-modeset-big-joiner.html
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_joiner@invalid-modeset-force-ultra-joiner:
- shard-dg2-set2: [SKIP][319] ([Intel XE#2925]) -> [SKIP][320] ([Intel XE#4208])
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-dg2-set2: [SKIP][321] ([Intel XE#4208]) -> [SKIP][322] ([Intel XE#2925])
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_pipe_stress@stress-xrgb8888-ytiled:
- shard-dg2-set2: [SKIP][323] ([Intel XE#4208]) -> [SKIP][324] ([Intel XE#4359])
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_pipe_stress@stress-xrgb8888-ytiled.html
* igt@kms_plane_cursor@primary:
- shard-dg2-set2: [SKIP][325] ([Intel XE#4208] / [i915#2575]) -> [FAIL][326] ([Intel XE#616])
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_plane_cursor@primary.html
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_plane_cursor@primary.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-dg2-set2: [SKIP][327] ([Intel XE#4208] / [i915#2575]) -> [SKIP][328] ([Intel XE#5021])
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_plane_multiple@2x-tiling-y.html
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_plane_multiple@tiling-y:
- shard-dg2-set2: [SKIP][329] ([Intel XE#4208] / [i915#2575]) -> [SKIP][330] ([Intel XE#5020])
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_plane_multiple@tiling-y.html
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_plane_multiple@tiling-y.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling:
- shard-dg2-set2: [SKIP][331] ([Intel XE#4208] / [i915#2575]) -> [SKIP][332] ([Intel XE#2763] / [Intel XE#455]) +3 other tests skip
[331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling.html
[332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-dg2-set2: [SKIP][333] ([Intel XE#4208]) -> [SKIP][334] ([Intel XE#870]) +2 other tests skip
[333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_pm_backlight@fade-with-suspend.html
[334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc5-retention-flops:
- shard-dg2-set2: [SKIP][335] ([Intel XE#3309]) -> [SKIP][336] ([Intel XE#4208])
[335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_pm_dc@dc5-retention-flops.html
[336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_pm_dc@dc5-retention-flops.html
* igt@kms_properties@get_properties-sanity-non-atomic:
- shard-dg2-set2: [SKIP][337] ([Intel XE#4208] / [i915#2575]) -> [FAIL][338] ([Intel XE#5017])
[337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_properties@get_properties-sanity-non-atomic.html
[338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_properties@get_properties-sanity-non-atomic.html
* igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area:
- shard-dg2-set2: [SKIP][339] ([Intel XE#4208]) -> [SKIP][340] ([Intel XE#1489]) +15 other tests skip
[339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html
[340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_psr2_sf@fbc-pr-plane-move-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area:
- shard-dg2-set2: [SKIP][341] ([Intel XE#1489]) -> [SKIP][342] ([Intel XE#4208])
[341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
[342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr@fbc-psr-sprite-render:
- shard-dg2-set2: [SKIP][343] ([Intel XE#4208]) -> [SKIP][344] ([Intel XE#2850] / [Intel XE#929]) +18 other tests skip
[343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_psr@fbc-psr-sprite-render.html
[344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_psr@fbc-psr-sprite-render.html
* igt@kms_psr@fbc-psr-suspend:
- shard-dg2-set2: [SKIP][345] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][346] ([Intel XE#2351] / [Intel XE#4208])
[345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_psr@fbc-psr-suspend.html
[346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_psr@fbc-psr-suspend.html
* igt@kms_psr@fbc-psr2-dpms:
- shard-dg2-set2: [SKIP][347] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][348] ([Intel XE#4208]) +2 other tests skip
[347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_psr@fbc-psr2-dpms.html
[348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_psr@fbc-psr2-dpms.html
* igt@kms_psr@psr-dpms:
- shard-dg2-set2: [SKIP][349] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][350] ([Intel XE#2850] / [Intel XE#929]) +12 other tests skip
[349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_psr@psr-dpms.html
[350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@kms_psr@psr-dpms.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-dg2-set2: [SKIP][351] ([Intel XE#4208] / [i915#2575]) -> [SKIP][352] ([Intel XE#3414]) +2 other tests skip
[351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_rotation_crc@primary-rotation-90.html
[352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_rotation_crc@primary-rotation-90.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-90:
- shard-dg2-set2: [SKIP][353] ([Intel XE#3414]) -> [SKIP][354] ([Intel XE#4208] / [i915#2575])
[353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
[354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_rotation_crc@primary-y-tiled-reflect-x-90.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-dg2-set2: [SKIP][355] ([Intel XE#4208] / [i915#2575]) -> [SKIP][356] ([Intel XE#1127]) +1 other test skip
[355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
[356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-set2: [SKIP][357] ([Intel XE#4208] / [i915#2575]) -> [FAIL][358] ([Intel XE#1729])
[357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_tiled_display@basic-test-pattern.html
[358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vrr@lobf:
- shard-dg2-set2: [SKIP][359] ([Intel XE#4208] / [i915#2575]) -> [SKIP][360] ([Intel XE#2168]) +1 other test skip
[359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_vrr@lobf.html
[360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@kms_vrr@lobf.html
* igt@kms_vrr@seamless-rr-switch-drrs:
- shard-dg2-set2: [SKIP][361] ([Intel XE#455]) -> [SKIP][362] ([Intel XE#4208] / [i915#2575]) +1 other test skip
[361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@kms_vrr@seamless-rr-switch-drrs.html
[362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_vrr@seamless-rr-switch-drrs.html
* igt@kms_writeback@writeback-check-output:
- shard-dg2-set2: [SKIP][363] ([Intel XE#4208] / [i915#2575]) -> [SKIP][364] ([Intel XE#756])
[363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@kms_writeback@writeback-check-output.html
[364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@kms_writeback@writeback-check-output.html
* igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all:
- shard-dg2-set2: [SKIP][365] ([Intel XE#4208] / [i915#2575]) -> [SKIP][366] ([Intel XE#1091] / [Intel XE#2849])
[365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html
[366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@sriov_basic@enable-vfs-bind-unbind-each-numvfs-all.html
* igt@xe_compute_preempt@compute-preempt:
- shard-dg2-set2: [SKIP][367] ([Intel XE#4208]) -> [SKIP][368] ([Intel XE#1280] / [Intel XE#455])
[367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_compute_preempt@compute-preempt.html
[368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_compute_preempt@compute-preempt.html
* igt@xe_copy_basic@mem-copy-linear-0x3fff:
- shard-dg2-set2: [SKIP][369] ([Intel XE#4208]) -> [SKIP][370] ([Intel XE#1123]) +1 other test skip
[369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_copy_basic@mem-copy-linear-0x3fff.html
[370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_copy_basic@mem-copy-linear-0x3fff.html
* igt@xe_copy_basic@mem-set-linear-0xfd:
- shard-dg2-set2: [SKIP][371] ([Intel XE#4208]) -> [SKIP][372] ([Intel XE#1126]) +1 other test skip
[371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_copy_basic@mem-set-linear-0xfd.html
[372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_copy_basic@mem-set-linear-0xfd.html
* igt@xe_eu_stall@blocking-read:
- shard-dg2-set2: [SKIP][373] ([Intel XE#4497]) -> [SKIP][374] ([Intel XE#4208])
[373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@xe_eu_stall@blocking-read.html
[374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_eu_stall@blocking-read.html
* igt@xe_eu_stall@non-blocking-read:
- shard-dg2-set2: [SKIP][375] ([Intel XE#4208]) -> [SKIP][376] ([Intel XE#4497])
[375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_eu_stall@non-blocking-read.html
[376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@xe_eu_stall@non-blocking-read.html
* igt@xe_eudebug@basic-vm-bind-extended-discovery:
- shard-dg2-set2: [SKIP][377] ([Intel XE#4837]) -> [SKIP][378] ([Intel XE#4208]) +3 other tests skip
[377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@xe_eudebug@basic-vm-bind-extended-discovery.html
[378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_eudebug@basic-vm-bind-extended-discovery.html
* igt@xe_eudebug@basic-vm-bind-ufence-delay-ack:
- shard-dg2-set2: [SKIP][379] ([Intel XE#4208]) -> [SKIP][380] ([Intel XE#4837]) +25 other tests skip
[379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html
[380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
- shard-dg2-set2: [SKIP][381] ([Intel XE#4208]) -> [SKIP][382] ([Intel XE#1392]) +7 other tests skip
[381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
[382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
* igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-prefetch:
- shard-dg2-set2: [SKIP][383] ([Intel XE#288]) -> [SKIP][384] ([Intel XE#4208]) +5 other tests skip
[383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-prefetch.html
[384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-prefetch.html
* igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
- shard-dg2-set2: [SKIP][385] ([Intel XE#4208]) -> [SKIP][386] ([Intel XE#288]) +50 other tests skip
[385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
[386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence:
- shard-dg2-set2: [SKIP][387] ([Intel XE#4208]) -> [SKIP][388] ([Intel XE#2360])
[387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html
[388]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_exec_mix_modes@exec-simple-batch-store-dma-fence.html
* igt@xe_exec_system_allocator@many-large-malloc-nomemset:
- shard-dg2-set2: [SKIP][389] ([Intel XE#4208]) -> [SKIP][390] ([Intel XE#4915]) +345 other tests skip
[389]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_exec_system_allocator@many-large-malloc-nomemset.html
[390]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-433/igt@xe_exec_system_allocator@many-large-malloc-nomemset.html
* igt@xe_exec_system_allocator@once-malloc-nomemset:
- shard-dg2-set2: [SKIP][391] ([Intel XE#4915]) -> [SKIP][392] ([Intel XE#4208]) +31 other tests skip
[391]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@xe_exec_system_allocator@once-malloc-nomemset.html
[392]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_exec_system_allocator@once-malloc-nomemset.html
* igt@xe_huc_copy@huc_copy:
- shard-dg2-set2: [SKIP][393] ([Intel XE#4208]) -> [SKIP][394] ([Intel XE#255])
[393]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_huc_copy@huc_copy.html
[394]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_huc_copy@huc_copy.html
* igt@xe_oa@oa-regs-whitelisted:
- shard-dg2-set2: [SKIP][395] ([Intel XE#2541] / [Intel XE#3573]) -> [SKIP][396] ([Intel XE#4208]) +1 other test skip
[395]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@xe_oa@oa-regs-whitelisted.html
[396]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_oa@oa-regs-whitelisted.html
* igt@xe_oa@oa-unit-exclusive-stream-sample-oa:
- shard-dg2-set2: [SKIP][397] ([Intel XE#4208]) -> [SKIP][398] ([Intel XE#2541] / [Intel XE#3573]) +9 other tests skip
[397]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_oa@oa-unit-exclusive-stream-sample-oa.html
[398]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_oa@oa-unit-exclusive-stream-sample-oa.html
* igt@xe_oa@syncs-ufence-wait:
- shard-dg2-set2: [SKIP][399] ([Intel XE#4208]) -> [SKIP][400] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) +2 other tests skip
[399]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_oa@syncs-ufence-wait.html
[400]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_oa@syncs-ufence-wait.html
* igt@xe_pat@pat-index-xe2:
- shard-dg2-set2: [SKIP][401] ([Intel XE#4208]) -> [SKIP][402] ([Intel XE#977])
[401]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_pat@pat-index-xe2.html
[402]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_pat@pat-index-xe2.html
* igt@xe_pm@d3cold-mmap-vram:
- shard-dg2-set2: [SKIP][403] ([Intel XE#4208]) -> [SKIP][404] ([Intel XE#2284] / [Intel XE#366]) +2 other tests skip
[403]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_pm@d3cold-mmap-vram.html
[404]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_pm@d3cold-mmap-vram.html
* igt@xe_pm@vram-d3cold-threshold:
- shard-dg2-set2: [SKIP][405] ([Intel XE#4208]) -> [SKIP][406] ([Intel XE#579])
[405]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_pm@vram-d3cold-threshold.html
[406]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_pm@vram-d3cold-threshold.html
* igt@xe_pxp@pxp-termination-key-update-post-suspend:
- shard-dg2-set2: [SKIP][407] ([Intel XE#4208]) -> [SKIP][408] ([Intel XE#4733]) +3 other tests skip
[407]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_pxp@pxp-termination-key-update-post-suspend.html
[408]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_pxp@pxp-termination-key-update-post-suspend.html
* igt@xe_query@multigpu-query-engines:
- shard-dg2-set2: [SKIP][409] ([Intel XE#4208]) -> [SKIP][410] ([Intel XE#944]) +4 other tests skip
[409]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_query@multigpu-query-engines.html
[410]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_query@multigpu-query-engines.html
* igt@xe_query@multigpu-query-topology-l3-bank-mask:
- shard-dg2-set2: [SKIP][411] ([Intel XE#944]) -> [SKIP][412] ([Intel XE#4208])
[411]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
[412]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
* igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling:
- shard-dg2-set2: [SKIP][413] ([Intel XE#4208]) -> [SKIP][414] ([Intel XE#4130]) +1 other test skip
[413]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html
[414]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-432/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html
* igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs:
- shard-dg2-set2: [SKIP][415] ([Intel XE#4130]) -> [SKIP][416] ([Intel XE#4208])
[415]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-433/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html
[416]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_sriov_auto_provisioning@selfconfig-reprovision-increase-numvfs.html
* igt@xe_sriov_scheduling@nonpreempt-engine-resets:
- shard-dg2-set2: [SKIP][417] ([Intel XE#4208]) -> [SKIP][418] ([Intel XE#4351])
[417]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1/shard-dg2-464/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
[418]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/shard-dg2-464/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1158]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1158
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1466]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1466
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#1794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1794
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
[Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2883]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2883
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
[Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3304]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3304
[Intel XE#3309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3309
[Intel XE#3321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3321
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#3767]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3767
[Intel XE#3768]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3768
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
[Intel XE#4045]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4045
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4356
[Intel XE#4359]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4359
[Intel XE#4416]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4416
[Intel XE#4417]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4417
[Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4494]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4494
[Intel XE#4497]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4497
[Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4565
[Intel XE#4618]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4618
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#4983]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4983
[Intel XE#5017]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5017
[Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
[Intel XE#605]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/605
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
[Intel XE#911]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/911
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
[i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
[i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
Build changes
-------------
* Linux: xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1 -> xe-pw-149051v1
IGT_8364: 8364
xe-3089-3d6670fab64cb00b5e6ed80d2517147db533faf1: 3d6670fab64cb00b5e6ed80d2517147db533faf1
xe-pw-149051v1: 149051v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-149051v1/index.html
[-- Attachment #2: Type: text/html, Size: 127218 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread* ✗ Fi.CI.CHECKPATCH: warning for DPLL framework redesign (rev2)
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (24 preceding siblings ...)
2025-05-15 15:30 ` ✗ Xe.CI.Full: failure " Patchwork
@ 2025-05-16 10:26 ` Patchwork
2025-05-16 10:26 ` ✗ Fi.CI.SPARSE: " Patchwork
` (4 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-16 10:26 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-gfx
== Series Details ==
Series: DPLL framework redesign (rev2)
URL : https://patchwork.freedesktop.org/series/149052/
State : warning
== Summary ==
Error: dim checkpatch failed
e84d127c8ee5 drm/i915/dpll: Rename intel_dpll
0709d32db519 drm/i915/dpll: Rename intel_dpll_funcs
e91d54e40b9a drm/i915/dpll: Rename intel_shared_dpll_state
e734980a9234 drm/i915/dpll: Rename macro for_each_shared_dpll
-:103: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__display' - possible side-effects?
#103: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.h:33:
+#define for_each_dpll(__display, __pll, __i) \
for ((__i) = 0; (__i) < (__display)->dpll.num_shared_dpll && \
((__pll) = &(__display)->dpll.shared_dplls[(__i)]) ; (__i)++)
-:103: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#103: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.h:33:
+#define for_each_dpll(__display, __pll, __i) \
for ((__i) = 0; (__i) < (__display)->dpll.num_shared_dpll && \
((__pll) = &(__display)->dpll.shared_dplls[(__i)]) ; (__i)++)
total: 0 errors, 0 warnings, 2 checks, 81 lines checked
9e5cbb0a62a5 drm/i915/dpll: Rename intel_shared_dpll_funcs
a64d46e8f805 drm/i915/dpll: Rename intel_shared_dpll
0ce9376082ed drm/i915/dpll: Move away from using shared dpll
abc396807a26 drm/i915/dpll: Rename crtc_get_shared_dpll
33673735ae87 drm/i915/dpll: Rename intel_[enable/disable]_dpll
1def4c802acb drm/i915/dpll: Rename intel_unreference_dpll_crtc
e021cfab6425 drm/i915/dpll: Rename intel_reference_dpll_crtc
5b181b8593e0 drm/i915/dpll: Rename intel_<release/reserve>_dpll
bcfbfa079208 drm/i915/dpll: Rename intel_compute_dpll
eae5eb90be47 drm/i915/dpll: Rename intel_update_active_dpll
^ permalink raw reply [flat|nested] 38+ messages in thread* ✗ Fi.CI.SPARSE: warning for DPLL framework redesign (rev2)
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (25 preceding siblings ...)
2025-05-16 10:26 ` ✗ Fi.CI.CHECKPATCH: warning for DPLL framework redesign (rev2) Patchwork
@ 2025-05-16 10:26 ` Patchwork
2025-05-16 10:49 ` ✓ i915.CI.BAT: success " Patchwork
` (3 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-16 10:26 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-gfx
== Series Details ==
Series: DPLL framework redesign (rev2)
URL : https://patchwork.freedesktop.org/series/149052/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 38+ messages in thread* ✓ i915.CI.BAT: success for DPLL framework redesign (rev2)
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (26 preceding siblings ...)
2025-05-16 10:26 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2025-05-16 10:49 ` Patchwork
2025-05-16 12:55 ` ✓ i915.CI.Full: " Patchwork
` (2 subsequent siblings)
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-16 10:49 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 4700 bytes --]
== Series Details ==
Series: DPLL framework redesign (rev2)
URL : https://patchwork.freedesktop.org/series/149052/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16556 -> Patchwork_149052v2
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/index.html
Participating hosts (45 -> 45)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in Patchwork_149052v2 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@dmabuf@all-tests@dma_fence_chain:
- fi-bsw-nick: [PASS][1] -> [INCOMPLETE][2] ([i915#12904]) +1 other test incomplete
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/fi-bsw-nick/igt@dmabuf@all-tests@dma_fence_chain.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/fi-bsw-nick/igt@dmabuf@all-tests@dma_fence_chain.html
* igt@i915_module_load@load:
- bat-mtlp-9: [PASS][3] -> [DMESG-WARN][4] ([i915#13494])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/bat-mtlp-9/igt@i915_module_load@load.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/bat-mtlp-9/igt@i915_module_load@load.html
* igt@i915_selftest@live@slpc:
- bat-arlh-2: NOTRUN -> [INCOMPLETE][5] ([i915#14065])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/bat-arlh-2/igt@i915_selftest@live@slpc.html
* igt@i915_selftest@live@workarounds:
- bat-arlh-3: [PASS][6] -> [DMESG-FAIL][7] ([i915#12061]) +1 other test dmesg-fail
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/bat-arlh-3/igt@i915_selftest@live@workarounds.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/bat-arlh-3/igt@i915_selftest@live@workarounds.html
- bat-arls-5: [PASS][8] -> [DMESG-FAIL][9] ([i915#12061]) +1 other test dmesg-fail
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/bat-arls-5/igt@i915_selftest@live@workarounds.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/bat-arls-5/igt@i915_selftest@live@workarounds.html
#### Possible fixes ####
* igt@i915_selftest@live@gem:
- bat-arlh-2: [ABORT][10] ([i915#13723]) -> [PASS][11]
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/bat-arlh-2/igt@i915_selftest@live@gem.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/bat-arlh-2/igt@i915_selftest@live@gem.html
#### Warnings ####
* igt@i915_selftest@live:
- bat-arlh-2: [ABORT][12] ([i915#13723]) -> [INCOMPLETE][13] ([i915#14046])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/bat-arlh-2/igt@i915_selftest@live.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/bat-arlh-2/igt@i915_selftest@live.html
- bat-atsm-1: [DMESG-FAIL][14] ([i915#12061] / [i915#14204]) -> [DMESG-FAIL][15] ([i915#12061] / [i915#13929])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/bat-atsm-1/igt@i915_selftest@live.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/bat-atsm-1/igt@i915_selftest@live.html
* igt@i915_selftest@live@mman:
- bat-atsm-1: [DMESG-FAIL][16] ([i915#14204]) -> [DMESG-FAIL][17] ([i915#13929])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/bat-atsm-1/igt@i915_selftest@live@mman.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/bat-atsm-1/igt@i915_selftest@live@mman.html
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904
[i915#13494]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13494
[i915#13723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13723
[i915#13929]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13929
[i915#14046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14046
[i915#14065]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14065
[i915#14204]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14204
Build changes
-------------
* Linux: CI_DRM_16556 -> Patchwork_149052v2
CI-20190529: 20190529
CI_DRM_16556: 3e12fd2f2885242aa951ffc05c3c7bbb63e20d8e @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8365: 8365
Patchwork_149052v2: 3e12fd2f2885242aa951ffc05c3c7bbb63e20d8e @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/index.html
[-- Attachment #2: Type: text/html, Size: 5904 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread* ✓ i915.CI.Full: success for DPLL framework redesign (rev2)
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (27 preceding siblings ...)
2025-05-16 10:49 ` ✓ i915.CI.BAT: success " Patchwork
@ 2025-05-16 12:55 ` Patchwork
2025-05-20 8:05 ` [PATCH 00/14] DPLL framework redesign Kandpal, Suraj
2025-05-27 1:56 ` ✗ CI.Patch_applied: failure for " Patchwork
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-16 12:55 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 103729 bytes --]
== Series Details ==
Series: DPLL framework redesign (rev2)
URL : https://patchwork.freedesktop.org/series/149052/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_16556_full -> Patchwork_149052v2_full
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (10 -> 10)
------------------------------
No changes in participating hosts
Known issues
------------
Here are the changes found in Patchwork_149052v2_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@api_intel_bb@blit-reloc-keep-cache:
- shard-rkl: NOTRUN -> [SKIP][1] ([i915#8411]) +1 other test skip
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@api_intel_bb@blit-reloc-keep-cache.html
* igt@api_intel_bb@crc32:
- shard-tglu-1: NOTRUN -> [SKIP][2] ([i915#6230])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@api_intel_bb@crc32.html
* igt@gem_ccs@block-multicopy-compressed:
- shard-tglu: NOTRUN -> [SKIP][3] ([i915#9323])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@gem_ccs@block-multicopy-compressed.html
* igt@gem_ccs@block-multicopy-inplace:
- shard-tglu-1: NOTRUN -> [SKIP][4] ([i915#3555] / [i915#9323])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@gem_ccs@block-multicopy-inplace.html
* igt@gem_ccs@large-ctrl-surf-copy:
- shard-rkl: NOTRUN -> [SKIP][5] ([i915#13008])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@gem_ccs@large-ctrl-surf-copy.html
- shard-tglu: NOTRUN -> [SKIP][6] ([i915#13008])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@gem_ccs@large-ctrl-surf-copy.html
* igt@gem_ccs@suspend-resume:
- shard-dg2: [PASS][7] -> [INCOMPLETE][8] ([i915#13356])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-11/igt@gem_ccs@suspend-resume.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@gem_ccs@suspend-resume.html
* igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0:
- shard-dg2: [PASS][9] -> [INCOMPLETE][10] ([i915#12392] / [i915#13356])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-11/igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@gem_ccs@suspend-resume@tile4-compressed-compfmt0-smem-lmem0.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-rkl: NOTRUN -> [SKIP][11] ([i915#7697])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@gem_close_race@multigpu-basic-threads.html
* igt@gem_create@create-ext-cpu-access-sanity-check:
- shard-rkl: NOTRUN -> [SKIP][12] ([i915#6335])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@gem_create@create-ext-cpu-access-sanity-check.html
* igt@gem_ctx_isolation@preservation-s3:
- shard-rkl: [PASS][13] -> [INCOMPLETE][14] ([i915#12353]) +1 other test incomplete
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-4/igt@gem_ctx_isolation@preservation-s3.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-3/igt@gem_ctx_isolation@preservation-s3.html
* igt@gem_ctx_sseu@engines:
- shard-rkl: NOTRUN -> [SKIP][15] ([i915#280]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@gem_ctx_sseu@engines.html
- shard-tglu: NOTRUN -> [SKIP][16] ([i915#280])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@gem_ctx_sseu@engines.html
* igt@gem_eio@reset-stress:
- shard-dg1: [PASS][17] -> [FAIL][18] ([i915#12543] / [i915#5784])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-15/igt@gem_eio@reset-stress.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-18/igt@gem_eio@reset-stress.html
* igt@gem_exec_balancer@parallel:
- shard-rkl: NOTRUN -> [SKIP][19] ([i915#4525]) +1 other test skip
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@gem_exec_balancer@parallel.html
* igt@gem_exec_balancer@parallel-balancer:
- shard-tglu: NOTRUN -> [SKIP][20] ([i915#4525]) +1 other test skip
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@gem_exec_balancer@parallel-balancer.html
* igt@gem_exec_balancer@parallel-keep-in-fence:
- shard-tglu-1: NOTRUN -> [SKIP][21] ([i915#4525])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@gem_exec_balancer@parallel-keep-in-fence.html
* igt@gem_exec_balancer@sliced:
- shard-mtlp: NOTRUN -> [SKIP][22] ([i915#4812])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@gem_exec_balancer@sliced.html
* igt@gem_exec_capture@capture-invisible:
- shard-rkl: NOTRUN -> [SKIP][23] ([i915#6334]) +1 other test skip
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@gem_exec_capture@capture-invisible.html
* igt@gem_exec_capture@capture-recoverable:
- shard-rkl: NOTRUN -> [SKIP][24] ([i915#6344])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@gem_exec_capture@capture-recoverable.html
- shard-tglu: NOTRUN -> [SKIP][25] ([i915#6344])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@gem_exec_capture@capture-recoverable.html
* igt@gem_exec_fence@concurrent:
- shard-dg2-9: NOTRUN -> [SKIP][26] ([i915#4812]) +1 other test skip
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@gem_exec_fence@concurrent.html
* igt@gem_exec_fence@submit:
- shard-dg2: NOTRUN -> [SKIP][27] ([i915#4812])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@gem_exec_fence@submit.html
* igt@gem_exec_flush@basic-batch-kernel-default-uc:
- shard-dg2-9: NOTRUN -> [SKIP][28] ([i915#3539] / [i915#4852])
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@gem_exec_flush@basic-batch-kernel-default-uc.html
* igt@gem_exec_flush@basic-uc-prw-default:
- shard-dg2: NOTRUN -> [SKIP][29] ([i915#3539])
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@gem_exec_flush@basic-uc-prw-default.html
* igt@gem_exec_flush@basic-wb-pro-default:
- shard-dg2: NOTRUN -> [SKIP][30] ([i915#3539] / [i915#4852]) +1 other test skip
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@gem_exec_flush@basic-wb-pro-default.html
* igt@gem_exec_reloc@basic-cpu-noreloc:
- shard-dg2-9: NOTRUN -> [SKIP][31] ([i915#3281]) +3 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@gem_exec_reloc@basic-cpu-noreloc.html
* igt@gem_exec_reloc@basic-gtt:
- shard-dg2: NOTRUN -> [SKIP][32] ([i915#3281]) +6 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@gem_exec_reloc@basic-gtt.html
* igt@gem_exec_reloc@basic-gtt-read-noreloc:
- shard-rkl: NOTRUN -> [SKIP][33] ([i915#3281]) +17 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@gem_exec_reloc@basic-gtt-read-noreloc.html
* igt@gem_exec_schedule@preempt-queue:
- shard-dg2-9: NOTRUN -> [SKIP][34] ([i915#4537] / [i915#4812])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@gem_exec_schedule@preempt-queue.html
* igt@gem_exec_schedule@reorder-wide:
- shard-dg2: NOTRUN -> [SKIP][35] ([i915#4537] / [i915#4812])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@gem_exec_schedule@reorder-wide.html
* igt@gem_exec_suspend@basic-s0:
- shard-dg2: [PASS][36] -> [INCOMPLETE][37] ([i915#11441] / [i915#13304])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-8/igt@gem_exec_suspend@basic-s0.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-5/igt@gem_exec_suspend@basic-s0.html
* igt@gem_exec_suspend@basic-s0@lmem0:
- shard-dg2: [PASS][38] -> [INCOMPLETE][39] ([i915#11441])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-8/igt@gem_exec_suspend@basic-s0@lmem0.html
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-5/igt@gem_exec_suspend@basic-s0@lmem0.html
* igt@gem_exec_suspend@basic-s4-devices:
- shard-tglu: [PASS][40] -> [ABORT][41] ([i915#7975] / [i915#8213]) +1 other test abort
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-tglu-9/igt@gem_exec_suspend@basic-s4-devices.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-10/igt@gem_exec_suspend@basic-s4-devices.html
* igt@gem_fenced_exec_thrash@too-many-fences:
- shard-dg2: NOTRUN -> [SKIP][42] ([i915#4860]) +1 other test skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@gem_fenced_exec_thrash@too-many-fences.html
* igt@gem_lmem_swapping@heavy-verify-random-ccs:
- shard-tglu: NOTRUN -> [SKIP][43] ([i915#4613]) +2 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@gem_lmem_swapping@heavy-verify-random-ccs.html
* igt@gem_lmem_swapping@parallel-random-verify-ccs:
- shard-rkl: NOTRUN -> [SKIP][44] ([i915#4613]) +3 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
- shard-tglu-1: NOTRUN -> [SKIP][45] ([i915#4613])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@gem_lmem_swapping@parallel-random-verify-ccs.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- shard-dg2-9: NOTRUN -> [TIMEOUT][46] ([i915#5493]) +1 other test timeout
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@gem_lmem_swapping@verify:
- shard-glk: NOTRUN -> [SKIP][47] ([i915#4613])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-glk1/igt@gem_lmem_swapping@verify.html
* igt@gem_media_vme:
- shard-rkl: NOTRUN -> [SKIP][48] ([i915#284])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@gem_media_vme.html
* igt@gem_mmap_gtt@close-race:
- shard-mtlp: NOTRUN -> [SKIP][49] ([i915#4077])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@gem_mmap_gtt@close-race.html
* igt@gem_mmap_gtt@cpuset-basic-small-copy-odd:
- shard-dg2: NOTRUN -> [SKIP][50] ([i915#4077]) +3 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@gem_mmap_gtt@cpuset-basic-small-copy-odd.html
* igt@gem_mmap_gtt@hang:
- shard-dg2-9: NOTRUN -> [SKIP][51] ([i915#4077]) +3 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@gem_mmap_gtt@hang.html
* igt@gem_mmap_wc@read-write-distinct:
- shard-dg2-9: NOTRUN -> [SKIP][52] ([i915#4083]) +5 other tests skip
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@gem_mmap_wc@read-write-distinct.html
* igt@gem_mmap_wc@set-cache-level:
- shard-dg2: NOTRUN -> [SKIP][53] ([i915#4083])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@gem_mmap_wc@set-cache-level.html
* igt@gem_mmap_wc@write-gtt-read-wc:
- shard-mtlp: NOTRUN -> [SKIP][54] ([i915#4083])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@gem_mmap_wc@write-gtt-read-wc.html
* igt@gem_partial_pwrite_pread@write-snoop:
- shard-dg2: NOTRUN -> [SKIP][55] ([i915#3282]) +1 other test skip
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@gem_partial_pwrite_pread@write-snoop.html
* igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
- shard-rkl: NOTRUN -> [SKIP][56] ([i915#3282]) +5 other tests skip
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
* igt@gem_pread@uncached:
- shard-dg2-9: NOTRUN -> [SKIP][57] ([i915#3282]) +4 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@gem_pread@uncached.html
* igt@gem_pxp@create-protected-buffer:
- shard-rkl: [PASS][58] -> [TIMEOUT][59] ([i915#12964])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-8/igt@gem_pxp@create-protected-buffer.html
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-5/igt@gem_pxp@create-protected-buffer.html
* igt@gem_pxp@create-regular-buffer:
- shard-dg2-9: NOTRUN -> [SKIP][60] ([i915#4270])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@gem_pxp@create-regular-buffer.html
* igt@gem_pxp@create-valid-protected-context:
- shard-rkl: NOTRUN -> [TIMEOUT][61] ([i915#12964])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@gem_pxp@create-valid-protected-context.html
* igt@gem_pxp@protected-encrypted-src-copy-not-readible:
- shard-rkl: NOTRUN -> [TIMEOUT][62] ([i915#12917] / [i915#12964]) +3 other tests timeout
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html
* igt@gem_pxp@reject-modify-context-protection-off-1:
- shard-rkl: NOTRUN -> [SKIP][63] ([i915#4270])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@gem_pxp@reject-modify-context-protection-off-1.html
* igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
- shard-dg2: NOTRUN -> [SKIP][64] ([i915#4270]) +1 other test skip
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
* igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs:
- shard-glk: NOTRUN -> [SKIP][65] +87 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-glk1/igt@gem_render_copy@y-tiled-ccs-to-y-tiled-mc-ccs.html
* igt@gem_render_copy@y-tiled-to-vebox-yf-tiled:
- shard-dg2: NOTRUN -> [SKIP][66] ([i915#5190] / [i915#8428]) +3 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@gem_render_copy@y-tiled-to-vebox-yf-tiled.html
* igt@gem_render_copy@yf-tiled-ccs-to-y-tiled-ccs:
- shard-mtlp: NOTRUN -> [SKIP][67] ([i915#8428])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@gem_render_copy@yf-tiled-ccs-to-y-tiled-ccs.html
* igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled:
- shard-dg2-9: NOTRUN -> [SKIP][68] ([i915#5190] / [i915#8428]) +2 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@gem_render_copy@yf-tiled-mc-ccs-to-vebox-y-tiled.html
* igt@gem_softpin@evict-snoop-interruptible:
- shard-mtlp: NOTRUN -> [SKIP][69] ([i915#4885])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@gem_softpin@evict-snoop-interruptible.html
* igt@gem_softpin@noreloc-s3:
- shard-glk: NOTRUN -> [INCOMPLETE][70] ([i915#13809])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-glk9/igt@gem_softpin@noreloc-s3.html
- shard-rkl: [PASS][71] -> [INCOMPLETE][72] ([i915#13809])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-6/igt@gem_softpin@noreloc-s3.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-3/igt@gem_softpin@noreloc-s3.html
* igt@gem_userptr_blits@access-control:
- shard-tglu: NOTRUN -> [SKIP][73] ([i915#3297])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@gem_userptr_blits@access-control.html
* igt@gem_userptr_blits@forbidden-operations:
- shard-rkl: NOTRUN -> [SKIP][74] ([i915#3282] / [i915#3297])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@gem_userptr_blits@forbidden-operations.html
- shard-mtlp: NOTRUN -> [SKIP][75] ([i915#3282] / [i915#3297])
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@gem_userptr_blits@forbidden-operations.html
* igt@gem_userptr_blits@unsync-overlap:
- shard-tglu-1: NOTRUN -> [SKIP][76] ([i915#3297])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@gem_userptr_blits@unsync-overlap.html
* igt@gem_userptr_blits@unsync-unmap:
- shard-rkl: NOTRUN -> [SKIP][77] ([i915#3297]) +3 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@gem_userptr_blits@unsync-unmap.html
* igt@gen7_exec_parse@bitmasks:
- shard-dg2-9: NOTRUN -> [SKIP][78] +4 other tests skip
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@gen7_exec_parse@bitmasks.html
* igt@gen9_exec_parse@basic-rejected:
- shard-dg2: NOTRUN -> [SKIP][79] ([i915#2856]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@gen9_exec_parse@basic-rejected.html
* igt@gen9_exec_parse@batch-zero-length:
- shard-tglu-1: NOTRUN -> [SKIP][80] ([i915#2527] / [i915#2856]) +1 other test skip
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@gen9_exec_parse@batch-zero-length.html
* igt@gen9_exec_parse@bb-secure:
- shard-tglu: NOTRUN -> [SKIP][81] ([i915#2527] / [i915#2856]) +2 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@gen9_exec_parse@bb-secure.html
* igt@gen9_exec_parse@shadow-peek:
- shard-rkl: NOTRUN -> [SKIP][82] ([i915#2527]) +3 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@gen9_exec_parse@shadow-peek.html
* igt@gen9_exec_parse@unaligned-access:
- shard-dg2-9: NOTRUN -> [SKIP][83] ([i915#2856]) +1 other test skip
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@gen9_exec_parse@unaligned-access.html
* igt@i915_drm_fdinfo@busy@vecs1:
- shard-dg2: NOTRUN -> [SKIP][84] ([i915#14073]) +7 other tests skip
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@i915_drm_fdinfo@busy@vecs1.html
* igt@i915_drm_fdinfo@virtual-busy:
- shard-dg2-9: NOTRUN -> [SKIP][85] ([i915#14118])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@i915_drm_fdinfo@virtual-busy.html
* igt@i915_drm_fdinfo@virtual-busy-idle:
- shard-dg2: NOTRUN -> [SKIP][86] ([i915#14118])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@i915_drm_fdinfo@virtual-busy-idle.html
* igt@i915_fb_tiling@basic-x-tiling:
- shard-dg2: NOTRUN -> [SKIP][87] ([i915#13786])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@i915_fb_tiling@basic-x-tiling.html
* igt@i915_pm_freq_api@freq-reset:
- shard-tglu: NOTRUN -> [SKIP][88] ([i915#8399])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@i915_pm_freq_api@freq-reset.html
* igt@i915_pm_freq_api@freq-reset-multiple:
- shard-tglu-1: NOTRUN -> [SKIP][89] ([i915#8399])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@i915_pm_freq_api@freq-reset-multiple.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-dg1: [PASS][90] -> [FAIL][91] ([i915#3591]) +1 other test fail
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-15/igt@i915_pm_rc6_residency@rc6-idle.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-14/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@i915_pm_rps@basic-api:
- shard-dg2-9: NOTRUN -> [SKIP][92] ([i915#11681] / [i915#6621])
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@i915_pm_rps@basic-api.html
* igt@i915_pm_sseu@full-enable:
- shard-rkl: NOTRUN -> [SKIP][93] ([i915#4387])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@i915_pm_sseu@full-enable.html
* igt@i915_power@sanity:
- shard-mtlp: [PASS][94] -> [SKIP][95] ([i915#7984])
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-mtlp-6/igt@i915_power@sanity.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-5/igt@i915_power@sanity.html
* igt@i915_query@hwconfig_table:
- shard-rkl: NOTRUN -> [SKIP][96] ([i915#6245])
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@i915_query@hwconfig_table.html
* igt@intel_hwmon@hwmon-write:
- shard-rkl: NOTRUN -> [SKIP][97] ([i915#7707])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@intel_hwmon@hwmon-write.html
* igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
- shard-dg2: NOTRUN -> [SKIP][98] ([i915#4212])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html
* igt@kms_addfb_basic@framebuffer-vs-set-tiling:
- shard-dg2-9: NOTRUN -> [SKIP][99] ([i915#4212]) +1 other test skip
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html
* igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-a-hdmi-a-2-y-rc-ccs-cc:
- shard-rkl: NOTRUN -> [SKIP][100] ([i915#8709]) +1 other test skip
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-5/igt@kms_async_flips@async-flip-with-page-flip-events-tiled@pipe-a-hdmi-a-2-y-rc-ccs-cc.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-rkl: NOTRUN -> [SKIP][101] ([i915#1769] / [i915#3555])
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
- shard-tglu: NOTRUN -> [SKIP][102] ([i915#1769] / [i915#3555])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-270:
- shard-tglu: NOTRUN -> [SKIP][103] ([i915#5286]) +2 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@kms_big_fb@4-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-90:
- shard-tglu-1: NOTRUN -> [SKIP][104] ([i915#5286]) +3 other tests skip
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-0:
- shard-rkl: NOTRUN -> [SKIP][105] ([i915#5286]) +9 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_big_fb@4-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-mtlp: [PASS][106] -> [FAIL][107] ([i915#5138])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-mtlp-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_big_fb@linear-32bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][108] ([i915#3638]) +2 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@kms_big_fb@linear-32bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-270:
- shard-dg2-9: NOTRUN -> [SKIP][109] ([i915#4538] / [i915#5190]) +5 other tests skip
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-0:
- shard-dg2: NOTRUN -> [SKIP][110] ([i915#4538] / [i915#5190]) +4 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-16bpp-rotate-270:
- shard-rkl: NOTRUN -> [SKIP][111] +26 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_big_fb@yf-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
- shard-mtlp: NOTRUN -> [SKIP][112] +2 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-dg2: NOTRUN -> [SKIP][113] ([i915#5190])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][114] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
- shard-tglu: NOTRUN -> [SKIP][115] ([i915#12313])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-hdmi-a-1:
- shard-dg2: NOTRUN -> [SKIP][116] ([i915#10307] / [i915#6095]) +125 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-b-hdmi-a-2:
- shard-dg2-9: NOTRUN -> [SKIP][117] ([i915#10307] / [i915#6095]) +34 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_ccs@ccs-on-another-bo-yf-tiled-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][118] ([i915#6095]) +4 other tests skip
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs-cc@pipe-b-edp-1.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc:
- shard-tglu: NOTRUN -> [SKIP][119] ([i915#6095]) +49 other tests skip
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_ccs@crc-primary-rotation-180-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
- shard-rkl: NOTRUN -> [SKIP][120] ([i915#12805])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][121] ([i915#6095]) +15 other tests skip
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-2/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1:
- shard-tglu-1: NOTRUN -> [SKIP][122] ([i915#6095]) +34 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_ccs@crc-primary-suspend-yf-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
- shard-dg2: NOTRUN -> [SKIP][123] ([i915#12313])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][124] ([i915#6095]) +49 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-a-hdmi-a-1.html
* igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][125] ([i915#14098] / [i915#6095]) +67 other tests skip
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
- shard-rkl: NOTRUN -> [SKIP][126] ([i915#12313]) +1 other test skip
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html
- shard-tglu-1: NOTRUN -> [SKIP][127] ([i915#12313])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-3:
- shard-dg1: NOTRUN -> [SKIP][128] ([i915#6095]) +119 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-12/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-3.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-dg2-9: NOTRUN -> [SKIP][129] ([i915#13784])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_cdclk@plane-scaling:
- shard-tglu: NOTRUN -> [SKIP][130] ([i915#3742])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_cdclk@plane-scaling.html
* igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][131] ([i915#13783]) +4 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_cdclk@plane-scaling@pipe-b-hdmi-a-3.html
* igt@kms_chamelium_color@degamma:
- shard-dg2: NOTRUN -> [SKIP][132] +9 other tests skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_chamelium_color@degamma.html
* igt@kms_chamelium_edid@dp-edid-change-during-suspend:
- shard-dg2-9: NOTRUN -> [SKIP][133] ([i915#11151] / [i915#7828]) +2 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_chamelium_edid@dp-edid-change-during-suspend.html
* igt@kms_chamelium_edid@dp-edid-stress-resolution-4k:
- shard-tglu-1: NOTRUN -> [SKIP][134] ([i915#11151] / [i915#7828]) +2 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_chamelium_edid@dp-edid-stress-resolution-4k.html
* igt@kms_chamelium_hpd@dp-hpd:
- shard-tglu: NOTRUN -> [SKIP][135] ([i915#11151] / [i915#7828]) +6 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@kms_chamelium_hpd@dp-hpd.html
* igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
- shard-mtlp: NOTRUN -> [SKIP][136] ([i915#11151] / [i915#7828])
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
* igt@kms_chamelium_hpd@vga-hpd-fast:
- shard-rkl: NOTRUN -> [SKIP][137] ([i915#11151] / [i915#7828]) +10 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@kms_chamelium_hpd@vga-hpd-fast.html
* igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
- shard-dg2: NOTRUN -> [SKIP][138] ([i915#11151] / [i915#7828]) +3 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html
* igt@kms_color@deep-color:
- shard-tglu-1: NOTRUN -> [SKIP][139] ([i915#3555] / [i915#9979])
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_color@deep-color.html
* igt@kms_content_protection@atomic:
- shard-tglu: NOTRUN -> [SKIP][140] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424]) +1 other test skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@atomic-dpms:
- shard-rkl: NOTRUN -> [SKIP][141] ([i915#7118] / [i915#9424]) +1 other test skip
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-tglu: NOTRUN -> [SKIP][142] ([i915#3116] / [i915#3299])
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@legacy:
- shard-dg2-9: NOTRUN -> [SKIP][143] ([i915#7118] / [i915#9424])
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@mei-interface:
- shard-dg2-9: NOTRUN -> [SKIP][144] ([i915#9424])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_content_protection@mei-interface.html
* igt@kms_content_protection@srm@pipe-a-dp-3:
- shard-dg2: NOTRUN -> [FAIL][145] ([i915#7173])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-11/igt@kms_content_protection@srm@pipe-a-dp-3.html
* igt@kms_content_protection@type1:
- shard-dg2: NOTRUN -> [SKIP][146] ([i915#7118] / [i915#9424])
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_content_protection@type1.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-tglu: NOTRUN -> [SKIP][147] ([i915#13049])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-offscreen-max-size:
- shard-tglu: NOTRUN -> [SKIP][148] ([i915#3555]) +3 other tests skip
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_cursor_crc@cursor-offscreen-max-size.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-tglu-1: NOTRUN -> [SKIP][149] ([i915#3555]) +1 other test skip
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-dg2: NOTRUN -> [SKIP][150] ([i915#13049]) +1 other test skip
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-7/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-onscreen-max-size:
- shard-dg2: NOTRUN -> [SKIP][151] ([i915#3555]) +2 other tests skip
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_cursor_crc@cursor-onscreen-max-size.html
* igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1:
- shard-tglu-1: NOTRUN -> [FAIL][152] ([i915#13566]) +1 other test fail
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_cursor_crc@cursor-random-128x42@pipe-a-hdmi-a-1.html
* igt@kms_cursor_crc@cursor-rapid-movement-max-size:
- shard-dg2-9: NOTRUN -> [SKIP][153] ([i915#3555]) +3 other tests skip
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html
* igt@kms_cursor_crc@cursor-sliding-256x85:
- shard-tglu: [PASS][154] -> [FAIL][155] ([i915#13566]) +3 other tests fail
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-tglu-4/igt@kms_cursor_crc@cursor-sliding-256x85.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@kms_cursor_crc@cursor-sliding-256x85.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-tglu-1: NOTRUN -> [SKIP][156] ([i915#13049])
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_cursor_crc@cursor-sliding-512x512:
- shard-rkl: NOTRUN -> [SKIP][157] ([i915#13049]) +3 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_cursor_crc@cursor-sliding-512x512.html
* igt@kms_cursor_crc@cursor-sliding-64x21:
- shard-rkl: [PASS][158] -> [FAIL][159] ([i915#13566]) +1 other test fail
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-5/igt@kms_cursor_crc@cursor-sliding-64x21.html
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_cursor_crc@cursor-sliding-64x21.html
- shard-tglu: NOTRUN -> [FAIL][160] ([i915#13566]) +1 other test fail
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_cursor_crc@cursor-sliding-64x21.html
* igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [FAIL][161] ([i915#13566]) +1 other test fail
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_cursor_crc@cursor-sliding-64x21@pipe-a-hdmi-a-1.html
* igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
- shard-mtlp: NOTRUN -> [SKIP][162] ([i915#9809])
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
* igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
- shard-dg2-9: NOTRUN -> [SKIP][163] ([i915#13046] / [i915#5354]) +3 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- shard-dg2-9: NOTRUN -> [SKIP][164] ([i915#4103] / [i915#4213]) +1 other test skip
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
- shard-dg2: NOTRUN -> [SKIP][165] ([i915#13046] / [i915#5354]) +1 other test skip
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-toggle:
- shard-rkl: [PASS][166] -> [FAIL][167] ([i915#14001] / [i915#2346])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-7/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-5/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
* igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
- shard-rkl: [PASS][168] -> [FAIL][169] ([i915#2346])
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-7/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-rkl: NOTRUN -> [SKIP][170] ([i915#4103])
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
- shard-tglu-1: NOTRUN -> [SKIP][171] ([i915#4103])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
- shard-tglu-1: NOTRUN -> [SKIP][172] ([i915#9723])
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-rkl: NOTRUN -> [SKIP][173] ([i915#9723])
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_dither@fb-8bpc-vs-panel-8bpc:
- shard-dg2: [PASS][174] -> [SKIP][175] ([i915#3555])
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-11/igt@kms_dither@fb-8bpc-vs-panel-8bpc.html
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-2/igt@kms_dither@fb-8bpc-vs-panel-8bpc.html
* igt@kms_dp_linktrain_fallback@dp-fallback:
- shard-rkl: NOTRUN -> [SKIP][176] ([i915#13707]) +1 other test skip
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@kms_dp_linktrain_fallback@dp-fallback.html
* igt@kms_dp_linktrain_fallback@dsc-fallback:
- shard-tglu: NOTRUN -> [SKIP][177] ([i915#13707])
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@kms_dp_linktrain_fallback@dsc-fallback.html
* igt@kms_dsc@dsc-basic:
- shard-dg2: NOTRUN -> [SKIP][178] ([i915#3555] / [i915#3840]) +2 other tests skip
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_dsc@dsc-basic.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-rkl: NOTRUN -> [SKIP][179] ([i915#3840])
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_dsc@dsc-fractional-bpp.html
- shard-tglu-1: NOTRUN -> [SKIP][180] ([i915#3840])
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-tglu: NOTRUN -> [SKIP][181] ([i915#3555] / [i915#3840])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-rkl: NOTRUN -> [SKIP][182] ([i915#3955])
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_fbcon_fbt@psr-suspend.html
- shard-tglu-1: NOTRUN -> [SKIP][183] ([i915#3469])
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_feature_discovery@display-2x:
- shard-dg2: NOTRUN -> [SKIP][184] ([i915#1839])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_feature_discovery@display-2x.html
- shard-tglu: NOTRUN -> [SKIP][185] ([i915#1839])
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_feature_discovery@display-2x.html
* igt@kms_feature_discovery@dp-mst:
- shard-rkl: NOTRUN -> [SKIP][186] ([i915#9337])
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_feature_discovery@dp-mst.html
* igt@kms_flip@2x-absolute-wf_vblank:
- shard-dg2: NOTRUN -> [SKIP][187] ([i915#9934]) +4 other tests skip
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_flip@2x-absolute-wf_vblank.html
* igt@kms_flip@2x-blocking-absolute-wf_vblank:
- shard-tglu: NOTRUN -> [SKIP][188] ([i915#3637] / [i915#9934]) +8 other tests skip
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_flip@2x-blocking-absolute-wf_vblank.html
* igt@kms_flip@2x-blocking-wf_vblank:
- shard-dg2-9: NOTRUN -> [SKIP][189] ([i915#9934]) +1 other test skip
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_flip@2x-blocking-wf_vblank.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-rkl: NOTRUN -> [SKIP][190] ([i915#9934]) +7 other tests skip
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-panning:
- shard-tglu-1: NOTRUN -> [SKIP][191] ([i915#3637] / [i915#9934]) +2 other tests skip
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_flip@2x-flip-vs-panning.html
* igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1:
- shard-snb: [PASS][192] -> [TIMEOUT][193] ([i915#14033]) +1 other test timeout
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-snb7/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-snb5/igt@kms_flip@2x-flip-vs-suspend-interruptible@ab-vga1-hdmi-a1.html
* igt@kms_flip@dpms-vs-vblank-race-interruptible:
- shard-dg1: [PASS][194] -> [DMESG-WARN][195] ([i915#4423]) +5 other tests dmesg-warn
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-14/igt@kms_flip@dpms-vs-vblank-race-interruptible.html
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-13/igt@kms_flip@dpms-vs-vblank-race-interruptible.html
* igt@kms_flip@flip-vs-blocking-wf-vblank:
- shard-rkl: [PASS][196] -> [FAIL][197] ([i915#13734]) +1 other test fail
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-7/igt@kms_flip@flip-vs-blocking-wf-vblank.html
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@kms_flip@flip-vs-blocking-wf-vblank.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a1:
- shard-tglu: [PASS][198] -> [FAIL][199] ([i915#13734]) +1 other test fail
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-tglu-4/igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a1.html
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-10/igt@kms_flip@flip-vs-blocking-wf-vblank@a-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-snb: [PASS][200] -> [INCOMPLETE][201] ([i915#12314]) +1 other test incomplete
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-snb2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-snb1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-mtlp: [PASS][202] -> [FAIL][203] ([i915#13734]) +1 other test fail
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-mtlp-1/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-4/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@wf_vblank-ts-check@a-hdmi-a1:
- shard-tglu: NOTRUN -> [FAIL][204] ([i915#13734]) +2 other tests fail
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_flip@wf_vblank-ts-check@a-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling:
- shard-tglu: NOTRUN -> [SKIP][205] ([i915#2672] / [i915#3555]) +1 other test skip
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@kms_flip_scaled_crc@flip-32bpp-4tile-to-32bpp-4tiledg2rcccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
- shard-dg2-9: NOTRUN -> [SKIP][206] ([i915#2672] / [i915#3555])
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
- shard-dg2-9: NOTRUN -> [SKIP][207] ([i915#2672])
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-dg2: NOTRUN -> [SKIP][208] ([i915#2672] / [i915#3555] / [i915#5190]) +2 other tests skip
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
- shard-tglu: NOTRUN -> [SKIP][209] ([i915#2587] / [i915#2672] / [i915#3555])
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][210] ([i915#2672]) +3 other tests skip
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html
- shard-tglu: NOTRUN -> [SKIP][211] ([i915#2587] / [i915#2672]) +2 other tests skip
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling:
- shard-rkl: NOTRUN -> [SKIP][212] ([i915#2672] / [i915#3555]) +4 other tests skip
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
- shard-tglu-1: NOTRUN -> [SKIP][213] ([i915#2672] / [i915#3555]) +1 other test skip
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode:
- shard-rkl: NOTRUN -> [SKIP][214] ([i915#2672]) +4 other tests skip
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html
- shard-tglu-1: NOTRUN -> [SKIP][215] ([i915#2587] / [i915#2672]) +1 other test skip
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tiledg2rcccs-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
- shard-dg2: NOTRUN -> [SKIP][216] ([i915#2672] / [i915#3555])
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling:
- shard-mtlp: NOTRUN -> [SKIP][217] ([i915#2672] / [i915#3555] / [i915#8813])
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][218] ([i915#2672] / [i915#8813])
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-upscaling@pipe-a-default-mode.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
- shard-rkl: NOTRUN -> [DMESG-WARN][219] ([i915#12964]) +13 other tests dmesg-warn
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt:
- shard-dg2: NOTRUN -> [SKIP][220] ([i915#5354]) +18 other tests skip
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt:
- shard-dg2-9: NOTRUN -> [SKIP][221] ([i915#8708]) +2 other tests skip
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_frontbuffer_tracking@fbc-2p-shrfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-cpu:
- shard-dg2: NOTRUN -> [SKIP][222] ([i915#10433] / [i915#3458]) +1 other test skip
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc:
- shard-tglu-1: NOTRUN -> [SKIP][223] +38 other tests skip
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt:
- shard-rkl: NOTRUN -> [SKIP][224] ([i915#1825]) +47 other tests skip
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-gtt:
- shard-dg2: NOTRUN -> [SKIP][225] ([i915#8708]) +7 other tests skip
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-move:
- shard-dg2-9: NOTRUN -> [SKIP][226] ([i915#5354]) +16 other tests skip
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render:
- shard-dg2-9: NOTRUN -> [SKIP][227] ([i915#3458]) +9 other tests skip
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
- shard-dg2: NOTRUN -> [SKIP][228] ([i915#10055])
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][229] ([i915#8708]) +1 other test skip
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-pgflip-blt:
- shard-dg2: NOTRUN -> [SKIP][230] ([i915#3458]) +5 other tests skip
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt:
- shard-rkl: NOTRUN -> [SKIP][231] ([i915#3023]) +35 other tests skip
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-1p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-pwrite:
- shard-mtlp: NOTRUN -> [SKIP][232] ([i915#1825]) +1 other test skip
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-pwrite.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render:
- shard-tglu: NOTRUN -> [SKIP][233] +61 other tests skip
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-rkl: NOTRUN -> [SKIP][234] ([i915#3555] / [i915#8228])
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_hdr@bpc-switch-dpms.html
- shard-tglu: NOTRUN -> [SKIP][235] ([i915#3555] / [i915#8228]) +1 other test skip
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@kms_hdr@bpc-switch-dpms.html
- shard-dg2: [PASS][236] -> [SKIP][237] ([i915#3555] / [i915#8228])
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-11/igt@kms_hdr@bpc-switch-dpms.html
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-dg2-9: NOTRUN -> [SKIP][238] ([i915#3555] / [i915#8228])
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@brightness-with-hdr:
- shard-tglu-1: NOTRUN -> [SKIP][239] ([i915#12713])
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_hdr@static-toggle:
- shard-dg2: NOTRUN -> [SKIP][240] ([i915#3555] / [i915#8228])
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_hdr@static-toggle.html
* igt@kms_joiner@basic-big-joiner:
- shard-tglu: NOTRUN -> [SKIP][241] ([i915#10656])
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_joiner@basic-big-joiner.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-rkl: NOTRUN -> [SKIP][242] ([i915#12388])
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_joiner@basic-max-non-joiner:
- shard-dg2-9: NOTRUN -> [SKIP][243] ([i915#13688])
[243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_joiner@basic-max-non-joiner.html
* igt@kms_joiner@basic-ultra-joiner:
- shard-rkl: NOTRUN -> [SKIP][244] ([i915#12339])
[244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_joiner@basic-ultra-joiner.html
- shard-mtlp: NOTRUN -> [SKIP][245] ([i915#12339])
[245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@kms_joiner@basic-ultra-joiner.html
* igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner:
- shard-tglu: NOTRUN -> [SKIP][246] ([i915#13522])
[246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
- shard-dg2: NOTRUN -> [SKIP][247] ([i915#13522])
[247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_joiner@switch-modeset-ultra-joiner-big-joiner.html
* igt@kms_plane_alpha_blend@constant-alpha-max:
- shard-glk: NOTRUN -> [FAIL][248] ([i915#10647] / [i915#12169])
[248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-glk1/igt@kms_plane_alpha_blend@constant-alpha-max.html
* igt@kms_plane_alpha_blend@constant-alpha-max@pipe-c-hdmi-a-1:
- shard-glk: NOTRUN -> [FAIL][249] ([i915#10647]) +1 other test fail
[249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-glk1/igt@kms_plane_alpha_blend@constant-alpha-max@pipe-c-hdmi-a-1.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-dg2-9: NOTRUN -> [SKIP][250] ([i915#13958])
[250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_plane_multiple@2x-tiling-y:
- shard-rkl: NOTRUN -> [SKIP][251] ([i915#13958])
[251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_plane_multiple@2x-tiling-y.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-dg2: NOTRUN -> [SKIP][252] ([i915#13958])
[252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_plane_multiple@tiling-y:
- shard-dg2-9: NOTRUN -> [SKIP][253] ([i915#14259])
[253]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_plane_multiple@tiling-y.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-a:
- shard-rkl: NOTRUN -> [SKIP][254] ([i915#12247]) +7 other tests skip
[254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-a.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-c:
- shard-tglu: NOTRUN -> [SKIP][255] ([i915#12247]) +17 other tests skip
[255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation@pipe-c.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation:
- shard-rkl: NOTRUN -> [SKIP][256] ([i915#3555]) +4 other tests skip
[256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20:
- shard-dg2: NOTRUN -> [SKIP][257] ([i915#12247] / [i915#9423])
[257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-a:
- shard-dg2: NOTRUN -> [SKIP][258] ([i915#12247]) +3 other tests skip
[258]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-a.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
- shard-tglu: NOTRUN -> [SKIP][259] ([i915#12247] / [i915#3555])
[259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25:
- shard-rkl: NOTRUN -> [SKIP][260] ([i915#12247] / [i915#6953])
[260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25.html
- shard-tglu: NOTRUN -> [SKIP][261] ([i915#12247] / [i915#6953])
[261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25.html
* igt@kms_pm_backlight@basic-brightness:
- shard-rkl: NOTRUN -> [SKIP][262] ([i915#5354]) +1 other test skip
[262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-tglu-1: NOTRUN -> [SKIP][263] ([i915#12343])
[263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_dc@dc5-psr:
- shard-tglu: NOTRUN -> [SKIP][264] ([i915#9685])
[264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_dc@dc6-psr:
- shard-dg2-9: NOTRUN -> [SKIP][265] ([i915#9685])
[265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_pm_dc@dc6-psr.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-dg2: [PASS][266] -> [SKIP][267] ([i915#9340])
[266]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-8/igt@kms_pm_lpsp@kms-lpsp.html
[267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-5/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_rpm@dpms-lpsp:
- shard-dg2-9: NOTRUN -> [SKIP][268] ([i915#9519]) +1 other test skip
[268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_pm_rpm@dpms-lpsp.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-rkl: NOTRUN -> [SKIP][269] ([i915#9519])
[269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-dg2: [PASS][270] -> [SKIP][271] ([i915#9519])
[270]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-2/igt@kms_pm_rpm@modeset-non-lpsp.html
[271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-8/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress:
- shard-tglu-1: NOTRUN -> [SKIP][272] ([i915#9519])
[272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_pm_rpm@modeset-non-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-tglu: NOTRUN -> [SKIP][273] ([i915#9519]) +1 other test skip
[273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_prime@basic-crc-hybrid:
- shard-tglu: NOTRUN -> [SKIP][274] ([i915#6524])
[274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@kms_prime@basic-crc-hybrid.html
* igt@kms_prime@d3hot:
- shard-rkl: NOTRUN -> [SKIP][275] ([i915#6524]) +1 other test skip
[275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_prime@d3hot.html
- shard-tglu-1: NOTRUN -> [SKIP][276] ([i915#6524])
[276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_prime@d3hot.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf:
- shard-dg2-9: NOTRUN -> [SKIP][277] ([i915#11520]) +3 other tests skip
[277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area:
- shard-glk: NOTRUN -> [SKIP][278] ([i915#11520]) +1 other test skip
[278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-glk1/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area:
- shard-rkl: NOTRUN -> [SKIP][279] ([i915#11520]) +8 other tests skip
[279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf:
- shard-tglu-1: NOTRUN -> [SKIP][280] ([i915#11520]) +2 other tests skip
[280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-tglu: NOTRUN -> [SKIP][281] ([i915#11520]) +7 other tests skip
[281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_psr2_sf@pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@pr-plane-move-sf-dmg-area:
- shard-dg2: NOTRUN -> [SKIP][282] ([i915#11520]) +4 other tests skip
[282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_psr2_sf@pr-plane-move-sf-dmg-area.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-rkl: NOTRUN -> [SKIP][283] ([i915#9683])
[283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr2_su@page_flip-p010:
- shard-dg2: NOTRUN -> [SKIP][284] ([i915#9683])
[284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-tglu-1: NOTRUN -> [SKIP][285] ([i915#9683]) +1 other test skip
[285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-pr-no-drrs:
- shard-rkl: NOTRUN -> [SKIP][286] ([i915#1072] / [i915#9732]) +27 other tests skip
[286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@kms_psr@fbc-pr-no-drrs.html
* igt@kms_psr@fbc-pr-primary-page-flip:
- shard-dg2-9: NOTRUN -> [SKIP][287] ([i915#1072] / [i915#9732]) +9 other tests skip
[287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_psr@fbc-pr-primary-page-flip.html
* igt@kms_psr@pr-cursor-render:
- shard-mtlp: NOTRUN -> [SKIP][288] ([i915#9688])
[288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@kms_psr@pr-cursor-render.html
* igt@kms_psr@psr-primary-mmap-cpu:
- shard-dg2: NOTRUN -> [SKIP][289] ([i915#1072] / [i915#9732]) +9 other tests skip
[289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_psr@psr-primary-mmap-cpu.html
* igt@kms_psr@psr-sprite-mmap-cpu:
- shard-tglu-1: NOTRUN -> [SKIP][290] ([i915#9732]) +8 other tests skip
[290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_psr@psr-sprite-mmap-cpu.html
* igt@kms_psr@psr2-cursor-plane-onoff:
- shard-tglu: NOTRUN -> [SKIP][291] ([i915#9732]) +15 other tests skip
[291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_psr@psr2-cursor-plane-onoff.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-rkl: NOTRUN -> [SKIP][292] ([i915#9685])
[292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-rotation-90:
- shard-dg2: NOTRUN -> [SKIP][293] ([i915#12755])
[293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_rotation_crc@primary-rotation-90.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
- shard-dg2: NOTRUN -> [SKIP][294] ([i915#12755] / [i915#5190])
[294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-rkl: NOTRUN -> [SKIP][295] ([i915#5289]) +1 other test skip
[295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
- shard-dg2-9: NOTRUN -> [SKIP][296] ([i915#12755])
[296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-tglu-1: NOTRUN -> [SKIP][297] ([i915#8623])
[297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-dg2-9: NOTRUN -> [SKIP][298] ([i915#8623])
[298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-9/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_universal_plane@cursor-fb-leak:
- shard-mtlp: [PASS][299] -> [FAIL][300] ([i915#9196]) +1 other test fail
[299]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-mtlp-1/igt@kms_universal_plane@cursor-fb-leak.html
[300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-2/igt@kms_universal_plane@cursor-fb-leak.html
* igt@kms_vrr@seamless-rr-switch-drrs:
- shard-rkl: NOTRUN -> [SKIP][301] ([i915#9906]) +1 other test skip
[301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@kms_vrr@seamless-rr-switch-drrs.html
* igt@kms_writeback@writeback-fb-id:
- shard-tglu-1: NOTRUN -> [SKIP][302] ([i915#2437])
[302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@kms_writeback@writeback-fb-id.html
* igt@kms_writeback@writeback-fb-id-xrgb2101010:
- shard-dg2: NOTRUN -> [SKIP][303] ([i915#2437] / [i915#9412])
[303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_writeback@writeback-fb-id-xrgb2101010.html
- shard-tglu: NOTRUN -> [SKIP][304] ([i915#2437] / [i915#9412])
[304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-3/igt@kms_writeback@writeback-fb-id-xrgb2101010.html
* igt@perf_pmu@interrupts-sync:
- shard-rkl: [PASS][305] -> [FAIL][306] ([i915#14081])
[305]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-8/igt@perf_pmu@interrupts-sync.html
[306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-5/igt@perf_pmu@interrupts-sync.html
* igt@perf_pmu@module-unload:
- shard-mtlp: [PASS][307] -> [INCOMPLETE][308] ([i915#13520])
[307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-mtlp-3/igt@perf_pmu@module-unload.html
[308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-8/igt@perf_pmu@module-unload.html
* igt@perf_pmu@rc6-all-gts:
- shard-tglu-1: NOTRUN -> [SKIP][309] ([i915#8516])
[309]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@perf_pmu@rc6-all-gts.html
- shard-rkl: NOTRUN -> [SKIP][310] ([i915#8516])
[310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@perf_pmu@rc6-all-gts.html
* igt@perf_pmu@rc6-suspend:
- shard-glk: [PASS][311] -> [INCOMPLETE][312] ([i915#13356] / [i915#14242])
[311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-glk2/igt@perf_pmu@rc6-suspend.html
[312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-glk9/igt@perf_pmu@rc6-suspend.html
* igt@prime_vgem@basic-read:
- shard-rkl: NOTRUN -> [SKIP][313] ([i915#3291] / [i915#3708])
[313]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@prime_vgem@basic-read.html
* igt@prime_vgem@coherency-gtt:
- shard-dg2: NOTRUN -> [SKIP][314] ([i915#3708] / [i915#4077])
[314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-4/igt@prime_vgem@coherency-gtt.html
* igt@sriov_basic@bind-unbind-vf:
- shard-rkl: NOTRUN -> [SKIP][315] ([i915#9917])
[315]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-6/igt@sriov_basic@bind-unbind-vf.html
* igt@sriov_basic@bind-unbind-vf@vf-4:
- shard-tglu: NOTRUN -> [FAIL][316] ([i915#12910]) +9 other tests fail
[316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-4/igt@sriov_basic@bind-unbind-vf@vf-4.html
* igt@sriov_basic@enable-vfs-autoprobe-off@numvfs-all:
- shard-tglu-1: NOTRUN -> [FAIL][317] ([i915#12910]) +9 other tests fail
[317]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-1/igt@sriov_basic@enable-vfs-autoprobe-off@numvfs-all.html
* igt@syncobj_timeline@multi-wait-for-submit-available-submitted:
- shard-rkl: [PASS][318] -> [DMESG-WARN][319] ([i915#12964]) +8 other tests dmesg-warn
[318]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-5/igt@syncobj_timeline@multi-wait-for-submit-available-submitted.html
[319]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@syncobj_timeline@multi-wait-for-submit-available-submitted.html
#### Possible fixes ####
* igt@gem_create@create-clear:
- shard-rkl: [DMESG-WARN][320] ([i915#12964]) -> [PASS][321] +10 other tests pass
[320]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-7/igt@gem_create@create-clear.html
[321]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-8/igt@gem_create@create-clear.html
* igt@gem_pxp@protected-raw-src-copy-not-readible:
- shard-rkl: [TIMEOUT][322] ([i915#12917] / [i915#12964]) -> [PASS][323] +1 other test pass
[322]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-7/igt@gem_pxp@protected-raw-src-copy-not-readible.html
[323]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-8/igt@gem_pxp@protected-raw-src-copy-not-readible.html
* igt@gem_workarounds@reset-fd:
- shard-mtlp: [ABORT][324] ([i915#13193] / [i915#13723]) -> [PASS][325]
[324]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-mtlp-4/igt@gem_workarounds@reset-fd.html
[325]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-mtlp-7/igt@gem_workarounds@reset-fd.html
* igt@gem_workarounds@suspend-resume-context:
- shard-rkl: [INCOMPLETE][326] ([i915#13356]) -> [PASS][327]
[326]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-3/igt@gem_workarounds@suspend-resume-context.html
[327]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-7/igt@gem_workarounds@suspend-resume-context.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-dg2: [DMESG-WARN][328] ([i915#13447]) -> [PASS][329]
[328]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-8/igt@i915_module_load@reload-with-fault-injection.html
[329]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_rpm@debugfs-forcewake-user:
- shard-dg1: [DMESG-WARN][330] ([i915#4423]) -> [PASS][331] +1 other test pass
[330]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-13/igt@i915_pm_rpm@debugfs-forcewake-user.html
[331]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-17/igt@i915_pm_rpm@debugfs-forcewake-user.html
* igt@i915_selftest@live@workarounds:
- shard-dg2: [DMESG-FAIL][332] ([i915#12061]) -> [PASS][333] +1 other test pass
[332]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-7/igt@i915_selftest@live@workarounds.html
[333]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-6/igt@i915_selftest@live@workarounds.html
* igt@kms_atomic_transition@plane-all-modeset-transition-fencing:
- shard-dg2: [FAIL][334] ([i915#5956]) -> [PASS][335] +2 other tests pass
[334]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-2/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
[335]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-1/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
- shard-tglu: [FAIL][336] ([i915#11808]) -> [PASS][337] +1 other test pass
[336]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-tglu-7/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
[337]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-tglu-5/igt@kms_atomic_transition@plane-all-modeset-transition-fencing.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-snb: [DMESG-WARN][338] ([i915#13899]) -> [PASS][339] +1 other test pass
[338]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-snb1/igt@kms_flip@flip-vs-suspend-interruptible.html
[339]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-snb6/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-dg2: [SKIP][340] ([i915#3555] / [i915#8228]) -> [PASS][341] +1 other test pass
[340]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-4/igt@kms_hdr@invalid-metadata-sizes.html
[341]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-11/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_joiner@basic-force-big-joiner:
- shard-dg2: [SKIP][342] ([i915#12388]) -> [PASS][343]
[342]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-5/igt@kms_joiner@basic-force-big-joiner.html
[343]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-11/igt@kms_joiner@basic-force-big-joiner.html
* igt@kms_pm_dc@dc6-dpms:
- shard-rkl: [SKIP][344] ([i915#3361]) -> [PASS][345]
[344]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-8/igt@kms_pm_dc@dc6-dpms.html
[345]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-5/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-rkl: [SKIP][346] ([i915#9519]) -> [PASS][347] +2 other tests pass
[346]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-5/igt@kms_pm_rpm@modeset-lpsp.html
[347]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-4/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-dg2: [SKIP][348] ([i915#9519]) -> [PASS][349]
[348]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-8/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[349]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_properties@invalid-properties-atomic:
- shard-dg1: [DMESG-WARN][350] ([i915#4391] / [i915#4423]) -> [PASS][351]
[350]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-19/igt@kms_properties@invalid-properties-atomic.html
[351]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-12/igt@kms_properties@invalid-properties-atomic.html
#### Warnings ####
* igt@gem_pxp@hw-rejects-pxp-context:
- shard-rkl: [TIMEOUT][352] ([i915#12917] / [i915#12964]) -> [SKIP][353] ([i915#13717])
[352]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-3/igt@gem_pxp@hw-rejects-pxp-context.html
[353]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-8/igt@gem_pxp@hw-rejects-pxp-context.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-dg1: [SKIP][354] ([i915#4538]) -> [SKIP][355] ([i915#4423] / [i915#4538])
[354]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-12/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
[355]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-15/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs:
- shard-dg1: [SKIP][356] ([i915#4423] / [i915#6095]) -> [SKIP][357] ([i915#6095])
[356]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-19/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs.html
[357]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-12/igt@kms_ccs@bad-pixel-format-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: [SKIP][358] ([i915#6095]) -> [SKIP][359] ([i915#14098] / [i915#6095]) +8 other tests skip
[358]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-8/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2.html
[359]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-5/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-2:
- shard-rkl: [SKIP][360] ([i915#14098] / [i915#6095]) -> [SKIP][361] ([i915#6095]) +2 other tests skip
[360]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-3/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-2.html
[361]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-8/igt@kms_ccs@missing-ccs-buffer-y-tiled-gen12-mc-ccs@pipe-b-hdmi-a-2.html
* igt@kms_content_protection@atomic:
- shard-dg2: [FAIL][362] ([i915#7173]) -> [SKIP][363] ([i915#7118] / [i915#9424])
[362]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-11/igt@kms_content_protection@atomic.html
[363]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-3/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@srm:
- shard-dg2: [SKIP][364] ([i915#7118]) -> [FAIL][365] ([i915#7173])
[364]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-5/igt@kms_content_protection@srm.html
[365]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-11/igt@kms_content_protection@srm.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible:
- shard-dg1: [SKIP][366] ([i915#9934]) -> [SKIP][367] ([i915#4423] / [i915#9934])
[366]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-12/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible.html
[367]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-15/igt@kms_flip@2x-flip-vs-absolute-wf_vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset:
- shard-dg1: [SKIP][368] ([i915#4423] / [i915#9934]) -> [SKIP][369] ([i915#9934])
[368]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-17/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html
[369]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-19/igt@kms_flip@2x-flip-vs-dpms-off-vs-modeset.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render:
- shard-dg1: [SKIP][370] ([i915#4423]) -> [SKIP][371]
[370]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-14/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render.html
[371]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-19/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt:
- shard-dg1: [SKIP][372] ([i915#8708]) -> [SKIP][373] ([i915#4423] / [i915#8708])
[372]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-14/igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt.html
[373]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-13/igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move:
- shard-dg2: [SKIP][374] ([i915#10433] / [i915#3458]) -> [SKIP][375] ([i915#3458]) +1 other test skip
[374]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
[375]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg2-8/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-fullscreen:
- shard-dg1: [SKIP][376] -> [SKIP][377] ([i915#4423])
[376]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-17/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-fullscreen.html
[377]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-19/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-fullscreen.html
* igt@kms_pm_dc@dc9-dpms:
- shard-rkl: [SKIP][378] ([i915#4281]) -> [SKIP][379] ([i915#3361])
[378]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-7/igt@kms_pm_dc@dc9-dpms.html
[379]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-8/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-rkl: [SKIP][380] ([i915#3828]) -> [SKIP][381] ([i915#9340])
[380]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-rkl-7/igt@kms_pm_lpsp@kms-lpsp.html
[381]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-rkl-8/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf:
- shard-dg1: [SKIP][382] ([i915#11520] / [i915#4423]) -> [SKIP][383] ([i915#11520])
[382]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-18/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf.html
[383]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-16/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@fbc-psr2-sprite-mmap-gtt:
- shard-dg1: [SKIP][384] ([i915#1072] / [i915#4423] / [i915#9732]) -> [SKIP][385] ([i915#1072] / [i915#9732])
[384]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16556/shard-dg1-14/igt@kms_psr@fbc-psr2-sprite-mmap-gtt.html
[385]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/shard-dg1-19/igt@kms_psr@fbc-psr2-sprite-mmap-gtt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
[i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
[i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
[i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
[i915#10647]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10647
[i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
[i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
[i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
[i915#11441]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11441
[i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
[i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
[i915#11808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11808
[i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
[i915#12169]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12169
[i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
[i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
[i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
[i915#12339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12339
[i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
[i915#12353]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12353
[i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388
[i915#12392]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12392
[i915#12543]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12543
[i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
[i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
[i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
[i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
[i915#12917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12917
[i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
[i915#13008]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13008
[i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
[i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
[i915#13193]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13193
[i915#13304]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13304
[i915#13356]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13356
[i915#13447]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13447
[i915#13520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13520
[i915#13522]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13522
[i915#13566]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13566
[i915#13688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13688
[i915#13707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13707
[i915#13717]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13717
[i915#13723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13723
[i915#13734]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13734
[i915#13783]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13783
[i915#13784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13784
[i915#13786]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13786
[i915#13809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13809
[i915#13899]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13899
[i915#13958]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13958
[i915#14001]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14001
[i915#14033]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14033
[i915#14073]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14073
[i915#14081]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14081
[i915#14098]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14098
[i915#14118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14118
[i915#14242]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14242
[i915#14259]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14259
[i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
[i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
[i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
[i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
[i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
[i915#284]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/284
[i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
[i915#3116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3116
[i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
[i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
[i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
[i915#3361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
[i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469
[i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
[i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
[i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
[i915#3828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3828
[i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
[i915#3955]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3955
[i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
[i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
[i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
[i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
[i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387
[i915#4391]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4391
[i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
[i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
[i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
[i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
[i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
[i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
[i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
[i915#4885]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4885
[i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
[i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
[i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
[i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
[i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
[i915#5784]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5784
[i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956
[i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
[i915#6230]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6230
[i915#6245]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6245
[i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
[i915#6335]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6335
[i915#6344]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6344
[i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
[i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
[i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
[i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
[i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
[i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
[i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173
[i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
[i915#7707]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7707
[i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
[i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975
[i915#7984]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7984
[i915#8213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8213
[i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
[i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
[i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
[i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
[i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
[i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
[i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
[i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813
[i915#9196]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9196
[i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
[i915#9337]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9337
[i915#9340]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9340
[i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
[i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
[i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
[i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
[i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
[i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9685
[i915#9688]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9688
[i915#9723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9723
[i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732
[i915#9809]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9809
[i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906
[i915#9917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9917
[i915#9934]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9934
[i915#9979]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9979
Build changes
-------------
* Linux: CI_DRM_16556 -> Patchwork_149052v2
CI-20190529: 20190529
CI_DRM_16556: 3e12fd2f2885242aa951ffc05c3c7bbb63e20d8e @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_8365: 8365
Patchwork_149052v2: 3e12fd2f2885242aa951ffc05c3c7bbb63e20d8e @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_149052v2/index.html
[-- Attachment #2: Type: text/html, Size: 131470 bytes --]
^ permalink raw reply [flat|nested] 38+ messages in thread* RE: [PATCH 00/14] DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (28 preceding siblings ...)
2025-05-16 12:55 ` ✓ i915.CI.Full: " Patchwork
@ 2025-05-20 8:05 ` Kandpal, Suraj
2025-05-27 1:56 ` ✗ CI.Patch_applied: failure for " Patchwork
30 siblings, 0 replies; 38+ messages in thread
From: Kandpal, Suraj @ 2025-05-20 8:05 UTC (permalink / raw)
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: Nautiyal, Ankit K, Murthy, Arun R, Nikula, Jani, Kahola, Mika
> -----Original Message-----
> From: Kandpal, Suraj <suraj.kandpal@intel.com>
> Sent: Thursday, May 15, 2025 12:48 PM
> To: intel-xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Cc: Nautiyal, Ankit K <ankit.k.nautiyal@intel.com>; Murthy, Arun R
> <arun.r.murthy@intel.com>; Nikula, Jani <jani.nikula@intel.com>; Kahola,
> Mika <mika.kahola@intel.com>; Kandpal, Suraj <suraj.kandpal@intel.com>
> Subject: [PATCH 00/14] DPLL framework redesign
>
> Since MTL we moved away from using our existing DPLL framework this was
> done since the existing API didn't really work for us.
> This Redesing is a first part of two part series which will redesign the current
> framework so that it can be used for PLL/PHY enablement going forward.
> Here we move away from the shared_dpll naming and also change arguments
> for some functions which are needed for PLL which have individual PHY
> keeping in mind that we don't break any of the legacy stuff. When this gets
> approved and merged a second series hooking up the SNPS PHY PLL API to
> this framework will be posted. This is done to reduce the rework in case the
> current design floated ends up getting changed during the review process.
> We also rename some functions in intel_dpll_mgr to start with
> intel_dpll_* in an effort to make sure all exported functions have the filename
> at the start.
>
> --v4
> -Rebase
>
> --v5
> -Break series and send the controvertial patch next patch series of this
> redesign
>
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Thanks for all the reviews pushed to drm-intel-next
Regards,
Suraj Kandpal
>
> Suraj Kandpal (14):
> drm/i915/dpll: Rename intel_dpll
> drm/i915/dpll: Rename intel_dpll_funcs
> drm/i915/dpll: Rename intel_shared_dpll_state
> drm/i915/dpll: Rename macro for_each_shared_dpll
> drm/i915/dpll: Rename intel_shared_dpll_funcs
> drm/i915/dpll: Rename intel_shared_dpll
> drm/i915/dpll: Move away from using shared dpll
> drm/i915/dpll: Rename crtc_get_shared_dpll
> drm/i915/dpll: Rename intel_[enable/disable]_dpll
> drm/i915/dpll: Rename intel_unreference_dpll_crtc
> drm/i915/dpll: Rename intel_reference_dpll_crtc
> drm/i915/dpll: Rename intel_<release/reserve>_dpll
> drm/i915/dpll: Rename intel_compute_dpll
> drm/i915/dpll: Rename intel_update_active_dpll
>
> drivers/gpu/drm/i915/display/icl_dsi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_ddi.c | 68 +--
> drivers/gpu/drm/i915/display/intel_ddi.h | 6 +-
> drivers/gpu/drm/i915/display/intel_display.c | 22 +-
> .../gpu/drm/i915/display/intel_display_core.h | 12 +-
> .../drm/i915/display/intel_display_debugfs.c | 4 +-
> .../drm/i915/display/intel_display_driver.c | 2 +-
> .../drm/i915/display/intel_display_types.h | 8 +-
> drivers/gpu/drm/i915/display/intel_dpll.c | 60 +-
> drivers/gpu/drm/i915/display/intel_dpll.h | 4 +-
> drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 537 +++++++++---------
> drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 80 +--
> drivers/gpu/drm/i915/display/intel_fdi.c | 2 +-
> drivers/gpu/drm/i915/display/intel_lvds.c | 2 +-
> .../drm/i915/display/intel_modeset_setup.c | 10 +-
> .../drm/i915/display/intel_modeset_verify.c | 4 +-
> .../gpu/drm/i915/display/intel_pch_display.c | 20 +-
> .../gpu/drm/i915/display/intel_pch_refclk.c | 4 +-
> 18 files changed, 423 insertions(+), 424 deletions(-)
>
> --
> 2.34.1
^ permalink raw reply [flat|nested] 38+ messages in thread* ✗ CI.Patch_applied: failure for DPLL framework redesign
2025-05-15 7:17 [PATCH 00/14] DPLL framework redesign Suraj Kandpal
` (29 preceding siblings ...)
2025-05-20 8:05 ` [PATCH 00/14] DPLL framework redesign Kandpal, Suraj
@ 2025-05-27 1:56 ` Patchwork
30 siblings, 0 replies; 38+ messages in thread
From: Patchwork @ 2025-05-27 1:56 UTC (permalink / raw)
To: Kandpal, Suraj; +Cc: intel-xe
== Series Details ==
Series: DPLL framework redesign
URL : https://patchwork.freedesktop.org/series/149051/
State : failure
== Summary ==
=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: 3e019cc3eaff drm-tip: 2025y-05m-26d-14h-49m-23s UTC integration manifest
=== git am output follows ===
error: patch failed: drivers/gpu/drm/i915/display/intel_display_core.h:122
error: drivers/gpu/drm/i915/display/intel_display_core.h: patch does not apply
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Applying: drm/i915/dpll: Rename intel_dpll
Patch failed at 0001 drm/i915/dpll: Rename intel_dpll
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
^ permalink raw reply [flat|nested] 38+ messages in thread