[PATCH] drm/i915/guc: Enable DUAL_QUEUE_WA for newer platforms

[PATCH] drm/i915/guc: Enable DUAL_QUEUE_WA for newer platforms

[Julia Filipchuk]

For newer platforms (post DG2) hardware intentionally stalls on
submisstion of concurrent RCS and CCS of different address spaces. With
this workaround GuC will never schedule such conlicting contexts;
preventing detection of a stall as a hang.

GuC specs recommend to enable this for all platforms starting from MTL
supporting CCS.

Signed-off-by: Julia Filipchuk <julia.filipchuk@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_gt.h     | 8 ++++++++
 drivers/gpu/drm/i915/gt/uc/intel_guc.c | 9 ++++++---
 2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
index 998ca029b73a..2f86b2291826 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt.h
@@ -24,6 +24,14 @@ struct drm_printer;
 	 GRAPHICS_VER_FULL((gt)->i915) >= (from) && \
 	 GRAPHICS_VER_FULL((gt)->i915) <= (until)))
 
+/*
+ * Check that the GT is a graphics GT and has atleast minimum IP version.
+ */
+#define IS_GFX_GT_IP_ATLEAST(gt, from) ( \
+	BUILD_BUG_ON_ZERO((from) < IP_VER(2, 0)) + \
+	((gt)->type != GT_MEDIA && \
+	 GRAPHICS_VER_FULL((gt)->i915) >= (from)))
+
 /*
  * Check that the GT is a media GT and has an IP version within the
  * specified range (inclusive).
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
index 9df80c325fc1..70c83c1588e9 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
@@ -313,8 +313,12 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
 	 *
 	 * The same WA bit is used for both and 22011391025 is applicable to
 	 * all DG2.
+	 *
+	 * Platforms post DG2 prevent behavior in hardware. This is implicitly
+	 * enabled to give guc management over CCS scheduling.
 	 */
-	if (IS_DG2(gt->i915))
+	if (IS_DG2(gt->i915) ||
+	    (CCS_MASK(gt) && IS_GFX_GT_IP_ATLEAST(gt, IP_VER(12, 70))))
 		flags |= GUC_WA_DUAL_QUEUE;
 
 	/* Wa_22011802037: graphics version 11/12 */
@@ -322,8 +326,7 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
 		flags |= GUC_WA_PRE_PARSER;
 
 	/*
-	 * Wa_22012727170
-	 * Wa_22012727685
+	 * Wa_22012727170 Wa_22012727685
 	 */
 	if (IS_DG2_G11(gt->i915))
 		flags |= GUC_WA_CONTEXT_ISOLATION;
-- 
2.49.0

✗ Fi.CI.CHECKPATCH: warning for drm/i915/guc: Enable DUAL_QUEUE_WA for newer platforms

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Enable DUAL_QUEUE_WA for newer platforms
URL   : https://patchwork.freedesktop.org/series/147987/
State : warning

== Summary ==

Error: dim checkpatch failed
c5649d6a3089 drm/i915/guc: Enable DUAL_QUEUE_WA for newer platforms
-:25: WARNING:TYPO_SPELLING: 'atleast' may be misspelled - perhaps 'at least'?
#25: FILE: drivers/gpu/drm/i915/gt/intel_gt.h:28:
+ * Check that the GT is a graphics GT and has atleast minimum IP version.
                                               ^^^^^^^

-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'gt' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/gt/intel_gt.h:30:
+#define IS_GFX_GT_IP_ATLEAST(gt, from) ( \
+	BUILD_BUG_ON_ZERO((from) < IP_VER(2, 0)) + \
+	((gt)->type != GT_MEDIA && \
+	 GRAPHICS_VER_FULL((gt)->i915) >= (from)))

-:27: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'from' - possible side-effects?
#27: FILE: drivers/gpu/drm/i915/gt/intel_gt.h:30:
+#define IS_GFX_GT_IP_ATLEAST(gt, from) ( \
+	BUILD_BUG_ON_ZERO((from) < IP_VER(2, 0)) + \
+	((gt)->type != GT_MEDIA && \
+	 GRAPHICS_VER_FULL((gt)->i915) >= (from)))

total: 0 errors, 1 warnings, 2 checks, 36 lines checked

✗ Fi.CI.SPARSE: warning for drm/i915/guc: Enable DUAL_QUEUE_WA for newer platforms

[Patchwork]

== Series Details ==

Series: drm/i915/guc: Enable DUAL_QUEUE_WA for newer platforms
URL   : https://patchwork.freedesktop.org/series/147987/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✓ i915.CI.BAT: success for drm/i915/guc: Enable DUAL_QUEUE_WA for newer platforms

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 3270 bytes --]

== Series Details ==

Series: drm/i915/guc: Enable DUAL_QUEUE_WA for newer platforms
URL   : https://patchwork.freedesktop.org/series/147987/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_16439 -> Patchwork_147987v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147987v1/index.html

Participating hosts (46 -> 43)
------------------------------

  Missing    (3): fi-glk-j4005 bat-adlp-11 fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_147987v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live:
    - bat-arlh-3:         [PASS][1] -> [ABORT][2] ([i915#13723] / [i915#13949])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16439/bat-arlh-3/igt@i915_selftest@live.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147987v1/bat-arlh-3/igt@i915_selftest@live.html

  * igt@i915_selftest@live@gt_mocs:
    - bat-arlh-3:         [PASS][3] -> [ABORT][4] ([i915#13949])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16439/bat-arlh-3/igt@i915_selftest@live@gt_mocs.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147987v1/bat-arlh-3/igt@i915_selftest@live@gt_mocs.html

  * igt@i915_selftest@live@guc_hang:
    - bat-twl-2:          [PASS][5] -> [INCOMPLETE][6] ([i915#14096]) +1 other test incomplete
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16439/bat-twl-2/igt@i915_selftest@live@guc_hang.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147987v1/bat-twl-2/igt@i915_selftest@live@guc_hang.html

  * igt@i915_selftest@live@workarounds:
    - bat-dg2-11:         [PASS][7] -> [DMESG-FAIL][8] ([i915#12061]) +1 other test dmesg-fail
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16439/bat-dg2-11/igt@i915_selftest@live@workarounds.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147987v1/bat-dg2-11/igt@i915_selftest@live@workarounds.html

  
#### Possible fixes ####

  * igt@kms_hdmi_inject@inject-audio:
    - fi-tgl-1115g4:      [FAIL][9] ([i915#13930]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_16439/fi-tgl-1115g4/igt@kms_hdmi_inject@inject-audio.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147987v1/fi-tgl-1115g4/igt@kms_hdmi_inject@inject-audio.html

  
  [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061
  [i915#13723]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13723
  [i915#13930]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13930
  [i915#13949]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13949
  [i915#14096]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14096


Build changes
-------------

  * Linux: CI_DRM_16439 -> Patchwork_147987v1

  CI-20190529: 20190529
  CI_DRM_16439: d161139329a7bc9d9659a73b965292d036c97e9d @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8328: 8328
  Patchwork_147987v1: d161139329a7bc9d9659a73b965292d036c97e9d @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_147987v1/index.html

[-- Attachment #2: Type: text/html, Size: 4045 bytes --]

Re: [PATCH] drm/i915/guc: Enable DUAL_QUEUE_WA for newer platforms

[Jani Nikula]

On Fri, 18 Apr 2025, Julia Filipchuk <julia.filipchuk@intel.com> wrote:
> For newer platforms (post DG2) hardware intentionally stalls on
> submisstion of concurrent RCS and CCS of different address spaces. With
> this workaround GuC will never schedule such conlicting contexts;
> preventing detection of a stall as a hang.
>
> GuC specs recommend to enable this for all platforms starting from MTL
> supporting CCS.
>
> Signed-off-by: Julia Filipchuk <julia.filipchuk@intel.com>
> ---
>  drivers/gpu/drm/i915/gt/intel_gt.h     | 8 ++++++++
>  drivers/gpu/drm/i915/gt/uc/intel_guc.c | 9 ++++++---
>  2 files changed, 14 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt.h b/drivers/gpu/drm/i915/gt/intel_gt.h
> index 998ca029b73a..2f86b2291826 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt.h
> @@ -24,6 +24,14 @@ struct drm_printer;
>  	 GRAPHICS_VER_FULL((gt)->i915) >= (from) && \
>  	 GRAPHICS_VER_FULL((gt)->i915) <= (until)))
>  
> +/*
> + * Check that the GT is a graphics GT and has atleast minimum IP version.
> + */
> +#define IS_GFX_GT_IP_ATLEAST(gt, from) ( \
> +	BUILD_BUG_ON_ZERO((from) < IP_VER(2, 0)) + \
> +	((gt)->type != GT_MEDIA && \
> +	 GRAPHICS_VER_FULL((gt)->i915) >= (from)))
> +
>  /*
>   * Check that the GT is a media GT and has an IP version within the
>   * specified range (inclusive).
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc.c b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> index 9df80c325fc1..70c83c1588e9 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc.c
> @@ -313,8 +313,12 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
>  	 *
>  	 * The same WA bit is used for both and 22011391025 is applicable to
>  	 * all DG2.
> +	 *
> +	 * Platforms post DG2 prevent behavior in hardware. This is implicitly
> +	 * enabled to give guc management over CCS scheduling.
>  	 */
> -	if (IS_DG2(gt->i915))
> +	if (IS_DG2(gt->i915) ||
> +	    (CCS_MASK(gt) && IS_GFX_GT_IP_ATLEAST(gt, IP_VER(12, 70))))
>  		flags |= GUC_WA_DUAL_QUEUE;

	GRAPHICS_VER_FULL((gt)->i915) >= IP_VER(12, 70)

You don't need an extra macro for a single use case that is covered by
existing macros.

BR,
Jani.


>  
>  	/* Wa_22011802037: graphics version 11/12 */
> @@ -322,8 +326,7 @@ static u32 guc_ctl_wa_flags(struct intel_guc *guc)
>  		flags |= GUC_WA_PRE_PARSER;
>  
>  	/*
> -	 * Wa_22012727170
> -	 * Wa_22012727685
> +	 * Wa_22012727170 Wa_22012727685
>  	 */
>  	if (IS_DG2_G11(gt->i915))
>  		flags |= GUC_WA_CONTEXT_ISOLATION;

-- 
Jani Nikula, Intel

Re: [PATCH] drm/i915/guc: Enable DUAL_QUEUE_WA for newer platforms

[Julia Filipchuk]

Appreciate the suggestion.

The additional checks in the IS_GFX_GT_IP_RANGE macro must be for legacy changes
and not needed here.