From: Marc Zyngier <maz@kernel.org>
To: l00313349 <liting8@huawei.com>
Cc: <linux-arm-kernel@lists.infradead.org>, <kvmarm@lists.linux.dev>,
<oliver.upton@linux.dev>, <james.morse@arm.com>,
<suzuki.poulose@arm.com>, <yuzenghui@huawei.com>,
<catalin.marinas@arm.com>, <will@kernel.org>,
<zhengchuan@huawei.com>, <xiexiangyou@huawei.com>
Subject: Re: [PATCH] KVM: arm64: fix MPIDR to vcpu index cache to support vcpu change at runtime
Date: Wed, 29 Nov 2023 19:18:42 +0000 [thread overview]
Message-ID: <87il5k8j1p.wl-maz@kernel.org> (raw)
In-Reply-To: <20231128135402.1943-1-liting8@huawei.com>
On Tue, 28 Nov 2023 13:54:02 +0000,
l00313349 <liting8@huawei.com> wrote:
>
> From: Ting Li <liting8@huawei.com>
>
> Consider vcpu change at runtime, for example online_vcpus is 8,
> but only start 2 vcpu threads, MPIDR to vcpu index 0 may be overwrited
> and vm hangs. When start other vcpu threads, cache will be outdated
> and always get mismatch.
If userspace creates two vcpus with the same vcpu_id, and therefore
the same MPIDR value, that's userspace's problem. Don't do that.
Why should we do anything else?
M.
--
Without deviation from the norm, progress is not possible.
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: l00313349 <liting8@huawei.com>
Cc: <linux-arm-kernel@lists.infradead.org>, <kvmarm@lists.linux.dev>,
<oliver.upton@linux.dev>, <james.morse@arm.com>,
<suzuki.poulose@arm.com>, <yuzenghui@huawei.com>,
<catalin.marinas@arm.com>, <will@kernel.org>,
<zhengchuan@huawei.com>, <xiexiangyou@huawei.com>
Subject: Re: [PATCH] KVM: arm64: fix MPIDR to vcpu index cache to support vcpu change at runtime
Date: Wed, 29 Nov 2023 19:18:42 +0000 [thread overview]
Message-ID: <87il5k8j1p.wl-maz@kernel.org> (raw)
In-Reply-To: <20231128135402.1943-1-liting8@huawei.com>
On Tue, 28 Nov 2023 13:54:02 +0000,
l00313349 <liting8@huawei.com> wrote:
>
> From: Ting Li <liting8@huawei.com>
>
> Consider vcpu change at runtime, for example online_vcpus is 8,
> but only start 2 vcpu threads, MPIDR to vcpu index 0 may be overwrited
> and vm hangs. When start other vcpu threads, cache will be outdated
> and always get mismatch.
If userspace creates two vcpus with the same vcpu_id, and therefore
the same MPIDR value, that's userspace's problem. Don't do that.
Why should we do anything else?
M.
--
Without deviation from the norm, progress is not possible.
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2023-11-29 19:19 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-28 13:54 [PATCH] KVM: arm64: fix MPIDR to vcpu index cache to support vcpu change at runtime l00313349
2023-11-28 13:54 ` l00313349
2023-11-29 19:18 ` Marc Zyngier [this message]
2023-11-29 19:18 ` Marc Zyngier
2023-12-01 10:48 ` liting (Q)
2023-12-01 10:48 ` liting (Q)
2023-12-01 12:15 ` Marc Zyngier
2023-12-01 12:15 ` Marc Zyngier
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