From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 4/4] drm/i915: Expose SAGV state via debugfs
Date: Tue, 31 Jan 2023 09:29:24 +0200 [thread overview]
Message-ID: <87ilgn2mcr.fsf@intel.com> (raw)
In-Reply-To: <20230131002127.29305-4-ville.syrjala@linux.intel.com>
On Tue, 31 Jan 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Since SAGV is controlled via unidirectional pcode commands
> we have no way to query the current state. So instead let's
> expose the last programmed state via debugfs. This way we
> can at least know whether SAGV should be enabled or not
> (which can be important to know when dealing with underruns/etc.).
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> .../drm/i915/display/intel_display_debugfs.c | 2 +-
> drivers/gpu/drm/i915/display/skl_watermark.c | 31 ++++++++++++++++---
> drivers/gpu/drm/i915/display/skl_watermark.h | 2 +-
> 3 files changed, 28 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 7bcd90384a46..9e2fb8626c96 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -1622,7 +1622,7 @@ void intel_display_debugfs_register(struct drm_i915_private *i915)
> intel_dmc_debugfs_register(i915);
> intel_fbc_debugfs_register(i915);
> intel_hpd_debugfs_register(i915);
> - skl_watermark_ipc_debugfs_register(i915);
> + skl_watermark_debugfs_register(i915);
> }
>
> static int i915_panel_show(struct seq_file *m, void *data)
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 5916694f147c..022aed8dd440 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -3545,13 +3545,34 @@ static const struct file_operations skl_watermark_ipc_status_fops = {
> .write = skl_watermark_ipc_status_write
> };
>
> -void skl_watermark_ipc_debugfs_register(struct drm_i915_private *i915)
> +static int intel_sagv_status_show(struct seq_file *m, void *unused)
> +{
> + struct drm_i915_private *i915 = m->private;
> + static const char * const sagv_status[] = {
> + [I915_SAGV_UNKNOWN] = "unknown",
> + [I915_SAGV_DISABLED] = "disabled",
> + [I915_SAGV_ENABLED] = "enabled",
> + [I915_SAGV_NOT_CONTROLLED] = "not controlled",
> + };
> +
> + seq_printf(m, "SAGV available: %s\n", str_yes_no(intel_has_sagv(i915)));
> + seq_printf(m, "SAGV status: %s\n", sagv_status[i915->display.sagv.status]);
> + seq_printf(m, "SAGV block time: %d usec\n", i915->display.sagv.block_time_us);
> +
> + return 0;
> +}
> +
> +DEFINE_SHOW_ATTRIBUTE(intel_sagv_status);
> +
> +void skl_watermark_debugfs_register(struct drm_i915_private *i915)
> {
> struct drm_minor *minor = i915->drm.primary;
>
> - if (!HAS_IPC(i915))
> - return;
> + if (HAS_IPC(i915))
> + debugfs_create_file("i915_ipc_status", 0644, minor->debugfs_root, i915,
> + &skl_watermark_ipc_status_fops);
>
> - debugfs_create_file("i915_ipc_status", 0644, minor->debugfs_root, i915,
> - &skl_watermark_ipc_status_fops);
> + if (HAS_SAGV(i915))
> + debugfs_create_file("i915_sagv_status", 0444, minor->debugfs_root, i915,
> + &intel_sagv_status_fops);
> }
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.h b/drivers/gpu/drm/i915/display/skl_watermark.h
> index 37954c472070..1f81e1a5a4a3 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.h
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.h
> @@ -47,7 +47,7 @@ void intel_wm_state_verify(struct intel_crtc *crtc,
> void skl_watermark_ipc_init(struct drm_i915_private *i915);
> void skl_watermark_ipc_update(struct drm_i915_private *i915);
> bool skl_watermark_ipc_enabled(struct drm_i915_private *i915);
> -void skl_watermark_ipc_debugfs_register(struct drm_i915_private *i915);
> +void skl_watermark_debugfs_register(struct drm_i915_private *i915);
>
> void skl_wm_init(struct drm_i915_private *i915);
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2023-01-31 7:29 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-31 0:21 [Intel-gfx] [PATCH 1/4] drm/i915: Don't do the WM0->WM1 copy w/a if WM1 is already enabled Ville Syrjala
2023-01-31 0:21 ` [Intel-gfx] [PATCH 2/4] drm/i915: Introduce HAS_SAGV() Ville Syrjala
2023-01-31 7:27 ` Jani Nikula
2023-01-31 0:21 ` [Intel-gfx] [PATCH 3/4] drm/i915: Keep sagv status updated on icl+ Ville Syrjala
2023-02-01 17:57 ` Lisovskiy, Stanislav
2023-01-31 0:21 ` [Intel-gfx] [PATCH 4/4] drm/i915: Expose SAGV state via debugfs Ville Syrjala
2023-01-31 7:29 ` Jani Nikula [this message]
2023-01-31 0:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: Don't do the WM0->WM1 copy w/a if WM1 is already enabled Patchwork
2023-01-31 1:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-01-31 7:32 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-02-01 17:56 ` [Intel-gfx] [PATCH 1/4] " Lisovskiy, Stanislav
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