From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 2/4] drm/i915: Introduce HAS_SAGV()
Date: Tue, 31 Jan 2023 09:27:36 +0200 [thread overview]
Message-ID: <87lelj2mfr.fsf@intel.com> (raw)
In-Reply-To: <20230131002127.29305-2-ville.syrjala@linux.intel.com>
On Tue, 31 Jan 2023, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Introuce a HAS_SAGV() macro to answer the question whether
> the platform in general supports SAGV. intel_has_sagv() will
> keep on giving us the more specific answer whether the current
> device supports SAGV or not.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/skl_watermark.c | 6 +++---
> drivers/gpu/drm/i915/i915_drv.h | 3 ++-
> 2 files changed, 5 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
> index 0c605034356f..5916694f147c 100644
> --- a/drivers/gpu/drm/i915/display/skl_watermark.c
> +++ b/drivers/gpu/drm/i915/display/skl_watermark.c
> @@ -64,7 +64,7 @@ static bool skl_needs_memory_bw_wa(struct drm_i915_private *i915)
> static bool
> intel_has_sagv(struct drm_i915_private *i915)
> {
> - return DISPLAY_VER(i915) >= 9 && !IS_LP(i915) &&
> + return HAS_SAGV(i915) &&
> i915->display.sagv.status != I915_SAGV_NOT_CONTROLLED;
> }
>
> @@ -92,7 +92,7 @@ intel_sagv_block_time(struct drm_i915_private *i915)
> return val;
> } else if (DISPLAY_VER(i915) == 11) {
> return 10;
> - } else if (DISPLAY_VER(i915) == 9 && !IS_LP(i915)) {
> + } else if (HAS_SAGV(i915)) {
> return 30;
> } else {
> return 0;
> @@ -101,7 +101,7 @@ intel_sagv_block_time(struct drm_i915_private *i915)
>
> static void intel_sagv_init(struct drm_i915_private *i915)
> {
> - if (!intel_has_sagv(i915))
> + if (!HAS_SAGV(i915))
> i915->display.sagv.status = I915_SAGV_NOT_CONTROLLED;
>
> /*
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a0dcf3352b66..0393273faa09 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -863,7 +863,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> */
> #define HAS_64K_PAGES(dev_priv) (INTEL_INFO(dev_priv)->has_64k_pages)
>
> -#define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc)
> +#define HAS_IPC(dev_priv) (INTEL_INFO(dev_priv)->display.has_ipc)
> +#define HAS_SAGV(dev_priv) (DISPLAY_VER(dev_priv) >= 9 && !IS_LP(dev_priv))
>
> #define HAS_REGION(i915, i) (RUNTIME_INFO(i915)->memory_regions & (i))
> #define HAS_LMEM(i915) HAS_REGION(i915, REGION_LMEM)
--
Jani Nikula, Intel Open Source Graphics Center
next prev parent reply other threads:[~2023-01-31 7:27 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-31 0:21 [Intel-gfx] [PATCH 1/4] drm/i915: Don't do the WM0->WM1 copy w/a if WM1 is already enabled Ville Syrjala
2023-01-31 0:21 ` [Intel-gfx] [PATCH 2/4] drm/i915: Introduce HAS_SAGV() Ville Syrjala
2023-01-31 7:27 ` Jani Nikula [this message]
2023-01-31 0:21 ` [Intel-gfx] [PATCH 3/4] drm/i915: Keep sagv status updated on icl+ Ville Syrjala
2023-02-01 17:57 ` Lisovskiy, Stanislav
2023-01-31 0:21 ` [Intel-gfx] [PATCH 4/4] drm/i915: Expose SAGV state via debugfs Ville Syrjala
2023-01-31 7:29 ` Jani Nikula
2023-01-31 0:57 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/4] drm/i915: Don't do the WM0->WM1 copy w/a if WM1 is already enabled Patchwork
2023-01-31 1:10 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-01-31 7:32 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2023-02-01 17:56 ` [Intel-gfx] [PATCH 1/4] " Lisovskiy, Stanislav
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