All of lore.kernel.org
 help / color / mirror / Atom feed
From: Marc Zyngier <maz@kernel.org>
To: "Pali Rohár" <pali@kernel.org>
Cc: linux-pci@vger.kernel.org, "Marek Behún" <kabel@kernel.org>
Subject: Re: Interrupts in pci-aardvark
Date: Tue, 30 Mar 2021 14:21:47 +0100	[thread overview]
Message-ID: <87im58rd3o.wl-maz@kernel.org> (raw)
In-Reply-To: <20210328140912.k33qqfpkizdtlrcp@pali>

On Sun, 28 Mar 2021 15:09:12 +0100,
Pali Rohár <pali@kernel.org> wrote:

[...]

> Aardvark HW allows to mask summary TOP, summary CORE, individual CORE
> (PME, ERR, INTA, INTB, ...), summary MSI and individual MSI bits
> interrupts, but not final 16 bit MSI interrupt number. MSI bits are low
> 5 bits of 16 bit interrupt number. So it is not possible to mask or
> unmask MSI interrupt number X. It is possible to only mask/unmask all
> MSI interrupts which low 5 bits is specific value.

If you cannot mask individual MSIs, you have two choices:

- you only support MSI-X *or* MSI (not multi-MSI) and mask interrupts
  at the device level

- you restrict the number of MSIs to those you can actually control,
  and that's 2^5 = 32 (which is what the driver currently supports, I
  believe).

> 
> Also aardvark HW allows to globally enable / disable processing of MSI
> interrupts. Masking summary MSI interrupt just cause that GIC does not
> trigger it but from registers I can read it (e.g. when GIC calls
> aardvark interrupt handler for other non-MSI interrupt).
> 
> And I would like to ask, what is in this hierarchy from kernel point of
> view "bottom part of MSI" and what is the "upper part of MSI"? As in
> above diagram there are 3 MSI layers.

The upper part is the bus-specific part, PCI in your case. You don't
need to implement it.

The bottom part controls the HW, and deals with all the masking,
acknoledgement, allocation and demuxing.

> And which irq enable/disable/mask/unmask/ack callbacks I need to
> implement for legacy irq, bottom MSI and upper MSI domains?

You need to provide what makes sense for your HW. I would guess that
you need at least mask/unmask and most probably ack at both levels,
and of course a compose_msg callback at the bottom level.

> And where should I add code which globally enable/disable receiving of
> aardvark MSI interrupts? Currently it is part of aardvark driver probe
> function.

Seems like the logical place to put it. The kernel deals with
individual interrupts, and not with global switches.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.

  reply	other threads:[~2021-03-30 13:22 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-28 14:09 Interrupts in pci-aardvark Pali Rohár
2021-03-30 13:21 ` Marc Zyngier [this message]
2021-03-31  9:56   ` Pali Rohár
2021-03-31 10:25     ` Marc Zyngier
2021-03-31 11:03       ` Pali Rohár
2021-03-31 15:33         ` Marc Zyngier
2021-03-31 11:18 ` Pali Rohár

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87im58rd3o.wl-maz@kernel.org \
    --to=maz@kernel.org \
    --cc=kabel@kernel.org \
    --cc=linux-pci@vger.kernel.org \
    --cc=pali@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.