From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [Intel-gfx] [PATCH 01/21] drm/i915/gt: Mark legacy ring context as lost
Date: Thu, 10 Dec 2020 18:39:56 +0200 [thread overview]
Message-ID: <87im99lin7.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <20201210080240.24529-1-chris@chris-wilson.co.uk>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> When we reset the legacy ring context, due to potential corruption over
> suspend/resume, remove the valid bit so that we avoid loading garbage.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_ring_submission.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_ring_submission.c b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
> index a41b43f445b8..1959e3e5b8e9 100644
> --- a/drivers/gpu/drm/i915/gt/intel_ring_submission.c
> +++ b/drivers/gpu/drm/i915/gt/intel_ring_submission.c
> @@ -602,6 +602,7 @@ static int ring_context_pin(struct intel_context *ce, void *unused)
> static void ring_context_reset(struct intel_context *ce)
> {
> intel_ring_reset(ce->ring, ce->ring->emit);
> + __clear_bit(CONTEXT_VALID_BIT, &ce->flags);
> }
>
> static const struct intel_context_ops ring_context_ops = {
> --
> 2.20.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-12-10 16:42 UTC|newest]
Thread overview: 38+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-10 8:02 [Intel-gfx] [PATCH 01/21] drm/i915/gt: Mark legacy ring context as lost Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 02/21] drm/i915/gt: Wean workaround selftests off GEM context Chris Wilson
2020-12-10 17:04 ` Mika Kuoppala
2020-12-10 8:02 ` [Intel-gfx] [PATCH 03/21] drm/i915/gt: Replace direct submit with direct call to tasklet Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 04/21] drm/i915/gt: Use virtual_engine during execlists_dequeue Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 05/21] drm/i915/gt: Decouple inflight virtual engines Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 06/21] drm/i915/gt: Defer schedule_out until after the next dequeue Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 07/21] drm/i915/gt: Remove virtual breadcrumb before transfer Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 08/21] drm/i915/gt: Shrink the critical section for irq signaling Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 09/21] drm/i915/gt: Resubmit the virtual engine on schedule-out Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 10/21] drm/i915/gt: Simplify virtual engine handling for execlists_hold() Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 11/21] drm/i915/gt: ce->inflight updates are now serialised Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 12/21] drm/i915/gem: Drop free_work for GEM contexts Chris Wilson
2020-12-10 18:50 ` Matthew Brost
2020-12-10 8:02 ` [Intel-gfx] [PATCH 13/21] drm/i915/gt: Track the overall awake/busy time Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 14/21] drm/i915: Encode fence specific waitqueue behaviour into the wait.flags Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 15/21] drm/i915/gt: Track all timelines created using the HWSP Chris Wilson
2020-12-10 18:28 ` Matthew Brost
2020-12-10 8:02 ` [Intel-gfx] [PATCH 16/21] drm/i915/gt: Wrap intel_timeline.has_initial_breadcrumb Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 17/21] drm/i915/gt: Track timeline GGTT offset separately from subpage offset Chris Wilson
2020-12-10 21:37 ` Matthew Brost
2020-12-10 8:02 ` [Intel-gfx] [PATCH 18/21] drm/i915/gt: Add timeline "mode" Chris Wilson
2020-12-10 19:28 ` Matthew Brost
2020-12-10 21:00 ` Chris Wilson
2020-12-10 21:18 ` Matthew Brost
2020-12-10 8:02 ` [Intel-gfx] [PATCH 19/21] drm/i915/gt: Use indices for writing into relative timelines Chris Wilson
2020-12-10 19:16 ` Matthew Brost
2020-12-10 21:05 ` Chris Wilson
2020-12-10 21:51 ` Matthew Brost
2020-12-10 8:02 ` [Intel-gfx] [PATCH 20/21] drm/i915/selftests: Exercise relative timeline modes Chris Wilson
2020-12-10 8:02 ` [Intel-gfx] [PATCH 21/21] drm/i915/gt: Use ppHWSP for unshared non-semaphore related timelines Chris Wilson
2020-12-10 21:28 ` Matthew Brost
2020-12-10 8:31 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/21] drm/i915/gt: Mark legacy ring context as lost Patchwork
2020-12-10 8:34 ` [Intel-gfx] ✗ Fi.CI.DOCS: " Patchwork
2020-12-10 8:59 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-10 12:18 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-12-10 16:39 ` Mika Kuoppala [this message]
2020-12-10 17:04 ` [Intel-gfx] [PATCH 01/21] " Matthew Brost
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87im99lin7.fsf@gaia.fi.intel.com \
--to=mika.kuoppala@linux.intel.com \
--cc=chris@chris-wilson.co.uk \
--cc=intel-gfx@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.