[PATCH v2 0/2] Update 64-bit DT with new NAND controller bindings

[PATCH v2 0/2] Update 64-bit DT with new NAND controller bindings

[Miquel Raynal]

Hello,

These two patches have already been submitted and accepted by Gregory
and were stacked for 4.17. But since then a small modification happened
due to a request from Rob Herring. Also, armada-cp110-[master/slave].dtsi
files became armada-cp110.dtsi due to the DT de-duplication work from
Thomas Petazzoni. This small series should replace the two patches
laying in the mvebu tree and should apply cleanly.

Thank you,
Miquèl

Changes since v1:
  - Renamed a NAND property: s/marvell,rb/nand-rb/ which is already
    documented.
  - Rebased on v4.16-rc1.

Miquel Raynal (2):
  arm64: dts: marvell: use reworked NAND controller driver on Armada 7K
  arm64: dts: marvell: use reworked NAND controller driver on Armada 8K

 arch/arm64/boot/dts/marvell/armada-7040-db.dts | 50 ++++++++++++++++----------
 arch/arm64/boot/dts/marvell/armada-8040-db.dts | 44 +++++++++++++----------
 arch/arm64/boot/dts/marvell/armada-cp110.dtsi  |  8 ++---
 3 files changed, 61 insertions(+), 41 deletions(-)

-- 
2.14.1

[PATCH v2 0/2] Update 64-bit DT with new NAND controller bindings

[Miquel Raynal]

Hello,

These two patches have already been submitted and accepted by Gregory
and were stacked for 4.17. But since then a small modification happened
due to a request from Rob Herring. Also, armada-cp110-[master/slave].dtsi
files became armada-cp110.dtsi due to the DT de-duplication work from
Thomas Petazzoni. This small series should replace the two patches
laying in the mvebu tree and should apply cleanly.

Thank you,
Miquèl

Changes since v1:
  - Renamed a NAND property: s/marvell,rb/nand-rb/ which is already
    documented.
  - Rebased on v4.16-rc1.

Miquel Raynal (2):
  arm64: dts: marvell: use reworked NAND controller driver on Armada 7K
  arm64: dts: marvell: use reworked NAND controller driver on Armada 8K

 arch/arm64/boot/dts/marvell/armada-7040-db.dts | 50 ++++++++++++++++----------
 arch/arm64/boot/dts/marvell/armada-8040-db.dts | 44 +++++++++++++----------
 arch/arm64/boot/dts/marvell/armada-cp110.dtsi  |  8 ++---
 3 files changed, 61 insertions(+), 41 deletions(-)

-- 
2.14.1

[PATCH v2 1/2] arm64: dts: marvell: use reworked NAND controller driver on Armada 7K

[Miquel Raynal]

Use the new bindings of the reworked Marvell NAND controller driver.
Also adapt the nand controller node organization to distinguish which
property is relevant for the controller, and which one is NAND chip
specific. Expose the partitions as a subnode of the NAND chip.

Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
the driver activates the arbiter by default for all boards (either
needed or harmless).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 arch/arm64/boot/dts/marvell/armada-7040-db.dts | 50 ++++++++++++++++----------
 arch/arm64/boot/dts/marvell/armada-cp110.dtsi  |  8 ++---
 2 files changed, 35 insertions(+), 23 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
index 3ae05eee2c9a..225da3f33a72 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
@@ -162,36 +162,48 @@
 	};
 };
 
-&cp0_nand {
+&cp0_nand_controller {
 	/*
 	 * SPI on CPM and NAND have common pins on this board. We can
-	 * use only one at a time. To enable the NAND (whihch will
+	 * use only one at a time. To enable the NAND (which will
 	 * disable the SPI), the "status = "okay";" line have to be
 	 * added here.
 	 */
-	num-cs = <1>;
 	pinctrl-0 = <&nand_pins>, <&nand_rb>;
 	pinctrl-names = "default";
-	nand-ecc-strength = <4>;
-	nand-ecc-step-size = <512>;
-	marvell,nand-enable-arbiter;
-	nand-on-flash-bbt;
 
-	partition@0 {
-		label = "U-Boot";
-		reg = <0 0x200000>;
-	};
-	partition@200000 {
-		label = "Linux";
-		reg = <0x200000 0xe00000>;
-	};
-	partition@1000000 {
-		label = "Filesystem";
-		reg = <0x1000000 0x3f000000>;
+	nand@0 {
+		reg = <0>;
+		label = "pxa3xx_nand-0";
+		nand-rb = <0>;
+		nand-on-flash-bbt;
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "U-Boot";
+				reg = <0 0x200000>;
+			};
+
+			partition@200000 {
+				label = "Linux";
+				reg = <0x200000 0xe00000>;
+			};
+
+			partition@1000000 {
+				label = "Filesystem";
+				reg = <0x1000000 0x3f000000>;
+			};
+
+		};
 	};
 };
 
-
 &cp0_spi1 {
 	status = "okay";
 
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
index a8af4136dbe7..d65e1da10825 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
@@ -290,17 +290,17 @@
 			status = "disabled";
 		};
 
-		CP110_LABEL(nand): nand@720000 {
+		CP110_LABEL(nand_controller): nand@720000 {
 			/*
 			* Due to the limitation of the pins available
 			* this controller is only usable on the CPM
 			* for A7K and on the CPS for A8K.
 			*/
-			compatible = "marvell,armada-8k-nand",
-			"marvell,armada370-nand";
+			compatible = "marvell,armada-8k-nand-controller",
+				"marvell,armada370-nand-controller";
 			reg = <0x720000 0x54>;
 			#address-cells = <1>;
-			#size-cells = <1>;
+			#size-cells = <0>;
 			interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&CP110_LABEL(clk) 1 2>;
 			marvell,system-controller = <&CP110_LABEL(syscon0)>;
-- 
2.14.1

[PATCH v2 1/2] arm64: dts: marvell: use reworked NAND controller driver on Armada 7K

[Miquel Raynal]

Use the new bindings of the reworked Marvell NAND controller driver.
Also adapt the nand controller node organization to distinguish which
property is relevant for the controller, and which one is NAND chip
specific. Expose the partitions as a subnode of the NAND chip.

Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
the driver activates the arbiter by default for all boards (either
needed or harmless).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 arch/arm64/boot/dts/marvell/armada-7040-db.dts | 50 ++++++++++++++++----------
 arch/arm64/boot/dts/marvell/armada-cp110.dtsi  |  8 ++---
 2 files changed, 35 insertions(+), 23 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
index 3ae05eee2c9a..225da3f33a72 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
@@ -162,36 +162,48 @@
 	};
 };
 
-&cp0_nand {
+&cp0_nand_controller {
 	/*
 	 * SPI on CPM and NAND have common pins on this board. We can
-	 * use only one at a time. To enable the NAND (whihch will
+	 * use only one at a time. To enable the NAND (which will
 	 * disable the SPI), the "status = "okay";" line have to be
 	 * added here.
 	 */
-	num-cs = <1>;
 	pinctrl-0 = <&nand_pins>, <&nand_rb>;
 	pinctrl-names = "default";
-	nand-ecc-strength = <4>;
-	nand-ecc-step-size = <512>;
-	marvell,nand-enable-arbiter;
-	nand-on-flash-bbt;
 
-	partition@0 {
-		label = "U-Boot";
-		reg = <0 0x200000>;
-	};
-	partition@200000 {
-		label = "Linux";
-		reg = <0x200000 0xe00000>;
-	};
-	partition@1000000 {
-		label = "Filesystem";
-		reg = <0x1000000 0x3f000000>;
+	nand@0 {
+		reg = <0>;
+		label = "pxa3xx_nand-0";
+		nand-rb = <0>;
+		nand-on-flash-bbt;
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "U-Boot";
+				reg = <0 0x200000>;
+			};
+
+			partition@200000 {
+				label = "Linux";
+				reg = <0x200000 0xe00000>;
+			};
+
+			partition@1000000 {
+				label = "Filesystem";
+				reg = <0x1000000 0x3f000000>;
+			};
+
+		};
 	};
 };
 
-
 &cp0_spi1 {
 	status = "okay";
 
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
index a8af4136dbe7..d65e1da10825 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi
@@ -290,17 +290,17 @@
 			status = "disabled";
 		};
 
-		CP110_LABEL(nand): nand@720000 {
+		CP110_LABEL(nand_controller): nand@720000 {
 			/*
 			* Due to the limitation of the pins available
 			* this controller is only usable on the CPM
 			* for A7K and on the CPS for A8K.
 			*/
-			compatible = "marvell,armada-8k-nand",
-			"marvell,armada370-nand";
+			compatible = "marvell,armada-8k-nand-controller",
+				"marvell,armada370-nand-controller";
 			reg = <0x720000 0x54>;
 			#address-cells = <1>;
-			#size-cells = <1>;
+			#size-cells = <0>;
 			interrupts = <ICU_GRP_NSR 115 IRQ_TYPE_LEVEL_HIGH>;
 			clocks = <&CP110_LABEL(clk) 1 2>;
 			marvell,system-controller = <&CP110_LABEL(syscon0)>;
-- 
2.14.1

[PATCH v2 2/2] arm64: dts: marvell: use reworked NAND controller driver on Armada 8K

[Miquel Raynal]

Use the new bindings of the reworked Marvell NAND controller driver.
Also adapt the nand controller node organization to distinguish which
property is relevant for the controller, and which one is NAND chip
specific. Expose the partitions as a subnode of the NAND chip.

Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
the driver activates the arbiter by default for all boards (either
needed or harmless).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 arch/arm64/boot/dts/marvell/armada-8040-db.dts | 44 +++++++++++++++-----------
 1 file changed, 26 insertions(+), 18 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
index dba55baff20f..fecd455ca047 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
@@ -279,27 +279,35 @@
  * Proper NAND usage will require DPR-76 to be in position 1-2, which disables
  * MDIO signal of CP1.
  */
-&cp1_nand {
-	num-cs = <1>;
+&cp1_nand_controller {
 	pinctrl-0 = <&nand_pins>, <&nand_rb>;
 	pinctrl-names = "default";
-	nand-ecc-strength = <4>;
-	nand-ecc-step-size = <512>;
-	marvell,nand-enable-arbiter;
-	marvell,system-controller = <&cp1_syscon0>;
-	nand-on-flash-bbt;
 
-	partition@0 {
-		label = "U-Boot";
-		reg = <0 0x200000>;
-	};
-	partition@200000 {
-		label = "Linux";
-		reg = <0x200000 0xe00000>;
-	};
-	partition@1000000 {
-		label = "Filesystem";
-		reg = <0x1000000 0x3f000000>;
+	nand@0 {
+		reg = <0>;
+		nand-rb = <0>;
+		nand-on-flash-bbt;
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "U-Boot";
+				reg = <0 0x200000>;
+			};
+			partition@200000 {
+				label = "Linux";
+				reg = <0x200000 0xe00000>;
+			};
+			partition@1000000 {
+				label = "Filesystem";
+				reg = <0x1000000 0x3f000000>;
+			};
+		};
 	};
 };
 
-- 
2.14.1

[PATCH v2 2/2] arm64: dts: marvell: use reworked NAND controller driver on Armada 8K

[Miquel Raynal]

Use the new bindings of the reworked Marvell NAND controller driver.
Also adapt the nand controller node organization to distinguish which
property is relevant for the controller, and which one is NAND chip
specific. Expose the partitions as a subnode of the NAND chip.

Remove the 'marvell,nand-enable-arbiter' property, not needed anymore as
the driver activates the arbiter by default for all boards (either
needed or harmless).

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
 arch/arm64/boot/dts/marvell/armada-8040-db.dts | 44 +++++++++++++++-----------
 1 file changed, 26 insertions(+), 18 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
index dba55baff20f..fecd455ca047 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts
@@ -279,27 +279,35 @@
  * Proper NAND usage will require DPR-76 to be in position 1-2, which disables
  * MDIO signal of CP1.
  */
-&cp1_nand {
-	num-cs = <1>;
+&cp1_nand_controller {
 	pinctrl-0 = <&nand_pins>, <&nand_rb>;
 	pinctrl-names = "default";
-	nand-ecc-strength = <4>;
-	nand-ecc-step-size = <512>;
-	marvell,nand-enable-arbiter;
-	marvell,system-controller = <&cp1_syscon0>;
-	nand-on-flash-bbt;
 
-	partition@0 {
-		label = "U-Boot";
-		reg = <0 0x200000>;
-	};
-	partition@200000 {
-		label = "Linux";
-		reg = <0x200000 0xe00000>;
-	};
-	partition@1000000 {
-		label = "Filesystem";
-		reg = <0x1000000 0x3f000000>;
+	nand@0 {
+		reg = <0>;
+		nand-rb = <0>;
+		nand-on-flash-bbt;
+		nand-ecc-strength = <4>;
+		nand-ecc-step-size = <512>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "U-Boot";
+				reg = <0 0x200000>;
+			};
+			partition@200000 {
+				label = "Linux";
+				reg = <0x200000 0xe00000>;
+			};
+			partition@1000000 {
+				label = "Filesystem";
+				reg = <0x1000000 0x3f000000>;
+			};
+		};
 	};
 };
 
-- 
2.14.1

Re: [PATCH v2 0/2] Update 64-bit DT with new NAND controller bindings

[Gregory CLEMENT]

Hi Miquel,
 
 On lun., févr. 19 2018, Miquel Raynal <miquel.raynal@bootlin.com> wrote:

> Hello,
>
> These two patches have already been submitted and accepted by Gregory
> and were stacked for 4.17. But since then a small modification happened
> due to a request from Rob Herring. Also, armada-cp110-[master/slave].dtsi
> files became armada-cp110.dtsi due to the DT de-duplication work from
> Thomas Petazzoni. This small series should replace the two patches
> laying in the mvebu tree and should apply cleanly.
>
> Thank you,
> Miquèl
>
> Changes since v1:
>   - Renamed a NAND property: s/marvell,rb/nand-rb/ which is already
>     documented.
>   - Rebased on v4.16-rc1.
>
> Miquel Raynal (2):
>   arm64: dts: marvell: use reworked NAND controller driver on Armada 7K
>   arm64: dts: marvell: use reworked NAND controller driver on Armada 8K


Both applied on mvebu/dt64

Thanks,

Gregory

>
>  arch/arm64/boot/dts/marvell/armada-7040-db.dts | 50 ++++++++++++++++----------
>  arch/arm64/boot/dts/marvell/armada-8040-db.dts | 44 +++++++++++++----------
>  arch/arm64/boot/dts/marvell/armada-cp110.dtsi  |  8 ++---
>  3 files changed, 61 insertions(+), 41 deletions(-)
>
> -- 
> 2.14.1
>

-- 
Gregory Clement, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com

Re: [PATCH v2 0/2] Update 64-bit DT with new NAND controller bindings

[Gregory CLEMENT]

Hi Miquel,
 
 On lun., févr. 19 2018, Miquel Raynal <miquel.raynal@bootlin.com> wrote:

> Hello,
>
> These two patches have already been submitted and accepted by Gregory
> and were stacked for 4.17. But since then a small modification happened
> due to a request from Rob Herring. Also, armada-cp110-[master/slave].dtsi
> files became armada-cp110.dtsi due to the DT de-duplication work from
> Thomas Petazzoni. This small series should replace the two patches
> laying in the mvebu tree and should apply cleanly.
>
> Thank you,
> Miquèl
>
> Changes since v1:
>   - Renamed a NAND property: s/marvell,rb/nand-rb/ which is already
>     documented.
>   - Rebased on v4.16-rc1.
>
> Miquel Raynal (2):
>   arm64: dts: marvell: use reworked NAND controller driver on Armada 7K
>   arm64: dts: marvell: use reworked NAND controller driver on Armada 8K


Both applied on mvebu/dt64

Thanks,

Gregory

>
>  arch/arm64/boot/dts/marvell/armada-7040-db.dts | 50 ++++++++++++++++----------
>  arch/arm64/boot/dts/marvell/armada-8040-db.dts | 44 +++++++++++++----------
>  arch/arm64/boot/dts/marvell/armada-cp110.dtsi  |  8 ++---
>  3 files changed, 61 insertions(+), 41 deletions(-)
>
> -- 
> 2.14.1
>

-- 
Gregory Clement, Bootlin (formerly Free Electrons)
Embedded Linux and Kernel engineering
http://bootlin.com

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