From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: deepak.s@linux.intel.com, intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 2/7] drm/i915: Add RP0/RP1/RPn render P state thresholds in VLV sysfs
Date: Fri, 11 Jul 2014 17:44:35 +0300 [thread overview]
Message-ID: <87ion4j6p8.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <1404978387-28180-3-git-send-email-deepak.s@linux.intel.com>
deepak.s@linux.intel.com writes:
> From: Deepak S <deepak.s@linux.intel.com>
>
> This is useful for userspace utilities to verify and micromanaging the
> increase/decrease frequncy.
>
> Signed-off-by: Deepak S <deepak.s@linux.intel.com>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> ---
> drivers/gpu/drm/i915/i915_sysfs.c | 18 +++++++++++++++---
> 1 file changed, 15 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c b/drivers/gpu/drm/i915/i915_sysfs.c
> index 86ce39a..b15c8ce 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -461,11 +461,20 @@ static ssize_t gt_rp_mhz_show(struct device *kdev, struct device_attribute *attr
> mutex_unlock(&dev->struct_mutex);
>
> if (attr == &dev_attr_gt_RP0_freq_mhz) {
> - val = ((rp_state_cap & 0x0000ff) >> 0) * GT_FREQUENCY_MULTIPLIER;
> + if (IS_VALLEYVIEW(dev))
> + val = vlv_gpu_freq(dev_priv, dev_priv->rps.rp0_freq);
> + else
> + val = ((rp_state_cap & 0x0000ff) >> 0) * GT_FREQUENCY_MULTIPLIER;
> } else if (attr == &dev_attr_gt_RP1_freq_mhz) {
> - val = ((rp_state_cap & 0x00ff00) >> 8) * GT_FREQUENCY_MULTIPLIER;
> + if (IS_VALLEYVIEW(dev))
> + val = vlv_gpu_freq(dev_priv, dev_priv->rps.rp1_freq);
> + else
> + val = ((rp_state_cap & 0x00ff00) >> 8) * GT_FREQUENCY_MULTIPLIER;
> } else if (attr == &dev_attr_gt_RPn_freq_mhz) {
> - val = ((rp_state_cap & 0xff0000) >> 16) * GT_FREQUENCY_MULTIPLIER;
> + if (IS_VALLEYVIEW(dev))
> + val = vlv_gpu_freq(dev_priv, dev_priv->rps.min_freq);
> + else
> + val = ((rp_state_cap & 0xff0000) >> 16) * GT_FREQUENCY_MULTIPLIER;
> } else {
> BUG();
> }
> @@ -486,6 +495,9 @@ static const struct attribute *vlv_attrs[] = {
> &dev_attr_gt_cur_freq_mhz.attr,
> &dev_attr_gt_max_freq_mhz.attr,
> &dev_attr_gt_min_freq_mhz.attr,
> + &dev_attr_gt_RP0_freq_mhz.attr,
> + &dev_attr_gt_RP1_freq_mhz.attr,
> + &dev_attr_gt_RPn_freq_mhz.attr,
> &dev_attr_vlv_rpe_freq_mhz.attr,
> NULL,
> };
> --
> 1.9.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2014-07-11 14:44 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-07-10 7:46 [PATCH 0/7] Enable RP1/RPn/RP0 sysfs and enable CHV PM interrupt deepak.s
2014-07-10 7:46 ` [PATCH 1/7] drm/i915: Read guaranteed freq for valleyview deepak.s
2014-07-11 14:42 ` Mika Kuoppala
2014-07-11 15:56 ` Daniel Vetter
2014-07-10 7:46 ` [PATCH 2/7] drm/i915: Add RP0/RP1/RPn render P state thresholds in VLV sysfs deepak.s
2014-07-11 14:44 ` Mika Kuoppala [this message]
2014-07-11 16:00 ` Daniel Vetter
2014-07-10 7:46 ` [PATCH 3/7] drm/i915: keep freq/opcode conversion function more generic deepak.s
2014-07-09 12:03 ` Daniel Vetter
2014-07-11 4:26 ` Deepak S
2014-07-10 6:28 ` Daniel Vetter
2014-07-11 6:50 ` Deepak S
2014-07-10 7:46 ` [PATCH 4/7] drm/i915: populate mem_freq/cz_clock for chv deepak.s
2014-07-11 14:50 ` Mika Kuoppala
2014-07-10 7:46 ` [PATCH 5/7] drm/i915: CHV GPU frequency to opcode functions deepak.s
2014-07-10 7:46 ` [PATCH 6/7] drm/i915/chv: Add basic PM interrupt support for CHV deepak.s
2014-07-11 15:03 ` Mika Kuoppala
2014-07-10 7:46 ` [PATCH 7/7] drm/i915: Add RP1 render P state thresholds in CHV deepak.s
2014-07-12 9:24 ` [PATCH v2 1/3] drm/i915: CHV GPU frequency to opcode functions deepak.s
2014-07-11 15:53 ` Mika Kuoppala
2014-07-11 15:58 ` Daniel Vetter
2014-07-12 13:16 ` [PATCH v2] drm/i915: Add RP1 render P state thresholds in CHV deepak.s
2014-07-11 16:07 ` Mika Kuoppala
2014-07-11 16:22 ` Daniel Vetter
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