From: Kevin Hilman <khilman@ti.com>
To: Jean Pihet <jean.pihet@newoldbits.com>
Cc: Grazvydas Ignotas <notasas@gmail.com>,
linux-omap@vger.kernel.org, Jean Pihet <j-pihet@ti.com>
Subject: Re: [PATCH 0/3] ARM: OMAP3: PM: optimize cpuidle C1 state latency
Date: Fri, 01 Jun 2012 09:26:05 -0700 [thread overview]
Message-ID: <87ipfbt2w2.fsf@ti.com> (raw)
In-Reply-To: <1338563468-31403-1-git-send-email-j-pihet@ti.com> (Jean Pihet's message of "Fri, 1 Jun 2012 17:11:05 +0200")
Hi Jean,
Jean Pihet <jean.pihet@newoldbits.com> writes:
> The C1 state latency can be improved by optimizing the cpuidle low
> level code.
>
> The first patch is a precaution fix for patch 2.
> Patches 2 & 3 are optimization changes.
>
> Rebased on top of the for_3.6/pm/performance branch of
> khilman's tree [1].
>
> Tested on Beagleboard using a DMA-enabled copy from NAND flash
> to /dev/null.
Thanks for following this through.
Adding this series to my for_3.6/pm/performance branch.
Also FYI, combining your series with the various fixes for CORE
retention, I'm seeing CORE hit retention in idle just fine on 3430/n900
and 3530/Overo.
Thanks!
Kevin
next prev parent reply other threads:[~2012-06-01 16:26 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-06-01 15:11 [PATCH 0/3] ARM: OMAP3: PM: optimize cpuidle C1 state latency Jean Pihet
2012-06-01 15:11 ` [PATCH 1/3] ARM: OMAP3: PM: cpuidle: default to C1 in next_valid_state Jean Pihet
2012-06-01 15:11 ` [PATCH 2/3] ARM: OMAP3: PM: cpuidle: optimize the PER latency in C1 state Jean Pihet
2012-06-01 15:11 ` [PATCH 3/3] ARM: OMAP3: PM: cpuidle: optimize the clkdm idle " Jean Pihet
2012-06-20 8:19 ` Rajendra Nayak
2012-06-20 8:31 ` Jean Pihet
2012-06-20 8:46 ` Rajendra Nayak
2012-06-20 8:52 ` Rajendra Nayak
2012-06-20 8:57 ` Rajendra Nayak
2012-06-20 11:34 ` Jean Pihet
2012-06-28 18:03 ` Kevin Hilman
2012-06-01 16:26 ` Kevin Hilman [this message]
2012-06-01 16:29 ` [PATCH 0/3] ARM: OMAP3: PM: optimize cpuidle C1 state latency Jean Pihet
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