From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Lucas De Marchi <lucas.demarchi@intel.com>,
Matt Roper <matthew.d.roper@intel.com>,
stable@vger.kernel.org
Subject: Re: [PATCH] drm/i915: fix display ver 12-13 fault error handling
Date: Fri, 08 Dec 2023 13:28:24 +0200 [thread overview]
Message-ID: <87jzppyluv.fsf@intel.com> (raw)
In-Reply-To: <20231208112008.2904497-1-jani.nikula@intel.com>
On Fri, 08 Dec 2023, Jani Nikula <jani.nikula@intel.com> wrote:
> Unless I'm completely misreading the bspec, there are no defined bits
> for plane gtt fault errors in DE PIPE IIR for a display versions
> 12-14. This would explain why DG2 in the linked bug is getting thousands
> of fault errors.
>
> Bspec: 50335
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9769
Okay, looking at the bug, this seems optimistic, but it might clear the
ratelimited fault errors.
> Fixes: 99e2d8bcb887 ("drm/i915/rkl: Limit number of universal planes to 5")
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: <stable@vger.kernel.org> # v5.9+
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 4 +++-
> drivers/gpu/drm/i915/i915_reg.h | 3 ++-
> 2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index f8ed53f30b2e..7bede5b56286 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -834,7 +834,9 @@ static u32 gen8_de_port_aux_mask(struct drm_i915_private *dev_priv)
>
> static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
> {
> - if (DISPLAY_VER(dev_priv) >= 13 || HAS_D12_PLANE_MINIMIZATION(dev_priv))
> + if (DISPLAY_VER(dev_priv) >= 14)
> + return MTL_DE_PIPE_IRQ_FAULT_ERRORS;
> + else if (DISPLAY_VER(dev_priv) >= 12)
> return RKL_DE_PIPE_IRQ_FAULT_ERRORS;
> else if (DISPLAY_VER(dev_priv) >= 11)
> return GEN11_DE_PIPE_IRQ_FAULT_ERRORS;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 27dc903f0553..fcf980694cb4 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4354,7 +4354,8 @@
> GEN11_PIPE_PLANE7_FAULT | \
> GEN11_PIPE_PLANE6_FAULT | \
> GEN11_PIPE_PLANE5_FAULT)
> -#define RKL_DE_PIPE_IRQ_FAULT_ERRORS \
> +#define RKL_DE_PIPE_IRQ_FAULT_ERRORS 0
> +#define MTL_DE_PIPE_IRQ_FAULT_ERRORS \
> (GEN9_DE_PIPE_IRQ_FAULT_ERRORS | \
> GEN11_PIPE_PLANE5_FAULT)
--
Jani Nikula, Intel
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: "Ville Syrjälä" <ville.syrjala@linux.intel.com>,
"Matt Roper" <matthew.d.roper@intel.com>,
"Lucas De Marchi" <lucas.demarchi@intel.com>,
stable@vger.kernel.org
Subject: Re: [PATCH] drm/i915: fix display ver 12-13 fault error handling
Date: Fri, 08 Dec 2023 13:28:24 +0200 [thread overview]
Message-ID: <87jzppyluv.fsf@intel.com> (raw)
In-Reply-To: <20231208112008.2904497-1-jani.nikula@intel.com>
On Fri, 08 Dec 2023, Jani Nikula <jani.nikula@intel.com> wrote:
> Unless I'm completely misreading the bspec, there are no defined bits
> for plane gtt fault errors in DE PIPE IIR for a display versions
> 12-14. This would explain why DG2 in the linked bug is getting thousands
> of fault errors.
>
> Bspec: 50335
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9769
Okay, looking at the bug, this seems optimistic, but it might clear the
ratelimited fault errors.
> Fixes: 99e2d8bcb887 ("drm/i915/rkl: Limit number of universal planes to 5")
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> Cc: <stable@vger.kernel.org> # v5.9+
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_irq.c | 4 +++-
> drivers/gpu/drm/i915/i915_reg.h | 3 ++-
> 2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index f8ed53f30b2e..7bede5b56286 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -834,7 +834,9 @@ static u32 gen8_de_port_aux_mask(struct drm_i915_private *dev_priv)
>
> static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
> {
> - if (DISPLAY_VER(dev_priv) >= 13 || HAS_D12_PLANE_MINIMIZATION(dev_priv))
> + if (DISPLAY_VER(dev_priv) >= 14)
> + return MTL_DE_PIPE_IRQ_FAULT_ERRORS;
> + else if (DISPLAY_VER(dev_priv) >= 12)
> return RKL_DE_PIPE_IRQ_FAULT_ERRORS;
> else if (DISPLAY_VER(dev_priv) >= 11)
> return GEN11_DE_PIPE_IRQ_FAULT_ERRORS;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 27dc903f0553..fcf980694cb4 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -4354,7 +4354,8 @@
> GEN11_PIPE_PLANE7_FAULT | \
> GEN11_PIPE_PLANE6_FAULT | \
> GEN11_PIPE_PLANE5_FAULT)
> -#define RKL_DE_PIPE_IRQ_FAULT_ERRORS \
> +#define RKL_DE_PIPE_IRQ_FAULT_ERRORS 0
> +#define MTL_DE_PIPE_IRQ_FAULT_ERRORS \
> (GEN9_DE_PIPE_IRQ_FAULT_ERRORS | \
> GEN11_PIPE_PLANE5_FAULT)
--
Jani Nikula, Intel
next prev parent reply other threads:[~2023-12-08 11:28 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-08 11:20 [PATCH] drm/i915: fix display ver 12-13 fault error handling Jani Nikula
2023-12-08 11:20 ` Jani Nikula
2023-12-08 11:28 ` Jani Nikula [this message]
2023-12-08 11:28 ` Jani Nikula
2023-12-08 13:59 ` ✗ Fi.CI.BAT: failure for " Patchwork
2023-12-08 16:07 ` [PATCH] " Matt Roper
2023-12-08 16:07 ` Matt Roper
2023-12-11 18:38 ` Jani Nikula
2023-12-11 18:38 ` Jani Nikula
2023-12-08 17:31 ` ✓ Fi.CI.BAT: success for drm/i915: fix display ver 12-13 fault error handling (rev2) Patchwork
2023-12-09 8:01 ` ✓ Fi.CI.IGT: " Patchwork
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