[Intel-gfx] [PATCH v7 0/6] Panel replay phase1 implementation

[Intel-gfx] [PATCH v7 0/6] Panel replay phase1 implementation

[Animesh Manna]

Panel Replay is a power saving feature for DP 2.0 monitor and similar
to PSR on EDP.

These patches are basic enablement patches added on top of
existing psr framework to enable full-screen live active frame
update mode of panel replay. Panel replay also can be enabled
in selective update mode which will be enabled in a incremental
approach.

As per current design panel replay priority is higher than psr.
intel_dp->psr.panel_replay_enabled flag indicate panel replay is enabled.
intel_dp->psr.panel_replay_enabled + intel_dp->psr.psr2_enabled indicates
panel replay is enabled in selective update mode.
intel_dp->psr.panel_replay_enabled + intel_dp->psr.psr2_enabled +
intel_psr.selective_fetch enabled indicates panel replay is
enabled in selective update mode with selective fetch.
PSR replated flags remain same like before.

Note: The patches are under testing by using panel replay emulator and
panel is not avalible.

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>

Animesh Manna (5):
  drm/panelreplay: dpcd register definition for panelreplay
  drm/i915/panelreplay: Initializaton and compute config for panel
    replay
  drm/i915/panelreplay: Enable panel replay dpcd initialization for DP
  drm/i915/panelreplay: enable/disable panel replay
  drm/i915/panelreplay: Debugfs support for panel replay

Jouni Högander (1):
  drm/i915/psr: Move psr specific dpcd init into own function

 drivers/gpu/drm/i915/display/intel_ddi.c      |   7 +-
 .../drm/i915/display/intel_display_types.h    |  15 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  49 ++-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |   3 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 335 +++++++++++++-----
 drivers/gpu/drm/i915/display/intel_psr.h      |   7 +
 include/drm/display/drm_dp.h                  |  23 ++
 7 files changed, 327 insertions(+), 112 deletions(-)

-- 
2.29.0

[PATCH v7 0/6] Panel replay phase1 implementation

[Animesh Manna]

Panel Replay is a power saving feature for DP 2.0 monitor and similar
to PSR on EDP.

These patches are basic enablement patches added on top of
existing psr framework to enable full-screen live active frame
update mode of panel replay. Panel replay also can be enabled
in selective update mode which will be enabled in a incremental
approach.

As per current design panel replay priority is higher than psr.
intel_dp->psr.panel_replay_enabled flag indicate panel replay is enabled.
intel_dp->psr.panel_replay_enabled + intel_dp->psr.psr2_enabled indicates
panel replay is enabled in selective update mode.
intel_dp->psr.panel_replay_enabled + intel_dp->psr.psr2_enabled +
intel_psr.selective_fetch enabled indicates panel replay is
enabled in selective update mode with selective fetch.
PSR replated flags remain same like before.

Note: The patches are under testing by using panel replay emulator and
panel is not avalible.

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>

Animesh Manna (5):
  drm/panelreplay: dpcd register definition for panelreplay
  drm/i915/panelreplay: Initializaton and compute config for panel
    replay
  drm/i915/panelreplay: Enable panel replay dpcd initialization for DP
  drm/i915/panelreplay: enable/disable panel replay
  drm/i915/panelreplay: Debugfs support for panel replay

Jouni Högander (1):
  drm/i915/psr: Move psr specific dpcd init into own function

 drivers/gpu/drm/i915/display/intel_ddi.c      |   7 +-
 .../drm/i915/display/intel_display_types.h    |  15 +-
 drivers/gpu/drm/i915/display/intel_dp.c       |  49 ++-
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |   3 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 335 +++++++++++++-----
 drivers/gpu/drm/i915/display/intel_psr.h      |   7 +
 include/drm/display/drm_dp.h                  |  23 ++
 7 files changed, 327 insertions(+), 112 deletions(-)

-- 
2.29.0

[Intel-gfx] [PATCH v7 1/6] drm/panelreplay: dpcd register definition for panelreplay

[Animesh Manna]

Add DPCD register definition for discovering, enabling and
checking status of panel replay of the sink.

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 include/drm/display/drm_dp.h | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index e69cece404b3..fc42b622ef32 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -543,6 +543,10 @@
 /* DFP Capability Extension */
 #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT	0x0a3	/* 2.0 */
 
+#define DP_PANEL_REPLAY_CAP                 0x0b0  /* DP 2.0 */
+# define DP_PANEL_REPLAY_SUPPORT            (1 << 0)
+# define DP_PANEL_REPLAY_SU_SUPPORT         (1 << 1)
+
 /* Link Configuration */
 #define	DP_LINK_BW_SET		            0x100
 # define DP_LINK_RATE_TABLE		    0x00    /* eDP 1.4 */
@@ -716,6 +720,13 @@
 #define DP_BRANCH_DEVICE_CTRL		    0x1a1
 # define DP_BRANCH_DEVICE_IRQ_HPD	    (1 << 0)
 
+#define PANEL_REPLAY_CONFIG                             0x1b0  /* DP 2.0 */
+# define DP_PANEL_REPLAY_ENABLE                         (1 << 0)
+# define DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN         (1 << 3)
+# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN           (1 << 4)
+# define DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN      (1 << 5)
+# define DP_PANEL_REPLAY_SU_ENABLE                      (1 << 6)
+
 #define DP_PAYLOAD_ALLOCATE_SET		    0x1c0
 #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
 #define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
@@ -1105,6 +1116,18 @@
 #define DP_LANE_ALIGN_STATUS_UPDATED_ESI       0x200e /* status same as 0x204 */
 #define DP_SINK_STATUS_ESI                     0x200f /* status same as 0x205 */
 
+#define DP_PANEL_REPLAY_ERROR_STATUS                   0x2020  /* DP 2.1*/
+# define DP_PANEL_REPLAY_LINK_CRC_ERROR                (1 << 0)
+# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR             (1 << 1)
+# define DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR   (1 << 2)
+
+#define DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS        0x2022  /* DP 2.1 */
+# define DP_SINK_DEVICE_PANEL_REPLAY_STATUS_MASK       (7 << 0)
+# define DP_SINK_FRAME_LOCKED_SHIFT                    3
+# define DP_SINK_FRAME_LOCKED_MASK                     (3 << 3)
+# define DP_SINK_FRAME_LOCKED_STATUS_VALID_SHIFT       5
+# define DP_SINK_FRAME_LOCKED_STATUS_VALID_MASK        (1 << 5)
+
 /* Extended Receiver Capability: See DP_DPCD_REV for definitions */
 #define DP_DP13_DPCD_REV                    0x2200
 
-- 
2.29.0

[PATCH v7 1/6] drm/panelreplay: dpcd register definition for panelreplay

[Animesh Manna]

Add DPCD register definition for discovering, enabling and
checking status of panel replay of the sink.

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 include/drm/display/drm_dp.h | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index e69cece404b3..fc42b622ef32 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -543,6 +543,10 @@
 /* DFP Capability Extension */
 #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT	0x0a3	/* 2.0 */
 
+#define DP_PANEL_REPLAY_CAP                 0x0b0  /* DP 2.0 */
+# define DP_PANEL_REPLAY_SUPPORT            (1 << 0)
+# define DP_PANEL_REPLAY_SU_SUPPORT         (1 << 1)
+
 /* Link Configuration */
 #define	DP_LINK_BW_SET		            0x100
 # define DP_LINK_RATE_TABLE		    0x00    /* eDP 1.4 */
@@ -716,6 +720,13 @@
 #define DP_BRANCH_DEVICE_CTRL		    0x1a1
 # define DP_BRANCH_DEVICE_IRQ_HPD	    (1 << 0)
 
+#define PANEL_REPLAY_CONFIG                             0x1b0  /* DP 2.0 */
+# define DP_PANEL_REPLAY_ENABLE                         (1 << 0)
+# define DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN         (1 << 3)
+# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN           (1 << 4)
+# define DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN      (1 << 5)
+# define DP_PANEL_REPLAY_SU_ENABLE                      (1 << 6)
+
 #define DP_PAYLOAD_ALLOCATE_SET		    0x1c0
 #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
 #define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
@@ -1105,6 +1116,18 @@
 #define DP_LANE_ALIGN_STATUS_UPDATED_ESI       0x200e /* status same as 0x204 */
 #define DP_SINK_STATUS_ESI                     0x200f /* status same as 0x205 */
 
+#define DP_PANEL_REPLAY_ERROR_STATUS                   0x2020  /* DP 2.1*/
+# define DP_PANEL_REPLAY_LINK_CRC_ERROR                (1 << 0)
+# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR             (1 << 1)
+# define DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR   (1 << 2)
+
+#define DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS        0x2022  /* DP 2.1 */
+# define DP_SINK_DEVICE_PANEL_REPLAY_STATUS_MASK       (7 << 0)
+# define DP_SINK_FRAME_LOCKED_SHIFT                    3
+# define DP_SINK_FRAME_LOCKED_MASK                     (3 << 3)
+# define DP_SINK_FRAME_LOCKED_STATUS_VALID_SHIFT       5
+# define DP_SINK_FRAME_LOCKED_STATUS_VALID_MASK        (1 << 5)
+
 /* Extended Receiver Capability: See DP_DPCD_REV for definitions */
 #define DP_DP13_DPCD_REV                    0x2200
 
-- 
2.29.0

Re: [Intel-gfx] [PATCH v7 1/6] drm/panelreplay: dpcd register definition for panelreplay

[Jani Nikula]

On Wed, 11 Oct 2023, Animesh Manna <animesh.manna@intel.com> wrote:
> Add DPCD register definition for discovering, enabling and
> checking status of panel replay of the sink.
>
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>

Maarten, Maxime, Thomas -

Ack for merging this via drm-intel-next?

Thanks,
Jani.

> ---
>  include/drm/display/drm_dp.h | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
>
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index e69cece404b3..fc42b622ef32 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -543,6 +543,10 @@
>  /* DFP Capability Extension */
>  #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT	0x0a3	/* 2.0 */
>  
> +#define DP_PANEL_REPLAY_CAP                 0x0b0  /* DP 2.0 */
> +# define DP_PANEL_REPLAY_SUPPORT            (1 << 0)
> +# define DP_PANEL_REPLAY_SU_SUPPORT         (1 << 1)
> +
>  /* Link Configuration */
>  #define	DP_LINK_BW_SET		            0x100
>  # define DP_LINK_RATE_TABLE		    0x00    /* eDP 1.4 */
> @@ -716,6 +720,13 @@
>  #define DP_BRANCH_DEVICE_CTRL		    0x1a1
>  # define DP_BRANCH_DEVICE_IRQ_HPD	    (1 << 0)
>  
> +#define PANEL_REPLAY_CONFIG                             0x1b0  /* DP 2.0 */
> +# define DP_PANEL_REPLAY_ENABLE                         (1 << 0)
> +# define DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN         (1 << 3)
> +# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN           (1 << 4)
> +# define DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN      (1 << 5)
> +# define DP_PANEL_REPLAY_SU_ENABLE                      (1 << 6)
> +
>  #define DP_PAYLOAD_ALLOCATE_SET		    0x1c0
>  #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
>  #define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
> @@ -1105,6 +1116,18 @@
>  #define DP_LANE_ALIGN_STATUS_UPDATED_ESI       0x200e /* status same as 0x204 */
>  #define DP_SINK_STATUS_ESI                     0x200f /* status same as 0x205 */
>  
> +#define DP_PANEL_REPLAY_ERROR_STATUS                   0x2020  /* DP 2.1*/
> +# define DP_PANEL_REPLAY_LINK_CRC_ERROR                (1 << 0)
> +# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR             (1 << 1)
> +# define DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR   (1 << 2)
> +
> +#define DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS        0x2022  /* DP 2.1 */
> +# define DP_SINK_DEVICE_PANEL_REPLAY_STATUS_MASK       (7 << 0)
> +# define DP_SINK_FRAME_LOCKED_SHIFT                    3
> +# define DP_SINK_FRAME_LOCKED_MASK                     (3 << 3)
> +# define DP_SINK_FRAME_LOCKED_STATUS_VALID_SHIFT       5
> +# define DP_SINK_FRAME_LOCKED_STATUS_VALID_MASK        (1 << 5)
> +
>  /* Extended Receiver Capability: See DP_DPCD_REV for definitions */
>  #define DP_DP13_DPCD_REV                    0x2200

-- 
Jani Nikula, Intel

Re: [PATCH v7 1/6] drm/panelreplay: dpcd register definition for panelreplay

[Jani Nikula]

On Wed, 11 Oct 2023, Animesh Manna <animesh.manna@intel.com> wrote:
> Add DPCD register definition for discovering, enabling and
> checking status of panel replay of the sink.
>
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>

Maarten, Maxime, Thomas -

Ack for merging this via drm-intel-next?

Thanks,
Jani.

> ---
>  include/drm/display/drm_dp.h | 23 +++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
>
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index e69cece404b3..fc42b622ef32 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -543,6 +543,10 @@
>  /* DFP Capability Extension */
>  #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT	0x0a3	/* 2.0 */
>  
> +#define DP_PANEL_REPLAY_CAP                 0x0b0  /* DP 2.0 */
> +# define DP_PANEL_REPLAY_SUPPORT            (1 << 0)
> +# define DP_PANEL_REPLAY_SU_SUPPORT         (1 << 1)
> +
>  /* Link Configuration */
>  #define	DP_LINK_BW_SET		            0x100
>  # define DP_LINK_RATE_TABLE		    0x00    /* eDP 1.4 */
> @@ -716,6 +720,13 @@
>  #define DP_BRANCH_DEVICE_CTRL		    0x1a1
>  # define DP_BRANCH_DEVICE_IRQ_HPD	    (1 << 0)
>  
> +#define PANEL_REPLAY_CONFIG                             0x1b0  /* DP 2.0 */
> +# define DP_PANEL_REPLAY_ENABLE                         (1 << 0)
> +# define DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN         (1 << 3)
> +# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN           (1 << 4)
> +# define DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN      (1 << 5)
> +# define DP_PANEL_REPLAY_SU_ENABLE                      (1 << 6)
> +
>  #define DP_PAYLOAD_ALLOCATE_SET		    0x1c0
>  #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
>  #define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2
> @@ -1105,6 +1116,18 @@
>  #define DP_LANE_ALIGN_STATUS_UPDATED_ESI       0x200e /* status same as 0x204 */
>  #define DP_SINK_STATUS_ESI                     0x200f /* status same as 0x205 */
>  
> +#define DP_PANEL_REPLAY_ERROR_STATUS                   0x2020  /* DP 2.1*/
> +# define DP_PANEL_REPLAY_LINK_CRC_ERROR                (1 << 0)
> +# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR             (1 << 1)
> +# define DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR   (1 << 2)
> +
> +#define DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS        0x2022  /* DP 2.1 */
> +# define DP_SINK_DEVICE_PANEL_REPLAY_STATUS_MASK       (7 << 0)
> +# define DP_SINK_FRAME_LOCKED_SHIFT                    3
> +# define DP_SINK_FRAME_LOCKED_MASK                     (3 << 3)
> +# define DP_SINK_FRAME_LOCKED_STATUS_VALID_SHIFT       5
> +# define DP_SINK_FRAME_LOCKED_STATUS_VALID_MASK        (1 << 5)
> +
>  /* Extended Receiver Capability: See DP_DPCD_REV for definitions */
>  #define DP_DP13_DPCD_REV                    0x2200

-- 
Jani Nikula, Intel

Re: [Intel-gfx] [PATCH v7 1/6] drm/panelreplay: dpcd register definition for panelreplay

[Manna, Animesh]

> -----Original Message-----
> From: Nikula, Jani <jani.nikula@intel.com>
> Sent: Friday, November 3, 2023 2:55 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org; Maxime Ripard <mripard@kernel.org>; Thomas
> Zimmermann <tzimmermann@suse.de>; Maarten Lankhorst
> <maarten.lankhorst@linux.intel.com>
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni
> <jouni.hogander@intel.com>; Murthy, Arun R <arun.r.murthy@intel.com>
> Subject: Re: [PATCH v7 1/6] drm/panelreplay: dpcd register definition for
> panelreplay
> 
> On Wed, 11 Oct 2023, Animesh Manna <animesh.manna@intel.com> wrote:
> > Add DPCD register definition for discovering, enabling and checking
> > status of panel replay of the sink.
> >
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> 
> Maarten, Maxime, Thomas -
> 
> Ack for merging this via drm-intel-next?

Ping!

Regards,
Animesh

> 
> Thanks,
> Jani.
> 
> > ---
> >  include/drm/display/drm_dp.h | 23 +++++++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> >
> > diff --git a/include/drm/display/drm_dp.h
> > b/include/drm/display/drm_dp.h index e69cece404b3..fc42b622ef32
> 100644
> > --- a/include/drm/display/drm_dp.h
> > +++ b/include/drm/display/drm_dp.h
> > @@ -543,6 +543,10 @@
> >  /* DFP Capability Extension */
> >  #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT	0x0a3	/* 2.0 */
> >
> > +#define DP_PANEL_REPLAY_CAP                 0x0b0  /* DP 2.0 */
> > +# define DP_PANEL_REPLAY_SUPPORT            (1 << 0)
> > +# define DP_PANEL_REPLAY_SU_SUPPORT         (1 << 1)
> > +
> >  /* Link Configuration */
> >  #define	DP_LINK_BW_SET		            0x100
> >  # define DP_LINK_RATE_TABLE		    0x00    /* eDP 1.4 */
> > @@ -716,6 +720,13 @@
> >  #define DP_BRANCH_DEVICE_CTRL		    0x1a1
> >  # define DP_BRANCH_DEVICE_IRQ_HPD	    (1 << 0)
> >
> > +#define PANEL_REPLAY_CONFIG                             0x1b0  /* DP 2.0 */
> > +# define DP_PANEL_REPLAY_ENABLE                         (1 << 0)
> > +# define DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN         (1 << 3)
> > +# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN           (1 << 4)
> > +# define DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN      (1 << 5)
> > +# define DP_PANEL_REPLAY_SU_ENABLE                      (1 << 6)
> > +
> >  #define DP_PAYLOAD_ALLOCATE_SET		    0x1c0
> >  #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1  #define
> > DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2 @@ -1105,6 +1116,18
> @@
> >  #define DP_LANE_ALIGN_STATUS_UPDATED_ESI       0x200e /* status same
> as 0x204 */
> >  #define DP_SINK_STATUS_ESI                     0x200f /* status same as 0x205 */
> >
> > +#define DP_PANEL_REPLAY_ERROR_STATUS                   0x2020  /* DP 2.1*/
> > +# define DP_PANEL_REPLAY_LINK_CRC_ERROR                (1 << 0)
> > +# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR             (1 << 1)
> > +# define DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR   (1 << 2)
> > +
> > +#define DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS        0x2022  /*
> DP 2.1 */
> > +# define DP_SINK_DEVICE_PANEL_REPLAY_STATUS_MASK       (7 << 0)
> > +# define DP_SINK_FRAME_LOCKED_SHIFT                    3
> > +# define DP_SINK_FRAME_LOCKED_MASK                     (3 << 3)
> > +# define DP_SINK_FRAME_LOCKED_STATUS_VALID_SHIFT       5
> > +# define DP_SINK_FRAME_LOCKED_STATUS_VALID_MASK        (1 << 5)
> > +
> >  /* Extended Receiver Capability: See DP_DPCD_REV for definitions */
> >  #define DP_DP13_DPCD_REV                    0x2200
> 
> --
> Jani Nikula, Intel

RE: [PATCH v7 1/6] drm/panelreplay: dpcd register definition for panelreplay

[Manna, Animesh]

> -----Original Message-----
> From: Nikula, Jani <jani.nikula@intel.com>
> Sent: Friday, November 3, 2023 2:55 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org; Maxime Ripard <mripard@kernel.org>; Thomas
> Zimmermann <tzimmermann@suse.de>; Maarten Lankhorst
> <maarten.lankhorst@linux.intel.com>
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni
> <jouni.hogander@intel.com>; Murthy, Arun R <arun.r.murthy@intel.com>
> Subject: Re: [PATCH v7 1/6] drm/panelreplay: dpcd register definition for
> panelreplay
> 
> On Wed, 11 Oct 2023, Animesh Manna <animesh.manna@intel.com> wrote:
> > Add DPCD register definition for discovering, enabling and checking
> > status of panel replay of the sink.
> >
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> 
> Maarten, Maxime, Thomas -
> 
> Ack for merging this via drm-intel-next?

Ping!

Regards,
Animesh

> 
> Thanks,
> Jani.
> 
> > ---
> >  include/drm/display/drm_dp.h | 23 +++++++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> >
> > diff --git a/include/drm/display/drm_dp.h
> > b/include/drm/display/drm_dp.h index e69cece404b3..fc42b622ef32
> 100644
> > --- a/include/drm/display/drm_dp.h
> > +++ b/include/drm/display/drm_dp.h
> > @@ -543,6 +543,10 @@
> >  /* DFP Capability Extension */
> >  #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT	0x0a3	/* 2.0 */
> >
> > +#define DP_PANEL_REPLAY_CAP                 0x0b0  /* DP 2.0 */
> > +# define DP_PANEL_REPLAY_SUPPORT            (1 << 0)
> > +# define DP_PANEL_REPLAY_SU_SUPPORT         (1 << 1)
> > +
> >  /* Link Configuration */
> >  #define	DP_LINK_BW_SET		            0x100
> >  # define DP_LINK_RATE_TABLE		    0x00    /* eDP 1.4 */
> > @@ -716,6 +720,13 @@
> >  #define DP_BRANCH_DEVICE_CTRL		    0x1a1
> >  # define DP_BRANCH_DEVICE_IRQ_HPD	    (1 << 0)
> >
> > +#define PANEL_REPLAY_CONFIG                             0x1b0  /* DP 2.0 */
> > +# define DP_PANEL_REPLAY_ENABLE                         (1 << 0)
> > +# define DP_PANEL_REPLAY_UNRECOVERABLE_ERROR_EN         (1 << 3)
> > +# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN           (1 << 4)
> > +# define DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN      (1 << 5)
> > +# define DP_PANEL_REPLAY_SU_ENABLE                      (1 << 6)
> > +
> >  #define DP_PAYLOAD_ALLOCATE_SET		    0x1c0
> >  #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1  #define
> > DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2 @@ -1105,6 +1116,18
> @@
> >  #define DP_LANE_ALIGN_STATUS_UPDATED_ESI       0x200e /* status same
> as 0x204 */
> >  #define DP_SINK_STATUS_ESI                     0x200f /* status same as 0x205 */
> >
> > +#define DP_PANEL_REPLAY_ERROR_STATUS                   0x2020  /* DP 2.1*/
> > +# define DP_PANEL_REPLAY_LINK_CRC_ERROR                (1 << 0)
> > +# define DP_PANEL_REPLAY_RFB_STORAGE_ERROR             (1 << 1)
> > +# define DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR   (1 << 2)
> > +
> > +#define DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS        0x2022  /*
> DP 2.1 */
> > +# define DP_SINK_DEVICE_PANEL_REPLAY_STATUS_MASK       (7 << 0)
> > +# define DP_SINK_FRAME_LOCKED_SHIFT                    3
> > +# define DP_SINK_FRAME_LOCKED_MASK                     (3 << 3)
> > +# define DP_SINK_FRAME_LOCKED_STATUS_VALID_SHIFT       5
> > +# define DP_SINK_FRAME_LOCKED_STATUS_VALID_MASK        (1 << 5)
> > +
> >  /* Extended Receiver Capability: See DP_DPCD_REV for definitions */
> >  #define DP_DP13_DPCD_REV                    0x2200
> 
> --
> Jani Nikula, Intel

Re: [Intel-gfx] [PATCH v7 1/6] drm/panelreplay: dpcd register definition for panelreplay

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 1299 bytes --]

On Mon, Nov 06, 2023 at 01:01:19PM +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Nikula, Jani <jani.nikula@intel.com>
> > Sent: Friday, November 3, 2023 2:55 PM
> > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > gfx@lists.freedesktop.org; Maxime Ripard <mripard@kernel.org>; Thomas
> > Zimmermann <tzimmermann@suse.de>; Maarten Lankhorst
> > <maarten.lankhorst@linux.intel.com>
> > Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> > <animesh.manna@intel.com>; Hogander, Jouni
> > <jouni.hogander@intel.com>; Murthy, Arun R <arun.r.murthy@intel.com>
> > Subject: Re: [PATCH v7 1/6] drm/panelreplay: dpcd register definition for
> > panelreplay
> > 
> > On Wed, 11 Oct 2023, Animesh Manna <animesh.manna@intel.com> wrote:
> > > Add DPCD register definition for discovering, enabling and checking
> > > status of panel replay of the sink.
> > >
> > > Cc: Jouni Högander <jouni.hogander@intel.com>
> > > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
> > > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > 
> > Maarten, Maxime, Thomas -
> > 
> > Ack for merging this via drm-intel-next?
> 
> Ping!

Ack

Maxime

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Re: [PATCH v7 1/6] drm/panelreplay: dpcd register definition for panelreplay

[Maxime Ripard]

[-- Attachment #1: Type: text/plain, Size: 1299 bytes --]

On Mon, Nov 06, 2023 at 01:01:19PM +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Nikula, Jani <jani.nikula@intel.com>
> > Sent: Friday, November 3, 2023 2:55 PM
> > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > gfx@lists.freedesktop.org; Maxime Ripard <mripard@kernel.org>; Thomas
> > Zimmermann <tzimmermann@suse.de>; Maarten Lankhorst
> > <maarten.lankhorst@linux.intel.com>
> > Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> > <animesh.manna@intel.com>; Hogander, Jouni
> > <jouni.hogander@intel.com>; Murthy, Arun R <arun.r.murthy@intel.com>
> > Subject: Re: [PATCH v7 1/6] drm/panelreplay: dpcd register definition for
> > panelreplay
> > 
> > On Wed, 11 Oct 2023, Animesh Manna <animesh.manna@intel.com> wrote:
> > > Add DPCD register definition for discovering, enabling and checking
> > > status of panel replay of the sink.
> > >
> > > Cc: Jouni Högander <jouni.hogander@intel.com>
> > > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
> > > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > 
> > Maarten, Maxime, Thomas -
> > 
> > Ack for merging this via drm-intel-next?
> 
> Ping!

Ack

Maxime

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[Intel-gfx] [PATCH v7 2/6] drm/i915/psr: Move psr specific dpcd init into own function

[Animesh Manna]

From: Jouni Högander <jouni.hogander@intel.com>

This patch is preparing adding panel replay specific dpcd init.

Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 41 +++++++++++++-----------
 1 file changed, 23 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index bb65881e87cc..0669ab7a9191 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -474,27 +474,22 @@ static void intel_dp_get_su_granularity(struct intel_dp *intel_dp)
 	intel_dp->psr.su_y_granularity = y;
 }
 
-void intel_psr_init_dpcd(struct intel_dp *intel_dp)
+static void _psr_init_dpcd(struct intel_dp *intel_dp)
 {
-	struct drm_i915_private *dev_priv =
+	struct drm_i915_private *i915 =
 		to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
 
-	drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
-			 sizeof(intel_dp->psr_dpcd));
-
-	if (!intel_dp->psr_dpcd[0])
-		return;
-	drm_dbg_kms(&dev_priv->drm, "eDP panel supports PSR version %x\n",
+	drm_dbg_kms(&i915->drm, "eDP panel supports PSR version %x\n",
 		    intel_dp->psr_dpcd[0]);
 
 	if (drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_NO_PSR)) {
-		drm_dbg_kms(&dev_priv->drm,
+		drm_dbg_kms(&i915->drm,
 			    "PSR support not currently available for this panel\n");
 		return;
 	}
 
 	if (!(intel_dp->edp_dpcd[1] & DP_EDP_SET_POWER_CAP)) {
-		drm_dbg_kms(&dev_priv->drm,
+		drm_dbg_kms(&i915->drm,
 			    "Panel lacks power state control, PSR cannot be enabled\n");
 		return;
 	}
@@ -503,8 +498,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
 	intel_dp->psr.sink_sync_latency =
 		intel_dp_get_sink_sync_latency(intel_dp);
 
-	if (DISPLAY_VER(dev_priv) >= 9 &&
-	    (intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_IS_SUPPORTED)) {
+	if (DISPLAY_VER(i915) >= 9 &&
+	    intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_IS_SUPPORTED) {
 		bool y_req = intel_dp->psr_dpcd[1] &
 			     DP_PSR2_SU_Y_COORDINATE_REQUIRED;
 		bool alpm = intel_dp_get_alpm_status(intel_dp);
@@ -521,14 +516,24 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
 		 * GTC first.
 		 */
 		intel_dp->psr.sink_psr2_support = y_req && alpm;
-		drm_dbg_kms(&dev_priv->drm, "PSR2 %ssupported\n",
+		drm_dbg_kms(&i915->drm, "PSR2 %ssupported\n",
 			    intel_dp->psr.sink_psr2_support ? "" : "not ");
+	}
+}
 
-		if (intel_dp->psr.sink_psr2_support) {
-			intel_dp->psr.colorimetry_support =
-				intel_dp_get_colorimetry_status(intel_dp);
-			intel_dp_get_su_granularity(intel_dp);
-		}
+void intel_psr_init_dpcd(struct intel_dp *intel_dp)
+{
+	drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
+			 sizeof(intel_dp->psr_dpcd));
+
+	if (intel_dp->psr_dpcd[0])
+		_psr_init_dpcd(intel_dp);
+	/* TODO: Add PR case here */
+
+	if (intel_dp->psr.sink_psr2_support) {
+		intel_dp->psr.colorimetry_support =
+			intel_dp_get_colorimetry_status(intel_dp);
+		intel_dp_get_su_granularity(intel_dp);
 	}
 }
 
-- 
2.29.0

[PATCH v7 2/6] drm/i915/psr: Move psr specific dpcd init into own function

[Animesh Manna]

From: Jouni Högander <jouni.hogander@intel.com>

This patch is preparing adding panel replay specific dpcd init.

Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 41 +++++++++++++-----------
 1 file changed, 23 insertions(+), 18 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index bb65881e87cc..0669ab7a9191 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -474,27 +474,22 @@ static void intel_dp_get_su_granularity(struct intel_dp *intel_dp)
 	intel_dp->psr.su_y_granularity = y;
 }
 
-void intel_psr_init_dpcd(struct intel_dp *intel_dp)
+static void _psr_init_dpcd(struct intel_dp *intel_dp)
 {
-	struct drm_i915_private *dev_priv =
+	struct drm_i915_private *i915 =
 		to_i915(dp_to_dig_port(intel_dp)->base.base.dev);
 
-	drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
-			 sizeof(intel_dp->psr_dpcd));
-
-	if (!intel_dp->psr_dpcd[0])
-		return;
-	drm_dbg_kms(&dev_priv->drm, "eDP panel supports PSR version %x\n",
+	drm_dbg_kms(&i915->drm, "eDP panel supports PSR version %x\n",
 		    intel_dp->psr_dpcd[0]);
 
 	if (drm_dp_has_quirk(&intel_dp->desc, DP_DPCD_QUIRK_NO_PSR)) {
-		drm_dbg_kms(&dev_priv->drm,
+		drm_dbg_kms(&i915->drm,
 			    "PSR support not currently available for this panel\n");
 		return;
 	}
 
 	if (!(intel_dp->edp_dpcd[1] & DP_EDP_SET_POWER_CAP)) {
-		drm_dbg_kms(&dev_priv->drm,
+		drm_dbg_kms(&i915->drm,
 			    "Panel lacks power state control, PSR cannot be enabled\n");
 		return;
 	}
@@ -503,8 +498,8 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
 	intel_dp->psr.sink_sync_latency =
 		intel_dp_get_sink_sync_latency(intel_dp);
 
-	if (DISPLAY_VER(dev_priv) >= 9 &&
-	    (intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_IS_SUPPORTED)) {
+	if (DISPLAY_VER(i915) >= 9 &&
+	    intel_dp->psr_dpcd[0] == DP_PSR2_WITH_Y_COORD_IS_SUPPORTED) {
 		bool y_req = intel_dp->psr_dpcd[1] &
 			     DP_PSR2_SU_Y_COORDINATE_REQUIRED;
 		bool alpm = intel_dp_get_alpm_status(intel_dp);
@@ -521,14 +516,24 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
 		 * GTC first.
 		 */
 		intel_dp->psr.sink_psr2_support = y_req && alpm;
-		drm_dbg_kms(&dev_priv->drm, "PSR2 %ssupported\n",
+		drm_dbg_kms(&i915->drm, "PSR2 %ssupported\n",
 			    intel_dp->psr.sink_psr2_support ? "" : "not ");
+	}
+}
 
-		if (intel_dp->psr.sink_psr2_support) {
-			intel_dp->psr.colorimetry_support =
-				intel_dp_get_colorimetry_status(intel_dp);
-			intel_dp_get_su_granularity(intel_dp);
-		}
+void intel_psr_init_dpcd(struct intel_dp *intel_dp)
+{
+	drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
+			 sizeof(intel_dp->psr_dpcd));
+
+	if (intel_dp->psr_dpcd[0])
+		_psr_init_dpcd(intel_dp);
+	/* TODO: Add PR case here */
+
+	if (intel_dp->psr.sink_psr2_support) {
+		intel_dp->psr.colorimetry_support =
+			intel_dp_get_colorimetry_status(intel_dp);
+		intel_dp_get_su_granularity(intel_dp);
 	}
 }
 
-- 
2.29.0

[Intel-gfx] [PATCH v7 3/6] drm/i915/panelreplay: Initializaton and compute config for panel replay

[Animesh Manna]

Modify existing PSR implementation to enable panel replay feature of DP 2.0
which is similar to PSR feature of EDP panel. There is different DPCD
address to check panel capability compare to PSR and vsc sdp header
is different.

v1: Initial version.
v2:
- Set source_panel_replay_support flag under HAS_PANEL_REPLAY()
condition check. [Jouni]
- Code restructured around intel_panel_replay_init
and renamed to intel_panel_replay_init_dpcd. [Jouni]
- Remove the initial code modification around has_psr2 flag. [Jouni]
- Add CAN_PANEL_REPLAY() in intel_encoder_can_psr which is used to
enable in intel_psr_post_plane_update. [Jouni]
v3:
- Initialize both psr and panel-replay. [Jouni]
- Initialize both panel replay and psr if detected. [Jouni]
- Refactoring psr function by introducing _psr_compute_config(). [Jouni]
- Add check for !is_edp while deriving source_panel_replay_support. [Jouni]
- Enable panel replay dpcd initialization in a separate patch. [Jouni]

v4:
- HAS_PANEL_REPLAY() check not needed during sink capability check. [Jouni]
- Set either panel replay source support or psr. [Jouni]

v5:
- HAS_PANEL_REPLAY() removed and use HAS_DP20() instead. [Jouni]
- Move psr related code to intel_psr.c. [Jani]
- Reset sink_panel_replay_support flag during disconnection. [Jani]

v6: return statement restored which is removed by misatke. [Jouni]
v7: cosmetic changes. [Arun]

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 .../drm/i915/display/intel_display_types.h    | 14 +--
 drivers/gpu/drm/i915/display/intel_dp.c       | 49 ++++++++--
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  3 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 96 ++++++++++++++-----
 drivers/gpu/drm/i915/display/intel_psr.h      |  7 ++
 5 files changed, 123 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8d8b2f8d37a9..95b318f7b2b8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1204,6 +1204,7 @@ struct intel_crtc_state {
 	bool has_psr2;
 	bool enable_psr2_sel_fetch;
 	bool req_psr2_sdp_prior_scanline;
+	bool has_panel_replay;
 	bool wm_level_disabled;
 	u32 dc3co_exitline;
 	u16 su_y_granularity;
@@ -1701,6 +1702,8 @@ struct intel_psr {
 	bool irq_aux_error;
 	u16 su_w_granularity;
 	u16 su_y_granularity;
+	bool source_panel_replay_support;
+	bool sink_panel_replay_support;
 	u32 dc3co_exitline;
 	u32 dc3co_exit_delay;
 	struct delayed_work dc3co_work;
@@ -1988,17 +1991,6 @@ dp_to_lspcon(struct intel_dp *intel_dp)
 
 #define dp_to_i915(__intel_dp) to_i915(dp_to_dig_port(__intel_dp)->base.base.dev)
 
-#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
-			   (intel_dp)->psr.source_support)
-
-static inline bool intel_encoder_can_psr(struct intel_encoder *encoder)
-{
-	if (!intel_encoder_is_dp(encoder))
-		return false;
-
-	return CAN_PSR(enc_to_intel_dp(encoder));
-}
-
 static inline struct intel_digital_port *
 hdmi_to_dig_port(struct intel_hdmi *intel_hdmi)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0ef7cb8134b6..b038f1d2a7ad 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2432,12 +2432,22 @@ static void intel_dp_compute_vsc_colorimetry(const struct intel_crtc_state *crtc
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 
-	/*
-	 * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
-	 * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
-	 * Colorimetry Format indication.
-	 */
-	vsc->revision = 0x5;
+	if (crtc_state->has_panel_replay) {
+		/*
+		 * Prepare VSC Header for SU as per DP 2.0 spec, Table 2-223
+		 * VSC SDP supporting 3D stereo, Panel Replay, and Pixel
+		 * Encoding/Colorimetry Format indication.
+		 */
+		vsc->revision = 0x7;
+	} else {
+		/*
+		 * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
+		 * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
+		 * Colorimetry Format indication.
+		 */
+		vsc->revision = 0x5;
+	}
+
 	vsc->length = 0x13;
 
 	/* DP 1.4a spec, Table 2-120 */
@@ -2546,6 +2556,21 @@ void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
 			vsc->revision = 0x4;
 			vsc->length = 0xe;
 		}
+	} else if (crtc_state->has_panel_replay) {
+		if (intel_dp->psr.colorimetry_support &&
+		    intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
+			/* [Panel Replay with colorimetry info] */
+			intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,
+							 vsc);
+		} else {
+			/*
+			 * [Panel Replay without colorimetry info]
+			 * Prepare VSC Header for SU as per DP 2.0 spec, Table 2-223
+			 * VSC SDP supporting 3D stereo + Panel Replay.
+			 */
+			vsc->revision = 0x6;
+			vsc->length = 0x10;
+		}
 	} else {
 		/*
 		 * [PSR1]
@@ -3843,11 +3868,16 @@ static ssize_t intel_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc,
 	sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */
 	sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */
 
+	if (vsc->revision == 0x6) {
+		sdp->db[0] = 1;
+		sdp->db[3] = 1;
+	}
+
 	/*
-	 * Only revision 0x5 supports Pixel Encoding/Colorimetry Format as
-	 * per DP 1.4a spec.
+	 * Revision 0x5 and revision 0x7 supports Pixel Encoding/Colorimetry
+	 * Format as per DP 1.4a spec and DP 2.0 respectively.
 	 */
-	if (vsc->revision != 0x5)
+	if (!(vsc->revision == 0x5 || vsc->revision == 0x7))
 		goto out;
 
 	/* VSC SDP Payload for DB16 through DB18 */
@@ -5368,6 +5398,7 @@ intel_dp_detect(struct drm_connector *connector,
 	if (status == connector_status_disconnected) {
 		memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance));
 		memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd));
+		intel_dp->psr.sink_panel_replay_support = false;
 
 		if (intel_dp->is_mst) {
 			drm_dbg_kms(&dev_priv->drm,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 73e397736463..617b7afbcb94 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -43,6 +43,7 @@
 #include "intel_dpio_phy.h"
 #include "intel_hdcp.h"
 #include "intel_hotplug.h"
+#include "intel_psr.h"
 #include "skl_scaler.h"
 
 static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp,
@@ -422,6 +423,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 
 	intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
 
+	intel_psr_compute_config(intel_dp, pipe_config, conn_state);
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 0669ab7a9191..f9837001aa5f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -172,6 +172,15 @@
  * irrelevant for normal operation.
  */
 
+bool intel_encoder_can_psr(struct intel_encoder *encoder)
+{
+	if (intel_encoder_is_dp(encoder) || encoder->type == INTEL_OUTPUT_DP_MST)
+		return CAN_PSR(enc_to_intel_dp(encoder)) ||
+		       CAN_PANEL_REPLAY(enc_to_intel_dp(encoder));
+	else
+		return false;
+}
+
 static bool psr_global_enabled(struct intel_dp *intel_dp)
 {
 	struct intel_connector *connector = intel_dp->attached_connector;
@@ -474,6 +483,25 @@ static void intel_dp_get_su_granularity(struct intel_dp *intel_dp)
 	intel_dp->psr.su_y_granularity = y;
 }
 
+static void _panel_replay_init_dpcd(struct intel_dp *intel_dp)
+{
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+	u8 pr_dpcd = 0;
+
+	intel_dp->psr.sink_panel_replay_support = false;
+	drm_dp_dpcd_readb(&intel_dp->aux, DP_PANEL_REPLAY_CAP, &pr_dpcd);
+
+	if (!(pr_dpcd & DP_PANEL_REPLAY_SUPPORT)) {
+		drm_dbg_kms(&i915->drm,
+			    "Panel replay is not supported by panel\n");
+		return;
+	}
+
+	drm_dbg_kms(&i915->drm,
+		    "Panel replay is supported by panel\n");
+	intel_dp->psr.sink_panel_replay_support = true;
+}
+
 static void _psr_init_dpcd(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *i915 =
@@ -523,12 +551,13 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp)
 
 void intel_psr_init_dpcd(struct intel_dp *intel_dp)
 {
+	_panel_replay_init_dpcd(intel_dp);
+
 	drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
 			 sizeof(intel_dp->psr_dpcd));
 
 	if (intel_dp->psr_dpcd[0])
 		_psr_init_dpcd(intel_dp);
-	/* TODO: Add PR case here */
 
 	if (intel_dp->psr.sink_psr2_support) {
 		intel_dp->psr.colorimetry_support =
@@ -1209,13 +1238,11 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 	return false;
 }
 
-void intel_psr_compute_config(struct intel_dp *intel_dp,
-			      struct intel_crtc_state *crtc_state,
-			      struct drm_connector_state *conn_state)
+static bool _psr_compute_config(struct intel_dp *intel_dp,
+				struct intel_crtc_state *crtc_state)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-	const struct drm_display_mode *adjusted_mode =
-		&crtc_state->hw.adjusted_mode;
+	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
 	int psr_setup_time;
 
 	/*
@@ -1223,10 +1250,36 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 	 * So if VRR is enabled, do not enable PSR.
 	 */
 	if (crtc_state->vrr.enable)
-		return;
+		return false;
 
 	if (!CAN_PSR(intel_dp))
-		return;
+		return false;
+
+	psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
+	if (psr_setup_time < 0) {
+		drm_dbg_kms(&dev_priv->drm,
+			    "PSR condition failed: Invalid PSR setup time (0x%02x)\n",
+			    intel_dp->psr_dpcd[1]);
+		return false;
+	}
+
+	if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
+	    adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
+		drm_dbg_kms(&dev_priv->drm,
+			    "PSR condition failed: PSR setup time (%d us) too long\n",
+			    psr_setup_time);
+		return false;
+	}
+
+	return true;
+}
+
+void intel_psr_compute_config(struct intel_dp *intel_dp,
+			      struct intel_crtc_state *crtc_state,
+			      struct drm_connector_state *conn_state)
+{
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
 
 	if (!psr_global_enabled(intel_dp)) {
 		drm_dbg_kms(&dev_priv->drm, "PSR disabled by flag\n");
@@ -1245,23 +1298,11 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 		return;
 	}
 
-	psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
-	if (psr_setup_time < 0) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "PSR condition failed: Invalid PSR setup time (0x%02x)\n",
-			    intel_dp->psr_dpcd[1]);
-		return;
-	}
-
-	if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
-	    adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "PSR condition failed: PSR setup time (%d us) too long\n",
-			    psr_setup_time);
-		return;
-	}
+	if (CAN_PANEL_REPLAY(intel_dp))
+		crtc_state->has_panel_replay = true;
+	else
+		crtc_state->has_psr = _psr_compute_config(intel_dp, crtc_state);
 
-	crtc_state->has_psr = true;
 	crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
 
 	crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC);
@@ -2694,7 +2735,7 @@ void intel_psr_init(struct intel_dp *intel_dp)
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
-	if (!HAS_PSR(dev_priv))
+	if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
 		return;
 
 	/*
@@ -2712,7 +2753,10 @@ void intel_psr_init(struct intel_dp *intel_dp)
 		return;
 	}
 
-	intel_dp->psr.source_support = true;
+	if (HAS_DP20(dev_priv) && !intel_dp_is_edp(intel_dp))
+		intel_dp->psr.source_panel_replay_support = true;
+	else
+		intel_dp->psr.source_support = true;
 
 	/* Set link_standby x link_off defaults */
 	if (DISPLAY_VER(dev_priv) < 12)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index bf35f42df6bc..6a1f4573852b 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -21,6 +21,13 @@ struct intel_encoder;
 struct intel_plane;
 struct intel_plane_state;
 
+#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
+			   (intel_dp)->psr.source_support)
+
+#define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)->psr.sink_panel_replay_support && \
+				    (intel_dp)->psr.source_panel_replay_support)
+
+bool intel_encoder_can_psr(struct intel_encoder *encoder);
 void intel_psr_init_dpcd(struct intel_dp *intel_dp);
 void intel_psr_pre_plane_update(struct intel_atomic_state *state,
 				struct intel_crtc *crtc);
-- 
2.29.0

[PATCH v7 3/6] drm/i915/panelreplay: Initializaton and compute config for panel replay

[Animesh Manna]

Modify existing PSR implementation to enable panel replay feature of DP 2.0
which is similar to PSR feature of EDP panel. There is different DPCD
address to check panel capability compare to PSR and vsc sdp header
is different.

v1: Initial version.
v2:
- Set source_panel_replay_support flag under HAS_PANEL_REPLAY()
condition check. [Jouni]
- Code restructured around intel_panel_replay_init
and renamed to intel_panel_replay_init_dpcd. [Jouni]
- Remove the initial code modification around has_psr2 flag. [Jouni]
- Add CAN_PANEL_REPLAY() in intel_encoder_can_psr which is used to
enable in intel_psr_post_plane_update. [Jouni]
v3:
- Initialize both psr and panel-replay. [Jouni]
- Initialize both panel replay and psr if detected. [Jouni]
- Refactoring psr function by introducing _psr_compute_config(). [Jouni]
- Add check for !is_edp while deriving source_panel_replay_support. [Jouni]
- Enable panel replay dpcd initialization in a separate patch. [Jouni]

v4:
- HAS_PANEL_REPLAY() check not needed during sink capability check. [Jouni]
- Set either panel replay source support or psr. [Jouni]

v5:
- HAS_PANEL_REPLAY() removed and use HAS_DP20() instead. [Jouni]
- Move psr related code to intel_psr.c. [Jani]
- Reset sink_panel_replay_support flag during disconnection. [Jani]

v6: return statement restored which is removed by misatke. [Jouni]
v7: cosmetic changes. [Arun]

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 .../drm/i915/display/intel_display_types.h    | 14 +--
 drivers/gpu/drm/i915/display/intel_dp.c       | 49 ++++++++--
 drivers/gpu/drm/i915/display/intel_dp_mst.c   |  3 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 96 ++++++++++++++-----
 drivers/gpu/drm/i915/display/intel_psr.h      |  7 ++
 5 files changed, 123 insertions(+), 46 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8d8b2f8d37a9..95b318f7b2b8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1204,6 +1204,7 @@ struct intel_crtc_state {
 	bool has_psr2;
 	bool enable_psr2_sel_fetch;
 	bool req_psr2_sdp_prior_scanline;
+	bool has_panel_replay;
 	bool wm_level_disabled;
 	u32 dc3co_exitline;
 	u16 su_y_granularity;
@@ -1701,6 +1702,8 @@ struct intel_psr {
 	bool irq_aux_error;
 	u16 su_w_granularity;
 	u16 su_y_granularity;
+	bool source_panel_replay_support;
+	bool sink_panel_replay_support;
 	u32 dc3co_exitline;
 	u32 dc3co_exit_delay;
 	struct delayed_work dc3co_work;
@@ -1988,17 +1991,6 @@ dp_to_lspcon(struct intel_dp *intel_dp)
 
 #define dp_to_i915(__intel_dp) to_i915(dp_to_dig_port(__intel_dp)->base.base.dev)
 
-#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
-			   (intel_dp)->psr.source_support)
-
-static inline bool intel_encoder_can_psr(struct intel_encoder *encoder)
-{
-	if (!intel_encoder_is_dp(encoder))
-		return false;
-
-	return CAN_PSR(enc_to_intel_dp(encoder));
-}
-
 static inline struct intel_digital_port *
 hdmi_to_dig_port(struct intel_hdmi *intel_hdmi)
 {
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 0ef7cb8134b6..b038f1d2a7ad 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -2432,12 +2432,22 @@ static void intel_dp_compute_vsc_colorimetry(const struct intel_crtc_state *crtc
 	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
 	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
 
-	/*
-	 * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
-	 * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
-	 * Colorimetry Format indication.
-	 */
-	vsc->revision = 0x5;
+	if (crtc_state->has_panel_replay) {
+		/*
+		 * Prepare VSC Header for SU as per DP 2.0 spec, Table 2-223
+		 * VSC SDP supporting 3D stereo, Panel Replay, and Pixel
+		 * Encoding/Colorimetry Format indication.
+		 */
+		vsc->revision = 0x7;
+	} else {
+		/*
+		 * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
+		 * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
+		 * Colorimetry Format indication.
+		 */
+		vsc->revision = 0x5;
+	}
+
 	vsc->length = 0x13;
 
 	/* DP 1.4a spec, Table 2-120 */
@@ -2546,6 +2556,21 @@ void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
 			vsc->revision = 0x4;
 			vsc->length = 0xe;
 		}
+	} else if (crtc_state->has_panel_replay) {
+		if (intel_dp->psr.colorimetry_support &&
+		    intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
+			/* [Panel Replay with colorimetry info] */
+			intel_dp_compute_vsc_colorimetry(crtc_state, conn_state,
+							 vsc);
+		} else {
+			/*
+			 * [Panel Replay without colorimetry info]
+			 * Prepare VSC Header for SU as per DP 2.0 spec, Table 2-223
+			 * VSC SDP supporting 3D stereo + Panel Replay.
+			 */
+			vsc->revision = 0x6;
+			vsc->length = 0x10;
+		}
 	} else {
 		/*
 		 * [PSR1]
@@ -3843,11 +3868,16 @@ static ssize_t intel_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc,
 	sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */
 	sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */
 
+	if (vsc->revision == 0x6) {
+		sdp->db[0] = 1;
+		sdp->db[3] = 1;
+	}
+
 	/*
-	 * Only revision 0x5 supports Pixel Encoding/Colorimetry Format as
-	 * per DP 1.4a spec.
+	 * Revision 0x5 and revision 0x7 supports Pixel Encoding/Colorimetry
+	 * Format as per DP 1.4a spec and DP 2.0 respectively.
 	 */
-	if (vsc->revision != 0x5)
+	if (!(vsc->revision == 0x5 || vsc->revision == 0x7))
 		goto out;
 
 	/* VSC SDP Payload for DB16 through DB18 */
@@ -5368,6 +5398,7 @@ intel_dp_detect(struct drm_connector *connector,
 	if (status == connector_status_disconnected) {
 		memset(&intel_dp->compliance, 0, sizeof(intel_dp->compliance));
 		memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd));
+		intel_dp->psr.sink_panel_replay_support = false;
 
 		if (intel_dp->is_mst) {
 			drm_dbg_kms(&dev_priv->drm,
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 73e397736463..617b7afbcb94 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -43,6 +43,7 @@
 #include "intel_dpio_phy.h"
 #include "intel_hdcp.h"
 #include "intel_hotplug.h"
+#include "intel_psr.h"
 #include "skl_scaler.h"
 
 static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp,
@@ -422,6 +423,8 @@ static int intel_dp_mst_compute_config(struct intel_encoder *encoder,
 
 	intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
 
+	intel_psr_compute_config(intel_dp, pipe_config, conn_state);
+
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 0669ab7a9191..f9837001aa5f 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -172,6 +172,15 @@
  * irrelevant for normal operation.
  */
 
+bool intel_encoder_can_psr(struct intel_encoder *encoder)
+{
+	if (intel_encoder_is_dp(encoder) || encoder->type == INTEL_OUTPUT_DP_MST)
+		return CAN_PSR(enc_to_intel_dp(encoder)) ||
+		       CAN_PANEL_REPLAY(enc_to_intel_dp(encoder));
+	else
+		return false;
+}
+
 static bool psr_global_enabled(struct intel_dp *intel_dp)
 {
 	struct intel_connector *connector = intel_dp->attached_connector;
@@ -474,6 +483,25 @@ static void intel_dp_get_su_granularity(struct intel_dp *intel_dp)
 	intel_dp->psr.su_y_granularity = y;
 }
 
+static void _panel_replay_init_dpcd(struct intel_dp *intel_dp)
+{
+	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
+	u8 pr_dpcd = 0;
+
+	intel_dp->psr.sink_panel_replay_support = false;
+	drm_dp_dpcd_readb(&intel_dp->aux, DP_PANEL_REPLAY_CAP, &pr_dpcd);
+
+	if (!(pr_dpcd & DP_PANEL_REPLAY_SUPPORT)) {
+		drm_dbg_kms(&i915->drm,
+			    "Panel replay is not supported by panel\n");
+		return;
+	}
+
+	drm_dbg_kms(&i915->drm,
+		    "Panel replay is supported by panel\n");
+	intel_dp->psr.sink_panel_replay_support = true;
+}
+
 static void _psr_init_dpcd(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *i915 =
@@ -523,12 +551,13 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp)
 
 void intel_psr_init_dpcd(struct intel_dp *intel_dp)
 {
+	_panel_replay_init_dpcd(intel_dp);
+
 	drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
 			 sizeof(intel_dp->psr_dpcd));
 
 	if (intel_dp->psr_dpcd[0])
 		_psr_init_dpcd(intel_dp);
-	/* TODO: Add PR case here */
 
 	if (intel_dp->psr.sink_psr2_support) {
 		intel_dp->psr.colorimetry_support =
@@ -1209,13 +1238,11 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
 	return false;
 }
 
-void intel_psr_compute_config(struct intel_dp *intel_dp,
-			      struct intel_crtc_state *crtc_state,
-			      struct drm_connector_state *conn_state)
+static bool _psr_compute_config(struct intel_dp *intel_dp,
+				struct intel_crtc_state *crtc_state)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
-	const struct drm_display_mode *adjusted_mode =
-		&crtc_state->hw.adjusted_mode;
+	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
 	int psr_setup_time;
 
 	/*
@@ -1223,10 +1250,36 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 	 * So if VRR is enabled, do not enable PSR.
 	 */
 	if (crtc_state->vrr.enable)
-		return;
+		return false;
 
 	if (!CAN_PSR(intel_dp))
-		return;
+		return false;
+
+	psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
+	if (psr_setup_time < 0) {
+		drm_dbg_kms(&dev_priv->drm,
+			    "PSR condition failed: Invalid PSR setup time (0x%02x)\n",
+			    intel_dp->psr_dpcd[1]);
+		return false;
+	}
+
+	if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
+	    adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
+		drm_dbg_kms(&dev_priv->drm,
+			    "PSR condition failed: PSR setup time (%d us) too long\n",
+			    psr_setup_time);
+		return false;
+	}
+
+	return true;
+}
+
+void intel_psr_compute_config(struct intel_dp *intel_dp,
+			      struct intel_crtc_state *crtc_state,
+			      struct drm_connector_state *conn_state)
+{
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+	const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
 
 	if (!psr_global_enabled(intel_dp)) {
 		drm_dbg_kms(&dev_priv->drm, "PSR disabled by flag\n");
@@ -1245,23 +1298,11 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
 		return;
 	}
 
-	psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
-	if (psr_setup_time < 0) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "PSR condition failed: Invalid PSR setup time (0x%02x)\n",
-			    intel_dp->psr_dpcd[1]);
-		return;
-	}
-
-	if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
-	    adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
-		drm_dbg_kms(&dev_priv->drm,
-			    "PSR condition failed: PSR setup time (%d us) too long\n",
-			    psr_setup_time);
-		return;
-	}
+	if (CAN_PANEL_REPLAY(intel_dp))
+		crtc_state->has_panel_replay = true;
+	else
+		crtc_state->has_psr = _psr_compute_config(intel_dp, crtc_state);
 
-	crtc_state->has_psr = true;
 	crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
 
 	crtc_state->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC);
@@ -2694,7 +2735,7 @@ void intel_psr_init(struct intel_dp *intel_dp)
 	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 
-	if (!HAS_PSR(dev_priv))
+	if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
 		return;
 
 	/*
@@ -2712,7 +2753,10 @@ void intel_psr_init(struct intel_dp *intel_dp)
 		return;
 	}
 
-	intel_dp->psr.source_support = true;
+	if (HAS_DP20(dev_priv) && !intel_dp_is_edp(intel_dp))
+		intel_dp->psr.source_panel_replay_support = true;
+	else
+		intel_dp->psr.source_support = true;
 
 	/* Set link_standby x link_off defaults */
 	if (DISPLAY_VER(dev_priv) < 12)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index bf35f42df6bc..6a1f4573852b 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -21,6 +21,13 @@ struct intel_encoder;
 struct intel_plane;
 struct intel_plane_state;
 
+#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
+			   (intel_dp)->psr.source_support)
+
+#define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)->psr.sink_panel_replay_support && \
+				    (intel_dp)->psr.source_panel_replay_support)
+
+bool intel_encoder_can_psr(struct intel_encoder *encoder);
 void intel_psr_init_dpcd(struct intel_dp *intel_dp);
 void intel_psr_pre_plane_update(struct intel_atomic_state *state,
 				struct intel_crtc *crtc);
-- 
2.29.0

Re: [Intel-gfx] [PATCH v7 3/6] drm/i915/panelreplay: Initializaton and compute config for panel replay

[Murthy, Arun R]

> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>;
> Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [PATCH v7 3/6] drm/i915/panelreplay: Initializaton and compute config
> for panel replay
> 
> Modify existing PSR implementation to enable panel replay feature of DP 2.0
> which is similar to PSR feature of EDP panel. There is different DPCD address to
> check panel capability compare to PSR and vsc sdp header is different.
> 
> v1: Initial version.
> v2:
> - Set source_panel_replay_support flag under HAS_PANEL_REPLAY() condition
> check. [Jouni]
> - Code restructured around intel_panel_replay_init and renamed to
> intel_panel_replay_init_dpcd. [Jouni]
> - Remove the initial code modification around has_psr2 flag. [Jouni]
> - Add CAN_PANEL_REPLAY() in intel_encoder_can_psr which is used to enable in
> intel_psr_post_plane_update. [Jouni]
> v3:
> - Initialize both psr and panel-replay. [Jouni]
> - Initialize both panel replay and psr if detected. [Jouni]
> - Refactoring psr function by introducing _psr_compute_config(). [Jouni]
> - Add check for !is_edp while deriving source_panel_replay_support. [Jouni]
> - Enable panel replay dpcd initialization in a separate patch. [Jouni]
> 
> v4:
> - HAS_PANEL_REPLAY() check not needed during sink capability check. [Jouni]
> - Set either panel replay source support or psr. [Jouni]
> 
> v5:
> - HAS_PANEL_REPLAY() removed and use HAS_DP20() instead. [Jouni]
> - Move psr related code to intel_psr.c. [Jani]
> - Reset sink_panel_replay_support flag during disconnection. [Jani]
> 
> v6: return statement restored which is removed by misatke. [Jouni]
> v7: cosmetic changes. [Arun]
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---

Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>

Thanks and Regards,
Arun R Murthy
-------------------

>  .../drm/i915/display/intel_display_types.h    | 14 +--
>  drivers/gpu/drm/i915/display/intel_dp.c       | 49 ++++++++--
>  drivers/gpu/drm/i915/display/intel_dp_mst.c   |  3 +
>  drivers/gpu/drm/i915/display/intel_psr.c      | 96 ++++++++++++++-----
>  drivers/gpu/drm/i915/display/intel_psr.h      |  7 ++
>  5 files changed, 123 insertions(+), 46 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 8d8b2f8d37a9..95b318f7b2b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1204,6 +1204,7 @@ struct intel_crtc_state {
>  	bool has_psr2;
>  	bool enable_psr2_sel_fetch;
>  	bool req_psr2_sdp_prior_scanline;
> +	bool has_panel_replay;
>  	bool wm_level_disabled;
>  	u32 dc3co_exitline;
>  	u16 su_y_granularity;
> @@ -1701,6 +1702,8 @@ struct intel_psr {
>  	bool irq_aux_error;
>  	u16 su_w_granularity;
>  	u16 su_y_granularity;
> +	bool source_panel_replay_support;
> +	bool sink_panel_replay_support;
>  	u32 dc3co_exitline;
>  	u32 dc3co_exit_delay;
>  	struct delayed_work dc3co_work;
> @@ -1988,17 +1991,6 @@ dp_to_lspcon(struct intel_dp *intel_dp)
> 
>  #define dp_to_i915(__intel_dp) to_i915(dp_to_dig_port(__intel_dp)-
> >base.base.dev)
> 
> -#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
> -			   (intel_dp)->psr.source_support)
> -
> -static inline bool intel_encoder_can_psr(struct intel_encoder *encoder) -{
> -	if (!intel_encoder_is_dp(encoder))
> -		return false;
> -
> -	return CAN_PSR(enc_to_intel_dp(encoder));
> -}
> -
>  static inline struct intel_digital_port *  hdmi_to_dig_port(struct intel_hdmi
> *intel_hdmi)  { diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0ef7cb8134b6..b038f1d2a7ad 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2432,12 +2432,22 @@ static void
> intel_dp_compute_vsc_colorimetry(const struct intel_crtc_state *crtc
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> 
> -	/*
> -	 * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
> -	 * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
> -	 * Colorimetry Format indication.
> -	 */
> -	vsc->revision = 0x5;
> +	if (crtc_state->has_panel_replay) {
> +		/*
> +		 * Prepare VSC Header for SU as per DP 2.0 spec, Table 2-223
> +		 * VSC SDP supporting 3D stereo, Panel Replay, and Pixel
> +		 * Encoding/Colorimetry Format indication.
> +		 */
> +		vsc->revision = 0x7;
> +	} else {
> +		/*
> +		 * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
> +		 * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
> +		 * Colorimetry Format indication.
> +		 */
> +		vsc->revision = 0x5;
> +	}
> +
>  	vsc->length = 0x13;
> 
>  	/* DP 1.4a spec, Table 2-120 */
> @@ -2546,6 +2556,21 @@ void intel_dp_compute_psr_vsc_sdp(struct intel_dp
> *intel_dp,
>  			vsc->revision = 0x4;
>  			vsc->length = 0xe;
>  		}
> +	} else if (crtc_state->has_panel_replay) {
> +		if (intel_dp->psr.colorimetry_support &&
> +		    intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
> +			/* [Panel Replay with colorimetry info] */
> +			intel_dp_compute_vsc_colorimetry(crtc_state,
> conn_state,
> +							 vsc);
> +		} else {
> +			/*
> +			 * [Panel Replay without colorimetry info]
> +			 * Prepare VSC Header for SU as per DP 2.0 spec, Table
> 2-223
> +			 * VSC SDP supporting 3D stereo + Panel Replay.
> +			 */
> +			vsc->revision = 0x6;
> +			vsc->length = 0x10;
> +		}
>  	} else {
>  		/*
>  		 * [PSR1]
> @@ -3843,11 +3868,16 @@ static ssize_t intel_dp_vsc_sdp_pack(const struct
> drm_dp_vsc_sdp *vsc,
>  	sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */
>  	sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */
> 
> +	if (vsc->revision == 0x6) {
> +		sdp->db[0] = 1;
> +		sdp->db[3] = 1;
> +	}
> +
>  	/*
> -	 * Only revision 0x5 supports Pixel Encoding/Colorimetry Format as
> -	 * per DP 1.4a spec.
> +	 * Revision 0x5 and revision 0x7 supports Pixel Encoding/Colorimetry
> +	 * Format as per DP 1.4a spec and DP 2.0 respectively.
>  	 */
> -	if (vsc->revision != 0x5)
> +	if (!(vsc->revision == 0x5 || vsc->revision == 0x7))
>  		goto out;
> 
>  	/* VSC SDP Payload for DB16 through DB18 */ @@ -5368,6 +5398,7
> @@ intel_dp_detect(struct drm_connector *connector,
>  	if (status == connector_status_disconnected) {
>  		memset(&intel_dp->compliance, 0, sizeof(intel_dp-
> >compliance));
>  		memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd));
> +		intel_dp->psr.sink_panel_replay_support = false;
> 
>  		if (intel_dp->is_mst) {
>  			drm_dbg_kms(&dev_priv->drm,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 73e397736463..617b7afbcb94 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -43,6 +43,7 @@
>  #include "intel_dpio_phy.h"
>  #include "intel_hdcp.h"
>  #include "intel_hotplug.h"
> +#include "intel_psr.h"
>  #include "skl_scaler.h"
> 
>  static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int
> bpp, @@ -422,6 +423,8 @@ static int intel_dp_mst_compute_config(struct
> intel_encoder *encoder,
> 
>  	intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
> 
> +	intel_psr_compute_config(intel_dp, pipe_config, conn_state);
> +
>  	return 0;
>  }
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 0669ab7a9191..f9837001aa5f 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -172,6 +172,15 @@
>   * irrelevant for normal operation.
>   */
> 
> +bool intel_encoder_can_psr(struct intel_encoder *encoder) {
> +	if (intel_encoder_is_dp(encoder) || encoder->type ==
> INTEL_OUTPUT_DP_MST)
> +		return CAN_PSR(enc_to_intel_dp(encoder)) ||
> +		       CAN_PANEL_REPLAY(enc_to_intel_dp(encoder));
> +	else
> +		return false;
> +}
> +
>  static bool psr_global_enabled(struct intel_dp *intel_dp)  {
>  	struct intel_connector *connector = intel_dp->attached_connector; @@
> -474,6 +483,25 @@ static void intel_dp_get_su_granularity(struct intel_dp
> *intel_dp)
>  	intel_dp->psr.su_y_granularity = y;
>  }
> 
> +static void _panel_replay_init_dpcd(struct intel_dp *intel_dp) {
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +	u8 pr_dpcd = 0;
> +
> +	intel_dp->psr.sink_panel_replay_support = false;
> +	drm_dp_dpcd_readb(&intel_dp->aux, DP_PANEL_REPLAY_CAP,
> &pr_dpcd);
> +
> +	if (!(pr_dpcd & DP_PANEL_REPLAY_SUPPORT)) {
> +		drm_dbg_kms(&i915->drm,
> +			    "Panel replay is not supported by panel\n");
> +		return;
> +	}
> +
> +	drm_dbg_kms(&i915->drm,
> +		    "Panel replay is supported by panel\n");
> +	intel_dp->psr.sink_panel_replay_support = true; }
> +
>  static void _psr_init_dpcd(struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *i915 =
> @@ -523,12 +551,13 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp)
> 
>  void intel_psr_init_dpcd(struct intel_dp *intel_dp)  {
> +	_panel_replay_init_dpcd(intel_dp);
> +
>  	drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp-
> >psr_dpcd,
>  			 sizeof(intel_dp->psr_dpcd));
> 
>  	if (intel_dp->psr_dpcd[0])
>  		_psr_init_dpcd(intel_dp);
> -	/* TODO: Add PR case here */
> 
>  	if (intel_dp->psr.sink_psr2_support) {
>  		intel_dp->psr.colorimetry_support =
> @@ -1209,13 +1238,11 @@ static bool intel_psr2_config_valid(struct intel_dp
> *intel_dp,
>  	return false;
>  }
> 
> -void intel_psr_compute_config(struct intel_dp *intel_dp,
> -			      struct intel_crtc_state *crtc_state,
> -			      struct drm_connector_state *conn_state)
> +static bool _psr_compute_config(struct intel_dp *intel_dp,
> +				struct intel_crtc_state *crtc_state)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	const struct drm_display_mode *adjusted_mode =
> -		&crtc_state->hw.adjusted_mode;
> +	const struct drm_display_mode *adjusted_mode =
> +&crtc_state->hw.adjusted_mode;
>  	int psr_setup_time;
> 
>  	/*
> @@ -1223,10 +1250,36 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
>  	 * So if VRR is enabled, do not enable PSR.
>  	 */
>  	if (crtc_state->vrr.enable)
> -		return;
> +		return false;
> 
>  	if (!CAN_PSR(intel_dp))
> -		return;
> +		return false;
> +
> +	psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
> +	if (psr_setup_time < 0) {
> +		drm_dbg_kms(&dev_priv->drm,
> +			    "PSR condition failed: Invalid PSR setup time
> (0x%02x)\n",
> +			    intel_dp->psr_dpcd[1]);
> +		return false;
> +	}
> +
> +	if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
> +	    adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
> +		drm_dbg_kms(&dev_priv->drm,
> +			    "PSR condition failed: PSR setup time (%d us) too
> long\n",
> +			    psr_setup_time);
> +		return false;
> +	}
> +
> +	return true;
> +}
> +
> +void intel_psr_compute_config(struct intel_dp *intel_dp,
> +			      struct intel_crtc_state *crtc_state,
> +			      struct drm_connector_state *conn_state) {
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +	const struct drm_display_mode *adjusted_mode =
> +&crtc_state->hw.adjusted_mode;
> 
>  	if (!psr_global_enabled(intel_dp)) {
>  		drm_dbg_kms(&dev_priv->drm, "PSR disabled by flag\n"); @@
> -1245,23 +1298,11 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
>  		return;
>  	}
> 
> -	psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
> -	if (psr_setup_time < 0) {
> -		drm_dbg_kms(&dev_priv->drm,
> -			    "PSR condition failed: Invalid PSR setup time
> (0x%02x)\n",
> -			    intel_dp->psr_dpcd[1]);
> -		return;
> -	}
> -
> -	if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
> -	    adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
> -		drm_dbg_kms(&dev_priv->drm,
> -			    "PSR condition failed: PSR setup time (%d us) too
> long\n",
> -			    psr_setup_time);
> -		return;
> -	}
> +	if (CAN_PANEL_REPLAY(intel_dp))
> +		crtc_state->has_panel_replay = true;
> +	else
> +		crtc_state->has_psr = _psr_compute_config(intel_dp,
> crtc_state);
> 
> -	crtc_state->has_psr = true;
>  	crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
> 
>  	crtc_state->infoframes.enable |=
> intel_hdmi_infoframe_enable(DP_SDP_VSC);
> @@ -2694,7 +2735,7 @@ void intel_psr_init(struct intel_dp *intel_dp)
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> 
> -	if (!HAS_PSR(dev_priv))
> +	if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
>  		return;
> 
>  	/*
> @@ -2712,7 +2753,10 @@ void intel_psr_init(struct intel_dp *intel_dp)
>  		return;
>  	}
> 
> -	intel_dp->psr.source_support = true;
> +	if (HAS_DP20(dev_priv) && !intel_dp_is_edp(intel_dp))
> +		intel_dp->psr.source_panel_replay_support = true;
> +	else
> +		intel_dp->psr.source_support = true;
> 
>  	/* Set link_standby x link_off defaults */
>  	if (DISPLAY_VER(dev_priv) < 12)
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.h
> b/drivers/gpu/drm/i915/display/intel_psr.h
> index bf35f42df6bc..6a1f4573852b 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr.h
> @@ -21,6 +21,13 @@ struct intel_encoder;  struct intel_plane;  struct
> intel_plane_state;
> 
> +#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
> +			   (intel_dp)->psr.source_support)
> +
> +#define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)-
> >psr.sink_panel_replay_support && \
> +				    (intel_dp)-
> >psr.source_panel_replay_support)
> +
> +bool intel_encoder_can_psr(struct intel_encoder *encoder);
>  void intel_psr_init_dpcd(struct intel_dp *intel_dp);  void
> intel_psr_pre_plane_update(struct intel_atomic_state *state,
>  				struct intel_crtc *crtc);
> --
> 2.29.0

RE: [PATCH v7 3/6] drm/i915/panelreplay: Initializaton and compute config for panel replay

[Murthy, Arun R]

> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>;
> Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [PATCH v7 3/6] drm/i915/panelreplay: Initializaton and compute config
> for panel replay
> 
> Modify existing PSR implementation to enable panel replay feature of DP 2.0
> which is similar to PSR feature of EDP panel. There is different DPCD address to
> check panel capability compare to PSR and vsc sdp header is different.
> 
> v1: Initial version.
> v2:
> - Set source_panel_replay_support flag under HAS_PANEL_REPLAY() condition
> check. [Jouni]
> - Code restructured around intel_panel_replay_init and renamed to
> intel_panel_replay_init_dpcd. [Jouni]
> - Remove the initial code modification around has_psr2 flag. [Jouni]
> - Add CAN_PANEL_REPLAY() in intel_encoder_can_psr which is used to enable in
> intel_psr_post_plane_update. [Jouni]
> v3:
> - Initialize both psr and panel-replay. [Jouni]
> - Initialize both panel replay and psr if detected. [Jouni]
> - Refactoring psr function by introducing _psr_compute_config(). [Jouni]
> - Add check for !is_edp while deriving source_panel_replay_support. [Jouni]
> - Enable panel replay dpcd initialization in a separate patch. [Jouni]
> 
> v4:
> - HAS_PANEL_REPLAY() check not needed during sink capability check. [Jouni]
> - Set either panel replay source support or psr. [Jouni]
> 
> v5:
> - HAS_PANEL_REPLAY() removed and use HAS_DP20() instead. [Jouni]
> - Move psr related code to intel_psr.c. [Jani]
> - Reset sink_panel_replay_support flag during disconnection. [Jani]
> 
> v6: return statement restored which is removed by misatke. [Jouni]
> v7: cosmetic changes. [Arun]
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---

Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>

Thanks and Regards,
Arun R Murthy
-------------------

>  .../drm/i915/display/intel_display_types.h    | 14 +--
>  drivers/gpu/drm/i915/display/intel_dp.c       | 49 ++++++++--
>  drivers/gpu/drm/i915/display/intel_dp_mst.c   |  3 +
>  drivers/gpu/drm/i915/display/intel_psr.c      | 96 ++++++++++++++-----
>  drivers/gpu/drm/i915/display/intel_psr.h      |  7 ++
>  5 files changed, 123 insertions(+), 46 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 8d8b2f8d37a9..95b318f7b2b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1204,6 +1204,7 @@ struct intel_crtc_state {
>  	bool has_psr2;
>  	bool enable_psr2_sel_fetch;
>  	bool req_psr2_sdp_prior_scanline;
> +	bool has_panel_replay;
>  	bool wm_level_disabled;
>  	u32 dc3co_exitline;
>  	u16 su_y_granularity;
> @@ -1701,6 +1702,8 @@ struct intel_psr {
>  	bool irq_aux_error;
>  	u16 su_w_granularity;
>  	u16 su_y_granularity;
> +	bool source_panel_replay_support;
> +	bool sink_panel_replay_support;
>  	u32 dc3co_exitline;
>  	u32 dc3co_exit_delay;
>  	struct delayed_work dc3co_work;
> @@ -1988,17 +1991,6 @@ dp_to_lspcon(struct intel_dp *intel_dp)
> 
>  #define dp_to_i915(__intel_dp) to_i915(dp_to_dig_port(__intel_dp)-
> >base.base.dev)
> 
> -#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
> -			   (intel_dp)->psr.source_support)
> -
> -static inline bool intel_encoder_can_psr(struct intel_encoder *encoder) -{
> -	if (!intel_encoder_is_dp(encoder))
> -		return false;
> -
> -	return CAN_PSR(enc_to_intel_dp(encoder));
> -}
> -
>  static inline struct intel_digital_port *  hdmi_to_dig_port(struct intel_hdmi
> *intel_hdmi)  { diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 0ef7cb8134b6..b038f1d2a7ad 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2432,12 +2432,22 @@ static void
> intel_dp_compute_vsc_colorimetry(const struct intel_crtc_state *crtc
>  	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
>  	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
> 
> -	/*
> -	 * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
> -	 * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
> -	 * Colorimetry Format indication.
> -	 */
> -	vsc->revision = 0x5;
> +	if (crtc_state->has_panel_replay) {
> +		/*
> +		 * Prepare VSC Header for SU as per DP 2.0 spec, Table 2-223
> +		 * VSC SDP supporting 3D stereo, Panel Replay, and Pixel
> +		 * Encoding/Colorimetry Format indication.
> +		 */
> +		vsc->revision = 0x7;
> +	} else {
> +		/*
> +		 * Prepare VSC Header for SU as per DP 1.4 spec, Table 2-118
> +		 * VSC SDP supporting 3D stereo, PSR2, and Pixel Encoding/
> +		 * Colorimetry Format indication.
> +		 */
> +		vsc->revision = 0x5;
> +	}
> +
>  	vsc->length = 0x13;
> 
>  	/* DP 1.4a spec, Table 2-120 */
> @@ -2546,6 +2556,21 @@ void intel_dp_compute_psr_vsc_sdp(struct intel_dp
> *intel_dp,
>  			vsc->revision = 0x4;
>  			vsc->length = 0xe;
>  		}
> +	} else if (crtc_state->has_panel_replay) {
> +		if (intel_dp->psr.colorimetry_support &&
> +		    intel_dp_needs_vsc_sdp(crtc_state, conn_state)) {
> +			/* [Panel Replay with colorimetry info] */
> +			intel_dp_compute_vsc_colorimetry(crtc_state,
> conn_state,
> +							 vsc);
> +		} else {
> +			/*
> +			 * [Panel Replay without colorimetry info]
> +			 * Prepare VSC Header for SU as per DP 2.0 spec, Table
> 2-223
> +			 * VSC SDP supporting 3D stereo + Panel Replay.
> +			 */
> +			vsc->revision = 0x6;
> +			vsc->length = 0x10;
> +		}
>  	} else {
>  		/*
>  		 * [PSR1]
> @@ -3843,11 +3868,16 @@ static ssize_t intel_dp_vsc_sdp_pack(const struct
> drm_dp_vsc_sdp *vsc,
>  	sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */
>  	sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */
> 
> +	if (vsc->revision == 0x6) {
> +		sdp->db[0] = 1;
> +		sdp->db[3] = 1;
> +	}
> +
>  	/*
> -	 * Only revision 0x5 supports Pixel Encoding/Colorimetry Format as
> -	 * per DP 1.4a spec.
> +	 * Revision 0x5 and revision 0x7 supports Pixel Encoding/Colorimetry
> +	 * Format as per DP 1.4a spec and DP 2.0 respectively.
>  	 */
> -	if (vsc->revision != 0x5)
> +	if (!(vsc->revision == 0x5 || vsc->revision == 0x7))
>  		goto out;
> 
>  	/* VSC SDP Payload for DB16 through DB18 */ @@ -5368,6 +5398,7
> @@ intel_dp_detect(struct drm_connector *connector,
>  	if (status == connector_status_disconnected) {
>  		memset(&intel_dp->compliance, 0, sizeof(intel_dp-
> >compliance));
>  		memset(intel_dp->dsc_dpcd, 0, sizeof(intel_dp->dsc_dpcd));
> +		intel_dp->psr.sink_panel_replay_support = false;
> 
>  		if (intel_dp->is_mst) {
>  			drm_dbg_kms(&dev_priv->drm,
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 73e397736463..617b7afbcb94 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -43,6 +43,7 @@
>  #include "intel_dpio_phy.h"
>  #include "intel_hdcp.h"
>  #include "intel_hotplug.h"
> +#include "intel_psr.h"
>  #include "skl_scaler.h"
> 
>  static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int
> bpp, @@ -422,6 +423,8 @@ static int intel_dp_mst_compute_config(struct
> intel_encoder *encoder,
> 
>  	intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
> 
> +	intel_psr_compute_config(intel_dp, pipe_config, conn_state);
> +
>  	return 0;
>  }
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 0669ab7a9191..f9837001aa5f 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -172,6 +172,15 @@
>   * irrelevant for normal operation.
>   */
> 
> +bool intel_encoder_can_psr(struct intel_encoder *encoder) {
> +	if (intel_encoder_is_dp(encoder) || encoder->type ==
> INTEL_OUTPUT_DP_MST)
> +		return CAN_PSR(enc_to_intel_dp(encoder)) ||
> +		       CAN_PANEL_REPLAY(enc_to_intel_dp(encoder));
> +	else
> +		return false;
> +}
> +
>  static bool psr_global_enabled(struct intel_dp *intel_dp)  {
>  	struct intel_connector *connector = intel_dp->attached_connector; @@
> -474,6 +483,25 @@ static void intel_dp_get_su_granularity(struct intel_dp
> *intel_dp)
>  	intel_dp->psr.su_y_granularity = y;
>  }
> 
> +static void _panel_replay_init_dpcd(struct intel_dp *intel_dp) {
> +	struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> +	u8 pr_dpcd = 0;
> +
> +	intel_dp->psr.sink_panel_replay_support = false;
> +	drm_dp_dpcd_readb(&intel_dp->aux, DP_PANEL_REPLAY_CAP,
> &pr_dpcd);
> +
> +	if (!(pr_dpcd & DP_PANEL_REPLAY_SUPPORT)) {
> +		drm_dbg_kms(&i915->drm,
> +			    "Panel replay is not supported by panel\n");
> +		return;
> +	}
> +
> +	drm_dbg_kms(&i915->drm,
> +		    "Panel replay is supported by panel\n");
> +	intel_dp->psr.sink_panel_replay_support = true; }
> +
>  static void _psr_init_dpcd(struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *i915 =
> @@ -523,12 +551,13 @@ static void _psr_init_dpcd(struct intel_dp *intel_dp)
> 
>  void intel_psr_init_dpcd(struct intel_dp *intel_dp)  {
> +	_panel_replay_init_dpcd(intel_dp);
> +
>  	drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp-
> >psr_dpcd,
>  			 sizeof(intel_dp->psr_dpcd));
> 
>  	if (intel_dp->psr_dpcd[0])
>  		_psr_init_dpcd(intel_dp);
> -	/* TODO: Add PR case here */
> 
>  	if (intel_dp->psr.sink_psr2_support) {
>  		intel_dp->psr.colorimetry_support =
> @@ -1209,13 +1238,11 @@ static bool intel_psr2_config_valid(struct intel_dp
> *intel_dp,
>  	return false;
>  }
> 
> -void intel_psr_compute_config(struct intel_dp *intel_dp,
> -			      struct intel_crtc_state *crtc_state,
> -			      struct drm_connector_state *conn_state)
> +static bool _psr_compute_config(struct intel_dp *intel_dp,
> +				struct intel_crtc_state *crtc_state)
>  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> -	const struct drm_display_mode *adjusted_mode =
> -		&crtc_state->hw.adjusted_mode;
> +	const struct drm_display_mode *adjusted_mode =
> +&crtc_state->hw.adjusted_mode;
>  	int psr_setup_time;
> 
>  	/*
> @@ -1223,10 +1250,36 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
>  	 * So if VRR is enabled, do not enable PSR.
>  	 */
>  	if (crtc_state->vrr.enable)
> -		return;
> +		return false;
> 
>  	if (!CAN_PSR(intel_dp))
> -		return;
> +		return false;
> +
> +	psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
> +	if (psr_setup_time < 0) {
> +		drm_dbg_kms(&dev_priv->drm,
> +			    "PSR condition failed: Invalid PSR setup time
> (0x%02x)\n",
> +			    intel_dp->psr_dpcd[1]);
> +		return false;
> +	}
> +
> +	if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
> +	    adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
> +		drm_dbg_kms(&dev_priv->drm,
> +			    "PSR condition failed: PSR setup time (%d us) too
> long\n",
> +			    psr_setup_time);
> +		return false;
> +	}
> +
> +	return true;
> +}
> +
> +void intel_psr_compute_config(struct intel_dp *intel_dp,
> +			      struct intel_crtc_state *crtc_state,
> +			      struct drm_connector_state *conn_state) {
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +	const struct drm_display_mode *adjusted_mode =
> +&crtc_state->hw.adjusted_mode;
> 
>  	if (!psr_global_enabled(intel_dp)) {
>  		drm_dbg_kms(&dev_priv->drm, "PSR disabled by flag\n"); @@
> -1245,23 +1298,11 @@ void intel_psr_compute_config(struct intel_dp
> *intel_dp,
>  		return;
>  	}
> 
> -	psr_setup_time = drm_dp_psr_setup_time(intel_dp->psr_dpcd);
> -	if (psr_setup_time < 0) {
> -		drm_dbg_kms(&dev_priv->drm,
> -			    "PSR condition failed: Invalid PSR setup time
> (0x%02x)\n",
> -			    intel_dp->psr_dpcd[1]);
> -		return;
> -	}
> -
> -	if (intel_usecs_to_scanlines(adjusted_mode, psr_setup_time) >
> -	    adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vdisplay - 1) {
> -		drm_dbg_kms(&dev_priv->drm,
> -			    "PSR condition failed: PSR setup time (%d us) too
> long\n",
> -			    psr_setup_time);
> -		return;
> -	}
> +	if (CAN_PANEL_REPLAY(intel_dp))
> +		crtc_state->has_panel_replay = true;
> +	else
> +		crtc_state->has_psr = _psr_compute_config(intel_dp,
> crtc_state);
> 
> -	crtc_state->has_psr = true;
>  	crtc_state->has_psr2 = intel_psr2_config_valid(intel_dp, crtc_state);
> 
>  	crtc_state->infoframes.enable |=
> intel_hdmi_infoframe_enable(DP_SDP_VSC);
> @@ -2694,7 +2735,7 @@ void intel_psr_init(struct intel_dp *intel_dp)
>  	struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> 
> -	if (!HAS_PSR(dev_priv))
> +	if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
>  		return;
> 
>  	/*
> @@ -2712,7 +2753,10 @@ void intel_psr_init(struct intel_dp *intel_dp)
>  		return;
>  	}
> 
> -	intel_dp->psr.source_support = true;
> +	if (HAS_DP20(dev_priv) && !intel_dp_is_edp(intel_dp))
> +		intel_dp->psr.source_panel_replay_support = true;
> +	else
> +		intel_dp->psr.source_support = true;
> 
>  	/* Set link_standby x link_off defaults */
>  	if (DISPLAY_VER(dev_priv) < 12)
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.h
> b/drivers/gpu/drm/i915/display/intel_psr.h
> index bf35f42df6bc..6a1f4573852b 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.h
> +++ b/drivers/gpu/drm/i915/display/intel_psr.h
> @@ -21,6 +21,13 @@ struct intel_encoder;  struct intel_plane;  struct
> intel_plane_state;
> 
> +#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
> +			   (intel_dp)->psr.source_support)
> +
> +#define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)-
> >psr.sink_panel_replay_support && \
> +				    (intel_dp)-
> >psr.source_panel_replay_support)
> +
> +bool intel_encoder_can_psr(struct intel_encoder *encoder);
>  void intel_psr_init_dpcd(struct intel_dp *intel_dp);  void
> intel_psr_pre_plane_update(struct intel_atomic_state *state,
>  				struct intel_crtc *crtc);
> --
> 2.29.0

[Intel-gfx] [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd initialization for DP

[Animesh Manna]

Due to similarity panel replay dpcd initialization got added in psr
function which is specific for edp panel. This patch enables panel
replay initialization for dp connector.

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index f9837001aa5f..a2e0637c53fb 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2738,6 +2738,9 @@ void intel_psr_init(struct intel_dp *intel_dp)
 	if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
 		return;
 
+	if (!intel_dp_is_edp(intel_dp))
+		intel_psr_init_dpcd(intel_dp);
+
 	/*
 	 * HSW spec explicitly says PSR is tied to port A.
 	 * BDW+ platforms have a instance of PSR registers per transcoder but
-- 
2.29.0

[PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd initialization for DP

[Animesh Manna]

Due to similarity panel replay dpcd initialization got added in psr
function which is specific for edp panel. This patch enables panel
replay initialization for dp connector.

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index f9837001aa5f..a2e0637c53fb 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2738,6 +2738,9 @@ void intel_psr_init(struct intel_dp *intel_dp)
 	if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
 		return;
 
+	if (!intel_dp_is_edp(intel_dp))
+		intel_psr_init_dpcd(intel_dp);
+
 	/*
 	 * HSW spec explicitly says PSR is tied to port A.
 	 * BDW+ platforms have a instance of PSR registers per transcoder but
-- 
2.29.0

Re: [Intel-gfx] [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd initialization for DP

[Murthy, Arun R]

> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>;
> Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd
> initialization for DP
> 
> Due to similarity panel replay dpcd initialization got added in psr function which
> is specific for edp panel. This patch enables panel replay initialization for dp
> connector.
> 
If panelreplay initialization then why is the function name psr_init_dpcd() ?
Also it its similar to PSR then these dpcd should already be available.

Thanks and Regards,
Arun R Murthy
--------------------

> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index f9837001aa5f..a2e0637c53fb 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2738,6 +2738,9 @@ void intel_psr_init(struct intel_dp *intel_dp)
>  	if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
>  		return;
> 
> +	if (!intel_dp_is_edp(intel_dp))
> +		intel_psr_init_dpcd(intel_dp);
> +
>  	/*
>  	 * HSW spec explicitly says PSR is tied to port A.
>  	 * BDW+ platforms have a instance of PSR registers per transcoder but
> --
> 2.29.0

RE: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd initialization for DP

[Murthy, Arun R]

> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>;
> Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd
> initialization for DP
> 
> Due to similarity panel replay dpcd initialization got added in psr function which
> is specific for edp panel. This patch enables panel replay initialization for dp
> connector.
> 
If panelreplay initialization then why is the function name psr_init_dpcd() ?
Also it its similar to PSR then these dpcd should already be available.

Thanks and Regards,
Arun R Murthy
--------------------

> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
>  1 file changed, 3 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index f9837001aa5f..a2e0637c53fb 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2738,6 +2738,9 @@ void intel_psr_init(struct intel_dp *intel_dp)
>  	if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
>  		return;
> 
> +	if (!intel_dp_is_edp(intel_dp))
> +		intel_psr_init_dpcd(intel_dp);
> +
>  	/*
>  	 * HSW spec explicitly says PSR is tied to port A.
>  	 * BDW+ platforms have a instance of PSR registers per transcoder but
> --
> 2.29.0

Re: [Intel-gfx] [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd initialization for DP

[Manna, Animesh]

> -----Original Message-----
> From: Murthy, Arun R <arun.r.murthy@intel.com>
> Sent: Monday, October 16, 2023 9:56 AM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Hogander, Jouni
> <jouni.hogander@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> Subject: RE: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd
> initialization for DP
> 
> 
> > -----Original Message-----
> > From: Manna, Animesh <animesh.manna@intel.com>
> > Sent: Wednesday, October 11, 2023 4:40 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> > <animesh.manna@intel.com>; Hogander, Jouni
> <jouni.hogander@intel.com>;
> > Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> > <jani.nikula@intel.com>
> > Subject: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd
> > initialization for DP
> >
> > Due to similarity panel replay dpcd initialization got added in psr
> > function which is specific for edp panel. This patch enables panel
> > replay initialization for dp connector.
> >
> If panelreplay initialization then why is the function name psr_init_dpcd() ?
> Also it its similar to PSR then these dpcd should already be available.

Hi Arun,

The first call for intel_psr_init_dpcd() get called from intel_edp_init_dpcd() which is not reachable for DP.
So, in this patch need to add intel_psr_init_dpcd() for DP(non-edp) in intel_psr_init().
Panel replay initialization added in intel_psr_init() as per previous feedback just to align panel-replay with psr framework. 

Regards,
Animesh
> 
> Thanks and Regards,
> Arun R Murthy
> --------------------
> 
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index f9837001aa5f..a2e0637c53fb 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -2738,6 +2738,9 @@ void intel_psr_init(struct intel_dp *intel_dp)
> >  	if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
> >  		return;
> >
> > +	if (!intel_dp_is_edp(intel_dp))
> > +		intel_psr_init_dpcd(intel_dp);
> > +
> >  	/*
> >  	 * HSW spec explicitly says PSR is tied to port A.
> >  	 * BDW+ platforms have a instance of PSR registers per transcoder
> > but
> > --
> > 2.29.0

RE: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd initialization for DP

[Manna, Animesh]

> -----Original Message-----
> From: Murthy, Arun R <arun.r.murthy@intel.com>
> Sent: Monday, October 16, 2023 9:56 AM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Hogander, Jouni
> <jouni.hogander@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> Subject: RE: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd
> initialization for DP
> 
> 
> > -----Original Message-----
> > From: Manna, Animesh <animesh.manna@intel.com>
> > Sent: Wednesday, October 11, 2023 4:40 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> > <animesh.manna@intel.com>; Hogander, Jouni
> <jouni.hogander@intel.com>;
> > Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> > <jani.nikula@intel.com>
> > Subject: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd
> > initialization for DP
> >
> > Due to similarity panel replay dpcd initialization got added in psr
> > function which is specific for edp panel. This patch enables panel
> > replay initialization for dp connector.
> >
> If panelreplay initialization then why is the function name psr_init_dpcd() ?
> Also it its similar to PSR then these dpcd should already be available.

Hi Arun,

The first call for intel_psr_init_dpcd() get called from intel_edp_init_dpcd() which is not reachable for DP.
So, in this patch need to add intel_psr_init_dpcd() for DP(non-edp) in intel_psr_init().
Panel replay initialization added in intel_psr_init() as per previous feedback just to align panel-replay with psr framework. 

Regards,
Animesh
> 
> Thanks and Regards,
> Arun R Murthy
> --------------------
> 
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
> >  1 file changed, 3 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index f9837001aa5f..a2e0637c53fb 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -2738,6 +2738,9 @@ void intel_psr_init(struct intel_dp *intel_dp)
> >  	if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
> >  		return;
> >
> > +	if (!intel_dp_is_edp(intel_dp))
> > +		intel_psr_init_dpcd(intel_dp);
> > +
> >  	/*
> >  	 * HSW spec explicitly says PSR is tied to port A.
> >  	 * BDW+ platforms have a instance of PSR registers per transcoder
> > but
> > --
> > 2.29.0

Re: [Intel-gfx] [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd initialization for DP

[Murthy, Arun R]

> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Tuesday, October 17, 2023 1:52 PM
> To: Murthy, Arun R <arun.r.murthy@intel.com>; intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Hogander, Jouni
> <jouni.hogander@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> Subject: RE: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd
> initialization for DP
> 
> 
> 
> > -----Original Message-----
> > From: Murthy, Arun R <arun.r.murthy@intel.com>
> > Sent: Monday, October 16, 2023 9:56 AM
> > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > gfx@lists.freedesktop.org
> > Cc: dri-devel@lists.freedesktop.org; Hogander, Jouni
> > <jouni.hogander@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> > Subject: RE: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay
> > dpcd initialization for DP
> >
> >
> > > -----Original Message-----
> > > From: Manna, Animesh <animesh.manna@intel.com>
> > > Sent: Wednesday, October 11, 2023 4:40 PM
> > > To: intel-gfx@lists.freedesktop.org
> > > Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> > > <animesh.manna@intel.com>; Hogander, Jouni
> > <jouni.hogander@intel.com>;
> > > Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> > > <jani.nikula@intel.com>
> > > Subject: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay
> > > dpcd initialization for DP
> > >
> > > Due to similarity panel replay dpcd initialization got added in psr
> > > function which is specific for edp panel. This patch enables panel
> > > replay initialization for dp connector.
> > >
> > If panelreplay initialization then why is the function name psr_init_dpcd() ?
> > Also it its similar to PSR then these dpcd should already be available.
> 
> Hi Arun,
> 
> The first call for intel_psr_init_dpcd() get called from intel_edp_init_dpcd()
> which is not reachable for DP.
> So, in this patch need to add intel_psr_init_dpcd() for DP(non-edp) in
> intel_psr_init().
> Panel replay initialization added in intel_psr_init() as per previous feedback just
> to align panel-replay with psr framework.
> 
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>

Thanks and Regards,
Arun R Murthy
-------------------

> Regards,
> Animesh
> >
> > Thanks and Regards,
> > Arun R Murthy
> > --------------------
> >
> > > Cc: Jouni Högander <jouni.hogander@intel.com>
> > > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
> > >  1 file changed, 3 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index f9837001aa5f..a2e0637c53fb 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -2738,6 +2738,9 @@ void intel_psr_init(struct intel_dp *intel_dp)
> > >  	if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
> > >  		return;
> > >
> > > +	if (!intel_dp_is_edp(intel_dp))
> > > +		intel_psr_init_dpcd(intel_dp);
> > > +
> > >  	/*
> > >  	 * HSW spec explicitly says PSR is tied to port A.
> > >  	 * BDW+ platforms have a instance of PSR registers per transcoder
> > > but
> > > --
> > > 2.29.0

RE: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd initialization for DP

[Murthy, Arun R]

> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Tuesday, October 17, 2023 1:52 PM
> To: Murthy, Arun R <arun.r.murthy@intel.com>; intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Hogander, Jouni
> <jouni.hogander@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> Subject: RE: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay dpcd
> initialization for DP
> 
> 
> 
> > -----Original Message-----
> > From: Murthy, Arun R <arun.r.murthy@intel.com>
> > Sent: Monday, October 16, 2023 9:56 AM
> > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > gfx@lists.freedesktop.org
> > Cc: dri-devel@lists.freedesktop.org; Hogander, Jouni
> > <jouni.hogander@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> > Subject: RE: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay
> > dpcd initialization for DP
> >
> >
> > > -----Original Message-----
> > > From: Manna, Animesh <animesh.manna@intel.com>
> > > Sent: Wednesday, October 11, 2023 4:40 PM
> > > To: intel-gfx@lists.freedesktop.org
> > > Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> > > <animesh.manna@intel.com>; Hogander, Jouni
> > <jouni.hogander@intel.com>;
> > > Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> > > <jani.nikula@intel.com>
> > > Subject: [PATCH v7 4/6] drm/i915/panelreplay: Enable panel replay
> > > dpcd initialization for DP
> > >
> > > Due to similarity panel replay dpcd initialization got added in psr
> > > function which is specific for edp panel. This patch enables panel
> > > replay initialization for dp connector.
> > >
> > If panelreplay initialization then why is the function name psr_init_dpcd() ?
> > Also it its similar to PSR then these dpcd should already be available.
> 
> Hi Arun,
> 
> The first call for intel_psr_init_dpcd() get called from intel_edp_init_dpcd()
> which is not reachable for DP.
> So, in this patch need to add intel_psr_init_dpcd() for DP(non-edp) in
> intel_psr_init().
> Panel replay initialization added in intel_psr_init() as per previous feedback just
> to align panel-replay with psr framework.
> 
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>

Thanks and Regards,
Arun R Murthy
-------------------

> Regards,
> Animesh
> >
> > Thanks and Regards,
> > Arun R Murthy
> > --------------------
> >
> > > Cc: Jouni Högander <jouni.hogander@intel.com>
> > > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_psr.c | 3 +++
> > >  1 file changed, 3 insertions(+)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index f9837001aa5f..a2e0637c53fb 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -2738,6 +2738,9 @@ void intel_psr_init(struct intel_dp *intel_dp)
> > >  	if (!(HAS_PSR(dev_priv) || HAS_DP20(dev_priv)))
> > >  		return;
> > >
> > > +	if (!intel_dp_is_edp(intel_dp))
> > > +		intel_psr_init_dpcd(intel_dp);
> > > +
> > >  	/*
> > >  	 * HSW spec explicitly says PSR is tied to port A.
> > >  	 * BDW+ platforms have a instance of PSR registers per transcoder
> > > but
> > > --
> > > 2.29.0

[Intel-gfx] [PATCH v7 5/6] drm/i915/panelreplay: enable/disable panel replay

[Animesh Manna]

TRANS_DP2_CTL register is programmed to enable panel replay from source
and sink is enabled through panel replay dpcd configuration address.

Bspec: 1407940617

v1: Initial version.
v2:
- Use pr_* flags instead psr_* flags. [Jouni]
- Remove intel_dp_is_edp check as edp1.5 also has panel replay. [Jouni]

v3: Cover letter updated and selective fetch condition check is added
before updating its bit in PSR2_MAN_TRK_CTL register. [Jouni]

v4: Selective fetch related PSR2_MAN_TRK_CTL programmming dropped. [Jouni]

v5: Added PSR2_MAN_TRK_CTL programming as needed for Continuous Full
Frame (CFF) update.

v6: Rebased on latest.

Note: Initial plan is to enable panel replay in  full-screen live active
frame update mode. In a incremental approach panel replay will be enabled
in selctive update mode if there is any gap in curent implementation.

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      |  7 ++-
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 63 ++++++++++++++-----
 3 files changed, 55 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 9151d5add960..16f98a7a5f20 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2717,10 +2717,15 @@ static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
 				    const struct drm_connector_state *conn_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
-	if (HAS_DP20(dev_priv))
+	if (HAS_DP20(dev_priv)) {
 		intel_dp_128b132b_sdp_crc16(enc_to_intel_dp(encoder),
 					    crtc_state);
+		if (crtc_state->has_panel_replay)
+			drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG,
+					   DP_PANEL_REPLAY_ENABLE);
+	}
 
 	if (DISPLAY_VER(dev_priv) >= 14)
 		mtl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 95b318f7b2b8..d8f35054bc11 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1704,6 +1704,7 @@ struct intel_psr {
 	u16 su_y_granularity;
 	bool source_panel_replay_support;
 	bool sink_panel_replay_support;
+	bool panel_replay_enabled;
 	u32 dc3co_exitline;
 	u32 dc3co_exit_delay;
 	struct delayed_work dc3co_work;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a2e0637c53fb..80de831c2f60 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -608,8 +608,11 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	u8 dpcd_val = DP_PSR_ENABLE;
 
-	/* Enable ALPM at sink for psr2 */
+	if (intel_dp->psr.panel_replay_enabled)
+		return;
+
 	if (intel_dp->psr.psr2_enabled) {
+		/* Enable ALPM at sink for psr2 */
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
 				   DP_ALPM_ENABLE |
 				   DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
@@ -759,6 +762,17 @@ static int psr2_block_count(struct intel_dp *intel_dp)
 	return psr2_block_count_lines(intel_dp) / 4;
 }
 
+static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
+{
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	intel_de_rmw(dev_priv, PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder),
+		     0, ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME);
+
+	intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp->psr.transcoder), 0,
+		     TRANS_DP2_PANEL_REPLAY_ENABLE);
+}
+
 static void hsw_activate_psr2(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -1323,18 +1337,23 @@ void intel_psr_get_config(struct intel_encoder *encoder,
 		return;
 
 	intel_dp = &dig_port->dp;
-	if (!CAN_PSR(intel_dp))
+	if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp)))
 		return;
 
 	mutex_lock(&intel_dp->psr.lock);
 	if (!intel_dp->psr.enabled)
 		goto unlock;
 
-	/*
-	 * Not possible to read EDP_PSR/PSR2_CTL registers as it is
-	 * enabled/disabled because of frontbuffer tracking and others.
-	 */
-	pipe_config->has_psr = true;
+	if (intel_dp->psr.panel_replay_enabled) {
+		pipe_config->has_panel_replay = true;
+	} else {
+		/*
+		 * Not possible to read EDP_PSR/PSR2_CTL registers as it is
+		 * enabled/disabled because of frontbuffer tracking and others.
+		 */
+		pipe_config->has_psr = true;
+	}
+
 	pipe_config->has_psr2 = intel_dp->psr.psr2_enabled;
 	pipe_config->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC);
 
@@ -1371,8 +1390,10 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
 
 	lockdep_assert_held(&intel_dp->psr.lock);
 
-	/* psr1 and psr2 are mutually exclusive.*/
-	if (intel_dp->psr.psr2_enabled)
+	/* psr1, psr2 and panel-replay are mutually exclusive.*/
+	if (intel_dp->psr.panel_replay_enabled)
+		dg2_activate_panel_replay(intel_dp);
+	else if (intel_dp->psr.psr2_enabled)
 		hsw_activate_psr2(intel_dp);
 	else
 		hsw_activate_psr1(intel_dp);
@@ -1550,6 +1571,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
 	drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
 
 	intel_dp->psr.psr2_enabled = crtc_state->has_psr2;
+	intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay;
 	intel_dp->psr.busy_frontbuffer_bits = 0;
 	intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
 	intel_dp->psr.transcoder = crtc_state->cpu_transcoder;
@@ -1565,8 +1587,12 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
 	if (!psr_interrupt_error_check(intel_dp))
 		return;
 
-	drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
-		    intel_dp->psr.psr2_enabled ? "2" : "1");
+	if (intel_dp->psr.panel_replay_enabled)
+		drm_dbg_kms(&dev_priv->drm, "Enabling Panel Replay\n");
+	else
+		drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
+			    intel_dp->psr.psr2_enabled ? "2" : "1");
+
 	intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state->psr_vsc);
 	intel_snps_phy_update_psr_power_state(dev_priv, phy, true);
 	intel_psr_enable_sink(intel_dp);
@@ -1595,7 +1621,10 @@ static void intel_psr_exit(struct intel_dp *intel_dp)
 		return;
 	}
 
-	if (intel_dp->psr.psr2_enabled) {
+	if (intel_dp->psr.panel_replay_enabled) {
+		intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp->psr.transcoder),
+			     TRANS_DP2_PANEL_REPLAY_ENABLE, 0);
+	} else if (intel_dp->psr.psr2_enabled) {
 		tgl_disallow_dc3co_on_psr2_exit(intel_dp);
 
 		val = intel_de_rmw(dev_priv, EDP_PSR2_CTL(cpu_transcoder),
@@ -1644,8 +1673,11 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 	if (!intel_dp->psr.enabled)
 		return;
 
-	drm_dbg_kms(&dev_priv->drm, "Disabling PSR%s\n",
-		    intel_dp->psr.psr2_enabled ? "2" : "1");
+	if (intel_dp->psr.panel_replay_enabled)
+		drm_dbg_kms(&dev_priv->drm, "Disabling Panel Replay\n");
+	else
+		drm_dbg_kms(&dev_priv->drm, "Disabling PSR%s\n",
+			    intel_dp->psr.psr2_enabled ? "2" : "1");
 
 	intel_psr_exit(intel_dp);
 	intel_psr_wait_exit_locked(intel_dp);
@@ -1678,6 +1710,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, 0);
 
 	intel_dp->psr.enabled = false;
+	intel_dp->psr.panel_replay_enabled = false;
 	intel_dp->psr.psr2_enabled = false;
 	intel_dp->psr.psr2_sel_fetch_enabled = false;
 	intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
@@ -2249,7 +2282,7 @@ void intel_psr_post_plane_update(struct intel_atomic_state *state,
 		intel_atomic_get_new_crtc_state(state, crtc);
 	struct intel_encoder *encoder;
 
-	if (!crtc_state->has_psr)
+	if (!(crtc_state->has_psr || crtc_state->has_panel_replay))
 		return;
 
 	for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
-- 
2.29.0

[PATCH v7 5/6] drm/i915/panelreplay: enable/disable panel replay

[Animesh Manna]

TRANS_DP2_CTL register is programmed to enable panel replay from source
and sink is enabled through panel replay dpcd configuration address.

Bspec: 1407940617

v1: Initial version.
v2:
- Use pr_* flags instead psr_* flags. [Jouni]
- Remove intel_dp_is_edp check as edp1.5 also has panel replay. [Jouni]

v3: Cover letter updated and selective fetch condition check is added
before updating its bit in PSR2_MAN_TRK_CTL register. [Jouni]

v4: Selective fetch related PSR2_MAN_TRK_CTL programmming dropped. [Jouni]

v5: Added PSR2_MAN_TRK_CTL programming as needed for Continuous Full
Frame (CFF) update.

v6: Rebased on latest.

Note: Initial plan is to enable panel replay in  full-screen live active
frame update mode. In a incremental approach panel replay will be enabled
in selctive update mode if there is any gap in curent implementation.

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c      |  7 ++-
 .../drm/i915/display/intel_display_types.h    |  1 +
 drivers/gpu/drm/i915/display/intel_psr.c      | 63 ++++++++++++++-----
 3 files changed, 55 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
index 9151d5add960..16f98a7a5f20 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -2717,10 +2717,15 @@ static void intel_ddi_pre_enable_dp(struct intel_atomic_state *state,
 				    const struct drm_connector_state *conn_state)
 {
 	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
 
-	if (HAS_DP20(dev_priv))
+	if (HAS_DP20(dev_priv)) {
 		intel_dp_128b132b_sdp_crc16(enc_to_intel_dp(encoder),
 					    crtc_state);
+		if (crtc_state->has_panel_replay)
+			drm_dp_dpcd_writeb(&intel_dp->aux, PANEL_REPLAY_CONFIG,
+					   DP_PANEL_REPLAY_ENABLE);
+	}
 
 	if (DISPLAY_VER(dev_priv) >= 14)
 		mtl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 95b318f7b2b8..d8f35054bc11 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1704,6 +1704,7 @@ struct intel_psr {
 	u16 su_y_granularity;
 	bool source_panel_replay_support;
 	bool sink_panel_replay_support;
+	bool panel_replay_enabled;
 	u32 dc3co_exitline;
 	u32 dc3co_exit_delay;
 	struct delayed_work dc3co_work;
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index a2e0637c53fb..80de831c2f60 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -608,8 +608,11 @@ static void intel_psr_enable_sink(struct intel_dp *intel_dp)
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
 	u8 dpcd_val = DP_PSR_ENABLE;
 
-	/* Enable ALPM at sink for psr2 */
+	if (intel_dp->psr.panel_replay_enabled)
+		return;
+
 	if (intel_dp->psr.psr2_enabled) {
+		/* Enable ALPM at sink for psr2 */
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG,
 				   DP_ALPM_ENABLE |
 				   DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
@@ -759,6 +762,17 @@ static int psr2_block_count(struct intel_dp *intel_dp)
 	return psr2_block_count_lines(intel_dp) / 4;
 }
 
+static void dg2_activate_panel_replay(struct intel_dp *intel_dp)
+{
+	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
+
+	intel_de_rmw(dev_priv, PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder),
+		     0, ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME);
+
+	intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp->psr.transcoder), 0,
+		     TRANS_DP2_PANEL_REPLAY_ENABLE);
+}
+
 static void hsw_activate_psr2(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -1323,18 +1337,23 @@ void intel_psr_get_config(struct intel_encoder *encoder,
 		return;
 
 	intel_dp = &dig_port->dp;
-	if (!CAN_PSR(intel_dp))
+	if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp)))
 		return;
 
 	mutex_lock(&intel_dp->psr.lock);
 	if (!intel_dp->psr.enabled)
 		goto unlock;
 
-	/*
-	 * Not possible to read EDP_PSR/PSR2_CTL registers as it is
-	 * enabled/disabled because of frontbuffer tracking and others.
-	 */
-	pipe_config->has_psr = true;
+	if (intel_dp->psr.panel_replay_enabled) {
+		pipe_config->has_panel_replay = true;
+	} else {
+		/*
+		 * Not possible to read EDP_PSR/PSR2_CTL registers as it is
+		 * enabled/disabled because of frontbuffer tracking and others.
+		 */
+		pipe_config->has_psr = true;
+	}
+
 	pipe_config->has_psr2 = intel_dp->psr.psr2_enabled;
 	pipe_config->infoframes.enable |= intel_hdmi_infoframe_enable(DP_SDP_VSC);
 
@@ -1371,8 +1390,10 @@ static void intel_psr_activate(struct intel_dp *intel_dp)
 
 	lockdep_assert_held(&intel_dp->psr.lock);
 
-	/* psr1 and psr2 are mutually exclusive.*/
-	if (intel_dp->psr.psr2_enabled)
+	/* psr1, psr2 and panel-replay are mutually exclusive.*/
+	if (intel_dp->psr.panel_replay_enabled)
+		dg2_activate_panel_replay(intel_dp);
+	else if (intel_dp->psr.psr2_enabled)
 		hsw_activate_psr2(intel_dp);
 	else
 		hsw_activate_psr1(intel_dp);
@@ -1550,6 +1571,7 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
 	drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
 
 	intel_dp->psr.psr2_enabled = crtc_state->has_psr2;
+	intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay;
 	intel_dp->psr.busy_frontbuffer_bits = 0;
 	intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
 	intel_dp->psr.transcoder = crtc_state->cpu_transcoder;
@@ -1565,8 +1587,12 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
 	if (!psr_interrupt_error_check(intel_dp))
 		return;
 
-	drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
-		    intel_dp->psr.psr2_enabled ? "2" : "1");
+	if (intel_dp->psr.panel_replay_enabled)
+		drm_dbg_kms(&dev_priv->drm, "Enabling Panel Replay\n");
+	else
+		drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
+			    intel_dp->psr.psr2_enabled ? "2" : "1");
+
 	intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state->psr_vsc);
 	intel_snps_phy_update_psr_power_state(dev_priv, phy, true);
 	intel_psr_enable_sink(intel_dp);
@@ -1595,7 +1621,10 @@ static void intel_psr_exit(struct intel_dp *intel_dp)
 		return;
 	}
 
-	if (intel_dp->psr.psr2_enabled) {
+	if (intel_dp->psr.panel_replay_enabled) {
+		intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp->psr.transcoder),
+			     TRANS_DP2_PANEL_REPLAY_ENABLE, 0);
+	} else if (intel_dp->psr.psr2_enabled) {
 		tgl_disallow_dc3co_on_psr2_exit(intel_dp);
 
 		val = intel_de_rmw(dev_priv, EDP_PSR2_CTL(cpu_transcoder),
@@ -1644,8 +1673,11 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 	if (!intel_dp->psr.enabled)
 		return;
 
-	drm_dbg_kms(&dev_priv->drm, "Disabling PSR%s\n",
-		    intel_dp->psr.psr2_enabled ? "2" : "1");
+	if (intel_dp->psr.panel_replay_enabled)
+		drm_dbg_kms(&dev_priv->drm, "Disabling Panel Replay\n");
+	else
+		drm_dbg_kms(&dev_priv->drm, "Disabling PSR%s\n",
+			    intel_dp->psr.psr2_enabled ? "2" : "1");
 
 	intel_psr_exit(intel_dp);
 	intel_psr_wait_exit_locked(intel_dp);
@@ -1678,6 +1710,7 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
 		drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, 0);
 
 	intel_dp->psr.enabled = false;
+	intel_dp->psr.panel_replay_enabled = false;
 	intel_dp->psr.psr2_enabled = false;
 	intel_dp->psr.psr2_sel_fetch_enabled = false;
 	intel_dp->psr.psr2_sel_fetch_cff_enabled = false;
@@ -2249,7 +2282,7 @@ void intel_psr_post_plane_update(struct intel_atomic_state *state,
 		intel_atomic_get_new_crtc_state(state, crtc);
 	struct intel_encoder *encoder;
 
-	if (!crtc_state->has_psr)
+	if (!(crtc_state->has_psr || crtc_state->has_panel_replay))
 		return;
 
 	for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
-- 
2.29.0

Re: [Intel-gfx] [PATCH v7 5/6] drm/i915/panelreplay: enable/disable panel replay

[Murthy, Arun R]

> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>;
> Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [PATCH v7 5/6] drm/i915/panelreplay: enable/disable panel replay
> 
> TRANS_DP2_CTL register is programmed to enable panel replay from source
> and sink is enabled through panel replay dpcd configuration address.
> 
> Bspec: 1407940617
> 
> v1: Initial version.
> v2:
> - Use pr_* flags instead psr_* flags. [Jouni]
> - Remove intel_dp_is_edp check as edp1.5 also has panel replay. [Jouni]
> 
> v3: Cover letter updated and selective fetch condition check is added before
> updating its bit in PSR2_MAN_TRK_CTL register. [Jouni]
> 
> v4: Selective fetch related PSR2_MAN_TRK_CTL programmming dropped.
> [Jouni]
> 
> v5: Added PSR2_MAN_TRK_CTL programming as needed for Continuous Full
> Frame (CFF) update.
> 
> v6: Rebased on latest.
> 
> Note: Initial plan is to enable panel replay in  full-screen live active frame
> update mode. In a incremental approach panel replay will be enabled in selctive
> update mode if there is any gap in curent implementation.
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c      |  7 ++-
>  .../drm/i915/display/intel_display_types.h    |  1 +
>  drivers/gpu/drm/i915/display/intel_psr.c      | 63 ++++++++++++++-----
>  3 files changed, 55 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 9151d5add960..16f98a7a5f20 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2717,10 +2717,15 @@ static void intel_ddi_pre_enable_dp(struct
> intel_atomic_state *state,
>  				    const struct drm_connector_state
> *conn_state)  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> 
> -	if (HAS_DP20(dev_priv))
> +	if (HAS_DP20(dev_priv)) {
>  		intel_dp_128b132b_sdp_crc16(enc_to_intel_dp(encoder),
>  					    crtc_state);
> +		if (crtc_state->has_panel_replay)
> +			drm_dp_dpcd_writeb(&intel_dp->aux,
> PANEL_REPLAY_CONFIG,
> +					   DP_PANEL_REPLAY_ENABLE);
> +	}
> 
>  	if (DISPLAY_VER(dev_priv) >= 14)
>  		mtl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 95b318f7b2b8..d8f35054bc11 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1704,6 +1704,7 @@ struct intel_psr {
>  	u16 su_y_granularity;
>  	bool source_panel_replay_support;
>  	bool sink_panel_replay_support;
> +	bool panel_replay_enabled;
>  	u32 dc3co_exitline;
>  	u32 dc3co_exit_delay;
>  	struct delayed_work dc3co_work;
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index a2e0637c53fb..80de831c2f60 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -608,8 +608,11 @@ static void intel_psr_enable_sink(struct intel_dp
> *intel_dp)
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  	u8 dpcd_val = DP_PSR_ENABLE;
> 
> -	/* Enable ALPM at sink for psr2 */
> +	if (intel_dp->psr.panel_replay_enabled)
> +		return;
> +
>  	if (intel_dp->psr.psr2_enabled) {
> +		/* Enable ALPM at sink for psr2 */
Unrelated change

Upon removing this
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>

Thanks and Regards,
Arun R Murthy
-------------------
>  		drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_RECEIVER_ALPM_CONFIG,
>  				   DP_ALPM_ENABLE |
>  				   DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
> @@ -759,6 +762,17 @@ static int psr2_block_count(struct intel_dp *intel_dp)
>  	return psr2_block_count_lines(intel_dp) / 4;  }
> 
> +static void dg2_activate_panel_replay(struct intel_dp *intel_dp) {
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +
> +	intel_de_rmw(dev_priv, PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder),
> +		     0,
> ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME);
> +
> +	intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp->psr.transcoder), 0,
> +		     TRANS_DP2_PANEL_REPLAY_ENABLE);
> +}
> +
>  static void hsw_activate_psr2(struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@ -
> 1323,18 +1337,23 @@ void intel_psr_get_config(struct intel_encoder
> *encoder,
>  		return;
> 
>  	intel_dp = &dig_port->dp;
> -	if (!CAN_PSR(intel_dp))
> +	if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp)))
>  		return;
> 
>  	mutex_lock(&intel_dp->psr.lock);
>  	if (!intel_dp->psr.enabled)
>  		goto unlock;
> 
> -	/*
> -	 * Not possible to read EDP_PSR/PSR2_CTL registers as it is
> -	 * enabled/disabled because of frontbuffer tracking and others.
> -	 */
> -	pipe_config->has_psr = true;
> +	if (intel_dp->psr.panel_replay_enabled) {
> +		pipe_config->has_panel_replay = true;
> +	} else {
> +		/*
> +		 * Not possible to read EDP_PSR/PSR2_CTL registers as it is
> +		 * enabled/disabled because of frontbuffer tracking and others.
> +		 */
> +		pipe_config->has_psr = true;
> +	}
> +
>  	pipe_config->has_psr2 = intel_dp->psr.psr2_enabled;
>  	pipe_config->infoframes.enable |=
> intel_hdmi_infoframe_enable(DP_SDP_VSC);
> 
> @@ -1371,8 +1390,10 @@ static void intel_psr_activate(struct intel_dp
> *intel_dp)
> 
>  	lockdep_assert_held(&intel_dp->psr.lock);
> 
> -	/* psr1 and psr2 are mutually exclusive.*/
> -	if (intel_dp->psr.psr2_enabled)
> +	/* psr1, psr2 and panel-replay are mutually exclusive.*/
> +	if (intel_dp->psr.panel_replay_enabled)
> +		dg2_activate_panel_replay(intel_dp);
> +	else if (intel_dp->psr.psr2_enabled)
>  		hsw_activate_psr2(intel_dp);
>  	else
>  		hsw_activate_psr1(intel_dp);
> @@ -1550,6 +1571,7 @@ static void intel_psr_enable_locked(struct intel_dp
> *intel_dp,
>  	drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
> 
>  	intel_dp->psr.psr2_enabled = crtc_state->has_psr2;
> +	intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay;
>  	intel_dp->psr.busy_frontbuffer_bits = 0;
>  	intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
>  	intel_dp->psr.transcoder = crtc_state->cpu_transcoder; @@ -1565,8
> +1587,12 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
>  	if (!psr_interrupt_error_check(intel_dp))
>  		return;
> 
> -	drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
> -		    intel_dp->psr.psr2_enabled ? "2" : "1");
> +	if (intel_dp->psr.panel_replay_enabled)
> +		drm_dbg_kms(&dev_priv->drm, "Enabling Panel Replay\n");
> +	else
> +		drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
> +			    intel_dp->psr.psr2_enabled ? "2" : "1");
> +
>  	intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state->psr_vsc);
>  	intel_snps_phy_update_psr_power_state(dev_priv, phy, true);
>  	intel_psr_enable_sink(intel_dp);
> @@ -1595,7 +1621,10 @@ static void intel_psr_exit(struct intel_dp *intel_dp)
>  		return;
>  	}
> 
> -	if (intel_dp->psr.psr2_enabled) {
> +	if (intel_dp->psr.panel_replay_enabled) {
> +		intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp-
> >psr.transcoder),
> +			     TRANS_DP2_PANEL_REPLAY_ENABLE, 0);
> +	} else if (intel_dp->psr.psr2_enabled) {
>  		tgl_disallow_dc3co_on_psr2_exit(intel_dp);
> 
>  		val = intel_de_rmw(dev_priv, EDP_PSR2_CTL(cpu_transcoder),
> @@ -1644,8 +1673,11 @@ static void intel_psr_disable_locked(struct intel_dp
> *intel_dp)
>  	if (!intel_dp->psr.enabled)
>  		return;
> 
> -	drm_dbg_kms(&dev_priv->drm, "Disabling PSR%s\n",
> -		    intel_dp->psr.psr2_enabled ? "2" : "1");
> +	if (intel_dp->psr.panel_replay_enabled)
> +		drm_dbg_kms(&dev_priv->drm, "Disabling Panel Replay\n");
> +	else
> +		drm_dbg_kms(&dev_priv->drm, "Disabling PSR%s\n",
> +			    intel_dp->psr.psr2_enabled ? "2" : "1");
> 
>  	intel_psr_exit(intel_dp);
>  	intel_psr_wait_exit_locked(intel_dp);
> @@ -1678,6 +1710,7 @@ static void intel_psr_disable_locked(struct intel_dp
> *intel_dp)
>  		drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_RECEIVER_ALPM_CONFIG, 0);
> 
>  	intel_dp->psr.enabled = false;
> +	intel_dp->psr.panel_replay_enabled = false;
>  	intel_dp->psr.psr2_enabled = false;
>  	intel_dp->psr.psr2_sel_fetch_enabled = false;
>  	intel_dp->psr.psr2_sel_fetch_cff_enabled = false; @@ -2249,7 +2282,7
> @@ void intel_psr_post_plane_update(struct intel_atomic_state *state,
>  		intel_atomic_get_new_crtc_state(state, crtc);
>  	struct intel_encoder *encoder;
> 
> -	if (!crtc_state->has_psr)
> +	if (!(crtc_state->has_psr || crtc_state->has_panel_replay))
>  		return;
> 
>  	for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
> --
> 2.29.0

RE: [PATCH v7 5/6] drm/i915/panelreplay: enable/disable panel replay

[Murthy, Arun R]

> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>;
> Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [PATCH v7 5/6] drm/i915/panelreplay: enable/disable panel replay
> 
> TRANS_DP2_CTL register is programmed to enable panel replay from source
> and sink is enabled through panel replay dpcd configuration address.
> 
> Bspec: 1407940617
> 
> v1: Initial version.
> v2:
> - Use pr_* flags instead psr_* flags. [Jouni]
> - Remove intel_dp_is_edp check as edp1.5 also has panel replay. [Jouni]
> 
> v3: Cover letter updated and selective fetch condition check is added before
> updating its bit in PSR2_MAN_TRK_CTL register. [Jouni]
> 
> v4: Selective fetch related PSR2_MAN_TRK_CTL programmming dropped.
> [Jouni]
> 
> v5: Added PSR2_MAN_TRK_CTL programming as needed for Continuous Full
> Frame (CFF) update.
> 
> v6: Rebased on latest.
> 
> Note: Initial plan is to enable panel replay in  full-screen live active frame
> update mode. In a incremental approach panel replay will be enabled in selctive
> update mode if there is any gap in curent implementation.
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_ddi.c      |  7 ++-
>  .../drm/i915/display/intel_display_types.h    |  1 +
>  drivers/gpu/drm/i915/display/intel_psr.c      | 63 ++++++++++++++-----
>  3 files changed, 55 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
> b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 9151d5add960..16f98a7a5f20 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2717,10 +2717,15 @@ static void intel_ddi_pre_enable_dp(struct
> intel_atomic_state *state,
>  				    const struct drm_connector_state
> *conn_state)  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
> 
> -	if (HAS_DP20(dev_priv))
> +	if (HAS_DP20(dev_priv)) {
>  		intel_dp_128b132b_sdp_crc16(enc_to_intel_dp(encoder),
>  					    crtc_state);
> +		if (crtc_state->has_panel_replay)
> +			drm_dp_dpcd_writeb(&intel_dp->aux,
> PANEL_REPLAY_CONFIG,
> +					   DP_PANEL_REPLAY_ENABLE);
> +	}
> 
>  	if (DISPLAY_VER(dev_priv) >= 14)
>  		mtl_ddi_pre_enable_dp(state, encoder, crtc_state, conn_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 95b318f7b2b8..d8f35054bc11 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1704,6 +1704,7 @@ struct intel_psr {
>  	u16 su_y_granularity;
>  	bool source_panel_replay_support;
>  	bool sink_panel_replay_support;
> +	bool panel_replay_enabled;
>  	u32 dc3co_exitline;
>  	u32 dc3co_exit_delay;
>  	struct delayed_work dc3co_work;
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index a2e0637c53fb..80de831c2f60 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -608,8 +608,11 @@ static void intel_psr_enable_sink(struct intel_dp
> *intel_dp)
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>  	u8 dpcd_val = DP_PSR_ENABLE;
> 
> -	/* Enable ALPM at sink for psr2 */
> +	if (intel_dp->psr.panel_replay_enabled)
> +		return;
> +
>  	if (intel_dp->psr.psr2_enabled) {
> +		/* Enable ALPM at sink for psr2 */
Unrelated change

Upon removing this
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>

Thanks and Regards,
Arun R Murthy
-------------------
>  		drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_RECEIVER_ALPM_CONFIG,
>  				   DP_ALPM_ENABLE |
>  				   DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE);
> @@ -759,6 +762,17 @@ static int psr2_block_count(struct intel_dp *intel_dp)
>  	return psr2_block_count_lines(intel_dp) / 4;  }
> 
> +static void dg2_activate_panel_replay(struct intel_dp *intel_dp) {
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +
> +	intel_de_rmw(dev_priv, PSR2_MAN_TRK_CTL(intel_dp->psr.transcoder),
> +		     0,
> ADLP_PSR2_MAN_TRK_CTL_SF_CONTINUOS_FULL_FRAME);
> +
> +	intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp->psr.transcoder), 0,
> +		     TRANS_DP2_PANEL_REPLAY_ENABLE);
> +}
> +
>  static void hsw_activate_psr2(struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@ -
> 1323,18 +1337,23 @@ void intel_psr_get_config(struct intel_encoder
> *encoder,
>  		return;
> 
>  	intel_dp = &dig_port->dp;
> -	if (!CAN_PSR(intel_dp))
> +	if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp)))
>  		return;
> 
>  	mutex_lock(&intel_dp->psr.lock);
>  	if (!intel_dp->psr.enabled)
>  		goto unlock;
> 
> -	/*
> -	 * Not possible to read EDP_PSR/PSR2_CTL registers as it is
> -	 * enabled/disabled because of frontbuffer tracking and others.
> -	 */
> -	pipe_config->has_psr = true;
> +	if (intel_dp->psr.panel_replay_enabled) {
> +		pipe_config->has_panel_replay = true;
> +	} else {
> +		/*
> +		 * Not possible to read EDP_PSR/PSR2_CTL registers as it is
> +		 * enabled/disabled because of frontbuffer tracking and others.
> +		 */
> +		pipe_config->has_psr = true;
> +	}
> +
>  	pipe_config->has_psr2 = intel_dp->psr.psr2_enabled;
>  	pipe_config->infoframes.enable |=
> intel_hdmi_infoframe_enable(DP_SDP_VSC);
> 
> @@ -1371,8 +1390,10 @@ static void intel_psr_activate(struct intel_dp
> *intel_dp)
> 
>  	lockdep_assert_held(&intel_dp->psr.lock);
> 
> -	/* psr1 and psr2 are mutually exclusive.*/
> -	if (intel_dp->psr.psr2_enabled)
> +	/* psr1, psr2 and panel-replay are mutually exclusive.*/
> +	if (intel_dp->psr.panel_replay_enabled)
> +		dg2_activate_panel_replay(intel_dp);
> +	else if (intel_dp->psr.psr2_enabled)
>  		hsw_activate_psr2(intel_dp);
>  	else
>  		hsw_activate_psr1(intel_dp);
> @@ -1550,6 +1571,7 @@ static void intel_psr_enable_locked(struct intel_dp
> *intel_dp,
>  	drm_WARN_ON(&dev_priv->drm, intel_dp->psr.enabled);
> 
>  	intel_dp->psr.psr2_enabled = crtc_state->has_psr2;
> +	intel_dp->psr.panel_replay_enabled = crtc_state->has_panel_replay;
>  	intel_dp->psr.busy_frontbuffer_bits = 0;
>  	intel_dp->psr.pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe;
>  	intel_dp->psr.transcoder = crtc_state->cpu_transcoder; @@ -1565,8
> +1587,12 @@ static void intel_psr_enable_locked(struct intel_dp *intel_dp,
>  	if (!psr_interrupt_error_check(intel_dp))
>  		return;
> 
> -	drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
> -		    intel_dp->psr.psr2_enabled ? "2" : "1");
> +	if (intel_dp->psr.panel_replay_enabled)
> +		drm_dbg_kms(&dev_priv->drm, "Enabling Panel Replay\n");
> +	else
> +		drm_dbg_kms(&dev_priv->drm, "Enabling PSR%s\n",
> +			    intel_dp->psr.psr2_enabled ? "2" : "1");
> +
>  	intel_write_dp_vsc_sdp(encoder, crtc_state, &crtc_state->psr_vsc);
>  	intel_snps_phy_update_psr_power_state(dev_priv, phy, true);
>  	intel_psr_enable_sink(intel_dp);
> @@ -1595,7 +1621,10 @@ static void intel_psr_exit(struct intel_dp *intel_dp)
>  		return;
>  	}
> 
> -	if (intel_dp->psr.psr2_enabled) {
> +	if (intel_dp->psr.panel_replay_enabled) {
> +		intel_de_rmw(dev_priv, TRANS_DP2_CTL(intel_dp-
> >psr.transcoder),
> +			     TRANS_DP2_PANEL_REPLAY_ENABLE, 0);
> +	} else if (intel_dp->psr.psr2_enabled) {
>  		tgl_disallow_dc3co_on_psr2_exit(intel_dp);
> 
>  		val = intel_de_rmw(dev_priv, EDP_PSR2_CTL(cpu_transcoder),
> @@ -1644,8 +1673,11 @@ static void intel_psr_disable_locked(struct intel_dp
> *intel_dp)
>  	if (!intel_dp->psr.enabled)
>  		return;
> 
> -	drm_dbg_kms(&dev_priv->drm, "Disabling PSR%s\n",
> -		    intel_dp->psr.psr2_enabled ? "2" : "1");
> +	if (intel_dp->psr.panel_replay_enabled)
> +		drm_dbg_kms(&dev_priv->drm, "Disabling Panel Replay\n");
> +	else
> +		drm_dbg_kms(&dev_priv->drm, "Disabling PSR%s\n",
> +			    intel_dp->psr.psr2_enabled ? "2" : "1");
> 
>  	intel_psr_exit(intel_dp);
>  	intel_psr_wait_exit_locked(intel_dp);
> @@ -1678,6 +1710,7 @@ static void intel_psr_disable_locked(struct intel_dp
> *intel_dp)
>  		drm_dp_dpcd_writeb(&intel_dp->aux,
> DP_RECEIVER_ALPM_CONFIG, 0);
> 
>  	intel_dp->psr.enabled = false;
> +	intel_dp->psr.panel_replay_enabled = false;
>  	intel_dp->psr.psr2_enabled = false;
>  	intel_dp->psr.psr2_sel_fetch_enabled = false;
>  	intel_dp->psr.psr2_sel_fetch_cff_enabled = false; @@ -2249,7 +2282,7
> @@ void intel_psr_post_plane_update(struct intel_atomic_state *state,
>  		intel_atomic_get_new_crtc_state(state, crtc);
>  	struct intel_encoder *encoder;
> 
> -	if (!crtc_state->has_psr)
> +	if (!(crtc_state->has_psr || crtc_state->has_panel_replay))
>  		return;
> 
>  	for_each_intel_encoder_mask_with_psr(state->base.dev, encoder,
> --
> 2.29.0

[Intel-gfx] [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Animesh Manna]

Add debugfs support which will print source and sink status
per connector basis.

v1: Initial version. [rb-ed by Arun]
v2: Added check for DP 2.0 and connector type in connector_debugfs_add().

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 136 +++++++++++++++++------
 1 file changed, 102 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 80de831c2f60..399fc0a8e636 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2823,6 +2823,25 @@ static int psr_get_status_and_error_status(struct intel_dp *intel_dp,
 	return 0;
 }
 
+static int panel_replay_get_status_and_error_status(struct intel_dp *intel_dp,
+						    u8 *status, u8 *error_status)
+{
+	struct drm_dp_aux *aux = &intel_dp->aux;
+	int ret;
+
+	ret = drm_dp_dpcd_readb(aux, DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
+	if (ret != 1)
+		return ret;
+
+	ret = drm_dp_dpcd_readb(aux, DP_PANEL_REPLAY_ERROR_STATUS, error_status);
+	if (ret != 1)
+		return ret;
+
+	*status = *status & DP_PSR_SINK_STATE_MASK;
+
+	return 0;
+}
+
 static void psr_alpm_check(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp, struct seq_file *m)
 			status = live_status[status_val];
 	}
 
-	seq_printf(m, "Source PSR status: %s [0x%08x]\n", status, val);
+	seq_printf(m, "Source PSR/PanelReplay status: %s [0x%08x]\n", status, val);
 }
 
 static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
@@ -3048,18 +3067,23 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 	bool enabled;
 	u32 val;
 
-	seq_printf(m, "Sink support: %s", str_yes_no(psr->sink_support));
-	if (psr->sink_support)
+	seq_printf(m, "Sink support: PSR = %s, Panel Replay = %s",
+		   str_yes_no(psr->sink_support),
+		   str_yes_no(psr->sink_panel_replay_support));
+
+	if (psr->sink_support || psr->sink_panel_replay_support)
 		seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
 	seq_puts(m, "\n");
 
-	if (!psr->sink_support)
+	if (!(psr->sink_support || psr->sink_panel_replay_support))
 		return 0;
 
 	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
 	mutex_lock(&psr->lock);
 
-	if (psr->enabled)
+	if (psr->panel_replay_enabled)
+		status = "Panel Replay Enabled";
+	else if (psr->enabled)
 		status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1 enabled";
 	else
 		status = "disabled";
@@ -3072,14 +3096,17 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 		goto unlock;
 	}
 
-	if (psr->psr2_enabled) {
+	if (psr->panel_replay_enabled) {
+		val = intel_de_read(dev_priv, TRANS_DP2_CTL(cpu_transcoder));
+		enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
+	} else if (psr->psr2_enabled) {
 		val = intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder));
 		enabled = val & EDP_PSR2_ENABLE;
 	} else {
 		val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder));
 		enabled = val & EDP_PSR_ENABLE;
 	}
-	seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
+	seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
 		   str_enabled_disabled(enabled), val);
 	psr_source_status(intel_dp, m);
 	seq_printf(m, "Busy frontbuffer bits: 0x%08x\n",
@@ -3221,6 +3248,7 @@ static int i915_psr_sink_status_show(struct seq_file *m, void *data)
 {
 	struct intel_connector *connector = m->private;
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
+	struct intel_psr *psr = &intel_dp->psr;
 	static const char * const sink_status[] = {
 		"inactive",
 		"transition to active, capture and display",
@@ -3231,45 +3259,82 @@ static int i915_psr_sink_status_show(struct seq_file *m, void *data)
 		"reserved",
 		"sink internal error",
 	};
+	static const char * const panel_replay_status[] = {
+		"Sink device frame is locked to the Source device",
+		"Sink device is coasting, using the VTotal target",
+		"Sink device is governing the frame rate (frame rate unlock is granted)",
+		"Sink device in the process of re-locking with the Source device",
+	};
 	const char *str;
 	int ret;
 	u8 status, error_status;
 
-	if (!CAN_PSR(intel_dp)) {
-		seq_puts(m, "PSR Unsupported\n");
+	if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
+		seq_puts(m, "PSR/Panel-Replay Unsupported\n");
 		return -ENODEV;
 	}
 
 	if (connector->base.status != connector_status_connected)
 		return -ENODEV;
 
-	ret = psr_get_status_and_error_status(intel_dp, &status, &error_status);
-	if (ret)
-		return ret;
+	if (psr->panel_replay_enabled) {
+		u32 temp;
 
-	status &= DP_PSR_SINK_STATE_MASK;
-	if (status < ARRAY_SIZE(sink_status))
-		str = sink_status[status];
-	else
-		str = "unknown";
+		ret = panel_replay_get_status_and_error_status(intel_dp, &status, &error_status);
+		if (ret)
+			return ret;
 
-	seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
+		temp = status & DP_SINK_FRAME_LOCKED_MASK;
+		temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
+		if (temp < ARRAY_SIZE(panel_replay_status))
+			str = panel_replay_status[temp];
+		else
+			str = "unknown";
 
-	seq_printf(m, "Sink PSR error status: 0x%x", error_status);
+		seq_printf(m, "Sink Panel Replay status: 0x%x [%s]\n", status, str);
 
-	if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
-			    DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
-			    DP_PSR_LINK_CRC_ERROR))
-		seq_puts(m, ":\n");
-	else
-		seq_puts(m, "\n");
-	if (error_status & DP_PSR_RFB_STORAGE_ERROR)
-		seq_puts(m, "\tPSR RFB storage error\n");
-	if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
-		seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
-	if (error_status & DP_PSR_LINK_CRC_ERROR)
-		seq_puts(m, "\tPSR Link CRC error\n");
+		seq_printf(m, "Sink Panel Replay error status: 0x%x", error_status);
+
+		if (error_status & (DP_PANEL_REPLAY_RFB_STORAGE_ERROR |
+				    DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
+				    DP_PANEL_REPLAY_LINK_CRC_ERROR))
+			seq_puts(m, ":\n");
+		else
+			seq_puts(m, "\n");
+		if (error_status & DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
+			seq_puts(m, "\tPANEL-REPLAY RFB storage error\n");
+		if (error_status & DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
+			seq_puts(m, "\tPANEL-REPLAY VSC SDP uncorrectable error\n");
+		if (error_status & DP_PANEL_REPLAY_LINK_CRC_ERROR)
+			seq_puts(m, "\tPANEL-REPLAY Link CRC error\n");
+	} else {
+		ret = psr_get_status_and_error_status(intel_dp, &status, &error_status);
+		if (ret)
+			return ret;
+
+		status &= DP_PSR_SINK_STATE_MASK;
+		if (status < ARRAY_SIZE(sink_status))
+			str = sink_status[status];
+		else
+			str = "unknown";
+
+		seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
+
+		seq_printf(m, "Sink PSR error status: 0x%x", error_status);
 
+		if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
+				    DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
+				    DP_PSR_LINK_CRC_ERROR))
+			seq_puts(m, ":\n");
+		else
+			seq_puts(m, "\n");
+		if (error_status & DP_PSR_RFB_STORAGE_ERROR)
+			seq_puts(m, "\tPSR RFB storage error\n");
+		if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
+			seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
+		if (error_status & DP_PSR_LINK_CRC_ERROR)
+			seq_puts(m, "\tPSR Link CRC error\n");
+	}
 	return ret;
 }
 DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
@@ -3288,13 +3353,16 @@ void intel_psr_connector_debugfs_add(struct intel_connector *connector)
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	struct dentry *root = connector->base.debugfs_entry;
 
-	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
-		return;
+	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP) {
+		if (!(HAS_DP20(i915) &&
+		      connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort))
+			return;
+	}
 
 	debugfs_create_file("i915_psr_sink_status", 0444, root,
 			    connector, &i915_psr_sink_status_fops);
 
-	if (HAS_PSR(i915))
+	if (HAS_PSR(i915) || HAS_DP20(i915))
 		debugfs_create_file("i915_psr_status", 0444, root,
 				    connector, &i915_psr_status_fops);
 }
-- 
2.29.0

[PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Animesh Manna]

Add debugfs support which will print source and sink status
per connector basis.

v1: Initial version. [rb-ed by Arun]
v2: Added check for DP 2.0 and connector type in connector_debugfs_add().

Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Animesh Manna <animesh.manna@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 136 +++++++++++++++++------
 1 file changed, 102 insertions(+), 34 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 80de831c2f60..399fc0a8e636 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2823,6 +2823,25 @@ static int psr_get_status_and_error_status(struct intel_dp *intel_dp,
 	return 0;
 }
 
+static int panel_replay_get_status_and_error_status(struct intel_dp *intel_dp,
+						    u8 *status, u8 *error_status)
+{
+	struct drm_dp_aux *aux = &intel_dp->aux;
+	int ret;
+
+	ret = drm_dp_dpcd_readb(aux, DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
+	if (ret != 1)
+		return ret;
+
+	ret = drm_dp_dpcd_readb(aux, DP_PANEL_REPLAY_ERROR_STATUS, error_status);
+	if (ret != 1)
+		return ret;
+
+	*status = *status & DP_PSR_SINK_STATE_MASK;
+
+	return 0;
+}
+
 static void psr_alpm_check(struct intel_dp *intel_dp)
 {
 	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
@@ -3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp, struct seq_file *m)
 			status = live_status[status_val];
 	}
 
-	seq_printf(m, "Source PSR status: %s [0x%08x]\n", status, val);
+	seq_printf(m, "Source PSR/PanelReplay status: %s [0x%08x]\n", status, val);
 }
 
 static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
@@ -3048,18 +3067,23 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 	bool enabled;
 	u32 val;
 
-	seq_printf(m, "Sink support: %s", str_yes_no(psr->sink_support));
-	if (psr->sink_support)
+	seq_printf(m, "Sink support: PSR = %s, Panel Replay = %s",
+		   str_yes_no(psr->sink_support),
+		   str_yes_no(psr->sink_panel_replay_support));
+
+	if (psr->sink_support || psr->sink_panel_replay_support)
 		seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
 	seq_puts(m, "\n");
 
-	if (!psr->sink_support)
+	if (!(psr->sink_support || psr->sink_panel_replay_support))
 		return 0;
 
 	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
 	mutex_lock(&psr->lock);
 
-	if (psr->enabled)
+	if (psr->panel_replay_enabled)
+		status = "Panel Replay Enabled";
+	else if (psr->enabled)
 		status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1 enabled";
 	else
 		status = "disabled";
@@ -3072,14 +3096,17 @@ static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp)
 		goto unlock;
 	}
 
-	if (psr->psr2_enabled) {
+	if (psr->panel_replay_enabled) {
+		val = intel_de_read(dev_priv, TRANS_DP2_CTL(cpu_transcoder));
+		enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
+	} else if (psr->psr2_enabled) {
 		val = intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder));
 		enabled = val & EDP_PSR2_ENABLE;
 	} else {
 		val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv, cpu_transcoder));
 		enabled = val & EDP_PSR_ENABLE;
 	}
-	seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
+	seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
 		   str_enabled_disabled(enabled), val);
 	psr_source_status(intel_dp, m);
 	seq_printf(m, "Busy frontbuffer bits: 0x%08x\n",
@@ -3221,6 +3248,7 @@ static int i915_psr_sink_status_show(struct seq_file *m, void *data)
 {
 	struct intel_connector *connector = m->private;
 	struct intel_dp *intel_dp = intel_attached_dp(connector);
+	struct intel_psr *psr = &intel_dp->psr;
 	static const char * const sink_status[] = {
 		"inactive",
 		"transition to active, capture and display",
@@ -3231,45 +3259,82 @@ static int i915_psr_sink_status_show(struct seq_file *m, void *data)
 		"reserved",
 		"sink internal error",
 	};
+	static const char * const panel_replay_status[] = {
+		"Sink device frame is locked to the Source device",
+		"Sink device is coasting, using the VTotal target",
+		"Sink device is governing the frame rate (frame rate unlock is granted)",
+		"Sink device in the process of re-locking with the Source device",
+	};
 	const char *str;
 	int ret;
 	u8 status, error_status;
 
-	if (!CAN_PSR(intel_dp)) {
-		seq_puts(m, "PSR Unsupported\n");
+	if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
+		seq_puts(m, "PSR/Panel-Replay Unsupported\n");
 		return -ENODEV;
 	}
 
 	if (connector->base.status != connector_status_connected)
 		return -ENODEV;
 
-	ret = psr_get_status_and_error_status(intel_dp, &status, &error_status);
-	if (ret)
-		return ret;
+	if (psr->panel_replay_enabled) {
+		u32 temp;
 
-	status &= DP_PSR_SINK_STATE_MASK;
-	if (status < ARRAY_SIZE(sink_status))
-		str = sink_status[status];
-	else
-		str = "unknown";
+		ret = panel_replay_get_status_and_error_status(intel_dp, &status, &error_status);
+		if (ret)
+			return ret;
 
-	seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
+		temp = status & DP_SINK_FRAME_LOCKED_MASK;
+		temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
+		if (temp < ARRAY_SIZE(panel_replay_status))
+			str = panel_replay_status[temp];
+		else
+			str = "unknown";
 
-	seq_printf(m, "Sink PSR error status: 0x%x", error_status);
+		seq_printf(m, "Sink Panel Replay status: 0x%x [%s]\n", status, str);
 
-	if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
-			    DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
-			    DP_PSR_LINK_CRC_ERROR))
-		seq_puts(m, ":\n");
-	else
-		seq_puts(m, "\n");
-	if (error_status & DP_PSR_RFB_STORAGE_ERROR)
-		seq_puts(m, "\tPSR RFB storage error\n");
-	if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
-		seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
-	if (error_status & DP_PSR_LINK_CRC_ERROR)
-		seq_puts(m, "\tPSR Link CRC error\n");
+		seq_printf(m, "Sink Panel Replay error status: 0x%x", error_status);
+
+		if (error_status & (DP_PANEL_REPLAY_RFB_STORAGE_ERROR |
+				    DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
+				    DP_PANEL_REPLAY_LINK_CRC_ERROR))
+			seq_puts(m, ":\n");
+		else
+			seq_puts(m, "\n");
+		if (error_status & DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
+			seq_puts(m, "\tPANEL-REPLAY RFB storage error\n");
+		if (error_status & DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
+			seq_puts(m, "\tPANEL-REPLAY VSC SDP uncorrectable error\n");
+		if (error_status & DP_PANEL_REPLAY_LINK_CRC_ERROR)
+			seq_puts(m, "\tPANEL-REPLAY Link CRC error\n");
+	} else {
+		ret = psr_get_status_and_error_status(intel_dp, &status, &error_status);
+		if (ret)
+			return ret;
+
+		status &= DP_PSR_SINK_STATE_MASK;
+		if (status < ARRAY_SIZE(sink_status))
+			str = sink_status[status];
+		else
+			str = "unknown";
+
+		seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
+
+		seq_printf(m, "Sink PSR error status: 0x%x", error_status);
 
+		if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
+				    DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
+				    DP_PSR_LINK_CRC_ERROR))
+			seq_puts(m, ":\n");
+		else
+			seq_puts(m, "\n");
+		if (error_status & DP_PSR_RFB_STORAGE_ERROR)
+			seq_puts(m, "\tPSR RFB storage error\n");
+		if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
+			seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
+		if (error_status & DP_PSR_LINK_CRC_ERROR)
+			seq_puts(m, "\tPSR Link CRC error\n");
+	}
 	return ret;
 }
 DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
@@ -3288,13 +3353,16 @@ void intel_psr_connector_debugfs_add(struct intel_connector *connector)
 	struct drm_i915_private *i915 = to_i915(connector->base.dev);
 	struct dentry *root = connector->base.debugfs_entry;
 
-	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
-		return;
+	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP) {
+		if (!(HAS_DP20(i915) &&
+		      connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort))
+			return;
+	}
 
 	debugfs_create_file("i915_psr_sink_status", 0444, root,
 			    connector, &i915_psr_sink_status_fops);
 
-	if (HAS_PSR(i915))
+	if (HAS_PSR(i915) || HAS_DP20(i915))
 		debugfs_create_file("i915_psr_status", 0444, root,
 				    connector, &i915_psr_status_fops);
 }
-- 
2.29.0

Re: [Intel-gfx] [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Murthy, Arun R]

> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>;
> Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel
> replay
> 
> Add debugfs support which will print source and sink status per connector
> basis.
> 
> v1: Initial version. [rb-ed by Arun]
> v2: Added check for DP 2.0 and connector type in connector_debugfs_add().
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---

Reviewed-:by: Arun R Murthy <arun.r.murthy@intel.com>

Thanks and Regards,
Arun R Murthy
-------------------
>  drivers/gpu/drm/i915/display/intel_psr.c | 136 +++++++++++++++++------
>  1 file changed, 102 insertions(+), 34 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 80de831c2f60..399fc0a8e636 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2823,6 +2823,25 @@ static int psr_get_status_and_error_status(struct
> intel_dp *intel_dp,
>  	return 0;
>  }
> 
> +static int panel_replay_get_status_and_error_status(struct intel_dp *intel_dp,
> +						    u8 *status, u8
> *error_status) {
> +	struct drm_dp_aux *aux = &intel_dp->aux;
> +	int ret;
> +
> +	ret = drm_dp_dpcd_readb(aux,
> DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
> +	if (ret != 1)
> +		return ret;
> +
> +	ret = drm_dp_dpcd_readb(aux, DP_PANEL_REPLAY_ERROR_STATUS,
> error_status);
> +	if (ret != 1)
> +		return ret;
> +
> +	*status = *status & DP_PSR_SINK_STATE_MASK;
> +
> +	return 0;
> +}
> +
>  static void psr_alpm_check(struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@ -
> 3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp, struct seq_file
> *m)
>  			status = live_status[status_val];
>  	}
> 
> -	seq_printf(m, "Source PSR status: %s [0x%08x]\n", status, val);
> +	seq_printf(m, "Source PSR/PanelReplay status: %s [0x%08x]\n", status,
> +val);
>  }
> 
>  static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp) @@ -
> 3048,18 +3067,23 @@ static int intel_psr_status(struct seq_file *m, struct
> intel_dp *intel_dp)
>  	bool enabled;
>  	u32 val;
> 
> -	seq_printf(m, "Sink support: %s", str_yes_no(psr->sink_support));
> -	if (psr->sink_support)
> +	seq_printf(m, "Sink support: PSR = %s, Panel Replay = %s",
> +		   str_yes_no(psr->sink_support),
> +		   str_yes_no(psr->sink_panel_replay_support));
> +
> +	if (psr->sink_support || psr->sink_panel_replay_support)
>  		seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
>  	seq_puts(m, "\n");
> 
> -	if (!psr->sink_support)
> +	if (!(psr->sink_support || psr->sink_panel_replay_support))
>  		return 0;
> 
>  	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
>  	mutex_lock(&psr->lock);
> 
> -	if (psr->enabled)
> +	if (psr->panel_replay_enabled)
> +		status = "Panel Replay Enabled";
> +	else if (psr->enabled)
>  		status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1 enabled";
>  	else
>  		status = "disabled";
> @@ -3072,14 +3096,17 @@ static int intel_psr_status(struct seq_file *m,
> struct intel_dp *intel_dp)
>  		goto unlock;
>  	}
> 
> -	if (psr->psr2_enabled) {
> +	if (psr->panel_replay_enabled) {
> +		val = intel_de_read(dev_priv,
> TRANS_DP2_CTL(cpu_transcoder));
> +		enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> +	} else if (psr->psr2_enabled) {
>  		val = intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder));
>  		enabled = val & EDP_PSR2_ENABLE;
>  	} else {
>  		val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv,
> cpu_transcoder));
>  		enabled = val & EDP_PSR_ENABLE;
>  	}
> -	seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
> +	seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
>  		   str_enabled_disabled(enabled), val);
>  	psr_source_status(intel_dp, m);
>  	seq_printf(m, "Busy frontbuffer bits: 0x%08x\n", @@ -3221,6 +3248,7
> @@ static int i915_psr_sink_status_show(struct seq_file *m, void *data)  {
>  	struct intel_connector *connector = m->private;
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
> +	struct intel_psr *psr = &intel_dp->psr;
>  	static const char * const sink_status[] = {
>  		"inactive",
>  		"transition to active, capture and display", @@ -3231,45
> +3259,82 @@ static int i915_psr_sink_status_show(struct seq_file *m, void
> *data)
>  		"reserved",
>  		"sink internal error",
>  	};
> +	static const char * const panel_replay_status[] = {
> +		"Sink device frame is locked to the Source device",
> +		"Sink device is coasting, using the VTotal target",
> +		"Sink device is governing the frame rate (frame rate unlock is
> granted)",
> +		"Sink device in the process of re-locking with the Source
> device",
> +	};
>  	const char *str;
>  	int ret;
>  	u8 status, error_status;
> 
> -	if (!CAN_PSR(intel_dp)) {
> -		seq_puts(m, "PSR Unsupported\n");
> +	if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> +		seq_puts(m, "PSR/Panel-Replay Unsupported\n");
>  		return -ENODEV;
>  	}
> 
>  	if (connector->base.status != connector_status_connected)
>  		return -ENODEV;
> 
> -	ret = psr_get_status_and_error_status(intel_dp, &status,
> &error_status);
> -	if (ret)
> -		return ret;
> +	if (psr->panel_replay_enabled) {
> +		u32 temp;
> 
> -	status &= DP_PSR_SINK_STATE_MASK;
> -	if (status < ARRAY_SIZE(sink_status))
> -		str = sink_status[status];
> -	else
> -		str = "unknown";
> +		ret = panel_replay_get_status_and_error_status(intel_dp,
> &status, &error_status);
> +		if (ret)
> +			return ret;
> 
> -	seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
> +		temp = status & DP_SINK_FRAME_LOCKED_MASK;
> +		temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
> +		if (temp < ARRAY_SIZE(panel_replay_status))
> +			str = panel_replay_status[temp];
> +		else
> +			str = "unknown";
> 
> -	seq_printf(m, "Sink PSR error status: 0x%x", error_status);
> +		seq_printf(m, "Sink Panel Replay status: 0x%x [%s]\n", status,
> str);
> 
> -	if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> -			    DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> -			    DP_PSR_LINK_CRC_ERROR))
> -		seq_puts(m, ":\n");
> -	else
> -		seq_puts(m, "\n");
> -	if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> -		seq_puts(m, "\tPSR RFB storage error\n");
> -	if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> -		seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
> -	if (error_status & DP_PSR_LINK_CRC_ERROR)
> -		seq_puts(m, "\tPSR Link CRC error\n");
> +		seq_printf(m, "Sink Panel Replay error status: 0x%x",
> error_status);
> +
> +		if (error_status & (DP_PANEL_REPLAY_RFB_STORAGE_ERROR |
> +
> DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
> +				    DP_PANEL_REPLAY_LINK_CRC_ERROR))
> +			seq_puts(m, ":\n");
> +		else
> +			seq_puts(m, "\n");
> +		if (error_status & DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
> +			seq_puts(m, "\tPANEL-REPLAY RFB storage error\n");
> +		if (error_status &
> DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
> +			seq_puts(m, "\tPANEL-REPLAY VSC SDP uncorrectable
> error\n");
> +		if (error_status & DP_PANEL_REPLAY_LINK_CRC_ERROR)
> +			seq_puts(m, "\tPANEL-REPLAY Link CRC error\n");
> +	} else {
> +		ret = psr_get_status_and_error_status(intel_dp, &status,
> &error_status);
> +		if (ret)
> +			return ret;
> +
> +		status &= DP_PSR_SINK_STATE_MASK;
> +		if (status < ARRAY_SIZE(sink_status))
> +			str = sink_status[status];
> +		else
> +			str = "unknown";
> +
> +		seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
> +
> +		seq_printf(m, "Sink PSR error status: 0x%x", error_status);
> 
> +		if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> +				    DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR
> |
> +				    DP_PSR_LINK_CRC_ERROR))
> +			seq_puts(m, ":\n");
> +		else
> +			seq_puts(m, "\n");
> +		if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> +			seq_puts(m, "\tPSR RFB storage error\n");
> +		if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> +			seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
> +		if (error_status & DP_PSR_LINK_CRC_ERROR)
> +			seq_puts(m, "\tPSR Link CRC error\n");
> +	}
>  	return ret;
>  }
>  DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
> @@ -3288,13 +3353,16 @@ void intel_psr_connector_debugfs_add(struct
> intel_connector *connector)
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
>  	struct dentry *root = connector->base.debugfs_entry;
> 
> -	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> -		return;
> +	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> {
> +		if (!(HAS_DP20(i915) &&
> +		      connector->base.connector_type ==
> DRM_MODE_CONNECTOR_DisplayPort))
> +			return;
> +	}
> 
>  	debugfs_create_file("i915_psr_sink_status", 0444, root,
>  			    connector, &i915_psr_sink_status_fops);
> 
> -	if (HAS_PSR(i915))
> +	if (HAS_PSR(i915) || HAS_DP20(i915))
>  		debugfs_create_file("i915_psr_status", 0444, root,
>  				    connector, &i915_psr_status_fops);  }
> --
> 2.29.0

RE: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Murthy, Arun R]

> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>;
> Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel
> replay
> 
> Add debugfs support which will print source and sink status per connector
> basis.
> 
> v1: Initial version. [rb-ed by Arun]
> v2: Added check for DP 2.0 and connector type in connector_debugfs_add().
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---

Reviewed-:by: Arun R Murthy <arun.r.murthy@intel.com>

Thanks and Regards,
Arun R Murthy
-------------------
>  drivers/gpu/drm/i915/display/intel_psr.c | 136 +++++++++++++++++------
>  1 file changed, 102 insertions(+), 34 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 80de831c2f60..399fc0a8e636 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2823,6 +2823,25 @@ static int psr_get_status_and_error_status(struct
> intel_dp *intel_dp,
>  	return 0;
>  }
> 
> +static int panel_replay_get_status_and_error_status(struct intel_dp *intel_dp,
> +						    u8 *status, u8
> *error_status) {
> +	struct drm_dp_aux *aux = &intel_dp->aux;
> +	int ret;
> +
> +	ret = drm_dp_dpcd_readb(aux,
> DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
> +	if (ret != 1)
> +		return ret;
> +
> +	ret = drm_dp_dpcd_readb(aux, DP_PANEL_REPLAY_ERROR_STATUS,
> error_status);
> +	if (ret != 1)
> +		return ret;
> +
> +	*status = *status & DP_PSR_SINK_STATE_MASK;
> +
> +	return 0;
> +}
> +
>  static void psr_alpm_check(struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@ -
> 3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp, struct seq_file
> *m)
>  			status = live_status[status_val];
>  	}
> 
> -	seq_printf(m, "Source PSR status: %s [0x%08x]\n", status, val);
> +	seq_printf(m, "Source PSR/PanelReplay status: %s [0x%08x]\n", status,
> +val);
>  }
> 
>  static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp) @@ -
> 3048,18 +3067,23 @@ static int intel_psr_status(struct seq_file *m, struct
> intel_dp *intel_dp)
>  	bool enabled;
>  	u32 val;
> 
> -	seq_printf(m, "Sink support: %s", str_yes_no(psr->sink_support));
> -	if (psr->sink_support)
> +	seq_printf(m, "Sink support: PSR = %s, Panel Replay = %s",
> +		   str_yes_no(psr->sink_support),
> +		   str_yes_no(psr->sink_panel_replay_support));
> +
> +	if (psr->sink_support || psr->sink_panel_replay_support)
>  		seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
>  	seq_puts(m, "\n");
> 
> -	if (!psr->sink_support)
> +	if (!(psr->sink_support || psr->sink_panel_replay_support))
>  		return 0;
> 
>  	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
>  	mutex_lock(&psr->lock);
> 
> -	if (psr->enabled)
> +	if (psr->panel_replay_enabled)
> +		status = "Panel Replay Enabled";
> +	else if (psr->enabled)
>  		status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1 enabled";
>  	else
>  		status = "disabled";
> @@ -3072,14 +3096,17 @@ static int intel_psr_status(struct seq_file *m,
> struct intel_dp *intel_dp)
>  		goto unlock;
>  	}
> 
> -	if (psr->psr2_enabled) {
> +	if (psr->panel_replay_enabled) {
> +		val = intel_de_read(dev_priv,
> TRANS_DP2_CTL(cpu_transcoder));
> +		enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> +	} else if (psr->psr2_enabled) {
>  		val = intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder));
>  		enabled = val & EDP_PSR2_ENABLE;
>  	} else {
>  		val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv,
> cpu_transcoder));
>  		enabled = val & EDP_PSR_ENABLE;
>  	}
> -	seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
> +	seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
>  		   str_enabled_disabled(enabled), val);
>  	psr_source_status(intel_dp, m);
>  	seq_printf(m, "Busy frontbuffer bits: 0x%08x\n", @@ -3221,6 +3248,7
> @@ static int i915_psr_sink_status_show(struct seq_file *m, void *data)  {
>  	struct intel_connector *connector = m->private;
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
> +	struct intel_psr *psr = &intel_dp->psr;
>  	static const char * const sink_status[] = {
>  		"inactive",
>  		"transition to active, capture and display", @@ -3231,45
> +3259,82 @@ static int i915_psr_sink_status_show(struct seq_file *m, void
> *data)
>  		"reserved",
>  		"sink internal error",
>  	};
> +	static const char * const panel_replay_status[] = {
> +		"Sink device frame is locked to the Source device",
> +		"Sink device is coasting, using the VTotal target",
> +		"Sink device is governing the frame rate (frame rate unlock is
> granted)",
> +		"Sink device in the process of re-locking with the Source
> device",
> +	};
>  	const char *str;
>  	int ret;
>  	u8 status, error_status;
> 
> -	if (!CAN_PSR(intel_dp)) {
> -		seq_puts(m, "PSR Unsupported\n");
> +	if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> +		seq_puts(m, "PSR/Panel-Replay Unsupported\n");
>  		return -ENODEV;
>  	}
> 
>  	if (connector->base.status != connector_status_connected)
>  		return -ENODEV;
> 
> -	ret = psr_get_status_and_error_status(intel_dp, &status,
> &error_status);
> -	if (ret)
> -		return ret;
> +	if (psr->panel_replay_enabled) {
> +		u32 temp;
> 
> -	status &= DP_PSR_SINK_STATE_MASK;
> -	if (status < ARRAY_SIZE(sink_status))
> -		str = sink_status[status];
> -	else
> -		str = "unknown";
> +		ret = panel_replay_get_status_and_error_status(intel_dp,
> &status, &error_status);
> +		if (ret)
> +			return ret;
> 
> -	seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
> +		temp = status & DP_SINK_FRAME_LOCKED_MASK;
> +		temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
> +		if (temp < ARRAY_SIZE(panel_replay_status))
> +			str = panel_replay_status[temp];
> +		else
> +			str = "unknown";
> 
> -	seq_printf(m, "Sink PSR error status: 0x%x", error_status);
> +		seq_printf(m, "Sink Panel Replay status: 0x%x [%s]\n", status,
> str);
> 
> -	if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> -			    DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> -			    DP_PSR_LINK_CRC_ERROR))
> -		seq_puts(m, ":\n");
> -	else
> -		seq_puts(m, "\n");
> -	if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> -		seq_puts(m, "\tPSR RFB storage error\n");
> -	if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> -		seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
> -	if (error_status & DP_PSR_LINK_CRC_ERROR)
> -		seq_puts(m, "\tPSR Link CRC error\n");
> +		seq_printf(m, "Sink Panel Replay error status: 0x%x",
> error_status);
> +
> +		if (error_status & (DP_PANEL_REPLAY_RFB_STORAGE_ERROR |
> +
> DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
> +				    DP_PANEL_REPLAY_LINK_CRC_ERROR))
> +			seq_puts(m, ":\n");
> +		else
> +			seq_puts(m, "\n");
> +		if (error_status & DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
> +			seq_puts(m, "\tPANEL-REPLAY RFB storage error\n");
> +		if (error_status &
> DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
> +			seq_puts(m, "\tPANEL-REPLAY VSC SDP uncorrectable
> error\n");
> +		if (error_status & DP_PANEL_REPLAY_LINK_CRC_ERROR)
> +			seq_puts(m, "\tPANEL-REPLAY Link CRC error\n");
> +	} else {
> +		ret = psr_get_status_and_error_status(intel_dp, &status,
> &error_status);
> +		if (ret)
> +			return ret;
> +
> +		status &= DP_PSR_SINK_STATE_MASK;
> +		if (status < ARRAY_SIZE(sink_status))
> +			str = sink_status[status];
> +		else
> +			str = "unknown";
> +
> +		seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
> +
> +		seq_printf(m, "Sink PSR error status: 0x%x", error_status);
> 
> +		if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> +				    DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR
> |
> +				    DP_PSR_LINK_CRC_ERROR))
> +			seq_puts(m, ":\n");
> +		else
> +			seq_puts(m, "\n");
> +		if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> +			seq_puts(m, "\tPSR RFB storage error\n");
> +		if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> +			seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
> +		if (error_status & DP_PSR_LINK_CRC_ERROR)
> +			seq_puts(m, "\tPSR Link CRC error\n");
> +	}
>  	return ret;
>  }
>  DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
> @@ -3288,13 +3353,16 @@ void intel_psr_connector_debugfs_add(struct
> intel_connector *connector)
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
>  	struct dentry *root = connector->base.debugfs_entry;
> 
> -	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> -		return;
> +	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> {
> +		if (!(HAS_DP20(i915) &&
> +		      connector->base.connector_type ==
> DRM_MODE_CONNECTOR_DisplayPort))
> +			return;
> +	}
> 
>  	debugfs_create_file("i915_psr_sink_status", 0444, root,
>  			    connector, &i915_psr_sink_status_fops);
> 
> -	if (HAS_PSR(i915))
> +	if (HAS_PSR(i915) || HAS_DP20(i915))
>  		debugfs_create_file("i915_psr_status", 0444, root,
>  				    connector, &i915_psr_status_fops);  }
> --
> 2.29.0

Re: [Intel-gfx] [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Murthy, Arun R]

> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>;
> Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel
> replay
> 
> Add debugfs support which will print source and sink status per connector
> basis.
> 
> v1: Initial version. [rb-ed by Arun]
> v2: Added check for DP 2.0 and connector type in connector_debugfs_add().
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>

Thanks and Regards,
Arun R Murthy
--------------------

>  drivers/gpu/drm/i915/display/intel_psr.c | 136 +++++++++++++++++------
>  1 file changed, 102 insertions(+), 34 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 80de831c2f60..399fc0a8e636 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2823,6 +2823,25 @@ static int psr_get_status_and_error_status(struct
> intel_dp *intel_dp,
>  	return 0;
>  }
> 
> +static int panel_replay_get_status_and_error_status(struct intel_dp *intel_dp,
> +						    u8 *status, u8
> *error_status) {
> +	struct drm_dp_aux *aux = &intel_dp->aux;
> +	int ret;
> +
> +	ret = drm_dp_dpcd_readb(aux,
> DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
> +	if (ret != 1)
> +		return ret;
> +
> +	ret = drm_dp_dpcd_readb(aux, DP_PANEL_REPLAY_ERROR_STATUS,
> error_status);
> +	if (ret != 1)
> +		return ret;
> +
> +	*status = *status & DP_PSR_SINK_STATE_MASK;
> +
> +	return 0;
> +}
> +
>  static void psr_alpm_check(struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@ -
> 3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp, struct seq_file
> *m)
>  			status = live_status[status_val];
>  	}
> 
> -	seq_printf(m, "Source PSR status: %s [0x%08x]\n", status, val);
> +	seq_printf(m, "Source PSR/PanelReplay status: %s [0x%08x]\n", status,
> +val);
>  }
> 
>  static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp) @@ -
> 3048,18 +3067,23 @@ static int intel_psr_status(struct seq_file *m, struct
> intel_dp *intel_dp)
>  	bool enabled;
>  	u32 val;
> 
> -	seq_printf(m, "Sink support: %s", str_yes_no(psr->sink_support));
> -	if (psr->sink_support)
> +	seq_printf(m, "Sink support: PSR = %s, Panel Replay = %s",
> +		   str_yes_no(psr->sink_support),
> +		   str_yes_no(psr->sink_panel_replay_support));
> +
> +	if (psr->sink_support || psr->sink_panel_replay_support)
>  		seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
>  	seq_puts(m, "\n");
> 
> -	if (!psr->sink_support)
> +	if (!(psr->sink_support || psr->sink_panel_replay_support))
>  		return 0;
> 
>  	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
>  	mutex_lock(&psr->lock);
> 
> -	if (psr->enabled)
> +	if (psr->panel_replay_enabled)
> +		status = "Panel Replay Enabled";
> +	else if (psr->enabled)
>  		status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1 enabled";
>  	else
>  		status = "disabled";
> @@ -3072,14 +3096,17 @@ static int intel_psr_status(struct seq_file *m,
> struct intel_dp *intel_dp)
>  		goto unlock;
>  	}
> 
> -	if (psr->psr2_enabled) {
> +	if (psr->panel_replay_enabled) {
> +		val = intel_de_read(dev_priv,
> TRANS_DP2_CTL(cpu_transcoder));
> +		enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> +	} else if (psr->psr2_enabled) {
>  		val = intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder));
>  		enabled = val & EDP_PSR2_ENABLE;
>  	} else {
>  		val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv,
> cpu_transcoder));
>  		enabled = val & EDP_PSR_ENABLE;
>  	}
> -	seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
> +	seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
>  		   str_enabled_disabled(enabled), val);
>  	psr_source_status(intel_dp, m);
>  	seq_printf(m, "Busy frontbuffer bits: 0x%08x\n", @@ -3221,6 +3248,7
> @@ static int i915_psr_sink_status_show(struct seq_file *m, void *data)  {
>  	struct intel_connector *connector = m->private;
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
> +	struct intel_psr *psr = &intel_dp->psr;
>  	static const char * const sink_status[] = {
>  		"inactive",
>  		"transition to active, capture and display", @@ -3231,45
> +3259,82 @@ static int i915_psr_sink_status_show(struct seq_file *m, void
> *data)
>  		"reserved",
>  		"sink internal error",
>  	};
> +	static const char * const panel_replay_status[] = {
> +		"Sink device frame is locked to the Source device",
> +		"Sink device is coasting, using the VTotal target",
> +		"Sink device is governing the frame rate (frame rate unlock is
> granted)",
> +		"Sink device in the process of re-locking with the Source
> device",
> +	};
>  	const char *str;
>  	int ret;
>  	u8 status, error_status;
> 
> -	if (!CAN_PSR(intel_dp)) {
> -		seq_puts(m, "PSR Unsupported\n");
> +	if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> +		seq_puts(m, "PSR/Panel-Replay Unsupported\n");
>  		return -ENODEV;
>  	}
> 
>  	if (connector->base.status != connector_status_connected)
>  		return -ENODEV;
> 
> -	ret = psr_get_status_and_error_status(intel_dp, &status,
> &error_status);
> -	if (ret)
> -		return ret;
> +	if (psr->panel_replay_enabled) {
> +		u32 temp;
> 
> -	status &= DP_PSR_SINK_STATE_MASK;
> -	if (status < ARRAY_SIZE(sink_status))
> -		str = sink_status[status];
> -	else
> -		str = "unknown";
> +		ret = panel_replay_get_status_and_error_status(intel_dp,
> &status, &error_status);
> +		if (ret)
> +			return ret;
> 
> -	seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
> +		temp = status & DP_SINK_FRAME_LOCKED_MASK;
> +		temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
> +		if (temp < ARRAY_SIZE(panel_replay_status))
> +			str = panel_replay_status[temp];
> +		else
> +			str = "unknown";
> 
> -	seq_printf(m, "Sink PSR error status: 0x%x", error_status);
> +		seq_printf(m, "Sink Panel Replay status: 0x%x [%s]\n", status,
> str);
> 
> -	if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> -			    DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> -			    DP_PSR_LINK_CRC_ERROR))
> -		seq_puts(m, ":\n");
> -	else
> -		seq_puts(m, "\n");
> -	if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> -		seq_puts(m, "\tPSR RFB storage error\n");
> -	if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> -		seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
> -	if (error_status & DP_PSR_LINK_CRC_ERROR)
> -		seq_puts(m, "\tPSR Link CRC error\n");
> +		seq_printf(m, "Sink Panel Replay error status: 0x%x",
> error_status);
> +
> +		if (error_status & (DP_PANEL_REPLAY_RFB_STORAGE_ERROR |
> +
> DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
> +				    DP_PANEL_REPLAY_LINK_CRC_ERROR))
> +			seq_puts(m, ":\n");
> +		else
> +			seq_puts(m, "\n");
> +		if (error_status & DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
> +			seq_puts(m, "\tPANEL-REPLAY RFB storage error\n");
> +		if (error_status &
> DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
> +			seq_puts(m, "\tPANEL-REPLAY VSC SDP uncorrectable
> error\n");
> +		if (error_status & DP_PANEL_REPLAY_LINK_CRC_ERROR)
> +			seq_puts(m, "\tPANEL-REPLAY Link CRC error\n");
> +	} else {
> +		ret = psr_get_status_and_error_status(intel_dp, &status,
> &error_status);
> +		if (ret)
> +			return ret;
> +
> +		status &= DP_PSR_SINK_STATE_MASK;
> +		if (status < ARRAY_SIZE(sink_status))
> +			str = sink_status[status];
> +		else
> +			str = "unknown";
> +
> +		seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
> +
> +		seq_printf(m, "Sink PSR error status: 0x%x", error_status);
> 
> +		if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> +				    DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR
> |
> +				    DP_PSR_LINK_CRC_ERROR))
> +			seq_puts(m, ":\n");
> +		else
> +			seq_puts(m, "\n");
> +		if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> +			seq_puts(m, "\tPSR RFB storage error\n");
> +		if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> +			seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
> +		if (error_status & DP_PSR_LINK_CRC_ERROR)
> +			seq_puts(m, "\tPSR Link CRC error\n");
> +	}
>  	return ret;
>  }
>  DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
> @@ -3288,13 +3353,16 @@ void intel_psr_connector_debugfs_add(struct
> intel_connector *connector)
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
>  	struct dentry *root = connector->base.debugfs_entry;
> 
> -	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> -		return;
> +	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> {
> +		if (!(HAS_DP20(i915) &&
> +		      connector->base.connector_type ==
> DRM_MODE_CONNECTOR_DisplayPort))
> +			return;
> +	}
> 
>  	debugfs_create_file("i915_psr_sink_status", 0444, root,
>  			    connector, &i915_psr_sink_status_fops);
> 
> -	if (HAS_PSR(i915))
> +	if (HAS_PSR(i915) || HAS_DP20(i915))
>  		debugfs_create_file("i915_psr_status", 0444, root,
>  				    connector, &i915_psr_status_fops);  }
> --
> 2.29.0

RE: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Murthy, Arun R]

> -----Original Message-----
> From: Manna, Animesh <animesh.manna@intel.com>
> Sent: Wednesday, October 11, 2023 4:40 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Manna, Animesh
> <animesh.manna@intel.com>; Hogander, Jouni <jouni.hogander@intel.com>;
> Murthy, Arun R <arun.r.murthy@intel.com>; Nikula, Jani
> <jani.nikula@intel.com>
> Subject: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel
> replay
> 
> Add debugfs support which will print source and sink status per connector
> basis.
> 
> v1: Initial version. [rb-ed by Arun]
> v2: Added check for DP 2.0 and connector type in connector_debugfs_add().
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>

Thanks and Regards,
Arun R Murthy
--------------------

>  drivers/gpu/drm/i915/display/intel_psr.c | 136 +++++++++++++++++------
>  1 file changed, 102 insertions(+), 34 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 80de831c2f60..399fc0a8e636 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2823,6 +2823,25 @@ static int psr_get_status_and_error_status(struct
> intel_dp *intel_dp,
>  	return 0;
>  }
> 
> +static int panel_replay_get_status_and_error_status(struct intel_dp *intel_dp,
> +						    u8 *status, u8
> *error_status) {
> +	struct drm_dp_aux *aux = &intel_dp->aux;
> +	int ret;
> +
> +	ret = drm_dp_dpcd_readb(aux,
> DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
> +	if (ret != 1)
> +		return ret;
> +
> +	ret = drm_dp_dpcd_readb(aux, DP_PANEL_REPLAY_ERROR_STATUS,
> error_status);
> +	if (ret != 1)
> +		return ret;
> +
> +	*status = *status & DP_PSR_SINK_STATE_MASK;
> +
> +	return 0;
> +}
> +
>  static void psr_alpm_check(struct intel_dp *intel_dp)  {
>  	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@ -
> 3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp, struct seq_file
> *m)
>  			status = live_status[status_val];
>  	}
> 
> -	seq_printf(m, "Source PSR status: %s [0x%08x]\n", status, val);
> +	seq_printf(m, "Source PSR/PanelReplay status: %s [0x%08x]\n", status,
> +val);
>  }
> 
>  static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp) @@ -
> 3048,18 +3067,23 @@ static int intel_psr_status(struct seq_file *m, struct
> intel_dp *intel_dp)
>  	bool enabled;
>  	u32 val;
> 
> -	seq_printf(m, "Sink support: %s", str_yes_no(psr->sink_support));
> -	if (psr->sink_support)
> +	seq_printf(m, "Sink support: PSR = %s, Panel Replay = %s",
> +		   str_yes_no(psr->sink_support),
> +		   str_yes_no(psr->sink_panel_replay_support));
> +
> +	if (psr->sink_support || psr->sink_panel_replay_support)
>  		seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
>  	seq_puts(m, "\n");
> 
> -	if (!psr->sink_support)
> +	if (!(psr->sink_support || psr->sink_panel_replay_support))
>  		return 0;
> 
>  	wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
>  	mutex_lock(&psr->lock);
> 
> -	if (psr->enabled)
> +	if (psr->panel_replay_enabled)
> +		status = "Panel Replay Enabled";
> +	else if (psr->enabled)
>  		status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1 enabled";
>  	else
>  		status = "disabled";
> @@ -3072,14 +3096,17 @@ static int intel_psr_status(struct seq_file *m,
> struct intel_dp *intel_dp)
>  		goto unlock;
>  	}
> 
> -	if (psr->psr2_enabled) {
> +	if (psr->panel_replay_enabled) {
> +		val = intel_de_read(dev_priv,
> TRANS_DP2_CTL(cpu_transcoder));
> +		enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> +	} else if (psr->psr2_enabled) {
>  		val = intel_de_read(dev_priv, EDP_PSR2_CTL(cpu_transcoder));
>  		enabled = val & EDP_PSR2_ENABLE;
>  	} else {
>  		val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv,
> cpu_transcoder));
>  		enabled = val & EDP_PSR_ENABLE;
>  	}
> -	seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
> +	seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
>  		   str_enabled_disabled(enabled), val);
>  	psr_source_status(intel_dp, m);
>  	seq_printf(m, "Busy frontbuffer bits: 0x%08x\n", @@ -3221,6 +3248,7
> @@ static int i915_psr_sink_status_show(struct seq_file *m, void *data)  {
>  	struct intel_connector *connector = m->private;
>  	struct intel_dp *intel_dp = intel_attached_dp(connector);
> +	struct intel_psr *psr = &intel_dp->psr;
>  	static const char * const sink_status[] = {
>  		"inactive",
>  		"transition to active, capture and display", @@ -3231,45
> +3259,82 @@ static int i915_psr_sink_status_show(struct seq_file *m, void
> *data)
>  		"reserved",
>  		"sink internal error",
>  	};
> +	static const char * const panel_replay_status[] = {
> +		"Sink device frame is locked to the Source device",
> +		"Sink device is coasting, using the VTotal target",
> +		"Sink device is governing the frame rate (frame rate unlock is
> granted)",
> +		"Sink device in the process of re-locking with the Source
> device",
> +	};
>  	const char *str;
>  	int ret;
>  	u8 status, error_status;
> 
> -	if (!CAN_PSR(intel_dp)) {
> -		seq_puts(m, "PSR Unsupported\n");
> +	if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> +		seq_puts(m, "PSR/Panel-Replay Unsupported\n");
>  		return -ENODEV;
>  	}
> 
>  	if (connector->base.status != connector_status_connected)
>  		return -ENODEV;
> 
> -	ret = psr_get_status_and_error_status(intel_dp, &status,
> &error_status);
> -	if (ret)
> -		return ret;
> +	if (psr->panel_replay_enabled) {
> +		u32 temp;
> 
> -	status &= DP_PSR_SINK_STATE_MASK;
> -	if (status < ARRAY_SIZE(sink_status))
> -		str = sink_status[status];
> -	else
> -		str = "unknown";
> +		ret = panel_replay_get_status_and_error_status(intel_dp,
> &status, &error_status);
> +		if (ret)
> +			return ret;
> 
> -	seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
> +		temp = status & DP_SINK_FRAME_LOCKED_MASK;
> +		temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
> +		if (temp < ARRAY_SIZE(panel_replay_status))
> +			str = panel_replay_status[temp];
> +		else
> +			str = "unknown";
> 
> -	seq_printf(m, "Sink PSR error status: 0x%x", error_status);
> +		seq_printf(m, "Sink Panel Replay status: 0x%x [%s]\n", status,
> str);
> 
> -	if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> -			    DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> -			    DP_PSR_LINK_CRC_ERROR))
> -		seq_puts(m, ":\n");
> -	else
> -		seq_puts(m, "\n");
> -	if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> -		seq_puts(m, "\tPSR RFB storage error\n");
> -	if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> -		seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
> -	if (error_status & DP_PSR_LINK_CRC_ERROR)
> -		seq_puts(m, "\tPSR Link CRC error\n");
> +		seq_printf(m, "Sink Panel Replay error status: 0x%x",
> error_status);
> +
> +		if (error_status & (DP_PANEL_REPLAY_RFB_STORAGE_ERROR |
> +
> DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
> +				    DP_PANEL_REPLAY_LINK_CRC_ERROR))
> +			seq_puts(m, ":\n");
> +		else
> +			seq_puts(m, "\n");
> +		if (error_status & DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
> +			seq_puts(m, "\tPANEL-REPLAY RFB storage error\n");
> +		if (error_status &
> DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
> +			seq_puts(m, "\tPANEL-REPLAY VSC SDP uncorrectable
> error\n");
> +		if (error_status & DP_PANEL_REPLAY_LINK_CRC_ERROR)
> +			seq_puts(m, "\tPANEL-REPLAY Link CRC error\n");
> +	} else {
> +		ret = psr_get_status_and_error_status(intel_dp, &status,
> &error_status);
> +		if (ret)
> +			return ret;
> +
> +		status &= DP_PSR_SINK_STATE_MASK;
> +		if (status < ARRAY_SIZE(sink_status))
> +			str = sink_status[status];
> +		else
> +			str = "unknown";
> +
> +		seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
> +
> +		seq_printf(m, "Sink PSR error status: 0x%x", error_status);
> 
> +		if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> +				    DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR
> |
> +				    DP_PSR_LINK_CRC_ERROR))
> +			seq_puts(m, ":\n");
> +		else
> +			seq_puts(m, "\n");
> +		if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> +			seq_puts(m, "\tPSR RFB storage error\n");
> +		if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> +			seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
> +		if (error_status & DP_PSR_LINK_CRC_ERROR)
> +			seq_puts(m, "\tPSR Link CRC error\n");
> +	}
>  	return ret;
>  }
>  DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
> @@ -3288,13 +3353,16 @@ void intel_psr_connector_debugfs_add(struct
> intel_connector *connector)
>  	struct drm_i915_private *i915 = to_i915(connector->base.dev);
>  	struct dentry *root = connector->base.debugfs_entry;
> 
> -	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> -		return;
> +	if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> {
> +		if (!(HAS_DP20(i915) &&
> +		      connector->base.connector_type ==
> DRM_MODE_CONNECTOR_DisplayPort))
> +			return;
> +	}
> 
>  	debugfs_create_file("i915_psr_sink_status", 0444, root,
>  			    connector, &i915_psr_sink_status_fops);
> 
> -	if (HAS_PSR(i915))
> +	if (HAS_PSR(i915) || HAS_DP20(i915))
>  		debugfs_create_file("i915_psr_status", 0444, root,
>  				    connector, &i915_psr_status_fops);  }
> --
> 2.29.0

Re: [Intel-gfx] [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Hogander, Jouni]

On Wed, 2023-10-11 at 16:39 +0530, Animesh Manna wrote:
> Add debugfs support which will print source and sink status
> per connector basis.

Sorry for late review. Noticed only by now that you have added this
patch into you set.

Can you please describe in commit message how you see the output of
debugfs interface will look like after your changes?

> 
> v1: Initial version. [rb-ed by Arun]
> v2: Added check for DP 2.0 and connector type in
> connector_debugfs_add().
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 136 +++++++++++++++++----
> --
>  1 file changed, 102 insertions(+), 34 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 80de831c2f60..399fc0a8e636 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2823,6 +2823,25 @@ static int
> psr_get_status_and_error_status(struct intel_dp *intel_dp,
>         return 0;
>  }
>  
> +static int panel_replay_get_status_and_error_status(struct intel_dp
> *intel_dp,
> +                                                   u8 *status, u8
> *error_status)
> +{
> +       struct drm_dp_aux *aux = &intel_dp->aux;
> +       int ret;
> +
> +       ret = drm_dp_dpcd_readb(aux,
> DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
> +       if (ret != 1)
> +               return ret;
> +
> +       ret = drm_dp_dpcd_readb(aux, DP_PANEL_REPLAY_ERROR_STATUS,
> error_status);
> +       if (ret != 1)
> +               return ret;
> +
> +       *status = *status & DP_PSR_SINK_STATE_MASK;
> +
> +       return 0;
> +}
> +

I think you should modify  psr_get_status_and_error_status instead of
duplicating most of it.

>  static void psr_alpm_check(struct intel_dp *intel_dp)
>  {
>         struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> @@ -3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp,
> struct seq_file *m)
>                         status = live_status[status_val];
>         }
>  
> -       seq_printf(m, "Source PSR status: %s [0x%08x]\n", status,
> val);
> +       seq_printf(m, "Source PSR/PanelReplay status: %s [0x%08x]\n",
> status, val);
>  }
>  
>  static int intel_psr_status(struct seq_file *m, struct intel_dp
> *intel_dp)
> @@ -3048,18 +3067,23 @@ static int intel_psr_status(struct seq_file
> *m, struct intel_dp *intel_dp)
>         bool enabled;
>         u32 val;
>  
> -       seq_printf(m, "Sink support: %s", str_yes_no(psr-
> >sink_support));
> -       if (psr->sink_support)
> +       seq_printf(m, "Sink support: PSR = %s, Panel Replay = %s",
> +                  str_yes_no(psr->sink_support),
> +                  str_yes_no(psr->sink_panel_replay_support));
> +
> +       if (psr->sink_support || psr->sink_panel_replay_support)
>                 seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
>         seq_puts(m, "\n");
>  
> -       if (!psr->sink_support)
> +       if (!(psr->sink_support || psr->sink_panel_replay_support))
>                 return 0;
>  
>         wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
>         mutex_lock(&psr->lock);
>  
> -       if (psr->enabled)
> +       if (psr->panel_replay_enabled)
> +               status = "Panel Replay Enabled";
> +       else if (psr->enabled)
>                 status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1
> enabled";
>         else
>                 status = "disabled";
> @@ -3072,14 +3096,17 @@ static int intel_psr_status(struct seq_file
> *m, struct intel_dp *intel_dp)
>                 goto unlock;
>         }
>  
> -       if (psr->psr2_enabled) {
> +       if (psr->panel_replay_enabled) {
> +               val = intel_de_read(dev_priv,
> TRANS_DP2_CTL(cpu_transcoder));
> +               enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> +       } else if (psr->psr2_enabled) {
>                 val = intel_de_read(dev_priv,
> EDP_PSR2_CTL(cpu_transcoder));
> 
>                 enabled = val & EDP_PSR2_ENABLE;
>         } else {
>                 val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv,
> cpu_transcoder));
>                 enabled = val & EDP_PSR_ENABLE;
>         }
> -       seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
> +       seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
>                    str_enabled_disabled(enabled), val);
>         psr_source_status(intel_dp, m);
>         seq_printf(m, "Busy frontbuffer bits: 0x%08x\n",
> @@ -3221,6 +3248,7 @@ static int i915_psr_sink_status_show(struct
> seq_file *m, void *data)
>  {
>         struct intel_connector *connector = m->private;
>         struct intel_dp *intel_dp = intel_attached_dp(connector);
> +       struct intel_psr *psr = &intel_dp->psr;
>         static const char * const sink_status[] = {
>                 "inactive",
>                 "transition to active, capture and display",
> @@ -3231,45 +3259,82 @@ static int i915_psr_sink_status_show(struct
> seq_file *m, void *data)
>                 "reserved",
>                 "sink internal error",
>         };
> +       static const char * const panel_replay_status[] = {
> +               "Sink device frame is locked to the Source device",
> +               "Sink device is coasting, using the VTotal target",
> +               "Sink device is governing the frame rate (frame rate
> unlock is granted)",
> +               "Sink device in the process of re-locking with the
> Source device",
> +       };
>         const char *str;
>         int ret;
>         u8 status, error_status;
>  
> -       if (!CAN_PSR(intel_dp)) {
> -               seq_puts(m, "PSR Unsupported\n");
> +       if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> +               seq_puts(m, "PSR/Panel-Replay Unsupported\n");
>                 return -ENODEV;
>         }
>  
>         if (connector->base.status != connector_status_connected)
>                 return -ENODEV;
>  
> -       ret = psr_get_status_and_error_status(intel_dp, &status,
> &error_status);
> -       if (ret)
> -               return ret;
> +       if (psr->panel_replay_enabled) {
> +               u32 temp;
>  
> -       status &= DP_PSR_SINK_STATE_MASK;
> -       if (status < ARRAY_SIZE(sink_status))
> -               str = sink_status[status];
> -       else
> -               str = "unknown";
> +               ret =
> panel_replay_get_status_and_error_status(intel_dp, &status,
> &error_status);
> +               if (ret)
> +                       return ret;
>  
> -       seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
> +               temp = status & DP_SINK_FRAME_LOCKED_MASK;
> +               temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
> +               if (temp < ARRAY_SIZE(panel_replay_status))
> +                       str = panel_replay_status[temp];
> +               else
> +                       str = "unknown";
>  
> -       seq_printf(m, "Sink PSR error status: 0x%x", error_status);
> +               seq_printf(m, "Sink Panel Replay status: 0x%x
> [%s]\n", status, str);
>  
> -       if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> -                           DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> -                           DP_PSR_LINK_CRC_ERROR))
> -               seq_puts(m, ":\n");
> -       else
> -               seq_puts(m, "\n");
> -       if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> -               seq_puts(m, "\tPSR RFB storage error\n");
> -       if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> -               seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
> -       if (error_status & DP_PSR_LINK_CRC_ERROR)
> -               seq_puts(m, "\tPSR Link CRC error\n");
> +               seq_printf(m, "Sink Panel Replay error status: 0x%x",
> error_status);
> +
> +               if (error_status & (DP_PANEL_REPLAY_RFB_STORAGE_ERROR
> |
> +                                  
> DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
> +                                   DP_PANEL_REPLAY_LINK_CRC_ERROR))
> +                       seq_puts(m, ":\n");
> +               else
> +                       seq_puts(m, "\n");
> +               if (error_status & DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
> +                       seq_puts(m, "\tPANEL-REPLAY RFB storage
> error\n");
> +               if (error_status &
> DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
> +                       seq_puts(m, "\tPANEL-REPLAY VSC SDP
> uncorrectable error\n");
> +               if (error_status & DP_PANEL_REPLAY_LINK_CRC_ERROR)
> +                       seq_puts(m, "\tPANEL-REPLAY Link CRC
> error\n");
> +       } else {
> +               ret = psr_get_status_and_error_status(intel_dp,
> &status, &error_status);
> +               if (ret)
> +                       return ret;
> +
> +               status &= DP_PSR_SINK_STATE_MASK;
> +               if (status < ARRAY_SIZE(sink_status))
> +                       str = sink_status[status];
> +               else
> +                       str = "unknown";
> +
> +               seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status,
> str);
> +
> +               seq_printf(m, "Sink PSR error status: 0x%x",
> error_status);
>  
> +               if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> +                                  
> DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> +                                   DP_PSR_LINK_CRC_ERROR))
> +                       seq_puts(m, ":\n");
> +               else
> +                       seq_puts(m, "\n");
> +               if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> +                       seq_puts(m, "\tPSR RFB storage error\n");
> +               if (error_status &
> DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> +                       seq_puts(m, "\tPSR VSC SDP uncorrectable
> error\n");
> +               if (error_status & DP_PSR_LINK_CRC_ERROR)
> +                       seq_puts(m, "\tPSR Link CRC error\n");
> +       }

Instead of duplicating so much here I think it woukd be ok to just drop
PSR and do (same applies for all the statuses):


if (error_status & (DP_PSR_LINK_CRC_ERROR | 
DP_PANEL_REPLAY_LINK_CRC_ERROR))
    seq_puts(m, "\tLink CRC error\n");

What do you think?


>         return ret;
>  }
>  DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
> @@ -3288,13 +3353,16 @@ void intel_psr_connector_debugfs_add(struct
> intel_connector *connector)
>         struct drm_i915_private *i915 = to_i915(connector->base.dev);
>         struct dentry *root = connector->base.debugfs_entry;
>  
> -       if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> -               return;
> +       if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> {
> +               if (!(HAS_DP20(i915) &&
> +                     connector->base.connector_type ==
> DRM_MODE_CONNECTOR_DisplayPort))
> +                       return;
> +       }

Why do you need to check DRM_MODE_CONNECTOR_DisplayPort ? I think
connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
!HAS_DP20(i915) is enough.

BR,

Jouni Högander
>  
>         debugfs_create_file("i915_psr_sink_status", 0444, root,
>                             connector, &i915_psr_sink_status_fops);
>  
> -       if (HAS_PSR(i915))
> +       if (HAS_PSR(i915) || HAS_DP20(i915))
>                 debugfs_create_file("i915_psr_status", 0444, root,
>                                     connector,
> &i915_psr_status_fops);
>  }

Re: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Hogander, Jouni]

On Wed, 2023-10-11 at 16:39 +0530, Animesh Manna wrote:
> Add debugfs support which will print source and sink status
> per connector basis.

Sorry for late review. Noticed only by now that you have added this
patch into you set.

Can you please describe in commit message how you see the output of
debugfs interface will look like after your changes?

> 
> v1: Initial version. [rb-ed by Arun]
> v2: Added check for DP 2.0 and connector type in
> connector_debugfs_add().
> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Cc: Arun R Murthy <arun.r.murthy@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 136 +++++++++++++++++----
> --
>  1 file changed, 102 insertions(+), 34 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 80de831c2f60..399fc0a8e636 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -2823,6 +2823,25 @@ static int
> psr_get_status_and_error_status(struct intel_dp *intel_dp,
>         return 0;
>  }
>  
> +static int panel_replay_get_status_and_error_status(struct intel_dp
> *intel_dp,
> +                                                   u8 *status, u8
> *error_status)
> +{
> +       struct drm_dp_aux *aux = &intel_dp->aux;
> +       int ret;
> +
> +       ret = drm_dp_dpcd_readb(aux,
> DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
> +       if (ret != 1)
> +               return ret;
> +
> +       ret = drm_dp_dpcd_readb(aux, DP_PANEL_REPLAY_ERROR_STATUS,
> error_status);
> +       if (ret != 1)
> +               return ret;
> +
> +       *status = *status & DP_PSR_SINK_STATE_MASK;
> +
> +       return 0;
> +}
> +

I think you should modify  psr_get_status_and_error_status instead of
duplicating most of it.

>  static void psr_alpm_check(struct intel_dp *intel_dp)
>  {
>         struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> @@ -3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp,
> struct seq_file *m)
>                         status = live_status[status_val];
>         }
>  
> -       seq_printf(m, "Source PSR status: %s [0x%08x]\n", status,
> val);
> +       seq_printf(m, "Source PSR/PanelReplay status: %s [0x%08x]\n",
> status, val);
>  }
>  
>  static int intel_psr_status(struct seq_file *m, struct intel_dp
> *intel_dp)
> @@ -3048,18 +3067,23 @@ static int intel_psr_status(struct seq_file
> *m, struct intel_dp *intel_dp)
>         bool enabled;
>         u32 val;
>  
> -       seq_printf(m, "Sink support: %s", str_yes_no(psr-
> >sink_support));
> -       if (psr->sink_support)
> +       seq_printf(m, "Sink support: PSR = %s, Panel Replay = %s",
> +                  str_yes_no(psr->sink_support),
> +                  str_yes_no(psr->sink_panel_replay_support));
> +
> +       if (psr->sink_support || psr->sink_panel_replay_support)
>                 seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
>         seq_puts(m, "\n");
>  
> -       if (!psr->sink_support)
> +       if (!(psr->sink_support || psr->sink_panel_replay_support))
>                 return 0;
>  
>         wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
>         mutex_lock(&psr->lock);
>  
> -       if (psr->enabled)
> +       if (psr->panel_replay_enabled)
> +               status = "Panel Replay Enabled";
> +       else if (psr->enabled)
>                 status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1
> enabled";
>         else
>                 status = "disabled";
> @@ -3072,14 +3096,17 @@ static int intel_psr_status(struct seq_file
> *m, struct intel_dp *intel_dp)
>                 goto unlock;
>         }
>  
> -       if (psr->psr2_enabled) {
> +       if (psr->panel_replay_enabled) {
> +               val = intel_de_read(dev_priv,
> TRANS_DP2_CTL(cpu_transcoder));
> +               enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> +       } else if (psr->psr2_enabled) {
>                 val = intel_de_read(dev_priv,
> EDP_PSR2_CTL(cpu_transcoder));
> 
>                 enabled = val & EDP_PSR2_ENABLE;
>         } else {
>                 val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv,
> cpu_transcoder));
>                 enabled = val & EDP_PSR_ENABLE;
>         }
> -       seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
> +       seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
>                    str_enabled_disabled(enabled), val);
>         psr_source_status(intel_dp, m);
>         seq_printf(m, "Busy frontbuffer bits: 0x%08x\n",
> @@ -3221,6 +3248,7 @@ static int i915_psr_sink_status_show(struct
> seq_file *m, void *data)
>  {
>         struct intel_connector *connector = m->private;
>         struct intel_dp *intel_dp = intel_attached_dp(connector);
> +       struct intel_psr *psr = &intel_dp->psr;
>         static const char * const sink_status[] = {
>                 "inactive",
>                 "transition to active, capture and display",
> @@ -3231,45 +3259,82 @@ static int i915_psr_sink_status_show(struct
> seq_file *m, void *data)
>                 "reserved",
>                 "sink internal error",
>         };
> +       static const char * const panel_replay_status[] = {
> +               "Sink device frame is locked to the Source device",
> +               "Sink device is coasting, using the VTotal target",
> +               "Sink device is governing the frame rate (frame rate
> unlock is granted)",
> +               "Sink device in the process of re-locking with the
> Source device",
> +       };
>         const char *str;
>         int ret;
>         u8 status, error_status;
>  
> -       if (!CAN_PSR(intel_dp)) {
> -               seq_puts(m, "PSR Unsupported\n");
> +       if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> +               seq_puts(m, "PSR/Panel-Replay Unsupported\n");
>                 return -ENODEV;
>         }
>  
>         if (connector->base.status != connector_status_connected)
>                 return -ENODEV;
>  
> -       ret = psr_get_status_and_error_status(intel_dp, &status,
> &error_status);
> -       if (ret)
> -               return ret;
> +       if (psr->panel_replay_enabled) {
> +               u32 temp;
>  
> -       status &= DP_PSR_SINK_STATE_MASK;
> -       if (status < ARRAY_SIZE(sink_status))
> -               str = sink_status[status];
> -       else
> -               str = "unknown";
> +               ret =
> panel_replay_get_status_and_error_status(intel_dp, &status,
> &error_status);
> +               if (ret)
> +                       return ret;
>  
> -       seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
> +               temp = status & DP_SINK_FRAME_LOCKED_MASK;
> +               temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
> +               if (temp < ARRAY_SIZE(panel_replay_status))
> +                       str = panel_replay_status[temp];
> +               else
> +                       str = "unknown";
>  
> -       seq_printf(m, "Sink PSR error status: 0x%x", error_status);
> +               seq_printf(m, "Sink Panel Replay status: 0x%x
> [%s]\n", status, str);
>  
> -       if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> -                           DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> -                           DP_PSR_LINK_CRC_ERROR))
> -               seq_puts(m, ":\n");
> -       else
> -               seq_puts(m, "\n");
> -       if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> -               seq_puts(m, "\tPSR RFB storage error\n");
> -       if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> -               seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
> -       if (error_status & DP_PSR_LINK_CRC_ERROR)
> -               seq_puts(m, "\tPSR Link CRC error\n");
> +               seq_printf(m, "Sink Panel Replay error status: 0x%x",
> error_status);
> +
> +               if (error_status & (DP_PANEL_REPLAY_RFB_STORAGE_ERROR
> |
> +                                  
> DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
> +                                   DP_PANEL_REPLAY_LINK_CRC_ERROR))
> +                       seq_puts(m, ":\n");
> +               else
> +                       seq_puts(m, "\n");
> +               if (error_status & DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
> +                       seq_puts(m, "\tPANEL-REPLAY RFB storage
> error\n");
> +               if (error_status &
> DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
> +                       seq_puts(m, "\tPANEL-REPLAY VSC SDP
> uncorrectable error\n");
> +               if (error_status & DP_PANEL_REPLAY_LINK_CRC_ERROR)
> +                       seq_puts(m, "\tPANEL-REPLAY Link CRC
> error\n");
> +       } else {
> +               ret = psr_get_status_and_error_status(intel_dp,
> &status, &error_status);
> +               if (ret)
> +                       return ret;
> +
> +               status &= DP_PSR_SINK_STATE_MASK;
> +               if (status < ARRAY_SIZE(sink_status))
> +                       str = sink_status[status];
> +               else
> +                       str = "unknown";
> +
> +               seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status,
> str);
> +
> +               seq_printf(m, "Sink PSR error status: 0x%x",
> error_status);
>  
> +               if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> +                                  
> DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> +                                   DP_PSR_LINK_CRC_ERROR))
> +                       seq_puts(m, ":\n");
> +               else
> +                       seq_puts(m, "\n");
> +               if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> +                       seq_puts(m, "\tPSR RFB storage error\n");
> +               if (error_status &
> DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> +                       seq_puts(m, "\tPSR VSC SDP uncorrectable
> error\n");
> +               if (error_status & DP_PSR_LINK_CRC_ERROR)
> +                       seq_puts(m, "\tPSR Link CRC error\n");
> +       }

Instead of duplicating so much here I think it woukd be ok to just drop
PSR and do (same applies for all the statuses):


if (error_status & (DP_PSR_LINK_CRC_ERROR | 
DP_PANEL_REPLAY_LINK_CRC_ERROR))
    seq_puts(m, "\tLink CRC error\n");

What do you think?


>         return ret;
>  }
>  DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
> @@ -3288,13 +3353,16 @@ void intel_psr_connector_debugfs_add(struct
> intel_connector *connector)
>         struct drm_i915_private *i915 = to_i915(connector->base.dev);
>         struct dentry *root = connector->base.debugfs_entry;
>  
> -       if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> -               return;
> +       if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP)
> {
> +               if (!(HAS_DP20(i915) &&
> +                     connector->base.connector_type ==
> DRM_MODE_CONNECTOR_DisplayPort))
> +                       return;
> +       }

Why do you need to check DRM_MODE_CONNECTOR_DisplayPort ? I think
connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
!HAS_DP20(i915) is enough.

BR,

Jouni Högander
>  
>         debugfs_create_file("i915_psr_sink_status", 0444, root,
>                             connector, &i915_psr_sink_status_fops);
>  
> -       if (HAS_PSR(i915))
> +       if (HAS_PSR(i915) || HAS_DP20(i915))
>                 debugfs_create_file("i915_psr_status", 0444, root,
>                                     connector,
> &i915_psr_status_fops);
>  }

Re: [Intel-gfx] [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Manna, Animesh]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, November 2, 2023 1:08 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Murthy, Arun R
> <arun.r.murthy@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> Subject: Re: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for
> panel replay
> 
> On Wed, 2023-10-11 at 16:39 +0530, Animesh Manna wrote:
> > Add debugfs support which will print source and sink status per
> > connector basis.
> 
> Sorry for late review. Noticed only by now that you have added this patch
> into you set.

Added from v5.

> 
> Can you please describe in commit message how you see the output of
> debugfs interface will look like after your changes?

Sure.

> 
> >
> > v1: Initial version. [rb-ed by Arun]
> > v2: Added check for DP 2.0 and connector type in
> > connector_debugfs_add().
> >
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 136 +++++++++++++++++----
> > --
> >  1 file changed, 102 insertions(+), 34 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 80de831c2f60..399fc0a8e636 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -2823,6 +2823,25 @@ static int
> > psr_get_status_and_error_status(struct intel_dp *intel_dp,
> >         return 0;
> >  }
> >
> > +static int panel_replay_get_status_and_error_status(struct intel_dp
> > *intel_dp,
> > +                                                   u8 *status, u8
> > *error_status)
> > +{
> > +       struct drm_dp_aux *aux = &intel_dp->aux;
> > +       int ret;
> > +
> > +       ret = drm_dp_dpcd_readb(aux,
> > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
> > +       if (ret != 1)
> > +               return ret;
> > +
> > +       ret = drm_dp_dpcd_readb(aux, DP_PANEL_REPLAY_ERROR_STATUS,
> > error_status);
> > +       if (ret != 1)
> > +               return ret;
> > +
> > +       *status = *status & DP_PSR_SINK_STATE_MASK;
> > +
> > +       return 0;
> > +}
> > +
> 
> I think you should modify  psr_get_status_and_error_status instead of
> duplicating most of it.

DPCD addresses are different for panel replay, I did not get the need of it. 
 
> 
> >  static void psr_alpm_check(struct intel_dp *intel_dp)
> >  {
> >         struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@
> > -3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp, struct
> > seq_file *m)
> >                         status = live_status[status_val];
> >         }
> >
> > -       seq_printf(m, "Source PSR status: %s [0x%08x]\n", status,
> > val);
> > +       seq_printf(m, "Source PSR/PanelReplay status: %s [0x%08x]\n",
> > status, val);
> >  }
> >
> >  static int intel_psr_status(struct seq_file *m, struct intel_dp
> > *intel_dp)
> > @@ -3048,18 +3067,23 @@ static int intel_psr_status(struct seq_file
> > *m, struct intel_dp *intel_dp)
> >         bool enabled;
> >         u32 val;
> >
> > -       seq_printf(m, "Sink support: %s", str_yes_no(psr-
> > >sink_support));
> > -       if (psr->sink_support)
> > +       seq_printf(m, "Sink support: PSR = %s, Panel Replay = %s",
> > +                  str_yes_no(psr->sink_support),
> > +                  str_yes_no(psr->sink_panel_replay_support));
> > +
> > +       if (psr->sink_support || psr->sink_panel_replay_support)
> >                 seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
> >         seq_puts(m, "\n");
> >
> > -       if (!psr->sink_support)
> > +       if (!(psr->sink_support || psr->sink_panel_replay_support))
> >                 return 0;
> >
> >         wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
> >         mutex_lock(&psr->lock);
> >
> > -       if (psr->enabled)
> > +       if (psr->panel_replay_enabled)
> > +               status = "Panel Replay Enabled";
> > +       else if (psr->enabled)
> >                 status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1
> > enabled";
> >         else
> >                 status = "disabled";
> > @@ -3072,14 +3096,17 @@ static int intel_psr_status(struct seq_file
> > *m, struct intel_dp *intel_dp)
> >                 goto unlock;
> >         }
> >
> > -       if (psr->psr2_enabled) {
> > +       if (psr->panel_replay_enabled) {
> > +               val = intel_de_read(dev_priv,
> > TRANS_DP2_CTL(cpu_transcoder));
> > +               enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> > +       } else if (psr->psr2_enabled) {
> >                 val = intel_de_read(dev_priv,
> > EDP_PSR2_CTL(cpu_transcoder));
> >
> >                 enabled = val & EDP_PSR2_ENABLE;
> >         } else {
> >                 val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv,
> > cpu_transcoder));
> >                 enabled = val & EDP_PSR_ENABLE;
> >         }
> > -       seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
> > +       seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
> >                    str_enabled_disabled(enabled), val);
> >         psr_source_status(intel_dp, m);
> >         seq_printf(m, "Busy frontbuffer bits: 0x%08x\n", @@ -3221,6
> > +3248,7 @@ static int i915_psr_sink_status_show(struct seq_file *m,
> > void *data)
> >  {
> >         struct intel_connector *connector = m->private;
> >         struct intel_dp *intel_dp = intel_attached_dp(connector);
> > +       struct intel_psr *psr = &intel_dp->psr;
> >         static const char * const sink_status[] = {
> >                 "inactive",
> >                 "transition to active, capture and display", @@
> > -3231,45 +3259,82 @@ static int i915_psr_sink_status_show(struct
> > seq_file *m, void *data)
> >                 "reserved",
> >                 "sink internal error",
> >         };
> > +       static const char * const panel_replay_status[] = {
> > +               "Sink device frame is locked to the Source device",
> > +               "Sink device is coasting, using the VTotal target",
> > +               "Sink device is governing the frame rate (frame rate
> > unlock is granted)",
> > +               "Sink device in the process of re-locking with the
> > Source device",
> > +       };
> >         const char *str;
> >         int ret;
> >         u8 status, error_status;
> >
> > -       if (!CAN_PSR(intel_dp)) {
> > -               seq_puts(m, "PSR Unsupported\n");
> > +       if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> > +               seq_puts(m, "PSR/Panel-Replay Unsupported\n");
> >                 return -ENODEV;
> >         }
> >
> >         if (connector->base.status != connector_status_connected)
> >                 return -ENODEV;
> >
> > -       ret = psr_get_status_and_error_status(intel_dp, &status,
> > &error_status);
> > -       if (ret)
> > -               return ret;
> > +       if (psr->panel_replay_enabled) {
> > +               u32 temp;
> >
> > -       status &= DP_PSR_SINK_STATE_MASK;
> > -       if (status < ARRAY_SIZE(sink_status))
> > -               str = sink_status[status];
> > -       else
> > -               str = "unknown";
> > +               ret =
> > panel_replay_get_status_and_error_status(intel_dp, &status,
> > &error_status);
> > +               if (ret)
> > +                       return ret;
> >
> > -       seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
> > +               temp = status & DP_SINK_FRAME_LOCKED_MASK;
> > +               temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
> > +               if (temp < ARRAY_SIZE(panel_replay_status))
> > +                       str = panel_replay_status[temp];
> > +               else
> > +                       str = "unknown";
> >
> > -       seq_printf(m, "Sink PSR error status: 0x%x", error_status);
> > +               seq_printf(m, "Sink Panel Replay status: 0x%x
> > [%s]\n", status, str);
> >
> > -       if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> > -                           DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> > -                           DP_PSR_LINK_CRC_ERROR))
> > -               seq_puts(m, ":\n");
> > -       else
> > -               seq_puts(m, "\n");
> > -       if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> > -               seq_puts(m, "\tPSR RFB storage error\n");
> > -       if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> > -               seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
> > -       if (error_status & DP_PSR_LINK_CRC_ERROR)
> > -               seq_puts(m, "\tPSR Link CRC error\n");
> > +               seq_printf(m, "Sink Panel Replay error status: 0x%x",
> > error_status);
> > +
> > +               if (error_status & (DP_PANEL_REPLAY_RFB_STORAGE_ERROR
> > |
> > +
> > DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
> > +                                   DP_PANEL_REPLAY_LINK_CRC_ERROR))
> > +                       seq_puts(m, ":\n");
> > +               else
> > +                       seq_puts(m, "\n");
> > +               if (error_status & DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
> > +                       seq_puts(m, "\tPANEL-REPLAY RFB storage
> > error\n");
> > +               if (error_status &
> > DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
> > +                       seq_puts(m, "\tPANEL-REPLAY VSC SDP
> > uncorrectable error\n");
> > +               if (error_status & DP_PANEL_REPLAY_LINK_CRC_ERROR)
> > +                       seq_puts(m, "\tPANEL-REPLAY Link CRC
> > error\n");
> > +       } else {
> > +               ret = psr_get_status_and_error_status(intel_dp,
> > &status, &error_status);
> > +               if (ret)
> > +                       return ret;
> > +
> > +               status &= DP_PSR_SINK_STATE_MASK;
> > +               if (status < ARRAY_SIZE(sink_status))
> > +                       str = sink_status[status];
> > +               else
> > +                       str = "unknown";
> > +
> > +               seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status,
> > str);
> > +
> > +               seq_printf(m, "Sink PSR error status: 0x%x",
> > error_status);
> >
> > +               if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> > +
> > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> > +                                   DP_PSR_LINK_CRC_ERROR))
> > +                       seq_puts(m, ":\n");
> > +               else
> > +                       seq_puts(m, "\n");
> > +               if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> > +                       seq_puts(m, "\tPSR RFB storage error\n");
> > +               if (error_status &
> > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> > +                       seq_puts(m, "\tPSR VSC SDP uncorrectable
> > error\n");
> > +               if (error_status & DP_PSR_LINK_CRC_ERROR)
> > +                       seq_puts(m, "\tPSR Link CRC error\n");
> > +       }
> 
> Instead of duplicating so much here I think it woukd be ok to just drop PSR
> and do (same applies for all the statuses):
> 
> 
> if (error_status & (DP_PSR_LINK_CRC_ERROR |
> DP_PANEL_REPLAY_LINK_CRC_ERROR))
>     seq_puts(m, "\tLink CRC error\n");
> 
> What do you think?

Thinking of backward compatibility, I have added separately for panel replay.
I feel good to have separate cleanup patch for psr and panel-replay together, not part of this patch.

> 
> 
> >         return ret;
> >  }
> >  DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
> > @@ -3288,13 +3353,16 @@ void intel_psr_connector_debugfs_add(struct
> > intel_connector *connector)
> >         struct drm_i915_private *i915 = to_i915(connector->base.dev);
> >         struct dentry *root = connector->base.debugfs_entry;
> >
> > -       if (connector->base.connector_type !=
> DRM_MODE_CONNECTOR_eDP)
> > -               return;
> > +       if (connector->base.connector_type !=
> DRM_MODE_CONNECTOR_eDP)
> > {
> > +               if (!(HAS_DP20(i915) &&
> > +                     connector->base.connector_type ==
> > DRM_MODE_CONNECTOR_DisplayPort))
> > +                       return;
> > +       }
> 
> Why do you need to check DRM_MODE_CONNECTOR_DisplayPort ? I think
> connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
> !HAS_DP20(i915) is enough.

As per your suggestion, the code will look like below:

        if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP && !HAS_DP20(i915))
                return;

For example in case of hdmi connector type in MTL still we go ahead and create debugfs entry... rt? Please let me if I am missing anything.

Regards,
Animesh
 
> 
> BR,
> 
> Jouni Högander
> >
> >         debugfs_create_file("i915_psr_sink_status", 0444, root,
> >                             connector, &i915_psr_sink_status_fops);
> >
> > -       if (HAS_PSR(i915))
> > +       if (HAS_PSR(i915) || HAS_DP20(i915))
> >                 debugfs_create_file("i915_psr_status", 0444, root,
> >                                     connector, &i915_psr_status_fops);
> >  }

RE: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Manna, Animesh]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Thursday, November 2, 2023 1:08 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Murthy, Arun R
> <arun.r.murthy@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> Subject: Re: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for
> panel replay
> 
> On Wed, 2023-10-11 at 16:39 +0530, Animesh Manna wrote:
> > Add debugfs support which will print source and sink status per
> > connector basis.
> 
> Sorry for late review. Noticed only by now that you have added this patch
> into you set.

Added from v5.

> 
> Can you please describe in commit message how you see the output of
> debugfs interface will look like after your changes?

Sure.

> 
> >
> > v1: Initial version. [rb-ed by Arun]
> > v2: Added check for DP 2.0 and connector type in
> > connector_debugfs_add().
> >
> > Cc: Jouni Högander <jouni.hogander@intel.com>
> > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > Cc: Jani Nikula <jani.nikula@intel.com>
> > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 136 +++++++++++++++++----
> > --
> >  1 file changed, 102 insertions(+), 34 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 80de831c2f60..399fc0a8e636 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -2823,6 +2823,25 @@ static int
> > psr_get_status_and_error_status(struct intel_dp *intel_dp,
> >         return 0;
> >  }
> >
> > +static int panel_replay_get_status_and_error_status(struct intel_dp
> > *intel_dp,
> > +                                                   u8 *status, u8
> > *error_status)
> > +{
> > +       struct drm_dp_aux *aux = &intel_dp->aux;
> > +       int ret;
> > +
> > +       ret = drm_dp_dpcd_readb(aux,
> > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
> > +       if (ret != 1)
> > +               return ret;
> > +
> > +       ret = drm_dp_dpcd_readb(aux, DP_PANEL_REPLAY_ERROR_STATUS,
> > error_status);
> > +       if (ret != 1)
> > +               return ret;
> > +
> > +       *status = *status & DP_PSR_SINK_STATE_MASK;
> > +
> > +       return 0;
> > +}
> > +
> 
> I think you should modify  psr_get_status_and_error_status instead of
> duplicating most of it.

DPCD addresses are different for panel replay, I did not get the need of it. 
 
> 
> >  static void psr_alpm_check(struct intel_dp *intel_dp)
> >  {
> >         struct drm_i915_private *dev_priv = dp_to_i915(intel_dp); @@
> > -3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp, struct
> > seq_file *m)
> >                         status = live_status[status_val];
> >         }
> >
> > -       seq_printf(m, "Source PSR status: %s [0x%08x]\n", status,
> > val);
> > +       seq_printf(m, "Source PSR/PanelReplay status: %s [0x%08x]\n",
> > status, val);
> >  }
> >
> >  static int intel_psr_status(struct seq_file *m, struct intel_dp
> > *intel_dp)
> > @@ -3048,18 +3067,23 @@ static int intel_psr_status(struct seq_file
> > *m, struct intel_dp *intel_dp)
> >         bool enabled;
> >         u32 val;
> >
> > -       seq_printf(m, "Sink support: %s", str_yes_no(psr-
> > >sink_support));
> > -       if (psr->sink_support)
> > +       seq_printf(m, "Sink support: PSR = %s, Panel Replay = %s",
> > +                  str_yes_no(psr->sink_support),
> > +                  str_yes_no(psr->sink_panel_replay_support));
> > +
> > +       if (psr->sink_support || psr->sink_panel_replay_support)
> >                 seq_printf(m, " [0x%02x]", intel_dp->psr_dpcd[0]);
> >         seq_puts(m, "\n");
> >
> > -       if (!psr->sink_support)
> > +       if (!(psr->sink_support || psr->sink_panel_replay_support))
> >                 return 0;
> >
> >         wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
> >         mutex_lock(&psr->lock);
> >
> > -       if (psr->enabled)
> > +       if (psr->panel_replay_enabled)
> > +               status = "Panel Replay Enabled";
> > +       else if (psr->enabled)
> >                 status = psr->psr2_enabled ? "PSR2 enabled" : "PSR1
> > enabled";
> >         else
> >                 status = "disabled";
> > @@ -3072,14 +3096,17 @@ static int intel_psr_status(struct seq_file
> > *m, struct intel_dp *intel_dp)
> >                 goto unlock;
> >         }
> >
> > -       if (psr->psr2_enabled) {
> > +       if (psr->panel_replay_enabled) {
> > +               val = intel_de_read(dev_priv,
> > TRANS_DP2_CTL(cpu_transcoder));
> > +               enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> > +       } else if (psr->psr2_enabled) {
> >                 val = intel_de_read(dev_priv,
> > EDP_PSR2_CTL(cpu_transcoder));
> >
> >                 enabled = val & EDP_PSR2_ENABLE;
> >         } else {
> >                 val = intel_de_read(dev_priv, psr_ctl_reg(dev_priv,
> > cpu_transcoder));
> >                 enabled = val & EDP_PSR_ENABLE;
> >         }
> > -       seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
> > +       seq_printf(m, "Source PSR/PanelReplay ctl: %s [0x%08x]\n",
> >                    str_enabled_disabled(enabled), val);
> >         psr_source_status(intel_dp, m);
> >         seq_printf(m, "Busy frontbuffer bits: 0x%08x\n", @@ -3221,6
> > +3248,7 @@ static int i915_psr_sink_status_show(struct seq_file *m,
> > void *data)
> >  {
> >         struct intel_connector *connector = m->private;
> >         struct intel_dp *intel_dp = intel_attached_dp(connector);
> > +       struct intel_psr *psr = &intel_dp->psr;
> >         static const char * const sink_status[] = {
> >                 "inactive",
> >                 "transition to active, capture and display", @@
> > -3231,45 +3259,82 @@ static int i915_psr_sink_status_show(struct
> > seq_file *m, void *data)
> >                 "reserved",
> >                 "sink internal error",
> >         };
> > +       static const char * const panel_replay_status[] = {
> > +               "Sink device frame is locked to the Source device",
> > +               "Sink device is coasting, using the VTotal target",
> > +               "Sink device is governing the frame rate (frame rate
> > unlock is granted)",
> > +               "Sink device in the process of re-locking with the
> > Source device",
> > +       };
> >         const char *str;
> >         int ret;
> >         u8 status, error_status;
> >
> > -       if (!CAN_PSR(intel_dp)) {
> > -               seq_puts(m, "PSR Unsupported\n");
> > +       if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> > +               seq_puts(m, "PSR/Panel-Replay Unsupported\n");
> >                 return -ENODEV;
> >         }
> >
> >         if (connector->base.status != connector_status_connected)
> >                 return -ENODEV;
> >
> > -       ret = psr_get_status_and_error_status(intel_dp, &status,
> > &error_status);
> > -       if (ret)
> > -               return ret;
> > +       if (psr->panel_replay_enabled) {
> > +               u32 temp;
> >
> > -       status &= DP_PSR_SINK_STATE_MASK;
> > -       if (status < ARRAY_SIZE(sink_status))
> > -               str = sink_status[status];
> > -       else
> > -               str = "unknown";
> > +               ret =
> > panel_replay_get_status_and_error_status(intel_dp, &status,
> > &error_status);
> > +               if (ret)
> > +                       return ret;
> >
> > -       seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status, str);
> > +               temp = status & DP_SINK_FRAME_LOCKED_MASK;
> > +               temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
> > +               if (temp < ARRAY_SIZE(panel_replay_status))
> > +                       str = panel_replay_status[temp];
> > +               else
> > +                       str = "unknown";
> >
> > -       seq_printf(m, "Sink PSR error status: 0x%x", error_status);
> > +               seq_printf(m, "Sink Panel Replay status: 0x%x
> > [%s]\n", status, str);
> >
> > -       if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> > -                           DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> > -                           DP_PSR_LINK_CRC_ERROR))
> > -               seq_puts(m, ":\n");
> > -       else
> > -               seq_puts(m, "\n");
> > -       if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> > -               seq_puts(m, "\tPSR RFB storage error\n");
> > -       if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> > -               seq_puts(m, "\tPSR VSC SDP uncorrectable error\n");
> > -       if (error_status & DP_PSR_LINK_CRC_ERROR)
> > -               seq_puts(m, "\tPSR Link CRC error\n");
> > +               seq_printf(m, "Sink Panel Replay error status: 0x%x",
> > error_status);
> > +
> > +               if (error_status & (DP_PANEL_REPLAY_RFB_STORAGE_ERROR
> > |
> > +
> > DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
> > +                                   DP_PANEL_REPLAY_LINK_CRC_ERROR))
> > +                       seq_puts(m, ":\n");
> > +               else
> > +                       seq_puts(m, "\n");
> > +               if (error_status & DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
> > +                       seq_puts(m, "\tPANEL-REPLAY RFB storage
> > error\n");
> > +               if (error_status &
> > DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
> > +                       seq_puts(m, "\tPANEL-REPLAY VSC SDP
> > uncorrectable error\n");
> > +               if (error_status & DP_PANEL_REPLAY_LINK_CRC_ERROR)
> > +                       seq_puts(m, "\tPANEL-REPLAY Link CRC
> > error\n");
> > +       } else {
> > +               ret = psr_get_status_and_error_status(intel_dp,
> > &status, &error_status);
> > +               if (ret)
> > +                       return ret;
> > +
> > +               status &= DP_PSR_SINK_STATE_MASK;
> > +               if (status < ARRAY_SIZE(sink_status))
> > +                       str = sink_status[status];
> > +               else
> > +                       str = "unknown";
> > +
> > +               seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status,
> > str);
> > +
> > +               seq_printf(m, "Sink PSR error status: 0x%x",
> > error_status);
> >
> > +               if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> > +
> > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> > +                                   DP_PSR_LINK_CRC_ERROR))
> > +                       seq_puts(m, ":\n");
> > +               else
> > +                       seq_puts(m, "\n");
> > +               if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> > +                       seq_puts(m, "\tPSR RFB storage error\n");
> > +               if (error_status &
> > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> > +                       seq_puts(m, "\tPSR VSC SDP uncorrectable
> > error\n");
> > +               if (error_status & DP_PSR_LINK_CRC_ERROR)
> > +                       seq_puts(m, "\tPSR Link CRC error\n");
> > +       }
> 
> Instead of duplicating so much here I think it woukd be ok to just drop PSR
> and do (same applies for all the statuses):
> 
> 
> if (error_status & (DP_PSR_LINK_CRC_ERROR |
> DP_PANEL_REPLAY_LINK_CRC_ERROR))
>     seq_puts(m, "\tLink CRC error\n");
> 
> What do you think?

Thinking of backward compatibility, I have added separately for panel replay.
I feel good to have separate cleanup patch for psr and panel-replay together, not part of this patch.

> 
> 
> >         return ret;
> >  }
> >  DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
> > @@ -3288,13 +3353,16 @@ void intel_psr_connector_debugfs_add(struct
> > intel_connector *connector)
> >         struct drm_i915_private *i915 = to_i915(connector->base.dev);
> >         struct dentry *root = connector->base.debugfs_entry;
> >
> > -       if (connector->base.connector_type !=
> DRM_MODE_CONNECTOR_eDP)
> > -               return;
> > +       if (connector->base.connector_type !=
> DRM_MODE_CONNECTOR_eDP)
> > {
> > +               if (!(HAS_DP20(i915) &&
> > +                     connector->base.connector_type ==
> > DRM_MODE_CONNECTOR_DisplayPort))
> > +                       return;
> > +       }
> 
> Why do you need to check DRM_MODE_CONNECTOR_DisplayPort ? I think
> connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
> !HAS_DP20(i915) is enough.

As per your suggestion, the code will look like below:

        if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP && !HAS_DP20(i915))
                return;

For example in case of hdmi connector type in MTL still we go ahead and create debugfs entry... rt? Please let me if I am missing anything.

Regards,
Animesh
 
> 
> BR,
> 
> Jouni Högander
> >
> >         debugfs_create_file("i915_psr_sink_status", 0444, root,
> >                             connector, &i915_psr_sink_status_fops);
> >
> > -       if (HAS_PSR(i915))
> > +       if (HAS_PSR(i915) || HAS_DP20(i915))
> >                 debugfs_create_file("i915_psr_status", 0444, root,
> >                                     connector, &i915_psr_status_fops);
> >  }

Re: [Intel-gfx] [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Hogander, Jouni]

On Fri, 2023-11-03 at 06:10 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Thursday, November 2, 2023 1:08 PM
> > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > gfx@lists.freedesktop.org
> > Cc: dri-devel@lists.freedesktop.org; Murthy, Arun R
> > <arun.r.murthy@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> > Subject: Re: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support
> > for
> > panel replay
> > 
> > On Wed, 2023-10-11 at 16:39 +0530, Animesh Manna wrote:
> > > Add debugfs support which will print source and sink status per
> > > connector basis.
> > 
> > Sorry for late review. Noticed only by now that you have added this
> > patch
> > into you set.
> 
> Added from v5.
> 
> > 
> > Can you please describe in commit message how you see the output of
> > debugfs interface will look like after your changes?
> 
> Sure.
> 
> > 
> > > 
> > > v1: Initial version. [rb-ed by Arun]
> > > v2: Added check for DP 2.0 and connector type in
> > > connector_debugfs_add().
> > > 
> > > Cc: Jouni Högander <jouni.hogander@intel.com>
> > > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_psr.c | 136
> > > +++++++++++++++++----
> > > --
> > >  1 file changed, 102 insertions(+), 34 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index 80de831c2f60..399fc0a8e636 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -2823,6 +2823,25 @@ static int
> > > psr_get_status_and_error_status(struct intel_dp *intel_dp,
> > >         return 0;
> > >  }
> > > 
> > > +static int panel_replay_get_status_and_error_status(struct
> > > intel_dp
> > > *intel_dp,
> > > +                                                   u8 *status,
> > > u8
> > > *error_status)
> > > +{
> > > +       struct drm_dp_aux *aux = &intel_dp->aux;
> > > +       int ret;
> > > +
> > > +       ret = drm_dp_dpcd_readb(aux,
> > > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
> > > +       if (ret != 1)
> > > +               return ret;
> > > +
> > > +       ret = drm_dp_dpcd_readb(aux,
> > > DP_PANEL_REPLAY_ERROR_STATUS,
> > > error_status);
> > > +       if (ret != 1)
> > > +               return ret;
> > > +
> > > +       *status = *status & DP_PSR_SINK_STATE_MASK;
> > > +
> > > +       return 0;
> > > +}
> > > +
> > 
> > I think you should modify  psr_get_status_and_error_status instead
> > of
> > duplicating most of it.
> 
> DPCD addresses are different for panel replay, I did not get the need
> of it. 

I would like to see:

unsigned int offset = intel_dp->psr.panel_replay_enabled ?
DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS : DP_PSR_STATUS;

ret = drm_dp_dpcd_readb(aux, offset, status);

rather than duplicating it.

>  
> > 
> > >  static void psr_alpm_check(struct intel_dp *intel_dp)
> > >  {
> > >         struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > > @@
> > > -3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp,
> > > struct
> > > seq_file *m)
> > >                         status = live_status[status_val];
> > >         }
> > > 
> > > -       seq_printf(m, "Source PSR status: %s [0x%08x]\n", status,
> > > val);
> > > +       seq_printf(m, "Source PSR/PanelReplay status: %s
> > > [0x%08x]\n",
> > > status, val);
> > >  }
> > > 
> > >  static int intel_psr_status(struct seq_file *m, struct intel_dp
> > > *intel_dp)
> > > @@ -3048,18 +3067,23 @@ static int intel_psr_status(struct
> > > seq_file
> > > *m, struct intel_dp *intel_dp)
> > >         bool enabled;
> > >         u32 val;
> > > 
> > > -       seq_printf(m, "Sink support: %s", str_yes_no(psr-
> > > > sink_support));
> > > -       if (psr->sink_support)
> > > +       seq_printf(m, "Sink support: PSR = %s, Panel Replay =
> > > %s",
> > > +                  str_yes_no(psr->sink_support),
> > > +                  str_yes_no(psr->sink_panel_replay_support));
> > > +
> > > +       if (psr->sink_support || psr->sink_panel_replay_support)
> > >                 seq_printf(m, " [0x%02x]", intel_dp-
> > > >psr_dpcd[0]);
> > >         seq_puts(m, "\n");
> > > 
> > > -       if (!psr->sink_support)
> > > +       if (!(psr->sink_support || psr-
> > > >sink_panel_replay_support))
> > >                 return 0;
> > > 
> > >         wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
> > >         mutex_lock(&psr->lock);
> > > 
> > > -       if (psr->enabled)
> > > +       if (psr->panel_replay_enabled)
> > > +               status = "Panel Replay Enabled";
> > > +       else if (psr->enabled)
> > >                 status = psr->psr2_enabled ? "PSR2 enabled" :
> > > "PSR1
> > > enabled";
> > >         else
> > >                 status = "disabled";
> > > @@ -3072,14 +3096,17 @@ static int intel_psr_status(struct
> > > seq_file
> > > *m, struct intel_dp *intel_dp)
> > >                 goto unlock;
> > >         }
> > > 
> > > -       if (psr->psr2_enabled) {
> > > +       if (psr->panel_replay_enabled) {
> > > +               val = intel_de_read(dev_priv,
> > > TRANS_DP2_CTL(cpu_transcoder));
> > > +               enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> > > +       } else if (psr->psr2_enabled) {
> > >                 val = intel_de_read(dev_priv,
> > > EDP_PSR2_CTL(cpu_transcoder));
> > > 
> > >                 enabled = val & EDP_PSR2_ENABLE;
> > >         } else {
> > >                 val = intel_de_read(dev_priv,
> > > psr_ctl_reg(dev_priv,
> > > cpu_transcoder));
> > >                 enabled = val & EDP_PSR_ENABLE;
> > >         }
> > > -       seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
> > > +       seq_printf(m, "Source PSR/PanelReplay ctl: %s
> > > [0x%08x]\n",
> > >                    str_enabled_disabled(enabled), val);
> > >         psr_source_status(intel_dp, m);
> > >         seq_printf(m, "Busy frontbuffer bits: 0x%08x\n", @@ -
> > > 3221,6
> > > +3248,7 @@ static int i915_psr_sink_status_show(struct seq_file
> > > *m,
> > > void *data)
> > >  {
> > >         struct intel_connector *connector = m->private;
> > >         struct intel_dp *intel_dp = intel_attached_dp(connector);
> > > +       struct intel_psr *psr = &intel_dp->psr;
> > >         static const char * const sink_status[] = {
> > >                 "inactive",
> > >                 "transition to active, capture and display", @@
> > > -3231,45 +3259,82 @@ static int i915_psr_sink_status_show(struct
> > > seq_file *m, void *data)
> > >                 "reserved",
> > >                 "sink internal error",
> > >         };
> > > +       static const char * const panel_replay_status[] = {
> > > +               "Sink device frame is locked to the Source
> > > device",
> > > +               "Sink device is coasting, using the VTotal
> > > target",
> > > +               "Sink device is governing the frame rate (frame
> > > rate
> > > unlock is granted)",
> > > +               "Sink device in the process of re-locking with
> > > the
> > > Source device",
> > > +       };
> > >         const char *str;
> > >         int ret;
> > >         u8 status, error_status;
> > > 
> > > -       if (!CAN_PSR(intel_dp)) {
> > > -               seq_puts(m, "PSR Unsupported\n");
> > > +       if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> > > +               seq_puts(m, "PSR/Panel-Replay Unsupported\n");
> > >                 return -ENODEV;
> > >         }
> > > 
> > >         if (connector->base.status != connector_status_connected)
> > >                 return -ENODEV;
> > > 
> > > -       ret = psr_get_status_and_error_status(intel_dp, &status,
> > > &error_status);
> > > -       if (ret)
> > > -               return ret;
> > > +       if (psr->panel_replay_enabled) {
> > > +               u32 temp;
> > > 
> > > -       status &= DP_PSR_SINK_STATE_MASK;
> > > -       if (status < ARRAY_SIZE(sink_status))
> > > -               str = sink_status[status];
> > > -       else
> > > -               str = "unknown";
> > > +               ret =
> > > panel_replay_get_status_and_error_status(intel_dp, &status,
> > > &error_status);
> > > +               if (ret)
> > > +                       return ret;
> > > 
> > > -       seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status,
> > > str);
> > > +               temp = status & DP_SINK_FRAME_LOCKED_MASK;
> > > +               temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
> > > +               if (temp < ARRAY_SIZE(panel_replay_status))
> > > +                       str = panel_replay_status[temp];
> > > +               else
> > > +                       str = "unknown";
> > > 
> > > -       seq_printf(m, "Sink PSR error status: 0x%x",
> > > error_status);
> > > +               seq_printf(m, "Sink Panel Replay status: 0x%x
> > > [%s]\n", status, str);
> > > 
> > > -       if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> > > -                           DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> > > -                           DP_PSR_LINK_CRC_ERROR))
> > > -               seq_puts(m, ":\n");
> > > -       else
> > > -               seq_puts(m, "\n");
> > > -       if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> > > -               seq_puts(m, "\tPSR RFB storage error\n");
> > > -       if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> > > -               seq_puts(m, "\tPSR VSC SDP uncorrectable
> > > error\n");
> > > -       if (error_status & DP_PSR_LINK_CRC_ERROR)
> > > -               seq_puts(m, "\tPSR Link CRC error\n");
> > > +               seq_printf(m, "Sink Panel Replay error status:
> > > 0x%x",
> > > error_status);
> > > +
> > > +               if (error_status &
> > > (DP_PANEL_REPLAY_RFB_STORAGE_ERROR
> > > > 
> > > +
> > > DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
> > > +                                  
> > > DP_PANEL_REPLAY_LINK_CRC_ERROR))
> > > +                       seq_puts(m, ":\n");
> > > +               else
> > > +                       seq_puts(m, "\n");
> > > +               if (error_status &
> > > DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
> > > +                       seq_puts(m, "\tPANEL-REPLAY RFB storage
> > > error\n");
> > > +               if (error_status &
> > > DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
> > > +                       seq_puts(m, "\tPANEL-REPLAY VSC SDP
> > > uncorrectable error\n");
> > > +               if (error_status &
> > > DP_PANEL_REPLAY_LINK_CRC_ERROR)
> > > +                       seq_puts(m, "\tPANEL-REPLAY Link CRC
> > > error\n");
> > > +       } else {
> > > +               ret = psr_get_status_and_error_status(intel_dp,
> > > &status, &error_status);
> > > +               if (ret)
> > > +                       return ret;
> > > +
> > > +               status &= DP_PSR_SINK_STATE_MASK;
> > > +               if (status < ARRAY_SIZE(sink_status))
> > > +                       str = sink_status[status];
> > > +               else
> > > +                       str = "unknown";
> > > +
> > > +               seq_printf(m, "Sink PSR status: 0x%x [%s]\n",
> > > status,
> > > str);
> > > +
> > > +               seq_printf(m, "Sink PSR error status: 0x%x",
> > > error_status);
> > > 
> > > +               if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> > > +
> > > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> > > +                                   DP_PSR_LINK_CRC_ERROR))
> > > +                       seq_puts(m, ":\n");
> > > +               else
> > > +                       seq_puts(m, "\n");
> > > +               if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> > > +                       seq_puts(m, "\tPSR RFB storage error\n");
> > > +               if (error_status &
> > > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> > > +                       seq_puts(m, "\tPSR VSC SDP uncorrectable
> > > error\n");
> > > +               if (error_status & DP_PSR_LINK_CRC_ERROR)
> > > +                       seq_puts(m, "\tPSR Link CRC error\n");
> > > +       }
> > 
> > Instead of duplicating so much here I think it woukd be ok to just
> > drop PSR
> > and do (same applies for all the statuses):
> > 
> > 
> > if (error_status & (DP_PSR_LINK_CRC_ERROR |
> > DP_PANEL_REPLAY_LINK_CRC_ERROR))
> >     seq_puts(m, "\tLink CRC error\n");
> > 
> > What do you think?
> 
> Thinking of backward compatibility, I have added separately for panel
> replay.
> I feel good to have separate cleanup patch for psr and panel-replay
> together, not part of this patch.

If you want to keep the format as it is, then you should solve it by
changing just the mode in printout rather than duplicating everything.
One way:

static const char *psr_mode_str(struct intel_dp *intel_dp)
{
	if (intel_dp->psr.panel_replay_enabled)
		return "PANEL-REPLAY";
	else if(intel_dp->psr.psr_enabled)
		return "PSR";

	return "unknown";
}
...
seq_puts(m, "\t%s RFB storage error\n", psr_mode_str(intel_dp));
...

> 
> > 
> > 
> > >         return ret;
> > >  }
> > >  DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
> > > @@ -3288,13 +3353,16 @@ void
> > > intel_psr_connector_debugfs_add(struct
> > > intel_connector *connector)
> > >         struct drm_i915_private *i915 = to_i915(connector-
> > > >base.dev);
> > >         struct dentry *root = connector->base.debugfs_entry;
> > > 
> > > -       if (connector->base.connector_type !=
> > DRM_MODE_CONNECTOR_eDP)
> > > -               return;
> > > +       if (connector->base.connector_type !=
> > DRM_MODE_CONNECTOR_eDP)
> > > {
> > > +               if (!(HAS_DP20(i915) &&
> > > +                     connector->base.connector_type ==
> > > DRM_MODE_CONNECTOR_DisplayPort))
> > > +                       return;
> > > +       }
> > 
> > Why do you need to check DRM_MODE_CONNECTOR_DisplayPort ? I think
> > connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
> > !HAS_DP20(i915) is enough.
> 
> As per your suggestion, the code will look like below:
> 
>         if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP
> && !HAS_DP20(i915))
>                 return;
> 
> For example in case of hdmi connector type in MTL still we go ahead
> and create debugfs entry... rt? Please let me if I am missing
> anything.

Ok, I got this now.

BR,

Jouni Högander
> 
> Regards,
> Animesh
>  
> > 
> > BR,
> > 
> > Jouni Högander
> > > 
> > >         debugfs_create_file("i915_psr_sink_status", 0444, root,
> > >                             connector,
> > > &i915_psr_sink_status_fops);
> > > 
> > > -       if (HAS_PSR(i915))
> > > +       if (HAS_PSR(i915) || HAS_DP20(i915))
> > >                 debugfs_create_file("i915_psr_status", 0444,
> > > root,
> > >                                     connector,
> > > &i915_psr_status_fops);
> > >  }
> 

Re: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Hogander, Jouni]

On Fri, 2023-11-03 at 06:10 +0000, Manna, Animesh wrote:
> 
> 
> > -----Original Message-----
> > From: Hogander, Jouni <jouni.hogander@intel.com>
> > Sent: Thursday, November 2, 2023 1:08 PM
> > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > gfx@lists.freedesktop.org
> > Cc: dri-devel@lists.freedesktop.org; Murthy, Arun R
> > <arun.r.murthy@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> > Subject: Re: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support
> > for
> > panel replay
> > 
> > On Wed, 2023-10-11 at 16:39 +0530, Animesh Manna wrote:
> > > Add debugfs support which will print source and sink status per
> > > connector basis.
> > 
> > Sorry for late review. Noticed only by now that you have added this
> > patch
> > into you set.
> 
> Added from v5.
> 
> > 
> > Can you please describe in commit message how you see the output of
> > debugfs interface will look like after your changes?
> 
> Sure.
> 
> > 
> > > 
> > > v1: Initial version. [rb-ed by Arun]
> > > v2: Added check for DP 2.0 and connector type in
> > > connector_debugfs_add().
> > > 
> > > Cc: Jouni Högander <jouni.hogander@intel.com>
> > > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > > ---
> > >  drivers/gpu/drm/i915/display/intel_psr.c | 136
> > > +++++++++++++++++----
> > > --
> > >  1 file changed, 102 insertions(+), 34 deletions(-)
> > > 
> > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > index 80de831c2f60..399fc0a8e636 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > @@ -2823,6 +2823,25 @@ static int
> > > psr_get_status_and_error_status(struct intel_dp *intel_dp,
> > >         return 0;
> > >  }
> > > 
> > > +static int panel_replay_get_status_and_error_status(struct
> > > intel_dp
> > > *intel_dp,
> > > +                                                   u8 *status,
> > > u8
> > > *error_status)
> > > +{
> > > +       struct drm_dp_aux *aux = &intel_dp->aux;
> > > +       int ret;
> > > +
> > > +       ret = drm_dp_dpcd_readb(aux,
> > > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
> > > +       if (ret != 1)
> > > +               return ret;
> > > +
> > > +       ret = drm_dp_dpcd_readb(aux,
> > > DP_PANEL_REPLAY_ERROR_STATUS,
> > > error_status);
> > > +       if (ret != 1)
> > > +               return ret;
> > > +
> > > +       *status = *status & DP_PSR_SINK_STATE_MASK;
> > > +
> > > +       return 0;
> > > +}
> > > +
> > 
> > I think you should modify  psr_get_status_and_error_status instead
> > of
> > duplicating most of it.
> 
> DPCD addresses are different for panel replay, I did not get the need
> of it. 

I would like to see:

unsigned int offset = intel_dp->psr.panel_replay_enabled ?
DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS : DP_PSR_STATUS;

ret = drm_dp_dpcd_readb(aux, offset, status);

rather than duplicating it.

>  
> > 
> > >  static void psr_alpm_check(struct intel_dp *intel_dp)
> > >  {
> > >         struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > > @@
> > > -3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp,
> > > struct
> > > seq_file *m)
> > >                         status = live_status[status_val];
> > >         }
> > > 
> > > -       seq_printf(m, "Source PSR status: %s [0x%08x]\n", status,
> > > val);
> > > +       seq_printf(m, "Source PSR/PanelReplay status: %s
> > > [0x%08x]\n",
> > > status, val);
> > >  }
> > > 
> > >  static int intel_psr_status(struct seq_file *m, struct intel_dp
> > > *intel_dp)
> > > @@ -3048,18 +3067,23 @@ static int intel_psr_status(struct
> > > seq_file
> > > *m, struct intel_dp *intel_dp)
> > >         bool enabled;
> > >         u32 val;
> > > 
> > > -       seq_printf(m, "Sink support: %s", str_yes_no(psr-
> > > > sink_support));
> > > -       if (psr->sink_support)
> > > +       seq_printf(m, "Sink support: PSR = %s, Panel Replay =
> > > %s",
> > > +                  str_yes_no(psr->sink_support),
> > > +                  str_yes_no(psr->sink_panel_replay_support));
> > > +
> > > +       if (psr->sink_support || psr->sink_panel_replay_support)
> > >                 seq_printf(m, " [0x%02x]", intel_dp-
> > > >psr_dpcd[0]);
> > >         seq_puts(m, "\n");
> > > 
> > > -       if (!psr->sink_support)
> > > +       if (!(psr->sink_support || psr-
> > > >sink_panel_replay_support))
> > >                 return 0;
> > > 
> > >         wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
> > >         mutex_lock(&psr->lock);
> > > 
> > > -       if (psr->enabled)
> > > +       if (psr->panel_replay_enabled)
> > > +               status = "Panel Replay Enabled";
> > > +       else if (psr->enabled)
> > >                 status = psr->psr2_enabled ? "PSR2 enabled" :
> > > "PSR1
> > > enabled";
> > >         else
> > >                 status = "disabled";
> > > @@ -3072,14 +3096,17 @@ static int intel_psr_status(struct
> > > seq_file
> > > *m, struct intel_dp *intel_dp)
> > >                 goto unlock;
> > >         }
> > > 
> > > -       if (psr->psr2_enabled) {
> > > +       if (psr->panel_replay_enabled) {
> > > +               val = intel_de_read(dev_priv,
> > > TRANS_DP2_CTL(cpu_transcoder));
> > > +               enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> > > +       } else if (psr->psr2_enabled) {
> > >                 val = intel_de_read(dev_priv,
> > > EDP_PSR2_CTL(cpu_transcoder));
> > > 
> > >                 enabled = val & EDP_PSR2_ENABLE;
> > >         } else {
> > >                 val = intel_de_read(dev_priv,
> > > psr_ctl_reg(dev_priv,
> > > cpu_transcoder));
> > >                 enabled = val & EDP_PSR_ENABLE;
> > >         }
> > > -       seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
> > > +       seq_printf(m, "Source PSR/PanelReplay ctl: %s
> > > [0x%08x]\n",
> > >                    str_enabled_disabled(enabled), val);
> > >         psr_source_status(intel_dp, m);
> > >         seq_printf(m, "Busy frontbuffer bits: 0x%08x\n", @@ -
> > > 3221,6
> > > +3248,7 @@ static int i915_psr_sink_status_show(struct seq_file
> > > *m,
> > > void *data)
> > >  {
> > >         struct intel_connector *connector = m->private;
> > >         struct intel_dp *intel_dp = intel_attached_dp(connector);
> > > +       struct intel_psr *psr = &intel_dp->psr;
> > >         static const char * const sink_status[] = {
> > >                 "inactive",
> > >                 "transition to active, capture and display", @@
> > > -3231,45 +3259,82 @@ static int i915_psr_sink_status_show(struct
> > > seq_file *m, void *data)
> > >                 "reserved",
> > >                 "sink internal error",
> > >         };
> > > +       static const char * const panel_replay_status[] = {
> > > +               "Sink device frame is locked to the Source
> > > device",
> > > +               "Sink device is coasting, using the VTotal
> > > target",
> > > +               "Sink device is governing the frame rate (frame
> > > rate
> > > unlock is granted)",
> > > +               "Sink device in the process of re-locking with
> > > the
> > > Source device",
> > > +       };
> > >         const char *str;
> > >         int ret;
> > >         u8 status, error_status;
> > > 
> > > -       if (!CAN_PSR(intel_dp)) {
> > > -               seq_puts(m, "PSR Unsupported\n");
> > > +       if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> > > +               seq_puts(m, "PSR/Panel-Replay Unsupported\n");
> > >                 return -ENODEV;
> > >         }
> > > 
> > >         if (connector->base.status != connector_status_connected)
> > >                 return -ENODEV;
> > > 
> > > -       ret = psr_get_status_and_error_status(intel_dp, &status,
> > > &error_status);
> > > -       if (ret)
> > > -               return ret;
> > > +       if (psr->panel_replay_enabled) {
> > > +               u32 temp;
> > > 
> > > -       status &= DP_PSR_SINK_STATE_MASK;
> > > -       if (status < ARRAY_SIZE(sink_status))
> > > -               str = sink_status[status];
> > > -       else
> > > -               str = "unknown";
> > > +               ret =
> > > panel_replay_get_status_and_error_status(intel_dp, &status,
> > > &error_status);
> > > +               if (ret)
> > > +                       return ret;
> > > 
> > > -       seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status,
> > > str);
> > > +               temp = status & DP_SINK_FRAME_LOCKED_MASK;
> > > +               temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
> > > +               if (temp < ARRAY_SIZE(panel_replay_status))
> > > +                       str = panel_replay_status[temp];
> > > +               else
> > > +                       str = "unknown";
> > > 
> > > -       seq_printf(m, "Sink PSR error status: 0x%x",
> > > error_status);
> > > +               seq_printf(m, "Sink Panel Replay status: 0x%x
> > > [%s]\n", status, str);
> > > 
> > > -       if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> > > -                           DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> > > -                           DP_PSR_LINK_CRC_ERROR))
> > > -               seq_puts(m, ":\n");
> > > -       else
> > > -               seq_puts(m, "\n");
> > > -       if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> > > -               seq_puts(m, "\tPSR RFB storage error\n");
> > > -       if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> > > -               seq_puts(m, "\tPSR VSC SDP uncorrectable
> > > error\n");
> > > -       if (error_status & DP_PSR_LINK_CRC_ERROR)
> > > -               seq_puts(m, "\tPSR Link CRC error\n");
> > > +               seq_printf(m, "Sink Panel Replay error status:
> > > 0x%x",
> > > error_status);
> > > +
> > > +               if (error_status &
> > > (DP_PANEL_REPLAY_RFB_STORAGE_ERROR
> > > > 
> > > +
> > > DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
> > > +                                  
> > > DP_PANEL_REPLAY_LINK_CRC_ERROR))
> > > +                       seq_puts(m, ":\n");
> > > +               else
> > > +                       seq_puts(m, "\n");
> > > +               if (error_status &
> > > DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
> > > +                       seq_puts(m, "\tPANEL-REPLAY RFB storage
> > > error\n");
> > > +               if (error_status &
> > > DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
> > > +                       seq_puts(m, "\tPANEL-REPLAY VSC SDP
> > > uncorrectable error\n");
> > > +               if (error_status &
> > > DP_PANEL_REPLAY_LINK_CRC_ERROR)
> > > +                       seq_puts(m, "\tPANEL-REPLAY Link CRC
> > > error\n");
> > > +       } else {
> > > +               ret = psr_get_status_and_error_status(intel_dp,
> > > &status, &error_status);
> > > +               if (ret)
> > > +                       return ret;
> > > +
> > > +               status &= DP_PSR_SINK_STATE_MASK;
> > > +               if (status < ARRAY_SIZE(sink_status))
> > > +                       str = sink_status[status];
> > > +               else
> > > +                       str = "unknown";
> > > +
> > > +               seq_printf(m, "Sink PSR status: 0x%x [%s]\n",
> > > status,
> > > str);
> > > +
> > > +               seq_printf(m, "Sink PSR error status: 0x%x",
> > > error_status);
> > > 
> > > +               if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> > > +
> > > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> > > +                                   DP_PSR_LINK_CRC_ERROR))
> > > +                       seq_puts(m, ":\n");
> > > +               else
> > > +                       seq_puts(m, "\n");
> > > +               if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> > > +                       seq_puts(m, "\tPSR RFB storage error\n");
> > > +               if (error_status &
> > > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> > > +                       seq_puts(m, "\tPSR VSC SDP uncorrectable
> > > error\n");
> > > +               if (error_status & DP_PSR_LINK_CRC_ERROR)
> > > +                       seq_puts(m, "\tPSR Link CRC error\n");
> > > +       }
> > 
> > Instead of duplicating so much here I think it woukd be ok to just
> > drop PSR
> > and do (same applies for all the statuses):
> > 
> > 
> > if (error_status & (DP_PSR_LINK_CRC_ERROR |
> > DP_PANEL_REPLAY_LINK_CRC_ERROR))
> >     seq_puts(m, "\tLink CRC error\n");
> > 
> > What do you think?
> 
> Thinking of backward compatibility, I have added separately for panel
> replay.
> I feel good to have separate cleanup patch for psr and panel-replay
> together, not part of this patch.

If you want to keep the format as it is, then you should solve it by
changing just the mode in printout rather than duplicating everything.
One way:

static const char *psr_mode_str(struct intel_dp *intel_dp)
{
	if (intel_dp->psr.panel_replay_enabled)
		return "PANEL-REPLAY";
	else if(intel_dp->psr.psr_enabled)
		return "PSR";

	return "unknown";
}
...
seq_puts(m, "\t%s RFB storage error\n", psr_mode_str(intel_dp));
...

> 
> > 
> > 
> > >         return ret;
> > >  }
> > >  DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
> > > @@ -3288,13 +3353,16 @@ void
> > > intel_psr_connector_debugfs_add(struct
> > > intel_connector *connector)
> > >         struct drm_i915_private *i915 = to_i915(connector-
> > > >base.dev);
> > >         struct dentry *root = connector->base.debugfs_entry;
> > > 
> > > -       if (connector->base.connector_type !=
> > DRM_MODE_CONNECTOR_eDP)
> > > -               return;
> > > +       if (connector->base.connector_type !=
> > DRM_MODE_CONNECTOR_eDP)
> > > {
> > > +               if (!(HAS_DP20(i915) &&
> > > +                     connector->base.connector_type ==
> > > DRM_MODE_CONNECTOR_DisplayPort))
> > > +                       return;
> > > +       }
> > 
> > Why do you need to check DRM_MODE_CONNECTOR_DisplayPort ? I think
> > connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
> > !HAS_DP20(i915) is enough.
> 
> As per your suggestion, the code will look like below:
> 
>         if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP
> && !HAS_DP20(i915))
>                 return;
> 
> For example in case of hdmi connector type in MTL still we go ahead
> and create debugfs entry... rt? Please let me if I am missing
> anything.

Ok, I got this now.

BR,

Jouni Högander
> 
> Regards,
> Animesh
>  
> > 
> > BR,
> > 
> > Jouni Högander
> > > 
> > >         debugfs_create_file("i915_psr_sink_status", 0444, root,
> > >                             connector,
> > > &i915_psr_sink_status_fops);
> > > 
> > > -       if (HAS_PSR(i915))
> > > +       if (HAS_PSR(i915) || HAS_DP20(i915))
> > >                 debugfs_create_file("i915_psr_status", 0444,
> > > root,
> > >                                     connector,
> > > &i915_psr_status_fops);
> > >  }
> 

Re: [Intel-gfx] [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Manna, Animesh]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Friday, November 3, 2023 12:32 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Murthy, Arun R
> <arun.r.murthy@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> Subject: Re: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for
> panel replay
> 
> On Fri, 2023-11-03 at 06:10 +0000, Manna, Animesh wrote:
> >
> >
> > > -----Original Message-----
> > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > Sent: Thursday, November 2, 2023 1:08 PM
> > > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > > gfx@lists.freedesktop.org
> > > Cc: dri-devel@lists.freedesktop.org; Murthy, Arun R
> > > <arun.r.murthy@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> > > Subject: Re: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support
> > > for panel replay
> > >
> > > On Wed, 2023-10-11 at 16:39 +0530, Animesh Manna wrote:
> > > > Add debugfs support which will print source and sink status per
> > > > connector basis.
> > >
> > > Sorry for late review. Noticed only by now that you have added this
> > > patch into you set.
> >
> > Added from v5.
> >
> > >
> > > Can you please describe in commit message how you see the output of
> > > debugfs interface will look like after your changes?
> >
> > Sure.
> >
> > >
> > > >
> > > > v1: Initial version. [rb-ed by Arun]
> > > > v2: Added check for DP 2.0 and connector type in
> > > > connector_debugfs_add().
> > > >
> > > > Cc: Jouni Högander <jouni.hogander@intel.com>
> > > > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_psr.c | 136
> > > > +++++++++++++++++----
> > > > --
> > > >  1 file changed, 102 insertions(+), 34 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > index 80de831c2f60..399fc0a8e636 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > @@ -2823,6 +2823,25 @@ static int
> > > > psr_get_status_and_error_status(struct intel_dp *intel_dp,
> > > >         return 0;
> > > >  }
> > > >
> > > > +static int panel_replay_get_status_and_error_status(struct
> > > > intel_dp
> > > > *intel_dp,
> > > > +                                                   u8 *status,
> > > > u8
> > > > *error_status)
> > > > +{
> > > > +       struct drm_dp_aux *aux = &intel_dp->aux;
> > > > +       int ret;
> > > > +
> > > > +       ret = drm_dp_dpcd_readb(aux,
> > > > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
> > > > +       if (ret != 1)
> > > > +               return ret;
> > > > +
> > > > +       ret = drm_dp_dpcd_readb(aux,
> > > > DP_PANEL_REPLAY_ERROR_STATUS,
> > > > error_status);
> > > > +       if (ret != 1)
> > > > +               return ret;
> > > > +
> > > > +       *status = *status & DP_PSR_SINK_STATE_MASK;
> > > > +
> > > > +       return 0;
> > > > +}
> > > > +
> > >
> > > I think you should modify  psr_get_status_and_error_status instead
> > > of duplicating most of it.
> >
> > DPCD addresses are different for panel replay, I did not get the need
> > of it.
> 
> I would like to see:
> 
> unsigned int offset = intel_dp->psr.panel_replay_enabled ?
> DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS : DP_PSR_STATUS;
> 
> ret = drm_dp_dpcd_readb(aux, offset, status);
> 
> rather than duplicating it.

Added in v8.

> 
> >
> > >
> > > >  static void psr_alpm_check(struct intel_dp *intel_dp)
> > > >  {
> > > >         struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > > > @@
> > > > -3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp,
> > > > struct seq_file *m)
> > > >                         status = live_status[status_val];
> > > >         }
> > > >
> > > > -       seq_printf(m, "Source PSR status: %s [0x%08x]\n", status,
> > > > val);
> > > > +       seq_printf(m, "Source PSR/PanelReplay status: %s
> > > > [0x%08x]\n",
> > > > status, val);
> > > >  }
> > > >
> > > >  static int intel_psr_status(struct seq_file *m, struct intel_dp
> > > > *intel_dp)
> > > > @@ -3048,18 +3067,23 @@ static int intel_psr_status(struct
> > > > seq_file *m, struct intel_dp *intel_dp)
> > > >         bool enabled;
> > > >         u32 val;
> > > >
> > > > -       seq_printf(m, "Sink support: %s", str_yes_no(psr-
> > > > > sink_support));
> > > > -       if (psr->sink_support)
> > > > +       seq_printf(m, "Sink support: PSR = %s, Panel Replay =
> > > > %s",
> > > > +                  str_yes_no(psr->sink_support),
> > > > +                  str_yes_no(psr->sink_panel_replay_support));
> > > > +
> > > > +       if (psr->sink_support || psr->sink_panel_replay_support)
> > > >                 seq_printf(m, " [0x%02x]", intel_dp-
> > > > >psr_dpcd[0]);
> > > >         seq_puts(m, "\n");
> > > >
> > > > -       if (!psr->sink_support)
> > > > +       if (!(psr->sink_support || psr-
> > > > >sink_panel_replay_support))
> > > >                 return 0;
> > > >
> > > >         wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
> > > >         mutex_lock(&psr->lock);
> > > >
> > > > -       if (psr->enabled)
> > > > +       if (psr->panel_replay_enabled)
> > > > +               status = "Panel Replay Enabled";
> > > > +       else if (psr->enabled)
> > > >                 status = psr->psr2_enabled ? "PSR2 enabled" :
> > > > "PSR1
> > > > enabled";
> > > >         else
> > > >                 status = "disabled"; @@ -3072,14 +3096,17 @@
> > > > static int intel_psr_status(struct seq_file *m, struct intel_dp
> > > > *intel_dp)
> > > >                 goto unlock;
> > > >         }
> > > >
> > > > -       if (psr->psr2_enabled) {
> > > > +       if (psr->panel_replay_enabled) {
> > > > +               val = intel_de_read(dev_priv,
> > > > TRANS_DP2_CTL(cpu_transcoder));
> > > > +               enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> > > > +       } else if (psr->psr2_enabled) {
> > > >                 val = intel_de_read(dev_priv,
> > > > EDP_PSR2_CTL(cpu_transcoder));
> > > >
> > > >                 enabled = val & EDP_PSR2_ENABLE;
> > > >         } else {
> > > >                 val = intel_de_read(dev_priv,
> > > > psr_ctl_reg(dev_priv, cpu_transcoder));
> > > >                 enabled = val & EDP_PSR_ENABLE;
> > > >         }
> > > > -       seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
> > > > +       seq_printf(m, "Source PSR/PanelReplay ctl: %s
> > > > [0x%08x]\n",
> > > >                    str_enabled_disabled(enabled), val);
> > > >         psr_source_status(intel_dp, m);
> > > >         seq_printf(m, "Busy frontbuffer bits: 0x%08x\n", @@ -
> > > > 3221,6
> > > > +3248,7 @@ static int i915_psr_sink_status_show(struct seq_file
> > > > *m,
> > > > void *data)
> > > >  {
> > > >         struct intel_connector *connector = m->private;
> > > >         struct intel_dp *intel_dp = intel_attached_dp(connector);
> > > > +       struct intel_psr *psr = &intel_dp->psr;
> > > >         static const char * const sink_status[] = {
> > > >                 "inactive",
> > > >                 "transition to active, capture and display", @@
> > > > -3231,45 +3259,82 @@ static int i915_psr_sink_status_show(struct
> > > > seq_file *m, void *data)
> > > >                 "reserved",
> > > >                 "sink internal error",
> > > >         };
> > > > +       static const char * const panel_replay_status[] = {
> > > > +               "Sink device frame is locked to the Source
> > > > device",
> > > > +               "Sink device is coasting, using the VTotal
> > > > target",
> > > > +               "Sink device is governing the frame rate (frame
> > > > rate
> > > > unlock is granted)",
> > > > +               "Sink device in the process of re-locking with
> > > > the
> > > > Source device",
> > > > +       };
> > > >         const char *str;
> > > >         int ret;
> > > >         u8 status, error_status;
> > > >
> > > > -       if (!CAN_PSR(intel_dp)) {
> > > > -               seq_puts(m, "PSR Unsupported\n");
> > > > +       if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> > > > +               seq_puts(m, "PSR/Panel-Replay Unsupported\n");
> > > >                 return -ENODEV;
> > > >         }
> > > >
> > > >         if (connector->base.status != connector_status_connected)
> > > >                 return -ENODEV;
> > > >
> > > > -       ret = psr_get_status_and_error_status(intel_dp, &status,
> > > > &error_status);
> > > > -       if (ret)
> > > > -               return ret;
> > > > +       if (psr->panel_replay_enabled) {
> > > > +               u32 temp;
> > > >
> > > > -       status &= DP_PSR_SINK_STATE_MASK;
> > > > -       if (status < ARRAY_SIZE(sink_status))
> > > > -               str = sink_status[status];
> > > > -       else
> > > > -               str = "unknown";
> > > > +               ret =
> > > > panel_replay_get_status_and_error_status(intel_dp, &status,
> > > > &error_status);
> > > > +               if (ret)
> > > > +                       return ret;
> > > >
> > > > -       seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status,
> > > > str);
> > > > +               temp = status & DP_SINK_FRAME_LOCKED_MASK;
> > > > +               temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
> > > > +               if (temp < ARRAY_SIZE(panel_replay_status))
> > > > +                       str = panel_replay_status[temp];
> > > > +               else
> > > > +                       str = "unknown";
> > > >
> > > > -       seq_printf(m, "Sink PSR error status: 0x%x",
> > > > error_status);
> > > > +               seq_printf(m, "Sink Panel Replay status: 0x%x
> > > > [%s]\n", status, str);
> > > >
> > > > -       if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> > > > -                           DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> > > > -                           DP_PSR_LINK_CRC_ERROR))
> > > > -               seq_puts(m, ":\n");
> > > > -       else
> > > > -               seq_puts(m, "\n");
> > > > -       if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> > > > -               seq_puts(m, "\tPSR RFB storage error\n");
> > > > -       if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> > > > -               seq_puts(m, "\tPSR VSC SDP uncorrectable
> > > > error\n");
> > > > -       if (error_status & DP_PSR_LINK_CRC_ERROR)
> > > > -               seq_puts(m, "\tPSR Link CRC error\n");
> > > > +               seq_printf(m, "Sink Panel Replay error status:
> > > > 0x%x",
> > > > error_status);
> > > > +
> > > > +               if (error_status &
> > > > (DP_PANEL_REPLAY_RFB_STORAGE_ERROR
> > > > >
> > > > +
> > > > DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
> > > > +
> > > > DP_PANEL_REPLAY_LINK_CRC_ERROR))
> > > > +                       seq_puts(m, ":\n");
> > > > +               else
> > > > +                       seq_puts(m, "\n");
> > > > +               if (error_status &
> > > > DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
> > > > +                       seq_puts(m, "\tPANEL-REPLAY RFB storage
> > > > error\n");
> > > > +               if (error_status &
> > > > DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
> > > > +                       seq_puts(m, "\tPANEL-REPLAY VSC SDP
> > > > uncorrectable error\n");
> > > > +               if (error_status &
> > > > DP_PANEL_REPLAY_LINK_CRC_ERROR)
> > > > +                       seq_puts(m, "\tPANEL-REPLAY Link CRC
> > > > error\n");
> > > > +       } else {
> > > > +               ret = psr_get_status_and_error_status(intel_dp,
> > > > &status, &error_status);
> > > > +               if (ret)
> > > > +                       return ret;
> > > > +
> > > > +               status &= DP_PSR_SINK_STATE_MASK;
> > > > +               if (status < ARRAY_SIZE(sink_status))
> > > > +                       str = sink_status[status];
> > > > +               else
> > > > +                       str = "unknown";
> > > > +
> > > > +               seq_printf(m, "Sink PSR status: 0x%x [%s]\n",
> > > > status,
> > > > str);
> > > > +
> > > > +               seq_printf(m, "Sink PSR error status: 0x%x",
> > > > error_status);
> > > >
> > > > +               if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> > > > +
> > > > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> > > > +                                   DP_PSR_LINK_CRC_ERROR))
> > > > +                       seq_puts(m, ":\n");
> > > > +               else
> > > > +                       seq_puts(m, "\n");
> > > > +               if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> > > > +                       seq_puts(m, "\tPSR RFB storage error\n");
> > > > +               if (error_status &
> > > > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> > > > +                       seq_puts(m, "\tPSR VSC SDP uncorrectable
> > > > error\n");
> > > > +               if (error_status & DP_PSR_LINK_CRC_ERROR)
> > > > +                       seq_puts(m, "\tPSR Link CRC error\n");
> > > > +       }
> > >
> > > Instead of duplicating so much here I think it woukd be ok to just
> > > drop PSR and do (same applies for all the statuses):
> > >
> > >
> > > if (error_status & (DP_PSR_LINK_CRC_ERROR |
> > > DP_PANEL_REPLAY_LINK_CRC_ERROR))
> > >     seq_puts(m, "\tLink CRC error\n");
> > >
> > > What do you think?
> >
> > Thinking of backward compatibility, I have added separately for panel
> > replay.
> > I feel good to have separate cleanup patch for psr and panel-replay
> > together, not part of this patch.
> 
> If you want to keep the format as it is, then you should solve it by changing
> just the mode in printout rather than duplicating everything.
> One way:
> 
> static const char *psr_mode_str(struct intel_dp *intel_dp) {
> 	if (intel_dp->psr.panel_replay_enabled)
> 		return "PANEL-REPLAY";
> 	else if(intel_dp->psr.psr_enabled)
> 		return "PSR";
> 
> 	return "unknown";
> }
> ...
> seq_puts(m, "\t%s RFB storage error\n", psr_mode_str(intel_dp)); ...
> 

Added in v8, please have a look if it looks good to you.

Regards,
Animesh
> >
> > >
> > >
> > > >         return ret;
> > > >  }
> > > >  DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
> > > > @@ -3288,13 +3353,16 @@ void
> > > > intel_psr_connector_debugfs_add(struct
> > > > intel_connector *connector)
> > > >         struct drm_i915_private *i915 = to_i915(connector-
> > > > >base.dev);
> > > >         struct dentry *root = connector->base.debugfs_entry;
> > > >
> > > > -       if (connector->base.connector_type !=
> > > DRM_MODE_CONNECTOR_eDP)
> > > > -               return;
> > > > +       if (connector->base.connector_type !=
> > > DRM_MODE_CONNECTOR_eDP)
> > > > {
> > > > +               if (!(HAS_DP20(i915) &&
> > > > +                     connector->base.connector_type ==
> > > > DRM_MODE_CONNECTOR_DisplayPort))
> > > > +                       return;
> > > > +       }
> > >
> > > Why do you need to check DRM_MODE_CONNECTOR_DisplayPort ? I
> think
> > > connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
> > > !HAS_DP20(i915) is enough.
> >
> > As per your suggestion, the code will look like below:
> >
> >         if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP
> > && !HAS_DP20(i915))
> >                 return;
> >
> > For example in case of hdmi connector type in MTL still we go ahead
> > and create debugfs entry... rt? Please let me if I am missing
> > anything.
> 
> Ok, I got this now.
> 
> BR,
> 
> Jouni Högander
> >
> > Regards,
> > Animesh
> >
> > >
> > > BR,
> > >
> > > Jouni Högander
> > > >
> > > >         debugfs_create_file("i915_psr_sink_status", 0444, root,
> > > >                             connector,
> > > > &i915_psr_sink_status_fops);
> > > >
> > > > -       if (HAS_PSR(i915))
> > > > +       if (HAS_PSR(i915) || HAS_DP20(i915))
> > > >                 debugfs_create_file("i915_psr_status", 0444, root,
> > > >                                     connector,
> > > > &i915_psr_status_fops);
> > > >  }
> >

RE: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for panel replay

[Manna, Animesh]

> -----Original Message-----
> From: Hogander, Jouni <jouni.hogander@intel.com>
> Sent: Friday, November 3, 2023 12:32 PM
> To: Manna, Animesh <animesh.manna@intel.com>; intel-
> gfx@lists.freedesktop.org
> Cc: dri-devel@lists.freedesktop.org; Murthy, Arun R
> <arun.r.murthy@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> Subject: Re: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support for
> panel replay
> 
> On Fri, 2023-11-03 at 06:10 +0000, Manna, Animesh wrote:
> >
> >
> > > -----Original Message-----
> > > From: Hogander, Jouni <jouni.hogander@intel.com>
> > > Sent: Thursday, November 2, 2023 1:08 PM
> > > To: Manna, Animesh <animesh.manna@intel.com>; intel-
> > > gfx@lists.freedesktop.org
> > > Cc: dri-devel@lists.freedesktop.org; Murthy, Arun R
> > > <arun.r.murthy@intel.com>; Nikula, Jani <jani.nikula@intel.com>
> > > Subject: Re: [PATCH v7 6/6] drm/i915/panelreplay: Debugfs support
> > > for panel replay
> > >
> > > On Wed, 2023-10-11 at 16:39 +0530, Animesh Manna wrote:
> > > > Add debugfs support which will print source and sink status per
> > > > connector basis.
> > >
> > > Sorry for late review. Noticed only by now that you have added this
> > > patch into you set.
> >
> > Added from v5.
> >
> > >
> > > Can you please describe in commit message how you see the output of
> > > debugfs interface will look like after your changes?
> >
> > Sure.
> >
> > >
> > > >
> > > > v1: Initial version. [rb-ed by Arun]
> > > > v2: Added check for DP 2.0 and connector type in
> > > > connector_debugfs_add().
> > > >
> > > > Cc: Jouni Högander <jouni.hogander@intel.com>
> > > > Cc: Arun R Murthy <arun.r.murthy@intel.com>
> > > > Cc: Jani Nikula <jani.nikula@intel.com>
> > > > Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> > > > ---
> > > >  drivers/gpu/drm/i915/display/intel_psr.c | 136
> > > > +++++++++++++++++----
> > > > --
> > > >  1 file changed, 102 insertions(+), 34 deletions(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > index 80de831c2f60..399fc0a8e636 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > > > @@ -2823,6 +2823,25 @@ static int
> > > > psr_get_status_and_error_status(struct intel_dp *intel_dp,
> > > >         return 0;
> > > >  }
> > > >
> > > > +static int panel_replay_get_status_and_error_status(struct
> > > > intel_dp
> > > > *intel_dp,
> > > > +                                                   u8 *status,
> > > > u8
> > > > *error_status)
> > > > +{
> > > > +       struct drm_dp_aux *aux = &intel_dp->aux;
> > > > +       int ret;
> > > > +
> > > > +       ret = drm_dp_dpcd_readb(aux,
> > > > DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS, status);
> > > > +       if (ret != 1)
> > > > +               return ret;
> > > > +
> > > > +       ret = drm_dp_dpcd_readb(aux,
> > > > DP_PANEL_REPLAY_ERROR_STATUS,
> > > > error_status);
> > > > +       if (ret != 1)
> > > > +               return ret;
> > > > +
> > > > +       *status = *status & DP_PSR_SINK_STATE_MASK;
> > > > +
> > > > +       return 0;
> > > > +}
> > > > +
> > >
> > > I think you should modify  psr_get_status_and_error_status instead
> > > of duplicating most of it.
> >
> > DPCD addresses are different for panel replay, I did not get the need
> > of it.
> 
> I would like to see:
> 
> unsigned int offset = intel_dp->psr.panel_replay_enabled ?
> DP_SINK_DEVICE_PR_AND_FRAME_LOCK_STATUS : DP_PSR_STATUS;
> 
> ret = drm_dp_dpcd_readb(aux, offset, status);
> 
> rather than duplicating it.

Added in v8.

> 
> >
> > >
> > > >  static void psr_alpm_check(struct intel_dp *intel_dp)
> > > >  {
> > > >         struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > > > @@
> > > > -3035,7 +3054,7 @@ psr_source_status(struct intel_dp *intel_dp,
> > > > struct seq_file *m)
> > > >                         status = live_status[status_val];
> > > >         }
> > > >
> > > > -       seq_printf(m, "Source PSR status: %s [0x%08x]\n", status,
> > > > val);
> > > > +       seq_printf(m, "Source PSR/PanelReplay status: %s
> > > > [0x%08x]\n",
> > > > status, val);
> > > >  }
> > > >
> > > >  static int intel_psr_status(struct seq_file *m, struct intel_dp
> > > > *intel_dp)
> > > > @@ -3048,18 +3067,23 @@ static int intel_psr_status(struct
> > > > seq_file *m, struct intel_dp *intel_dp)
> > > >         bool enabled;
> > > >         u32 val;
> > > >
> > > > -       seq_printf(m, "Sink support: %s", str_yes_no(psr-
> > > > > sink_support));
> > > > -       if (psr->sink_support)
> > > > +       seq_printf(m, "Sink support: PSR = %s, Panel Replay =
> > > > %s",
> > > > +                  str_yes_no(psr->sink_support),
> > > > +                  str_yes_no(psr->sink_panel_replay_support));
> > > > +
> > > > +       if (psr->sink_support || psr->sink_panel_replay_support)
> > > >                 seq_printf(m, " [0x%02x]", intel_dp-
> > > > >psr_dpcd[0]);
> > > >         seq_puts(m, "\n");
> > > >
> > > > -       if (!psr->sink_support)
> > > > +       if (!(psr->sink_support || psr-
> > > > >sink_panel_replay_support))
> > > >                 return 0;
> > > >
> > > >         wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
> > > >         mutex_lock(&psr->lock);
> > > >
> > > > -       if (psr->enabled)
> > > > +       if (psr->panel_replay_enabled)
> > > > +               status = "Panel Replay Enabled";
> > > > +       else if (psr->enabled)
> > > >                 status = psr->psr2_enabled ? "PSR2 enabled" :
> > > > "PSR1
> > > > enabled";
> > > >         else
> > > >                 status = "disabled"; @@ -3072,14 +3096,17 @@
> > > > static int intel_psr_status(struct seq_file *m, struct intel_dp
> > > > *intel_dp)
> > > >                 goto unlock;
> > > >         }
> > > >
> > > > -       if (psr->psr2_enabled) {
> > > > +       if (psr->panel_replay_enabled) {
> > > > +               val = intel_de_read(dev_priv,
> > > > TRANS_DP2_CTL(cpu_transcoder));
> > > > +               enabled = val & TRANS_DP2_PANEL_REPLAY_ENABLE;
> > > > +       } else if (psr->psr2_enabled) {
> > > >                 val = intel_de_read(dev_priv,
> > > > EDP_PSR2_CTL(cpu_transcoder));
> > > >
> > > >                 enabled = val & EDP_PSR2_ENABLE;
> > > >         } else {
> > > >                 val = intel_de_read(dev_priv,
> > > > psr_ctl_reg(dev_priv, cpu_transcoder));
> > > >                 enabled = val & EDP_PSR_ENABLE;
> > > >         }
> > > > -       seq_printf(m, "Source PSR ctl: %s [0x%08x]\n",
> > > > +       seq_printf(m, "Source PSR/PanelReplay ctl: %s
> > > > [0x%08x]\n",
> > > >                    str_enabled_disabled(enabled), val);
> > > >         psr_source_status(intel_dp, m);
> > > >         seq_printf(m, "Busy frontbuffer bits: 0x%08x\n", @@ -
> > > > 3221,6
> > > > +3248,7 @@ static int i915_psr_sink_status_show(struct seq_file
> > > > *m,
> > > > void *data)
> > > >  {
> > > >         struct intel_connector *connector = m->private;
> > > >         struct intel_dp *intel_dp = intel_attached_dp(connector);
> > > > +       struct intel_psr *psr = &intel_dp->psr;
> > > >         static const char * const sink_status[] = {
> > > >                 "inactive",
> > > >                 "transition to active, capture and display", @@
> > > > -3231,45 +3259,82 @@ static int i915_psr_sink_status_show(struct
> > > > seq_file *m, void *data)
> > > >                 "reserved",
> > > >                 "sink internal error",
> > > >         };
> > > > +       static const char * const panel_replay_status[] = {
> > > > +               "Sink device frame is locked to the Source
> > > > device",
> > > > +               "Sink device is coasting, using the VTotal
> > > > target",
> > > > +               "Sink device is governing the frame rate (frame
> > > > rate
> > > > unlock is granted)",
> > > > +               "Sink device in the process of re-locking with
> > > > the
> > > > Source device",
> > > > +       };
> > > >         const char *str;
> > > >         int ret;
> > > >         u8 status, error_status;
> > > >
> > > > -       if (!CAN_PSR(intel_dp)) {
> > > > -               seq_puts(m, "PSR Unsupported\n");
> > > > +       if (!(CAN_PSR(intel_dp) || CAN_PANEL_REPLAY(intel_dp))) {
> > > > +               seq_puts(m, "PSR/Panel-Replay Unsupported\n");
> > > >                 return -ENODEV;
> > > >         }
> > > >
> > > >         if (connector->base.status != connector_status_connected)
> > > >                 return -ENODEV;
> > > >
> > > > -       ret = psr_get_status_and_error_status(intel_dp, &status,
> > > > &error_status);
> > > > -       if (ret)
> > > > -               return ret;
> > > > +       if (psr->panel_replay_enabled) {
> > > > +               u32 temp;
> > > >
> > > > -       status &= DP_PSR_SINK_STATE_MASK;
> > > > -       if (status < ARRAY_SIZE(sink_status))
> > > > -               str = sink_status[status];
> > > > -       else
> > > > -               str = "unknown";
> > > > +               ret =
> > > > panel_replay_get_status_and_error_status(intel_dp, &status,
> > > > &error_status);
> > > > +               if (ret)
> > > > +                       return ret;
> > > >
> > > > -       seq_printf(m, "Sink PSR status: 0x%x [%s]\n", status,
> > > > str);
> > > > +               temp = status & DP_SINK_FRAME_LOCKED_MASK;
> > > > +               temp >>= DP_SINK_FRAME_LOCKED_SHIFT;
> > > > +               if (temp < ARRAY_SIZE(panel_replay_status))
> > > > +                       str = panel_replay_status[temp];
> > > > +               else
> > > > +                       str = "unknown";
> > > >
> > > > -       seq_printf(m, "Sink PSR error status: 0x%x",
> > > > error_status);
> > > > +               seq_printf(m, "Sink Panel Replay status: 0x%x
> > > > [%s]\n", status, str);
> > > >
> > > > -       if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> > > > -                           DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> > > > -                           DP_PSR_LINK_CRC_ERROR))
> > > > -               seq_puts(m, ":\n");
> > > > -       else
> > > > -               seq_puts(m, "\n");
> > > > -       if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> > > > -               seq_puts(m, "\tPSR RFB storage error\n");
> > > > -       if (error_status & DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> > > > -               seq_puts(m, "\tPSR VSC SDP uncorrectable
> > > > error\n");
> > > > -       if (error_status & DP_PSR_LINK_CRC_ERROR)
> > > > -               seq_puts(m, "\tPSR Link CRC error\n");
> > > > +               seq_printf(m, "Sink Panel Replay error status:
> > > > 0x%x",
> > > > error_status);
> > > > +
> > > > +               if (error_status &
> > > > (DP_PANEL_REPLAY_RFB_STORAGE_ERROR
> > > > >
> > > > +
> > > > DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR |
> > > > +
> > > > DP_PANEL_REPLAY_LINK_CRC_ERROR))
> > > > +                       seq_puts(m, ":\n");
> > > > +               else
> > > > +                       seq_puts(m, "\n");
> > > > +               if (error_status &
> > > > DP_PANEL_REPLAY_RFB_STORAGE_ERROR)
> > > > +                       seq_puts(m, "\tPANEL-REPLAY RFB storage
> > > > error\n");
> > > > +               if (error_status &
> > > > DP_PANEL_REPLAY_VSC_SDP_UNCORRECTABLE_ERROR)
> > > > +                       seq_puts(m, "\tPANEL-REPLAY VSC SDP
> > > > uncorrectable error\n");
> > > > +               if (error_status &
> > > > DP_PANEL_REPLAY_LINK_CRC_ERROR)
> > > > +                       seq_puts(m, "\tPANEL-REPLAY Link CRC
> > > > error\n");
> > > > +       } else {
> > > > +               ret = psr_get_status_and_error_status(intel_dp,
> > > > &status, &error_status);
> > > > +               if (ret)
> > > > +                       return ret;
> > > > +
> > > > +               status &= DP_PSR_SINK_STATE_MASK;
> > > > +               if (status < ARRAY_SIZE(sink_status))
> > > > +                       str = sink_status[status];
> > > > +               else
> > > > +                       str = "unknown";
> > > > +
> > > > +               seq_printf(m, "Sink PSR status: 0x%x [%s]\n",
> > > > status,
> > > > str);
> > > > +
> > > > +               seq_printf(m, "Sink PSR error status: 0x%x",
> > > > error_status);
> > > >
> > > > +               if (error_status & (DP_PSR_RFB_STORAGE_ERROR |
> > > > +
> > > > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR |
> > > > +                                   DP_PSR_LINK_CRC_ERROR))
> > > > +                       seq_puts(m, ":\n");
> > > > +               else
> > > > +                       seq_puts(m, "\n");
> > > > +               if (error_status & DP_PSR_RFB_STORAGE_ERROR)
> > > > +                       seq_puts(m, "\tPSR RFB storage error\n");
> > > > +               if (error_status &
> > > > DP_PSR_VSC_SDP_UNCORRECTABLE_ERROR)
> > > > +                       seq_puts(m, "\tPSR VSC SDP uncorrectable
> > > > error\n");
> > > > +               if (error_status & DP_PSR_LINK_CRC_ERROR)
> > > > +                       seq_puts(m, "\tPSR Link CRC error\n");
> > > > +       }
> > >
> > > Instead of duplicating so much here I think it woukd be ok to just
> > > drop PSR and do (same applies for all the statuses):
> > >
> > >
> > > if (error_status & (DP_PSR_LINK_CRC_ERROR |
> > > DP_PANEL_REPLAY_LINK_CRC_ERROR))
> > >     seq_puts(m, "\tLink CRC error\n");
> > >
> > > What do you think?
> >
> > Thinking of backward compatibility, I have added separately for panel
> > replay.
> > I feel good to have separate cleanup patch for psr and panel-replay
> > together, not part of this patch.
> 
> If you want to keep the format as it is, then you should solve it by changing
> just the mode in printout rather than duplicating everything.
> One way:
> 
> static const char *psr_mode_str(struct intel_dp *intel_dp) {
> 	if (intel_dp->psr.panel_replay_enabled)
> 		return "PANEL-REPLAY";
> 	else if(intel_dp->psr.psr_enabled)
> 		return "PSR";
> 
> 	return "unknown";
> }
> ...
> seq_puts(m, "\t%s RFB storage error\n", psr_mode_str(intel_dp)); ...
> 

Added in v8, please have a look if it looks good to you.

Regards,
Animesh
> >
> > >
> > >
> > > >         return ret;
> > > >  }
> > > >  DEFINE_SHOW_ATTRIBUTE(i915_psr_sink_status);
> > > > @@ -3288,13 +3353,16 @@ void
> > > > intel_psr_connector_debugfs_add(struct
> > > > intel_connector *connector)
> > > >         struct drm_i915_private *i915 = to_i915(connector-
> > > > >base.dev);
> > > >         struct dentry *root = connector->base.debugfs_entry;
> > > >
> > > > -       if (connector->base.connector_type !=
> > > DRM_MODE_CONNECTOR_eDP)
> > > > -               return;
> > > > +       if (connector->base.connector_type !=
> > > DRM_MODE_CONNECTOR_eDP)
> > > > {
> > > > +               if (!(HAS_DP20(i915) &&
> > > > +                     connector->base.connector_type ==
> > > > DRM_MODE_CONNECTOR_DisplayPort))
> > > > +                       return;
> > > > +       }
> > >
> > > Why do you need to check DRM_MODE_CONNECTOR_DisplayPort ? I
> think
> > > connector->base.connector_type != DRM_MODE_CONNECTOR_eDP &&
> > > !HAS_DP20(i915) is enough.
> >
> > As per your suggestion, the code will look like below:
> >
> >         if (connector->base.connector_type != DRM_MODE_CONNECTOR_eDP
> > && !HAS_DP20(i915))
> >                 return;
> >
> > For example in case of hdmi connector type in MTL still we go ahead
> > and create debugfs entry... rt? Please let me if I am missing
> > anything.
> 
> Ok, I got this now.
> 
> BR,
> 
> Jouni Högander
> >
> > Regards,
> > Animesh
> >
> > >
> > > BR,
> > >
> > > Jouni Högander
> > > >
> > > >         debugfs_create_file("i915_psr_sink_status", 0444, root,
> > > >                             connector,
> > > > &i915_psr_sink_status_fops);
> > > >
> > > > -       if (HAS_PSR(i915))
> > > > +       if (HAS_PSR(i915) || HAS_DP20(i915))
> > > >                 debugfs_create_file("i915_psr_status", 0444, root,
> > > >                                     connector,
> > > > &i915_psr_status_fops);
> > > >  }
> >

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Panel replay phase1 implementation (rev9)

[Patchwork]

== Series Details ==

Series: Panel replay phase1 implementation (rev9)
URL   : https://patchwork.freedesktop.org/series/94470/
State : warning

== Summary ==

Error: dim checkpatch failed
e96738dc5d61 drm/panelreplay: dpcd register definition for panelreplay
92bff465013d drm/i915/psr: Move psr specific dpcd init into own function
2f78844b327c drm/i915/panelreplay: Initializaton and compute config for panel replay
-:365: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'intel_dp' - possible side-effects?
#365: FILE: drivers/gpu/drm/i915/display/intel_psr.h:24:
+#define CAN_PSR(intel_dp) ((intel_dp)->psr.sink_support && \
+			   (intel_dp)->psr.source_support)

-:368: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'intel_dp' - possible side-effects?
#368: FILE: drivers/gpu/drm/i915/display/intel_psr.h:27:
+#define CAN_PANEL_REPLAY(intel_dp) ((intel_dp)->psr.sink_panel_replay_support && \
+				    (intel_dp)->psr.source_panel_replay_support)

total: 0 errors, 0 warnings, 2 checks, 289 lines checked
659c21bc5e3f drm/i915/panelreplay: Enable panel replay dpcd initialization for DP
80d9b074dd01 drm/i915/panelreplay: enable/disable panel replay
289a4d5b40ce drm/i915/panelreplay: Debugfs support for panel replay

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Panel replay phase1 implementation (rev9)

[Patchwork]

== Series Details ==

Series: Panel replay phase1 implementation (rev9)
URL   : https://patchwork.freedesktop.org/series/94470/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for Panel replay phase1 implementation (rev9)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 13826 bytes --]

== Series Details ==

Series: Panel replay phase1 implementation (rev9)
URL   : https://patchwork.freedesktop.org/series/94470/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_13742 -> Patchwork_94470v9
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/index.html

Participating hosts (39 -> 38)
------------------------------

  Additional (1): bat-dg2-8 
  Missing    (2): bat-dg2-11 fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_94470v9 that come from known issues:

### CI changes ###

#### Issues hit ####

  * boot:
    - fi-bsw-n3050:       [PASS][1] -> [FAIL][2] ([i915#8293])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/fi-bsw-n3050/boot.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/fi-bsw-n3050/boot.html

  

### IGT changes ###

#### Issues hit ####

  * igt@gem_busy@busy@all-engines:
    - bat-mtlp-8:         [PASS][3] -> [DMESG-FAIL][4] ([i915#8962])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/bat-mtlp-8/igt@gem_busy@busy@all-engines.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-mtlp-8/igt@gem_busy@busy@all-engines.html

  * igt@gem_exec_suspend@basic-s0@lmem0:
    - bat-dg2-8:          NOTRUN -> [INCOMPLETE][5] ([i915#9275])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@gem_exec_suspend@basic-s0@lmem0.html

  * igt@gem_exec_suspend@basic-s3@smem:
    - bat-mtlp-8:         NOTRUN -> [ABORT][6] ([i915#8213] / [i915#9262])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-mtlp-8/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@gem_mmap@basic:
    - bat-dg2-8:          NOTRUN -> [SKIP][7] ([i915#4083])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@gem_mmap@basic.html

  * igt@gem_mmap_gtt@basic:
    - bat-dg2-8:          NOTRUN -> [SKIP][8] ([i915#4077]) +2 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@gem_mmap_gtt@basic.html

  * igt@gem_tiled_pread_basic:
    - bat-dg2-8:          NOTRUN -> [SKIP][9] ([i915#4079]) +1 other test skip
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@gem_tiled_pread_basic.html

  * igt@i915_pm_rps@basic-api:
    - bat-dg2-8:          NOTRUN -> [SKIP][10] ([i915#6621])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@i915_pm_rps@basic-api.html

  * igt@i915_suspend@basic-s3-without-i915:
    - bat-mtlp-8:         NOTRUN -> [SKIP][11] ([i915#6645])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-mtlp-8/igt@i915_suspend@basic-s3-without-i915.html
    - bat-dg2-8:          NOTRUN -> [SKIP][12] ([i915#6645])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - bat-dg2-8:          NOTRUN -> [SKIP][13] ([i915#5190])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - bat-dg2-8:          NOTRUN -> [SKIP][14] ([i915#4215] / [i915#5190])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_addfb_basic@framebuffer-vs-set-tiling:
    - bat-dg2-8:          NOTRUN -> [SKIP][15] ([i915#4212]) +6 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@kms_addfb_basic@framebuffer-vs-set-tiling.html

  * igt@kms_addfb_basic@tile-pitch-mismatch:
    - bat-dg2-8:          NOTRUN -> [SKIP][16] ([i915#4212] / [i915#5608])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@kms_addfb_basic@tile-pitch-mismatch.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - bat-dg2-8:          NOTRUN -> [SKIP][17] ([i915#4103] / [i915#4213] / [i915#5608]) +1 other test skip
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_force_connector_basic@force-load-detect:
    - bat-dg2-8:          NOTRUN -> [SKIP][18] ([fdo#109285])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@kms_force_connector_basic@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
    - bat-dg2-8:          NOTRUN -> [SKIP][19] ([i915#5274])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@kms_force_connector_basic@prune-stale-modes.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-c-dp-5:
    - bat-adlp-11:        [PASS][20] -> [DMESG-FAIL][21] ([i915#6868])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-c-dp-5.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-c-dp-5.html

  * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-d-dp-5:
    - bat-adlp-11:        [PASS][22] -> [FAIL][23] ([i915#9047])
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-d-dp-5.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-adlp-11/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24@pipe-d-dp-5.html

  * igt@kms_psr@cursor_plane_move:
    - bat-dg2-8:          NOTRUN -> [SKIP][24] ([i915#1072]) +3 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@kms_psr@cursor_plane_move.html
    - fi-skl-6600u:       [PASS][25] -> [SKIP][26] ([fdo#109271]) +3 other tests skip
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/fi-skl-6600u/igt@kms_psr@cursor_plane_move.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/fi-skl-6600u/igt@kms_psr@cursor_plane_move.html

  * igt@kms_psr@sprite_plane_onoff:
    - bat-mtlp-8:         [PASS][27] -> [SKIP][28] ([i915#1072]) +2 other tests skip
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/bat-mtlp-8/igt@kms_psr@sprite_plane_onoff.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-mtlp-8/igt@kms_psr@sprite_plane_onoff.html
    - bat-jsl-1:          [PASS][29] -> [SKIP][30] ([i915#1072]) +3 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/bat-jsl-1/igt@kms_psr@sprite_plane_onoff.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-jsl-1/igt@kms_psr@sprite_plane_onoff.html
    - bat-jsl-3:          [PASS][31] -> [SKIP][32] ([i915#1072]) +3 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-jsl-3/igt@kms_psr@sprite_plane_onoff.html
    - fi-kbl-soraka:      [PASS][33] -> [SKIP][34] ([fdo#109271]) +3 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/fi-kbl-soraka/igt@kms_psr@sprite_plane_onoff.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/fi-kbl-soraka/igt@kms_psr@sprite_plane_onoff.html

  * igt@kms_setmode@basic-clone-single-crtc:
    - bat-dg2-8:          NOTRUN -> [SKIP][35] ([i915#3555] / [i915#4098])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@kms_setmode@basic-clone-single-crtc.html

  * igt@prime_vgem@basic-fence-flip:
    - bat-dg2-8:          NOTRUN -> [SKIP][36] ([i915#3708])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-fence-mmap:
    - bat-dg2-8:          NOTRUN -> [SKIP][37] ([i915#3708] / [i915#4077]) +1 other test skip
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@prime_vgem@basic-fence-mmap.html

  * igt@prime_vgem@basic-write:
    - bat-dg2-8:          NOTRUN -> [SKIP][38] ([i915#3291] / [i915#3708]) +2 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-8/igt@prime_vgem@basic-write.html

  
#### Possible fixes ####

  * igt@gem_exec_suspend@basic-s0@lmem0:
    - bat-dg2-9:          [INCOMPLETE][39] ([i915#9275]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/bat-dg2-9/igt@gem_exec_suspend@basic-s0@lmem0.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-dg2-9/igt@gem_exec_suspend@basic-s0@lmem0.html

  * igt@gem_exec_suspend@basic-s0@smem:
    - bat-jsl-3:          [INCOMPLETE][41] ([i915#9275]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/bat-jsl-3/igt@gem_exec_suspend@basic-s0@smem.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-jsl-3/igt@gem_exec_suspend@basic-s0@smem.html

  * igt@i915_selftest@live@gt_heartbeat:
    - fi-kbl-soraka:      [DMESG-FAIL][43] ([i915#5334] / [i915#7872]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/fi-kbl-soraka/igt@i915_selftest@live@gt_heartbeat.html

  * igt@i915_selftest@live@requests:
    - bat-mtlp-8:         [ABORT][45] ([i915#9414]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/bat-mtlp-8/igt@i915_selftest@live@requests.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-mtlp-8/igt@i915_selftest@live@requests.html

  * igt@i915_suspend@basic-s3-without-i915:
    - bat-jsl-3:          [FAIL][47] ([fdo#103375]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/bat-jsl-3/igt@i915_suspend@basic-s3-without-i915.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-jsl-3/igt@i915_suspend@basic-s3-without-i915.html

  
#### Warnings ####

  * igt@kms_psr@primary_mmap_gtt:
    - bat-mtlp-8:         [SKIP][49] ([i915#4077]) -> [SKIP][50] ([i915#1072])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/bat-mtlp-8/igt@kms_psr@primary_mmap_gtt.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/bat-mtlp-8/igt@kms_psr@primary_mmap_gtt.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
  [i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
  [i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
  [i915#6868]: https://gitlab.freedesktop.org/drm/intel/issues/6868
  [i915#7872]: https://gitlab.freedesktop.org/drm/intel/issues/7872
  [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
  [i915#8962]: https://gitlab.freedesktop.org/drm/intel/issues/8962
  [i915#9047]: https://gitlab.freedesktop.org/drm/intel/issues/9047
  [i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
  [i915#9275]: https://gitlab.freedesktop.org/drm/intel/issues/9275
  [i915#9414]: https://gitlab.freedesktop.org/drm/intel/issues/9414


Build changes
-------------

  * Linux: CI_DRM_13742 -> Patchwork_94470v9

  CI-20190529: 20190529
  CI_DRM_13742: 4c7ec2a8f6f65d8f895e4560696e8487de4932d4 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7532: bf24b157b1049afc086fe65a60b22bd6bb3e18b7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_94470v9: 4c7ec2a8f6f65d8f895e4560696e8487de4932d4 @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

6688485f0f2f drm/i915/panelreplay: Debugfs support for panel replay
baa5f5945182 drm/i915/panelreplay: enable/disable panel replay
827c8424ec15 drm/i915/panelreplay: Enable panel replay dpcd initialization for DP
afebb2424d11 drm/i915/panelreplay: Initializaton and compute config for panel replay
a4b4377b3359 drm/i915/psr: Move psr specific dpcd init into own function
17b7a1af9904 drm/panelreplay: dpcd register definition for panelreplay

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/index.html

[-- Attachment #2: Type: text/html, Size: 16227 bytes --]

[Intel-gfx] ✗ Fi.CI.IGT: failure for Panel replay phase1 implementation (rev9)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 62191 bytes --]

== Series Details ==

Series: Panel replay phase1 implementation (rev9)
URL   : https://patchwork.freedesktop.org/series/94470/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_13742_full -> Patchwork_94470v9_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_94470v9_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_94470v9_full, please notify your bug team (lgci.bug.filing@intel.com) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (11 -> 10)
------------------------------

  Missing    (1): shard-tglu0 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_94470v9_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-mtlp:         [PASS][1] -> [SKIP][2] +1 other test skip
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-5/igt@kms_fbcon_fbt@psr-suspend.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-3/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move:
    - shard-mtlp:         [PASS][3] -> [FAIL][4] +50 other tests fail
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-6/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-move.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * {igt@kms_pm_rpm@modeset-pc8-residency-stress}:
    - shard-rkl:          NOTRUN -> [SKIP][5]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@kms_pm_rpm@modeset-pc8-residency-stress.html

  
Known issues
------------

  Here are the changes found in Patchwork_94470v9_full that come from known issues:

### CI changes ###

#### Issues hit ####

  * boot:
    - shard-glk:          ([PASS][6], [PASS][7], [PASS][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30]) -> ([PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [FAIL][44], [PASS][45], [PASS][46], [FAIL][47], [FAIL][48], [PASS][49], [PASS][50], [PASS][51], [PASS][52], [PASS][53], [PASS][54]) ([i915#8293])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk8/boot.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk8/boot.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk8/boot.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk7/boot.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk7/boot.html
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk6/boot.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk9/boot.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk6/boot.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk6/boot.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk5/boot.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk5/boot.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk9/boot.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk9/boot.html
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk4/boot.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk4/boot.html
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk4/boot.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk3/boot.html
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk3/boot.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk1/boot.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk1/boot.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk1/boot.html
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk2/boot.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk2/boot.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk2/boot.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk3/boot.html
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk1/boot.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk1/boot.html
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk1/boot.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk2/boot.html
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk2/boot.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk2/boot.html
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk3/boot.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk3/boot.html
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk3/boot.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk4/boot.html
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk4/boot.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk4/boot.html
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk5/boot.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk5/boot.html
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk6/boot.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk7/boot.html
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk7/boot.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk7/boot.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk8/boot.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk8/boot.html
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk8/boot.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk9/boot.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk9/boot.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk9/boot.html

  

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@blit-reloc-purge-cache:
    - shard-rkl:          NOTRUN -> [SKIP][55] ([i915#8411]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@api_intel_bb@blit-reloc-purge-cache.html

  * igt@debugfs_test@basic-hwmon:
    - shard-rkl:          NOTRUN -> [SKIP][56] ([i915#9318])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@debugfs_test@basic-hwmon.html

  * igt@drm_fdinfo@busy-idle@bcs0:
    - shard-dg2:          NOTRUN -> [SKIP][57] ([i915#8414]) +10 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@drm_fdinfo@busy-idle@bcs0.html

  * igt@drm_fdinfo@virtual-idle:
    - shard-rkl:          NOTRUN -> [FAIL][58] ([i915#7742]) +1 other test fail
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@drm_fdinfo@virtual-idle.html

  * igt@gem_basic@multigpu-create-close:
    - shard-rkl:          NOTRUN -> [SKIP][59] ([i915#7697]) +2 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@gem_basic@multigpu-create-close.html

  * igt@gem_ccs@ctrl-surf-copy-new-ctx:
    - shard-tglu:         NOTRUN -> [SKIP][60] ([i915#9323])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@gem_ccs@ctrl-surf-copy-new-ctx.html

  * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0:
    - shard-dg2:          [PASS][61] -> [INCOMPLETE][62] ([i915#7297])
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-dg2-6/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-3/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html

  * igt@gem_ctx_param@set-priority-not-supported:
    - shard-dg2:          NOTRUN -> [SKIP][63] ([fdo#109314])
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@gem_ctx_param@set-priority-not-supported.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-rkl:          NOTRUN -> [SKIP][64] ([i915#280])
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_eio@hibernate:
    - shard-dg2:          [PASS][65] -> [ABORT][66] ([i915#7975] / [i915#8213])
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-dg2-11/igt@gem_eio@hibernate.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-2/igt@gem_eio@hibernate.html

  * igt@gem_exec_balancer@parallel:
    - shard-rkl:          NOTRUN -> [SKIP][67] ([i915#4525]) +2 other tests skip
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@gem_exec_balancer@parallel.html

  * igt@gem_exec_fair@basic-none-solo@rcs0:
    - shard-tglu:         NOTRUN -> [FAIL][68] ([i915#2842])
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@gem_exec_fair@basic-none-solo@rcs0.html

  * igt@gem_exec_fair@basic-none@bcs0:
    - shard-rkl:          NOTRUN -> [FAIL][69] ([i915#2842]) +7 other tests fail
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@gem_exec_fair@basic-none@bcs0.html

  * igt@gem_exec_fair@basic-none@rcs0:
    - shard-glk:          NOTRUN -> [FAIL][70] ([i915#2842]) +2 other tests fail
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk8/igt@gem_exec_fair@basic-none@rcs0.html

  * igt@gem_exec_fence@submit:
    - shard-dg2:          NOTRUN -> [SKIP][71] ([i915#4812])
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@gem_exec_fence@submit.html

  * igt@gem_exec_flush@basic-batch-kernel-default-cmd:
    - shard-rkl:          NOTRUN -> [SKIP][72] ([fdo#109313])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@gem_exec_flush@basic-batch-kernel-default-cmd.html

  * igt@gem_exec_flush@basic-wb-ro-before-default:
    - shard-dg2:          NOTRUN -> [SKIP][73] ([i915#3539] / [i915#4852])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@gem_exec_flush@basic-wb-ro-before-default.html

  * igt@gem_exec_params@rsvd2-dirt:
    - shard-rkl:          NOTRUN -> [SKIP][74] ([fdo#109283])
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@gem_exec_params@rsvd2-dirt.html

  * igt@gem_exec_reloc@basic-gtt-wc-noreloc:
    - shard-rkl:          NOTRUN -> [SKIP][75] ([i915#3281]) +9 other tests skip
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html

  * igt@gem_exec_reloc@basic-write-read-active:
    - shard-dg2:          NOTRUN -> [SKIP][76] ([i915#3281]) +5 other tests skip
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@gem_exec_reloc@basic-write-read-active.html

  * igt@gem_exec_schedule@noreorder-priority@rcs0:
    - shard-mtlp:         [PASS][77] -> [DMESG-WARN][78] ([i915#8962]) +1 other test dmesg-warn
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-6/igt@gem_exec_schedule@noreorder-priority@rcs0.html
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-4/igt@gem_exec_schedule@noreorder-priority@rcs0.html

  * igt@gem_exec_suspend@basic-s4-devices@smem:
    - shard-rkl:          NOTRUN -> [ABORT][79] ([i915#7975] / [i915#8213])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@gem_exec_suspend@basic-s4-devices@smem.html

  * igt@gem_exec_whisper@basic-fds-forked-all:
    - shard-tglu:         [PASS][80] -> [INCOMPLETE][81] ([i915#6755] / [i915#7392])
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-tglu-7/igt@gem_exec_whisper@basic-fds-forked-all.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-10/igt@gem_exec_whisper@basic-fds-forked-all.html

  * igt@gem_lmem_swapping@heavy-verify-random:
    - shard-rkl:          NOTRUN -> [SKIP][82] ([i915#4613]) +3 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@gem_lmem_swapping@heavy-verify-random.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - shard-tglu:         NOTRUN -> [SKIP][83] ([i915#4613])
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_lmem_swapping@verify:
    - shard-glk:          NOTRUN -> [SKIP][84] ([fdo#109271] / [i915#4613])
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk4/igt@gem_lmem_swapping@verify.html

  * igt@gem_mmap_gtt@basic-small-copy-xy:
    - shard-dg2:          NOTRUN -> [SKIP][85] ([i915#4077]) +2 other tests skip
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@gem_mmap_gtt@basic-small-copy-xy.html

  * igt@gem_mmap_gtt@coherency:
    - shard-rkl:          NOTRUN -> [SKIP][86] ([fdo#111656])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@gem_mmap_gtt@coherency.html

  * igt@gem_mmap_wc@write-prefaulted:
    - shard-dg2:          NOTRUN -> [SKIP][87] ([i915#4083]) +3 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@gem_mmap_wc@write-prefaulted.html

  * igt@gem_partial_pwrite_pread@reads-uncached:
    - shard-dg2:          NOTRUN -> [SKIP][88] ([i915#3282]) +3 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@gem_partial_pwrite_pread@reads-uncached.html

  * igt@gem_partial_pwrite_pread@writes-after-reads:
    - shard-rkl:          NOTRUN -> [SKIP][89] ([i915#3282]) +6 other tests skip
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@gem_partial_pwrite_pread@writes-after-reads.html

  * igt@gem_pxp@display-protected-crc:
    - shard-rkl:          NOTRUN -> [SKIP][90] ([i915#4270]) +5 other tests skip
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@gem_pxp@display-protected-crc.html

  * igt@gem_pxp@protected-encrypted-src-copy-not-readible:
    - shard-tglu:         NOTRUN -> [SKIP][91] ([i915#4270])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html

  * igt@gem_userptr_blits@coherency-sync:
    - shard-rkl:          NOTRUN -> [SKIP][92] ([fdo#110542])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@gem_userptr_blits@coherency-sync.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-rkl:          NOTRUN -> [SKIP][93] ([i915#3297]) +2 other tests skip
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_userptr_blits@vma-merge:
    - shard-rkl:          NOTRUN -> [FAIL][94] ([i915#3318])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@gem_userptr_blits@vma-merge.html

  * igt@gen3_render_tiledx_blits:
    - shard-rkl:          NOTRUN -> [SKIP][95] ([fdo#109289]) +4 other tests skip
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@gen3_render_tiledx_blits.html

  * igt@gen9_exec_parse@allowed-all:
    - shard-dg2:          NOTRUN -> [SKIP][96] ([i915#2856])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@gen9_exec_parse@allowed-all.html

  * igt@gen9_exec_parse@bb-oversize:
    - shard-rkl:          NOTRUN -> [SKIP][97] ([i915#2527]) +3 other tests skip
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@gen9_exec_parse@bb-oversize.html

  * igt@i915_hangman@gt-error-state-capture@vecs0:
    - shard-mtlp:         [PASS][98] -> [ABORT][99] ([i915#9414]) +1 other test abort
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-7/igt@i915_hangman@gt-error-state-capture@vecs0.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-4/igt@i915_hangman@gt-error-state-capture@vecs0.html

  * igt@i915_module_load@load:
    - shard-rkl:          NOTRUN -> [SKIP][100] ([i915#6227])
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@i915_module_load@load.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-mtlp:         [PASS][101] -> [ABORT][102] ([i915#8489] / [i915#8668])
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-8/igt@i915_module_load@reload-with-fault-injection.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-4/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_rpm@gem-execbuf-stress-pc8:
    - shard-rkl:          NOTRUN -> [SKIP][103] ([fdo#109506])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html

  * igt@i915_pm_sseu@full-enable:
    - shard-tglu:         NOTRUN -> [SKIP][104] ([i915#4387])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@i915_pm_sseu@full-enable.html

  * igt@i915_query@test-query-geometry-subslices:
    - shard-rkl:          NOTRUN -> [SKIP][105] ([i915#5723])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@i915_query@test-query-geometry-subslices.html

  * igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][106] ([i915#4212]) +1 other test skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_addfb_basic@addfb25-x-tiled-mismatch-legacy.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-rkl:          NOTRUN -> [SKIP][107] ([i915#404])
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-0:
    - shard-rkl:          NOTRUN -> [SKIP][108] ([i915#5286]) +5 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@kms_big_fb@4-tiled-32bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-0:
    - shard-tglu:         NOTRUN -> [SKIP][109] ([fdo#111615] / [i915#5286])
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_big_fb@4-tiled-64bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-mtlp:         [PASS][110] -> [FAIL][111] ([i915#5138])
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-6/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@linear-64bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][112] ([fdo#111614] / [i915#3638]) +5 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@kms_big_fb@linear-64bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-270:
    - shard-dg2:          NOTRUN -> [SKIP][113] ([fdo#111614]) +1 other test skip
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-8bpp-rotate-270:
    - shard-tglu:         NOTRUN -> [SKIP][114] ([fdo#111614]) +1 other test skip
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_big_fb@y-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
    - shard-tglu:         [PASS][115] -> [FAIL][116] ([i915#3743]) +1 other test fail
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-tglu-3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-7/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-dg2:          NOTRUN -> [SKIP][117] ([i915#5190]) +4 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-0:
    - shard-dg2:          NOTRUN -> [SKIP][118] ([i915#4538] / [i915#5190]) +2 other tests skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@kms_big_fb@yf-tiled-16bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-rkl:          NOTRUN -> [SKIP][119] ([fdo#111615]) +1 other test skip
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-rkl:          NOTRUN -> [SKIP][120] ([fdo#110723]) +6 other tests skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip:
    - shard-tglu:         NOTRUN -> [SKIP][121] ([fdo#111615])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip.html

  * igt@kms_big_joiner@basic:
    - shard-dg2:          NOTRUN -> [SKIP][122] ([i915#2705])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@kms_big_joiner@basic.html

  * igt@kms_big_joiner@invalid-modeset:
    - shard-rkl:          NOTRUN -> [SKIP][123] ([i915#2705])
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@kms_big_joiner@invalid-modeset.html

  * igt@kms_cdclk@mode-transition@pipe-d-dp-4:
    - shard-dg2:          NOTRUN -> [SKIP][124] ([i915#4087] / [i915#7213]) +3 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_cdclk@mode-transition@pipe-d-dp-4.html

  * igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-2:
    - shard-dg2:          NOTRUN -> [SKIP][125] ([i915#4087]) +3 other tests skip
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-2/igt@kms_cdclk@plane-scaling@pipe-a-hdmi-a-2.html

  * igt@kms_chamelium_color@ctm-max:
    - shard-rkl:          NOTRUN -> [SKIP][126] ([fdo#111827]) +1 other test skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@kms_chamelium_color@ctm-max.html

  * igt@kms_chamelium_hpd@dp-hpd-storm-disable:
    - shard-tglu:         NOTRUN -> [SKIP][127] ([i915#7828]) +2 other tests skip
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_chamelium_hpd@dp-hpd-storm-disable.html

  * igt@kms_chamelium_hpd@vga-hpd-for-each-pipe:
    - shard-rkl:          NOTRUN -> [SKIP][128] ([i915#7828]) +10 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@kms_chamelium_hpd@vga-hpd-for-each-pipe.html

  * igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode:
    - shard-dg2:          NOTRUN -> [SKIP][129] ([i915#7828]) +3 other tests skip
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_chamelium_hpd@vga-hpd-with-enabled-mode.html

  * igt@kms_content_protection@srm:
    - shard-dg2:          NOTRUN -> [SKIP][130] ([i915#7118]) +1 other test skip
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-2/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@type1:
    - shard-tglu:         NOTRUN -> [SKIP][131] ([i915#6944] / [i915#7116] / [i915#7118])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_content_protection@type1.html

  * igt@kms_cursor_crc@cursor-onscreen-32x10:
    - shard-dg2:          NOTRUN -> [SKIP][132] ([i915#3555]) +2 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_cursor_crc@cursor-onscreen-32x10.html

  * igt@kms_cursor_crc@cursor-random-512x512:
    - shard-rkl:          NOTRUN -> [SKIP][133] ([i915#3359]) +2 other tests skip
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@kms_cursor_crc@cursor-random-512x512.html

  * igt@kms_cursor_crc@cursor-sliding-512x170:
    - shard-tglu:         NOTRUN -> [SKIP][134] ([i915#3359])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_cursor_crc@cursor-sliding-512x170.html

  * igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
    - shard-dg2:          NOTRUN -> [SKIP][135] ([fdo#109274] / [i915#5354]) +1 other test skip
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - shard-dg2:          NOTRUN -> [SKIP][136] ([i915#4103] / [i915#4213] / [i915#5608])
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
    - shard-rkl:          NOTRUN -> [SKIP][137] ([i915#4103])
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions:
    - shard-tglu:         NOTRUN -> [SKIP][138] ([fdo#109274]) +1 other test skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-tglu:         NOTRUN -> [SKIP][139] ([i915#4103])
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_cursor_legacy@single-move@all-pipes:
    - shard-mtlp:         [PASS][140] -> [DMESG-WARN][141] ([i915#2017])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-6/igt@kms_cursor_legacy@single-move@all-pipes.html
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-4/igt@kms_cursor_legacy@single-move@all-pipes.html

  * igt@kms_dirtyfb@dirtyfb-ioctl@fbc-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][142] ([i915#9227])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@kms_dirtyfb@dirtyfb-ioctl@fbc-hdmi-a-1.html

  * igt@kms_dirtyfb@dirtyfb-ioctl@psr-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][143] ([i915#9226] / [i915#9261]) +1 other test skip
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@kms_dirtyfb@dirtyfb-ioctl@psr-hdmi-a-1.html

  * igt@kms_display_modes@mst-extended-mode-negative:
    - shard-rkl:          NOTRUN -> [SKIP][144] ([i915#8588])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@kms_display_modes@mst-extended-mode-negative.html

  * igt@kms_fbcon_fbt@fbc-suspend:
    - shard-mtlp:         [PASS][145] -> [FAIL][146] ([i915#9096]) +1 other test fail
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-6/igt@kms_fbcon_fbt@fbc-suspend.html
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-6/igt@kms_fbcon_fbt@fbc-suspend.html

  * igt@kms_fbcon_fbt@psr:
    - shard-rkl:          NOTRUN -> [SKIP][147] ([i915#3955])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@kms_fbcon_fbt@psr.html

  * igt@kms_fence_pin_leak:
    - shard-dg2:          NOTRUN -> [SKIP][148] ([i915#4881])
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@kms_fence_pin_leak.html

  * igt@kms_flip@2x-flip-vs-blocking-wf-vblank:
    - shard-tglu:         NOTRUN -> [SKIP][149] ([fdo#109274] / [fdo#111767] / [i915#3637])
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_flip@2x-flip-vs-blocking-wf-vblank.html

  * igt@kms_flip@2x-flip-vs-panning-interruptible:
    - shard-tglu:         NOTRUN -> [SKIP][150] ([fdo#109274] / [i915#3637])
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_flip@2x-flip-vs-panning-interruptible.html

  * igt@kms_flip@2x-plain-flip-interruptible:
    - shard-rkl:          NOTRUN -> [SKIP][151] ([fdo#111825]) +12 other tests skip
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@kms_flip@2x-plain-flip-interruptible.html

  * igt@kms_flip@2x-plain-flip-ts-check:
    - shard-dg2:          NOTRUN -> [SKIP][152] ([fdo#109274]) +1 other test skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_flip@2x-plain-flip-ts-check.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][153] ([i915#2672])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][154] ([i915#2587] / [i915#2672])
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][155] ([i915#2672]) +3 other tests skip
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][156] ([i915#2672] / [i915#3555])
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move:
    - shard-tglu:         NOTRUN -> [SKIP][157] ([fdo#109280]) +9 other tests skip
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-wc:
    - shard-mtlp:         [PASS][158] -> [SKIP][159] ([i915#3458]) +109 other tests skip
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-wc.html
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-dg2:          NOTRUN -> [SKIP][160] ([i915#8708]) +7 other tests skip
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt:
    - shard-rkl:          NOTRUN -> [SKIP][161] ([i915#3023]) +27 other tests skip
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@kms_frontbuffer_tracking@fbcpsr-rgb565-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-tiling-y:
    - shard-dg2:          NOTRUN -> [SKIP][162] ([i915#5460])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_frontbuffer_tracking@fbcpsr-tiling-y.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite:
    - shard-tglu:         NOTRUN -> [SKIP][163] ([fdo#110189]) +4 other tests skip
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-rkl:          NOTRUN -> [SKIP][164] ([fdo#111825] / [i915#1825]) +39 other tests skip
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-blt:
    - shard-dg2:          NOTRUN -> [SKIP][165] ([i915#5354]) +10 other tests skip
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
    - shard-dg2:          NOTRUN -> [SKIP][166] ([i915#3458]) +9 other tests skip
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html

  * igt@kms_hdr@bpc-switch:
    - shard-mtlp:         NOTRUN -> [SKIP][167] ([i915#3555] / [i915#8228])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-2/igt@kms_hdr@bpc-switch.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-dg2:          NOTRUN -> [SKIP][168] ([i915#3555] / [i915#8228])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-2/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_panel_fitting@legacy:
    - shard-dg2:          NOTRUN -> [SKIP][169] ([i915#6301])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@kms_panel_fitting@legacy.html

  * igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes:
    - shard-tglu:         NOTRUN -> [SKIP][170] ([fdo#109289]) +1 other test skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html

  * igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1:
    - shard-apl:          [PASS][171] -> [INCOMPLETE][172] ([i915#180] / [i915#9392])
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-apl1/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1.html
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-apl2/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-1.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][173] ([i915#5235]) +5 other tests skip
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-b-hdmi-a-2.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b-vga-1:
    - shard-snb:          NOTRUN -> [SKIP][174] ([fdo#109271]) +12 other tests skip
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-snb5/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b-vga-1.html

  * igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4:
    - shard-dg1:          NOTRUN -> [SKIP][175] ([i915#5235]) +15 other tests skip
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg1-18/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-25@pipe-d-hdmi-a-4.html

  * igt@kms_prime@basic-crc-hybrid:
    - shard-rkl:          NOTRUN -> [SKIP][176] ([i915#6524]) +1 other test skip
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@kms_prime@basic-crc-hybrid.html

  * igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf:
    - shard-mtlp:         NOTRUN -> [SKIP][177] ([i915#658]) +10 other tests skip
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-2/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
    - shard-rkl:          NOTRUN -> [SKIP][178] ([i915#658])
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
    - shard-tglu:         NOTRUN -> [SKIP][179] ([i915#658])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html

  * igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
    - shard-rkl:          NOTRUN -> [SKIP][180] ([fdo#111068] / [i915#658]) +2 other tests skip
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_su@page_flip-nv12:
    - shard-dg2:          NOTRUN -> [SKIP][181] ([i915#658])
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_psr2_su@page_flip-nv12.html

  * igt@kms_psr@cursor_plane_onoff:
    - shard-mtlp:         [PASS][182] -> [SKIP][183] ([i915#1072]) +32 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-1/igt@kms_psr@cursor_plane_onoff.html
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-2/igt@kms_psr@cursor_plane_onoff.html

  * igt@kms_psr@no_drrs:
    - shard-dg2:          NOTRUN -> [SKIP][184] ([i915#1072]) +3 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_psr@no_drrs.html

  * igt@kms_psr@primary_render:
    - shard-rkl:          NOTRUN -> [SKIP][185] ([i915#1072]) +7 other tests skip
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@kms_psr@primary_render.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-rkl:          NOTRUN -> [SKIP][186] ([i915#5461] / [i915#658])
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
    - shard-mtlp:         [PASS][187] -> [SKIP][188] ([i915#658]) +1 other test skip
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-2/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
    - shard-tglu:         NOTRUN -> [SKIP][189] ([fdo#111615] / [i915#5289])
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-dg2:          NOTRUN -> [SKIP][190] ([i915#4235])
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_scaling_modes@scaling-mode-none:
    - shard-rkl:          NOTRUN -> [SKIP][191] ([i915#3555]) +3 other tests skip
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@kms_scaling_modes@scaling-mode-none.html

  * igt@kms_setmode@basic@pipe-a-hdmi-a-1:
    - shard-snb:          NOTRUN -> [FAIL][192] ([i915#5465]) +1 other test fail
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-snb1/igt@kms_setmode@basic@pipe-a-hdmi-a-1.html

  * igt@kms_setmode@invalid-clone-single-crtc:
    - shard-rkl:          NOTRUN -> [SKIP][193] ([i915#3555] / [i915#4098])
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@kms_setmode@invalid-clone-single-crtc.html

  * igt@kms_tv_load_detect@load-detect:
    - shard-dg2:          NOTRUN -> [SKIP][194] ([fdo#109309])
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-11/igt@kms_tv_load_detect@load-detect.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-1:
    - shard-tglu:         [PASS][195] -> [FAIL][196] ([i915#9196])
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-tglu-9/igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-1.html
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-7/igt@kms_universal_plane@cursor-fb-leak@pipe-c-hdmi-a-1.html

  * igt@kms_vblank@pipe-c-wait-busy:
    - shard-rkl:          NOTRUN -> [SKIP][197] ([i915#4070] / [i915#6768]) +2 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@kms_vblank@pipe-c-wait-busy.html

  * igt@kms_vblank@pipe-d-query-idle:
    - shard-rkl:          NOTRUN -> [SKIP][198] ([i915#4070] / [i915#533] / [i915#6768]) +4 other tests skip
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-7/igt@kms_vblank@pipe-d-query-idle.html

  * igt@kms_vrr@flip-dpms:
    - shard-tglu:         NOTRUN -> [SKIP][199] ([i915#3555]) +1 other test skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@kms_vrr@flip-dpms.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-rkl:          NOTRUN -> [SKIP][200] ([i915#2437]) +1 other test skip
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-1/igt@kms_writeback@writeback-fb-id.html

  * igt@perf@gen8-unprivileged-single-ctx-counters:
    - shard-rkl:          NOTRUN -> [SKIP][201] ([i915#2436])
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-6/igt@perf@gen8-unprivileged-single-ctx-counters.html

  * igt@perf_pmu@rc6-all-gts:
    - shard-rkl:          NOTRUN -> [SKIP][202] ([i915#8516])
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@perf_pmu@rc6-all-gts.html

  * igt@prime_vgem@basic-write:
    - shard-dg2:          NOTRUN -> [SKIP][203] ([i915#3291] / [i915#3708])
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@prime_vgem@basic-write.html

  * igt@runner@aborted:
    - shard-snb:          NOTRUN -> [FAIL][204] ([i915#7812])
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-snb1/igt@runner@aborted.html

  * igt@tools_test@sysfs_l3_parity:
    - shard-rkl:          NOTRUN -> [SKIP][205] ([fdo#109307])
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@tools_test@sysfs_l3_parity.html

  * igt@v3d/v3d_perfmon@get-values-valid-perfmon:
    - shard-rkl:          NOTRUN -> [SKIP][206] ([fdo#109315]) +14 other tests skip
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@v3d/v3d_perfmon@get-values-valid-perfmon.html

  * igt@v3d/v3d_submit_cl@bad-multisync-out-sync:
    - shard-dg2:          NOTRUN -> [SKIP][207] ([i915#2575]) +5 other tests skip
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@v3d/v3d_submit_cl@bad-multisync-out-sync.html

  * igt@v3d/v3d_wait_bo@unused-bo-0ns:
    - shard-tglu:         NOTRUN -> [SKIP][208] ([fdo#109315] / [i915#2575]) +2 other tests skip
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@v3d/v3d_wait_bo@unused-bo-0ns.html

  * igt@vc4/vc4_dmabuf_poll@poll-read-waits-until-write-done:
    - shard-rkl:          NOTRUN -> [SKIP][209] ([i915#7711]) +8 other tests skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-rkl-4/igt@vc4/vc4_dmabuf_poll@poll-read-waits-until-write-done.html

  * igt@vc4/vc4_lookup_fail@bad-color-write:
    - shard-glk:          NOTRUN -> [SKIP][210] ([fdo#109271]) +51 other tests skip
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk4/igt@vc4/vc4_lookup_fail@bad-color-write.html

  * igt@vc4/vc4_mmap@mmap-bo:
    - shard-dg2:          NOTRUN -> [SKIP][211] ([i915#7711]) +3 other tests skip
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-10/igt@vc4/vc4_mmap@mmap-bo.html

  * igt@vc4/vc4_perfmon@destroy-valid-perfmon:
    - shard-tglu:         NOTRUN -> [SKIP][212] ([i915#2575]) +1 other test skip
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@vc4/vc4_perfmon@destroy-valid-perfmon.html

  
#### Possible fixes ####

  * igt@gem_ctx_exec@basic-nohangcheck:
    - shard-tglu:         [FAIL][213] ([i915#6268]) -> [PASS][214]
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-tglu-3/igt@gem_ctx_exec@basic-nohangcheck.html
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-7/igt@gem_ctx_exec@basic-nohangcheck.html

  * igt@gem_eio@in-flight-contexts-1us:
    - shard-mtlp:         [FAIL][215] -> [PASS][216]
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-6/igt@gem_eio@in-flight-contexts-1us.html
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-2/igt@gem_eio@in-flight-contexts-1us.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-glk:          [FAIL][217] ([i915#2842]) -> [PASS][218]
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk4/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk9/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_schedule@preempt-engines@ccs0:
    - shard-mtlp:         [FAIL][219] ([i915#9119]) -> [PASS][220] +4 other tests pass
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-4/igt@gem_exec_schedule@preempt-engines@ccs0.html
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-8/igt@gem_exec_schedule@preempt-engines@ccs0.html

  * igt@gem_exec_schedule@preempt-engines@rcs0:
    - shard-mtlp:         [DMESG-FAIL][221] ([i915#8962]) -> [PASS][222]
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-4/igt@gem_exec_schedule@preempt-engines@rcs0.html
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-8/igt@gem_exec_schedule@preempt-engines@rcs0.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-glk:          [INCOMPLETE][223] ([i915#5566]) -> [PASS][224]
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk1/igt@gen9_exec_parse@allowed-single.html
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk4/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_selftest@live@gt_heartbeat:
    - shard-apl:          [DMESG-FAIL][225] ([i915#5334]) -> [PASS][226]
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-apl7/igt@i915_selftest@live@gt_heartbeat.html
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-apl6/igt@i915_selftest@live@gt_heartbeat.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-tglu:         [FAIL][227] ([i915#3743]) -> [PASS][228]
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-tglu-9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-4/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [FAIL][229] ([i915#2346]) -> [PASS][230]
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk9/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * {igt@kms_pm_rpm@dpms-non-lpsp}:
    - shard-dg2:          [SKIP][231] ([i915#9519]) -> [PASS][232]
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-dg2-10/igt@kms_pm_rpm@dpms-non-lpsp.html
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg2-6/igt@kms_pm_rpm@dpms-non-lpsp.html

  * {igt@kms_pm_rpm@modeset-non-lpsp}:
    - shard-dg1:          [SKIP][233] ([i915#9519]) -> [PASS][234]
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-dg1-19/igt@kms_pm_rpm@modeset-non-lpsp.html
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-dg1-17/igt@kms_pm_rpm@modeset-non-lpsp.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1:
    - shard-tglu:         [FAIL][235] ([i915#9196]) -> [PASS][236]
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-tglu-9/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-7/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html

  * igt@kms_universal_plane@cursor-fb-leak@pipe-b-vga-1:
    - shard-snb:          [FAIL][237] ([i915#9196]) -> [PASS][238]
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-snb6/igt@kms_universal_plane@cursor-fb-leak@pipe-b-vga-1.html
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-snb7/igt@kms_universal_plane@cursor-fb-leak@pipe-b-vga-1.html

  
#### Warnings ####

  * igt@i915_pm_rc6_residency@rc6-idle@vecs0:
    - shard-tglu:         [FAIL][239] ([i915#2681] / [i915#3591]) -> [WARN][240] ([i915#2681])
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-tglu-6/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-tglu-2/igt@i915_pm_rc6_residency@rc6-idle@vecs0.html

  * igt@kms_hdr@bpc-switch:
    - shard-glk:          [INCOMPLETE][241] -> [SKIP][242] ([fdo#109271])
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-glk7/igt@kms_hdr@bpc-switch.html
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-glk8/igt@kms_hdr@bpc-switch.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-mtlp:         [SKIP][243] ([i915#4348]) -> [SKIP][244] ([i915#658]) +3 other tests skip
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-4/igt@kms_psr2_su@page_flip-xrgb8888.html
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-8/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@sprite_mmap_gtt:
    - shard-mtlp:         [SKIP][245] ([i915#4077]) -> [SKIP][246] ([i915#1072]) +4 other tests skip
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13742/shard-mtlp-8/igt@kms_psr@sprite_mmap_gtt.html
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/shard-mtlp-5/igt@kms_psr@sprite_mmap_gtt.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109283]: https://bugs.freedesktop.org/show_bug.cgi?id=109283
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
  [fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
  [fdo#109313]: https://bugs.freedesktop.org/show_bug.cgi?id=109313
  [fdo#109314]: https://bugs.freedesktop.org/show_bug.cgi?id=109314
  [fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
  [fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110542]: https://bugs.freedesktop.org/show_bug.cgi?id=110542
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1937]: https://gitlab.freedesktop.org/drm/intel/issues/1937
  [i915#2017]: https://gitlab.freedesktop.org/drm/intel/issues/2017
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2436]: https://gitlab.freedesktop.org/drm/intel/issues/2436
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
  [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
  [i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
  [i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
  [i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
  [i915#3955]: https://gitlab.freedesktop.org/drm/intel/issues/3955
  [i915#404]: https://gitlab.freedesktop.org/drm/intel/issues/404
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
  [i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
  [i915#4087]: https://gitlab.freedesktop.org/drm/intel/issues/4087
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
  [i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4348]: https://gitlab.freedesktop.org/drm/intel/issues/4348
  [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
  [i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
  [i915#4881]: https://gitlab.freedesktop.org/drm/intel/issues/4881
  [i915#5138]: https://gitlab.freedesktop.org/drm/intel/issues/5138
  [i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
  [i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
  [i915#5460]: https://gitlab.freedesktop.org/drm/intel/issues/5460
  [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
  [i915#5465]: https://gitlab.freedesktop.org/drm/intel/issues/5465
  [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
  [i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
  [i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
  [i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
  [i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
  [i915#6268]: https://gitlab.freedesktop.org/drm/intel/issues/6268
  [i915#6301]: https://gitlab.freedesktop.org/drm/intel/issues/6301
  [i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#6755]: https://gitlab.freedesktop.org/drm/intel/issues/6755
  [i915#6768]: https://gitlab.freedesktop.org/drm/intel/issues/6768
  [i915#6944]: https://gitlab.freedesktop.org/drm/intel/issues/6944
  [i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/intel/issues/7118
  [i915#7213]: https://gitlab.freedesktop.org/drm/intel/issues/7213
  [i915#7297]: https://gitlab.freedesktop.org/drm/intel/issues/7297
  [i915#7392]: https://gitlab.freedesktop.org/drm/intel/issues/7392
  [i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
  [i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
  [i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
  [i915#7812]: https://gitlab.freedesktop.org/drm/intel/issues/7812
  [i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
  [i915#7975]: https://gitlab.freedesktop.org/drm/intel/issues/7975
  [i915#8213]: https://gitlab.freedesktop.org/drm/intel/issues/8213
  [i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
  [i915#8411]: https://gitlab.freedesktop.org/drm/intel/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
  [i915#8430]: https://gitlab.freedesktop.org/drm/intel/issues/8430
  [i915#8489]: https://gitlab.freedesktop.org/drm/intel/issues/8489
  [i915#8516]: https://gitlab.freedesktop.org/drm/intel/issues/8516
  [i915#8588]: https://gitlab.freedesktop.org/drm/intel/issues/8588
  [i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
  [i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
  [i915#8962]: https://gitlab.freedesktop.org/drm/intel/issues/8962
  [i915#9067]: https://gitlab.freedesktop.org/drm/intel/issues/9067
  [i915#9096]: https://gitlab.freedesktop.org/drm/intel/issues/9096
  [i915#9119]: https://gitlab.freedesktop.org/drm/intel/issues/9119
  [i915#9196]: https://gitlab.freedesktop.org/drm/intel/issues/9196
  [i915#9226]: https://gitlab.freedesktop.org/drm/intel/issues/9226
  [i915#9227]: https://gitlab.freedesktop.org/drm/intel/issues/9227
  [i915#9261]: https://gitlab.freedesktop.org/drm/intel/issues/9261
  [i915#9292]: https://gitlab.freedesktop.org/drm/intel/issues/9292
  [i915#9298]: https://gitlab.freedesktop.org/drm/intel/issues/9298
  [i915#9318]: https://gitlab.freedesktop.org/drm/intel/issues/9318
  [i915#9323]: https://gitlab.freedesktop.org/drm/intel/issues/9323
  [i915#9392]: https://gitlab.freedesktop.org/drm/intel/issues/9392
  [i915#9414]: https://gitlab.freedesktop.org/drm/intel/issues/9414
  [i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423
  [i915#9424]: https://gitlab.freedesktop.org/drm/intel/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/intel/issues/9433
  [i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519


Build changes
-------------

  * Linux: CI_DRM_13742 -> Patchwork_94470v9

  CI-20190529: 20190529
  CI_DRM_13742: 4c7ec2a8f6f65d8f895e4560696e8487de4932d4 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7532: bf24b157b1049afc086fe65a60b22bd6bb3e18b7 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_94470v9: 4c7ec2a8f6f65d8f895e4560696e8487de4932d4 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_94470v9/index.html

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