* [Intel-gfx] [PATCH v2 01/24] drm/i915/display: Add framework to add parameters specific to display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-22 17:45 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 02/24] drm/i915/display: Dump also display parameters Jouni Högander
` (26 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Currently all module parameters are handled by i915_param.c/h. This
is a problem for display parameters when Xe driver is used. Add
a mechanism to add parameters specific to the display. This is mainly
copied from i915_[debugfs]_params.[ch]. Parameters are not yet moved. This
is done by subsequent patches.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/Makefile | 2 +
.../gpu/drm/i915/display/intel_display_core.h | 2 +
.../drm/i915/display/intel_display_debugfs.c | 2 +
.../display/intel_display_debugfs_params.c | 176 ++++++++++++++++++
.../display/intel_display_debugfs_params.h | 14 ++
.../drm/i915/display/intel_display_device.c | 8 +
.../drm/i915/display/intel_display_device.h | 1 +
.../drm/i915/display/intel_display_params.c | 71 +++++++
.../drm/i915/display/intel_display_params.h | 34 ++++
drivers/gpu/drm/i915/i915_driver.c | 2 +
10 files changed, 312 insertions(+)
create mode 100644 drivers/gpu/drm/i915/display/intel_display_debugfs_params.c
create mode 100644 drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
create mode 100644 drivers/gpu/drm/i915/display/intel_display_params.c
create mode 100644 drivers/gpu/drm/i915/display/intel_display_params.h
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 88b2bb005014..3b9dcb606fc1 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -95,6 +95,7 @@ i915-$(CONFIG_DEBUG_FS) += \
i915_debugfs.o \
i915_debugfs_params.o \
display/intel_display_debugfs.o \
+ display/intel_display_debugfs_params.o \
display/intel_pipe_crc.o
i915-$(CONFIG_PERF_EVENTS) += i915_pmu.o
@@ -257,6 +258,7 @@ i915-y += \
display/intel_display.o \
display/intel_display_driver.o \
display/intel_display_irq.o \
+ display/intel_display_params.o \
display/intel_display_power.o \
display/intel_display_power_map.o \
display/intel_display_power_well.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display_core.h b/drivers/gpu/drm/i915/display/intel_display_core.h
index ccfe27630fb6..aa8be02c9e54 100644
--- a/drivers/gpu/drm/i915/display/intel_display_core.h
+++ b/drivers/gpu/drm/i915/display/intel_display_core.h
@@ -19,6 +19,7 @@
#include "intel_cdclk.h"
#include "intel_display_device.h"
#include "intel_display_limits.h"
+#include "intel_display_params.h"
#include "intel_display_power.h"
#include "intel_dpll_mgr.h"
#include "intel_fbc.h"
@@ -520,6 +521,7 @@ struct intel_display {
struct intel_hotplug hotplug;
struct intel_opregion opregion;
struct intel_overlay *overlay;
+ struct intel_display_params params;
struct intel_vbt_data vbt;
struct intel_wm wm;
};
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index fbe75d47a165..e219034d9c3d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -17,6 +17,7 @@
#include "intel_de.h"
#include "intel_crtc_state_dump.h"
#include "intel_display_debugfs.h"
+#include "intel_display_debugfs_params.h"
#include "intel_display_power.h"
#include "intel_display_power_well.h"
#include "intel_display_types.h"
@@ -1098,6 +1099,7 @@ void intel_display_debugfs_register(struct drm_i915_private *i915)
intel_hpd_debugfs_register(i915);
intel_psr_debugfs_register(i915);
intel_wm_debugfs_register(i915);
+ intel_display_debugfs_params(i915);
}
static int i915_panel_show(struct seq_file *m, void *data)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs_params.c b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.c
new file mode 100644
index 000000000000..b7e68eb62452
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.c
@@ -0,0 +1,176 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include <linux/kernel.h>
+
+#include <drm/drm_drv.h>
+
+#include "intel_display_debugfs_params.h"
+#include "i915_drv.h"
+#include "intel_display_params.h"
+
+/* int param */
+static int intel_display_param_int_show(struct seq_file *m, void *data)
+{
+ int *value = m->private;
+
+ seq_printf(m, "%d\n", *value);
+
+ return 0;
+}
+
+static int intel_display_param_int_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, intel_display_param_int_show, inode->i_private);
+}
+
+static ssize_t intel_display_param_int_write(struct file *file,
+ const char __user *ubuf, size_t len,
+ loff_t *offp)
+{
+ struct seq_file *m = file->private_data;
+ int *value = m->private;
+ int ret;
+
+ ret = kstrtoint_from_user(ubuf, len, 0, value);
+ if (ret) {
+ /* support boolean values too */
+ bool b;
+
+ ret = kstrtobool_from_user(ubuf, len, &b);
+ if (!ret)
+ *value = b;
+ }
+
+ return ret ?: len;
+}
+
+static const struct file_operations intel_display_param_int_fops = {
+ .owner = THIS_MODULE,
+ .open = intel_display_param_int_open,
+ .read = seq_read,
+ .write = intel_display_param_int_write,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+static const struct file_operations intel_display_param_int_fops_ro = {
+ .owner = THIS_MODULE,
+ .open = intel_display_param_int_open,
+ .read = seq_read,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+/* unsigned int param */
+static int intel_display_param_uint_show(struct seq_file *m, void *data)
+{
+ unsigned int *value = m->private;
+
+ seq_printf(m, "%u\n", *value);
+
+ return 0;
+}
+
+static int intel_display_param_uint_open(struct inode *inode, struct file *file)
+{
+ return single_open(file, intel_display_param_uint_show, inode->i_private);
+}
+
+static ssize_t intel_display_param_uint_write(struct file *file,
+ const char __user *ubuf, size_t len,
+ loff_t *offp)
+{
+ struct seq_file *m = file->private_data;
+ unsigned int *value = m->private;
+ int ret;
+
+ ret = kstrtouint_from_user(ubuf, len, 0, value);
+ if (ret) {
+ /* support boolean values too */
+ bool b;
+
+ ret = kstrtobool_from_user(ubuf, len, &b);
+ if (!ret)
+ *value = b;
+ }
+
+ return ret ?: len;
+}
+
+static const struct file_operations intel_display_param_uint_fops = {
+ .owner = THIS_MODULE,
+ .open = intel_display_param_uint_open,
+ .read = seq_read,
+ .write = intel_display_param_uint_write,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+static const struct file_operations intel_display_param_uint_fops_ro = {
+ .owner = THIS_MODULE,
+ .open = intel_display_param_uint_open,
+ .read = seq_read,
+ .llseek = default_llseek,
+ .release = single_release,
+};
+
+#define RO(mode) (((mode) & 0222) == 0)
+
+__maybe_unused static struct dentry *
+intel_display_debugfs_create_int(const char *name, umode_t mode,
+ struct dentry *parent, int *value)
+{
+ return debugfs_create_file_unsafe(name, mode, parent, value,
+ RO(mode) ? &intel_display_param_int_fops_ro :
+ &intel_display_param_int_fops);
+}
+
+__maybe_unused static struct dentry *
+intel_display_debugfs_create_uint(const char *name, umode_t mode,
+ struct dentry *parent, unsigned int *value)
+{
+ return debugfs_create_file_unsafe(name, mode, parent, value,
+ RO(mode) ? &intel_display_param_uint_fops_ro :
+ &intel_display_param_uint_fops);
+}
+
+#define _intel_display_param_create_file(parent, name, mode, valp) \
+ do { \
+ if (mode) \
+ _Generic(valp, \
+ bool * : debugfs_create_bool, \
+ int * : intel_display_debugfs_create_int, \
+ unsigned int * : intel_display_debugfs_create_uint, \
+ unsigned long * : debugfs_create_ulong, \
+ char ** : debugfs_create_str) \
+ (name, mode, parent, valp); \
+ } while (0)
+
+/* add a subdirectory with files for each intel display param */
+void intel_display_debugfs_params(struct drm_i915_private *i915)
+{
+ struct drm_minor *minor = i915->drm.primary;
+ struct dentry *dir;
+ char dirname[16];
+
+ snprintf(dirname, sizeof(dirname), "%s_params", i915->drm.driver->name);
+ dir = debugfs_lookup(dirname, minor->debugfs_root);
+ if (!dir)
+ dir = debugfs_create_dir(dirname, minor->debugfs_root);
+ if (IS_ERR(dir))
+ return;
+
+ /*
+ * Note: We could create files for params needing special handling
+ * here. Set mode in params to 0 to skip the generic create file, or
+ * just let the generic create file fail silently with -EEXIST.
+ */
+
+#define REGISTER(T, x, unused, mode, ...) _intel_display_param_create_file( \
+ dir, #x, mode, &i915->display.params.x);
+ INTEL_DISPLAY_PARAMS_FOR_EACH(REGISTER);
+#undef REGISTER
+}
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
new file mode 100644
index 000000000000..0e33f4e90ddc
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef __INTEL_DISPLAY_DEBUGFS_PARAMS__
+#define __INTEL_DISPLAY_DEBUGFS_PARAMS__
+
+struct dentry;
+struct drm_i915_private;
+
+void intel_display_debugfs_params(struct drm_i915_private *i915);
+
+#endif /* __INTEL_DISPLAY_DEBUGFS_PARAMS__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 2b1ec23ba9c3..e80842d1e7c7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -12,6 +12,7 @@
#include "intel_de.h"
#include "intel_display.h"
#include "intel_display_device.h"
+#include "intel_display_params.h"
#include "intel_display_power.h"
#include "intel_display_reg_defs.h"
#include "intel_fbc.h"
@@ -937,6 +938,13 @@ void intel_display_device_probe(struct drm_i915_private *i915)
DISPLAY_RUNTIME_INFO(i915)->ip.rel = rel;
DISPLAY_RUNTIME_INFO(i915)->ip.step = step;
}
+
+ intel_display_params_copy(&i915->display.params);
+}
+
+void intel_display_device_remove(struct drm_i915_private *i915)
+{
+ intel_display_params_free(&i915->display.params);
}
static void __intel_display_device_info_runtime_init(struct drm_i915_private *i915)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.h b/drivers/gpu/drm/i915/display/intel_display_device.h
index 5b5c0e53307f..4299cc452e05 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.h
+++ b/drivers/gpu/drm/i915/display/intel_display_device.h
@@ -161,6 +161,7 @@ struct intel_display_device_info {
bool intel_display_device_enabled(struct drm_i915_private *i915);
void intel_display_device_probe(struct drm_i915_private *i915);
+void intel_display_device_remove(struct drm_i915_private *i915);
void intel_display_device_info_runtime_init(struct drm_i915_private *i915);
void intel_display_device_info_print(const struct intel_display_device_info *info,
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
new file mode 100644
index 000000000000..91953ae27144
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -0,0 +1,71 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#include "intel_display_params.h"
+#include "i915_drv.h"
+
+#define intel_display_param_named(name, T, perm, desc) \
+ module_param_named(name, intel_display_modparams.name, T, perm); \
+ MODULE_PARM_DESC(name, desc)
+#define intel_display_param_named_unsafe(name, T, perm, desc) \
+ module_param_named_unsafe(name, intel_display_modparams.name, T, perm); \
+ MODULE_PARM_DESC(name, desc)
+
+static struct intel_display_params intel_display_modparams __read_mostly = {
+#define MEMBER(T, member, value, ...) .member = (value),
+ INTEL_DISPLAY_PARAMS_FOR_EACH(MEMBER)
+#undef MEMBER
+};
+/*
+ * Note: As a rule, keep module parameter sysfs permissions read-only
+ * 0400. Runtime changes are only supported through i915 debugfs.
+ *
+ * For any exceptions requiring write access and runtime changes through module
+ * parameter sysfs, prevent debugfs file creation by setting the parameter's
+ * debugfs mode to 0.
+ */
+
+__maybe_unused static void _param_dup_charp(char **valp)
+{
+ *valp = kstrdup(*valp ? *valp : "", GFP_ATOMIC);
+}
+
+__maybe_unused static void _param_nop(void *valp)
+{
+}
+
+#define _param_dup(valp) \
+ _Generic(valp, \
+ char ** : _param_dup_charp, \
+ default : _param_nop) \
+ (valp)
+
+void intel_display_params_copy(struct intel_display_params *dest)
+{
+ *dest = intel_display_modparams;
+#define DUP(T, x, ...) _param_dup(&dest->x);
+ INTEL_DISPLAY_PARAMS_FOR_EACH(DUP);
+#undef DUP
+}
+
+__maybe_unused static void _param_free_charp(char **valp)
+{
+ kfree(*valp);
+ *valp = NULL;
+}
+
+#define _param_free(valp) \
+ _Generic(valp, \
+ char ** : _param_free_charp, \
+ default : _param_nop) \
+ (valp)
+
+/* free the allocated members, *not* the passed in params itself */
+void intel_display_params_free(struct intel_display_params *params)
+{
+#define FREE(T, x, ...) _param_free(¶ms->x);
+ INTEL_DISPLAY_PARAMS_FOR_EACH(FREE);
+#undef FREE
+}
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
new file mode 100644
index 000000000000..1b347365988c
--- /dev/null
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -0,0 +1,34 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2023 Intel Corporation
+ */
+
+#ifndef _INTEL_DISPLAY_PARAMS_H_
+#define _INTEL_DISPLAY_PARAMS_H_
+
+struct drm_printer;
+
+/*
+ * Invoke param, a function-like macro, for each intel display param, with
+ * arguments:
+ *
+ * param(type, name, value, mode)
+ *
+ * type: parameter type, one of {bool, int, unsigned int, unsigned long, char *}
+ * name: name of the parameter
+ * value: initial/default value of the parameter
+ * mode: debugfs file permissions, one of {0400, 0600, 0}, use 0 to not create
+ * debugfs file
+ */
+#define INTEL_DISPLAY_PARAMS_FOR_EACH(param)
+
+#define MEMBER(T, member, ...) T member;
+struct intel_display_params {
+ INTEL_DISPLAY_PARAMS_FOR_EACH(MEMBER);
+};
+#undef MEMBER
+
+void intel_display_params_copy(struct intel_display_params *dest);
+void intel_display_params_free(struct intel_display_params *params);
+
+#endif
diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c
index 8a0e2c745e1f..80e85cadb9a2 100644
--- a/drivers/gpu/drm/i915/i915_driver.c
+++ b/drivers/gpu/drm/i915/i915_driver.c
@@ -909,6 +909,8 @@ static void i915_driver_release(struct drm_device *dev)
intel_runtime_pm_driver_release(rpm);
i915_driver_late_release(dev_priv);
+
+ intel_display_device_remove(dev_priv);
}
static int i915_driver_open(struct drm_device *dev, struct drm_file *file)
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 01/24] drm/i915/display: Add framework to add parameters specific to display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 01/24] drm/i915/display: Add framework to add parameters specific to display Jouni Högander
@ 2023-10-22 17:45 ` Luca Coelho
2023-10-23 7:50 ` Hogander, Jouni
0 siblings, 1 reply; 64+ messages in thread
From: Luca Coelho @ 2023-10-22 17:45 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Currently all module parameters are handled by i915_param.c/h. This
> is a problem for display parameters when Xe driver is used. Add
> a mechanism to add parameters specific to the display. This is mainly
> copied from i915_[debugfs]_params.[ch]. Parameters are not yet moved. This
> is done by subsequent patches.
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
Looks generally good, but I have a couple of comments:
[...]
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> new file mode 100644
> index 000000000000..0e33f4e90ddc
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> @@ -0,0 +1,14 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#ifndef __INTEL_DISPLAY_DEBUGFS_PARAMS__
> +#define __INTEL_DISPLAY_DEBUGFS_PARAMS__
> +
> +struct dentry;
It doesn't seem like you need dentry here...
> +struct drm_i915_private;
> +
> +void intel_display_debugfs_params(struct drm_i915_private *i915);
> +
> +#endif /* __INTEL_DISPLAY_DEBUGFS_PARAMS__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index 2b1ec23ba9c3..e80842d1e7c7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -12,6 +12,7 @@
> #include "intel_de.h"
> #include "intel_display.h"
> #include "intel_display_device.h"
> +#include "intel_display_params.h"
> #include "intel_display_power.h"
> #include "intel_display_reg_defs.h"
> #include "intel_fbc.h"
> @@ -937,6 +938,13 @@ void intel_display_device_probe(struct drm_i915_private *i915)
> DISPLAY_RUNTIME_INFO(i915)->ip.rel = rel;
> DISPLAY_RUNTIME_INFO(i915)->ip.step = step;
> }
> +
> + intel_display_params_copy(&i915->display.params);
> +}
> +
> +void intel_display_device_remove(struct drm_i915_private *i915)
> +{
> + intel_display_params_free(&i915->display.params);
> }
>
Why can't you just store the parameters as module globals? They are
always associated with the module anyway. Then you don't need to worry
about the lifetime.
[...]
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> new file mode 100644
> index 000000000000..1b347365988c
> --- /dev/null
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -0,0 +1,34 @@
> +// SPDX-License-Identifier: MIT
> +/*
> + * Copyright © 2023 Intel Corporation
> + */
> +
> +#ifndef _INTEL_DISPLAY_PARAMS_H_
> +#define _INTEL_DISPLAY_PARAMS_H_
> +
> +struct drm_printer;
> +
> +/*
> + * Invoke param, a function-like macro, for each intel display param, with
> + * arguments:
> + *
> + * param(type, name, value, mode)
> + *
> + * type: parameter type, one of {bool, int, unsigned int, unsigned long, char *}
> + * name: name of the parameter
> + * value: initial/default value of the parameter
> + * mode: debugfs file permissions, one of {0400, 0600, 0}, use 0 to not create
> + * debugfs file
> + */
> +#define INTEL_DISPLAY_PARAMS_FOR_EACH(param)
I don't get this. Here you create a macro that expands to nothing...
> +
> +#define MEMBER(T, member, ...) T member;
> +struct intel_display_params {
> + INTEL_DISPLAY_PARAMS_FOR_EACH(MEMBER);
...so doesn't this become empty in the end?
[...]
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 01/24] drm/i915/display: Add framework to add parameters specific to display
2023-10-22 17:45 ` Luca Coelho
@ 2023-10-23 7:50 ` Hogander, Jouni
2023-10-23 8:14 ` Luca Coelho
0 siblings, 1 reply; 64+ messages in thread
From: Hogander, Jouni @ 2023-10-23 7:50 UTC (permalink / raw)
To: luca@coelho.fi, intel-gfx@lists.freedesktop.org
On Sun, 2023-10-22 at 20:45 +0300, Luca Coelho wrote:
> On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > Currently all module parameters are handled by i915_param.c/h. This
> > is a problem for display parameters when Xe driver is used. Add
> > a mechanism to add parameters specific to the display. This is
> > mainly
> > copied from i915_[debugfs]_params.[ch]. Parameters are not yet
> > moved. This
> > is done by subsequent patches.
> >
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
>
> Looks generally good, but I have a couple of comments:
Thank you Luca for your comments. Please check my responses below.
>
> [...]
> > diff --git
> > a/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > new file mode 100644
> > index 000000000000..0e33f4e90ddc
> > --- /dev/null
> > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > @@ -0,0 +1,14 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright © 2023 Intel Corporation
> > + */
> > +
> > +#ifndef __INTEL_DISPLAY_DEBUGFS_PARAMS__
> > +#define __INTEL_DISPLAY_DEBUGFS_PARAMS__
> > +
> > +struct dentry;
>
> It doesn't seem like you need dentry here...
Yeah, it seems. I will drop it.
>
>
> > +struct drm_i915_private;
> > +
> > +void intel_display_debugfs_params(struct drm_i915_private *i915);
> > +
> > +#endif /* __INTEL_DISPLAY_DEBUGFS_PARAMS__ */
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> > b/drivers/gpu/drm/i915/display/intel_display_device.c
> > index 2b1ec23ba9c3..e80842d1e7c7 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> > @@ -12,6 +12,7 @@
> > #include "intel_de.h"
> > #include "intel_display.h"
> > #include "intel_display_device.h"
> > +#include "intel_display_params.h"
> > #include "intel_display_power.h"
> > #include "intel_display_reg_defs.h"
> > #include "intel_fbc.h"
> > @@ -937,6 +938,13 @@ void intel_display_device_probe(struct
> > drm_i915_private *i915)
> > DISPLAY_RUNTIME_INFO(i915)->ip.rel = rel;
> > DISPLAY_RUNTIME_INFO(i915)->ip.step = step;
> > }
> > +
> > + intel_display_params_copy(&i915->display.params);
> > +}
> > +
> > +void intel_display_device_remove(struct drm_i915_private *i915)
> > +{
> > + intel_display_params_free(&i915->display.params);
> > }
> >
>
> Why can't you just store the parameters as module globals? They are
> always associated with the module anyway. Then you don't need to
> worry
> about the lifetime.
These are device parameters. Values from equivalent module parameters
are copied when probed. Can be later modified via debugfs without
touching other devices parameters.
>
>
> [...]
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> > b/drivers/gpu/drm/i915/display/intel_display_params.h
> > new file mode 100644
> > index 000000000000..1b347365988c
> > --- /dev/null
> > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> > @@ -0,0 +1,34 @@
> > +// SPDX-License-Identifier: MIT
> > +/*
> > + * Copyright © 2023 Intel Corporation
> > + */
> > +
> > +#ifndef _INTEL_DISPLAY_PARAMS_H_
> > +#define _INTEL_DISPLAY_PARAMS_H_
> > +
> > +struct drm_printer;
> > +
> > +/*
> > + * Invoke param, a function-like macro, for each intel display
> > param, with
> > + * arguments:
> > + *
> > + * param(type, name, value, mode)
> > + *
> > + * type: parameter type, one of {bool, int, unsigned int, unsigned
> > long, char *}
> > + * name: name of the parameter
> > + * value: initial/default value of the parameter
> > + * mode: debugfs file permissions, one of {0400, 0600, 0}, use 0
> > to not create
> > + * debugfs file
> > + */
> > +#define INTEL_DISPLAY_PARAMS_FOR_EACH(param)
>
> I don't get this. Here you create a macro that expands to nothing...
I wanted to split the patch set in a way that first this framework is
introduced and only after that parameters are added/moved one by one. I
still need to have INTEL_DISPLAY_PARAMS_FOR_EACH defined to avoid build
failure. If you look at patch 03/24 you see when first parameter is
added this gets as:
#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
param(int, enable_fbc, -1, 0600)
BR,
Jouni Högander
>
> > +
> > +#define MEMBER(T, member, ...) T member;
> > +struct intel_display_params {
> > + INTEL_DISPLAY_PARAMS_FOR_EACH(MEMBER);
>
> ...so doesn't this become empty in the end?
>
> [...]
>
> --
> Cheers,
> Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 01/24] drm/i915/display: Add framework to add parameters specific to display
2023-10-23 7:50 ` Hogander, Jouni
@ 2023-10-23 8:14 ` Luca Coelho
2023-10-23 8:16 ` Luca Coelho
0 siblings, 1 reply; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 8:14 UTC (permalink / raw)
To: Hogander, Jouni, intel-gfx@lists.freedesktop.org
On Mon, 2023-10-23 at 07:50 +0000, Hogander, Jouni wrote:
> On Sun, 2023-10-22 at 20:45 +0300, Luca Coelho wrote:
> > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > Currently all module parameters are handled by i915_param.c/h. This
> > > is a problem for display parameters when Xe driver is used. Add
> > > a mechanism to add parameters specific to the display. This is
> > > mainly
> > > copied from i915_[debugfs]_params.[ch]. Parameters are not yet
> > > moved. This
> > > is done by subsequent patches.
> > >
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > ---
> >
> > Looks generally good, but I have a couple of comments:
>
> Thank you Luca for your comments. Please check my responses below.
>
> >
> > [...]
> > > diff --git
> > > a/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > > b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > > new file mode 100644
> > > index 000000000000..0e33f4e90ddc
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > > @@ -0,0 +1,14 @@
> > > +/* SPDX-License-Identifier: MIT */
> > > +/*
> > > + * Copyright © 2023 Intel Corporation
> > > + */
> > > +
> > > +#ifndef __INTEL_DISPLAY_DEBUGFS_PARAMS__
> > > +#define __INTEL_DISPLAY_DEBUGFS_PARAMS__
> > > +
> > > +struct dentry;
> >
> > It doesn't seem like you need dentry here...
>
> Yeah, it seems. I will drop it.
>
> >
> >
> > > +struct drm_i915_private;
> > > +
> > > +void intel_display_debugfs_params(struct drm_i915_private *i915);
> > > +
> > > +#endif /* __INTEL_DISPLAY_DEBUGFS_PARAMS__ */
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> > > b/drivers/gpu/drm/i915/display/intel_display_device.c
> > > index 2b1ec23ba9c3..e80842d1e7c7 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> > > @@ -12,6 +12,7 @@
> > > #include "intel_de.h"
> > > #include "intel_display.h"
> > > #include "intel_display_device.h"
> > > +#include "intel_display_params.h"
> > > #include "intel_display_power.h"
> > > #include "intel_display_reg_defs.h"
> > > #include "intel_fbc.h"
> > > @@ -937,6 +938,13 @@ void intel_display_device_probe(struct
> > > drm_i915_private *i915)
> > > DISPLAY_RUNTIME_INFO(i915)->ip.rel = rel;
> > > DISPLAY_RUNTIME_INFO(i915)->ip.step = step;
> > > }
> > > +
> > > + intel_display_params_copy(&i915->display.params);
> > > +}
> > > +
> > > +void intel_display_device_remove(struct drm_i915_private *i915)
> > > +{
> > > + intel_display_params_free(&i915->display.params);
> > > }
> > >
> >
> > Why can't you just store the parameters as module globals? They are
> > always associated with the module anyway. Then you don't need to
> > worry
> > about the lifetime.
>
> These are device parameters. Values from equivalent module parameters
> are copied when probed. Can be later modified via debugfs without
> touching other devices parameters.
Okay, makes sense.
> > [...]
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> > > b/drivers/gpu/drm/i915/display/intel_display_params.h
> > > new file mode 100644
> > > index 000000000000..1b347365988c
> > > --- /dev/null
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> > > @@ -0,0 +1,34 @@
> > > +// SPDX-License-Identifier: MIT
> > > +/*
> > > + * Copyright © 2023 Intel Corporation
> > > + */
> > > +
> > > +#ifndef _INTEL_DISPLAY_PARAMS_H_
> > > +#define _INTEL_DISPLAY_PARAMS_H_
> > > +
> > > +struct drm_printer;
> > > +
> > > +/*
> > > + * Invoke param, a function-like macro, for each intel display
> > > param, with
> > > + * arguments:
> > > + *
> > > + * param(type, name, value, mode)
> > > + *
> > > + * type: parameter type, one of {bool, int, unsigned int, unsigned
> > > long, char *}
> > > + * name: name of the parameter
> > > + * value: initial/default value of the parameter
> > > + * mode: debugfs file permissions, one of {0400, 0600, 0}, use 0
> > > to not create
> > > + * debugfs file
> > > + */
> > > +#define INTEL_DISPLAY_PARAMS_FOR_EACH(param)
> >
> > I don't get this. Here you create a macro that expands to nothing...
>
> I wanted to split the patch set in a way that first this framework is
> introduced and only after that parameters are added/moved one by one. I
> still need to have INTEL_DISPLAY_PARAMS_FOR_EACH defined to avoid build
> failure. If you look at patch 03/24 you see when first parameter is
> added this gets as:
>
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> param(int, enable_fbc, -1, 0600)
Thanks for clarifying. A small comment somewhere here (at least while
it's empty) would be nice. :)
I'll continue reviewing the other patches now.
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 01/24] drm/i915/display: Add framework to add parameters specific to display
2023-10-23 8:14 ` Luca Coelho
@ 2023-10-23 8:16 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 8:16 UTC (permalink / raw)
To: Hogander, Jouni, intel-gfx@lists.freedesktop.org
On Mon, 2023-10-23 at 11:14 +0300, Luca Coelho wrote:
> On Mon, 2023-10-23 at 07:50 +0000, Hogander, Jouni wrote:
> > On Sun, 2023-10-22 at 20:45 +0300, Luca Coelho wrote:
> > > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > > Currently all module parameters are handled by i915_param.c/h. This
> > > > is a problem for display parameters when Xe driver is used. Add
> > > > a mechanism to add parameters specific to the display. This is
> > > > mainly
> > > > copied from i915_[debugfs]_params.[ch]. Parameters are not yet
> > > > moved. This
> > > > is done by subsequent patches.
> > > >
> > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > ---
> > >
> > > Looks generally good, but I have a couple of comments:
> >
> > Thank you Luca for your comments. Please check my responses below.
> >
> > >
> > > [...]
> > > > diff --git
> > > > a/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > > > b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > > > new file mode 100644
> > > > index 000000000000..0e33f4e90ddc
> > > > --- /dev/null
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs_params.h
> > > > @@ -0,0 +1,14 @@
> > > > +/* SPDX-License-Identifier: MIT */
> > > > +/*
> > > > + * Copyright © 2023 Intel Corporation
> > > > + */
> > > > +
> > > > +#ifndef __INTEL_DISPLAY_DEBUGFS_PARAMS__
> > > > +#define __INTEL_DISPLAY_DEBUGFS_PARAMS__
> > > > +
> > > > +struct dentry;
> > >
> > > It doesn't seem like you need dentry here...
> >
> > Yeah, it seems. I will drop it.
> >
> > >
> > >
> > > > +struct drm_i915_private;
> > > > +
> > > > +void intel_display_debugfs_params(struct drm_i915_private *i915);
> > > > +
> > > > +#endif /* __INTEL_DISPLAY_DEBUGFS_PARAMS__ */
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c
> > > > b/drivers/gpu/drm/i915/display/intel_display_device.c
> > > > index 2b1ec23ba9c3..e80842d1e7c7 100644
> > > > --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> > > > @@ -12,6 +12,7 @@
> > > > #include "intel_de.h"
> > > > #include "intel_display.h"
> > > > #include "intel_display_device.h"
> > > > +#include "intel_display_params.h"
> > > > #include "intel_display_power.h"
> > > > #include "intel_display_reg_defs.h"
> > > > #include "intel_fbc.h"
> > > > @@ -937,6 +938,13 @@ void intel_display_device_probe(struct
> > > > drm_i915_private *i915)
> > > > DISPLAY_RUNTIME_INFO(i915)->ip.rel = rel;
> > > > DISPLAY_RUNTIME_INFO(i915)->ip.step = step;
> > > > }
> > > > +
> > > > + intel_display_params_copy(&i915->display.params);
> > > > +}
> > > > +
> > > > +void intel_display_device_remove(struct drm_i915_private *i915)
> > > > +{
> > > > + intel_display_params_free(&i915->display.params);
> > > > }
> > > >
> > >
> > > Why can't you just store the parameters as module globals? They are
> > > always associated with the module anyway. Then you don't need to
> > > worry
> > > about the lifetime.
> >
> > These are device parameters. Values from equivalent module parameters
> > are copied when probed. Can be later modified via debugfs without
> > touching other devices parameters.
>
> Okay, makes sense.
>
>
> > > [...]
> > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> > > > b/drivers/gpu/drm/i915/display/intel_display_params.h
> > > > new file mode 100644
> > > > index 000000000000..1b347365988c
> > > > --- /dev/null
> > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> > > > @@ -0,0 +1,34 @@
> > > > +// SPDX-License-Identifier: MIT
> > > > +/*
> > > > + * Copyright © 2023 Intel Corporation
> > > > + */
> > > > +
> > > > +#ifndef _INTEL_DISPLAY_PARAMS_H_
> > > > +#define _INTEL_DISPLAY_PARAMS_H_
> > > > +
> > > > +struct drm_printer;
> > > > +
> > > > +/*
> > > > + * Invoke param, a function-like macro, for each intel display
> > > > param, with
> > > > + * arguments:
> > > > + *
> > > > + * param(type, name, value, mode)
> > > > + *
> > > > + * type: parameter type, one of {bool, int, unsigned int, unsigned
> > > > long, char *}
> > > > + * name: name of the parameter
> > > > + * value: initial/default value of the parameter
> > > > + * mode: debugfs file permissions, one of {0400, 0600, 0}, use 0
> > > > to not create
> > > > + * debugfs file
> > > > + */
> > > > +#define INTEL_DISPLAY_PARAMS_FOR_EACH(param)
> > >
> > > I don't get this. Here you create a macro that expands to nothing...
> >
> > I wanted to split the patch set in a way that first this framework is
> > introduced and only after that parameters are added/moved one by one. I
> > still need to have INTEL_DISPLAY_PARAMS_FOR_EACH defined to avoid build
> > failure. If you look at patch 03/24 you see when first parameter is
> > added this gets as:
> >
> > #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> > param(int, enable_fbc, -1, 0600)
>
> Thanks for clarifying. A small comment somewhere here (at least while
> it's empty) would be nice. :)
Forgot to say that, with this, you have my:
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Other patches in the series still pending.
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 02/24] drm/i915/display: Dump also display parameters
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 01/24] drm/i915/display: Add framework to add parameters specific to display Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 9:10 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 03/24] drm/i915/display: Move enable_fbc module parameter under display Jouni Högander
` (25 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
GPU error dump contained all module parameters. If we are moving
display parameters to intel_display_params.[ch] they are not dumped
into GPU error dump. This patch is adding moved display parameters
back to GPU error dump. Display parameters are also included in
i915_capabilities
v2: Add parameters to i915_capabilities as well
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
.../drm/i915/display/intel_display_params.c | 57 +++++++++++++++++++
.../drm/i915/display/intel_display_params.h | 3 +
drivers/gpu/drm/i915/i915_debugfs.c | 3 +
drivers/gpu/drm/i915/i915_gpu_error.c | 3 +
drivers/gpu/drm/i915/i915_gpu_error.h | 2 +
5 files changed, 68 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 91953ae27144..11ee73a98b5b 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -27,6 +27,63 @@ static struct intel_display_params intel_display_modparams __read_mostly = {
* debugfs mode to 0.
*/
+__maybe_unused
+static void _param_print_bool(struct drm_printer *p, const char *driver_name,
+ const char *name, bool val)
+{
+ drm_printf(p, "%s.%s=%s\n", driver_name, name, str_yes_no(val));
+}
+
+__maybe_unused
+static void _param_print_int(struct drm_printer *p, const char *driver_name,
+ const char *name, int val)
+{
+ drm_printf(p, "%s.%s=%d\n", driver_name, name, val);
+}
+
+__maybe_unused
+static void _param_print_uint(struct drm_printer *p, const char *driver_name,
+ const char *name, unsigned int val)
+{
+ drm_printf(p, "%s.%s=%u\n", driver_name, name, val);
+}
+
+__maybe_unused
+static void _param_print_ulong(struct drm_printer *p, const char *driver_name,
+ const char *name, unsigned long val)
+{
+ drm_printf(p, "%s.%s=%lu\n", driver_name, name, val);
+}
+
+__maybe_unused
+static void _param_print_charp(struct drm_printer *p, const char *driver_name,
+ const char *name, const char *val)
+{
+ drm_printf(p, "%s.%s=%s\n", driver_name, name, val);
+}
+
+#define _param_print(p, driver_name, name, val) \
+ _Generic(val, \
+ bool : _param_print_bool, \
+ int : _param_print_int, \
+ unsigned int : _param_print_uint, \
+ unsigned long : _param_print_ulong, \
+ char * : _param_print_charp)(p, driver_name, name, val)
+
+/**
+ * intel_display_params_dump - dump intel display modparams
+ * @i915: i915 device
+ * @p: the &drm_printer
+ *
+ * Pretty printer for i915 modparams.
+ */
+void intel_display_params_dump(struct drm_i915_private *i915, struct drm_printer *p)
+{
+#define PRINT(T, x, ...) _param_print(p, i915->drm.driver->name, #x, i915->display.params.x);
+ INTEL_DISPLAY_PARAMS_FOR_EACH(PRINT);
+#undef PRINT
+}
+
__maybe_unused static void _param_dup_charp(char **valp)
{
*valp = kstrdup(*valp ? *valp : "", GFP_ATOMIC);
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 1b347365988c..a0fb3e1aa2f5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -7,6 +7,7 @@
#define _INTEL_DISPLAY_PARAMS_H_
struct drm_printer;
+struct drm_i915_private;
/*
* Invoke param, a function-like macro, for each intel display param, with
@@ -28,6 +29,8 @@ struct intel_display_params {
};
#undef MEMBER
+void intel_display_params_dump(struct drm_i915_private *i915,
+ struct drm_printer *p);
void intel_display_params_copy(struct intel_display_params *dest);
void intel_display_params_free(struct intel_display_params *params);
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index e9b79c2c37d8..af0077f6a6d0 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -32,6 +32,8 @@
#include <drm/drm_debugfs.h>
+#include "display/intel_display_params.h"
+
#include "gem/i915_gem_context.h"
#include "gt/intel_gt.h"
#include "gt/intel_gt_buffer_pool.h"
@@ -74,6 +76,7 @@ static int i915_capabilities(struct seq_file *m, void *data)
kernel_param_lock(THIS_MODULE);
i915_params_dump(&i915->params, &p);
+ intel_display_params_dump(i915, &p);
kernel_param_unlock(THIS_MODULE);
return 0;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index b4e31e59c799..8275f9b6a47d 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -660,6 +660,7 @@ static void err_print_params(struct drm_i915_error_state_buf *m,
struct drm_printer p = i915_error_printer(m);
i915_params_dump(params, &p);
+ intel_display_params_dump(m->i915, &p);
}
static void err_print_pciid(struct drm_i915_error_state_buf *m,
@@ -1027,6 +1028,7 @@ static void i915_vma_coredump_free(struct i915_vma_coredump *vma)
static void cleanup_params(struct i915_gpu_coredump *error)
{
i915_params_free(&error->params);
+ intel_display_params_free(&error->display_params);
}
static void cleanup_uc(struct intel_uc_coredump *uc)
@@ -1988,6 +1990,7 @@ static void capture_gen(struct i915_gpu_coredump *error)
error->suspend_count = i915->suspend_count;
i915_params_copy(&error->params, &i915->params);
+ intel_display_params_copy(&error->display_params);
memcpy(&error->device_info,
INTEL_INFO(i915),
sizeof(error->device_info));
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.h b/drivers/gpu/drm/i915/i915_gpu_error.h
index 9f5971f5e980..4ce227f7e1e1 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.h
+++ b/drivers/gpu/drm/i915/i915_gpu_error.h
@@ -15,6 +15,7 @@
#include <drm/drm_mm.h>
#include "display/intel_display_device.h"
+#include "display/intel_display_params.h"
#include "gt/intel_engine.h"
#include "gt/intel_gt_types.h"
#include "gt/uc/intel_uc_fw.h"
@@ -214,6 +215,7 @@ struct i915_gpu_coredump {
struct intel_display_runtime_info display_runtime_info;
struct intel_driver_caps driver_caps;
struct i915_params params;
+ struct intel_display_params display_params;
struct intel_overlay_error_state *overlay;
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* [Intel-gfx] [PATCH v2 03/24] drm/i915/display: Move enable_fbc module parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 01/24] drm/i915/display: Add framework to add parameters specific to display Jouni Högander
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 02/24] drm/i915/display: Dump also display parameters Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 10:53 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 04/24] drm/i915/display: Move psr related module parameters " Jouni Högander
` (24 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 3 ++-
drivers/gpu/drm/i915/display/intel_fbc.c | 10 +++++-----
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
6 files changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
index af0c79a4c9a4..b37c0d02d500 100644
--- a/drivers/gpu/drm/i915/display/i9xx_wm.c
+++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
@@ -2993,7 +2993,7 @@ static void ilk_wm_merge(struct drm_i915_private *dev_priv,
/* ILK: LP2+ must be disabled when FBC WM is disabled but FBC enabled */
if (DISPLAY_VER(dev_priv) == 5 && HAS_FBC(dev_priv) &&
- dev_priv->params.enable_fbc && !merged->fbc_wm_enabled) {
+ dev_priv->display.params.enable_fbc && !merged->fbc_wm_enabled) {
for (level = 2; level < num_levels; level++) {
struct intel_wm_level *wm = &merged->wm[level];
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 11ee73a98b5b..330613cd64db 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -27,6 +27,10 @@ static struct intel_display_params intel_display_modparams __read_mostly = {
* debugfs mode to 0.
*/
+intel_display_param_named_unsafe(enable_fbc, int, 0400,
+ "Enable frame buffer compression for power savings "
+ "(default: -1 (use per-chip default))");
+
__maybe_unused
static void _param_print_bool(struct drm_printer *p, const char *driver_name,
const char *name, bool val)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index a0fb3e1aa2f5..f1bdf2c6e5cd 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -21,7 +21,8 @@ struct drm_i915_private;
* mode: debugfs file permissions, one of {0400, 0600, 0}, use 0 to not create
* debugfs file
*/
-#define INTEL_DISPLAY_PARAMS_FOR_EACH(param)
+#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
+ param(int, enable_fbc, -1, 0600) \
#define MEMBER(T, member, ...) T member;
struct intel_display_params {
diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
index 4820d21cc942..bde12fe62275 100644
--- a/drivers/gpu/drm/i915/display/intel_fbc.c
+++ b/drivers/gpu/drm/i915/display/intel_fbc.c
@@ -1174,7 +1174,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
return 0;
}
- if (!i915->params.enable_fbc) {
+ if (!i915->display.params.enable_fbc) {
plane_state->no_fbc_reason = "disabled per module param or by default";
return 0;
}
@@ -1751,8 +1751,8 @@ void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915)
*/
static int intel_sanitize_fbc_option(struct drm_i915_private *i915)
{
- if (i915->params.enable_fbc >= 0)
- return !!i915->params.enable_fbc;
+ if (i915->display.params.enable_fbc >= 0)
+ return !!i915->display.params.enable_fbc;
if (!HAS_FBC(i915))
return 0;
@@ -1824,9 +1824,9 @@ void intel_fbc_init(struct drm_i915_private *i915)
if (need_fbc_vtd_wa(i915))
DISPLAY_RUNTIME_INFO(i915)->fbc_mask = 0;
- i915->params.enable_fbc = intel_sanitize_fbc_option(i915);
+ i915->display.params.enable_fbc = intel_sanitize_fbc_option(i915);
drm_dbg_kms(&i915->drm, "Sanitized enable_fbc value: %d\n",
- i915->params.enable_fbc);
+ i915->display.params.enable_fbc);
for_each_fbc_id(i915, fbc_id)
i915->display.fbc[fbc_id] = intel_fbc_create(i915, fbc_id);
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 036c4c3ed6ed..42700b854b79 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
-i915_param_named_unsafe(enable_fbc, int, 0400,
- "Enable frame buffer compression for power savings "
- "(default: -1 (use per-chip default))");
-
i915_param_named_unsafe(lvds_channel_mode, int, 0400,
"Specify LVDS channel mode "
"(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index d5194b039aab..e674de29f92c 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -52,7 +52,6 @@ struct drm_printer;
param(int, panel_use_ssc, -1, 0600) \
param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
- param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, enable_dpt, true, 0400) \
param(bool, psr_safest_params, false, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 03/24] drm/i915/display: Move enable_fbc module parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 03/24] drm/i915/display: Move enable_fbc module parameter under display Jouni Högander
@ 2023-10-23 10:53 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 10:53 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/i9xx_wm.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
> drivers/gpu/drm/i915/display/intel_display_params.h | 3 ++-
> drivers/gpu/drm/i915/display/intel_fbc.c | 10 +++++-----
> drivers/gpu/drm/i915/i915_params.c | 4 ----
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 6 files changed, 12 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/i9xx_wm.c b/drivers/gpu/drm/i915/display/i9xx_wm.c
> index af0c79a4c9a4..b37c0d02d500 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_wm.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_wm.c
> @@ -2993,7 +2993,7 @@ static void ilk_wm_merge(struct drm_i915_private *dev_priv,
>
> /* ILK: LP2+ must be disabled when FBC WM is disabled but FBC enabled */
> if (DISPLAY_VER(dev_priv) == 5 && HAS_FBC(dev_priv) &&
> - dev_priv->params.enable_fbc && !merged->fbc_wm_enabled) {
> + dev_priv->display.params.enable_fbc && !merged->fbc_wm_enabled) {
> for (level = 2; level < num_levels; level++) {
> struct intel_wm_level *wm = &merged->wm[level];
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 11ee73a98b5b..330613cd64db 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -27,6 +27,10 @@ static struct intel_display_params intel_display_modparams __read_mostly = {
> * debugfs mode to 0.
> */
>
> +intel_display_param_named_unsafe(enable_fbc, int, 0400,
> + "Enable frame buffer compression for power savings "
> + "(default: -1 (use per-chip default))");
> +
> __maybe_unused
> static void _param_print_bool(struct drm_printer *p, const char *driver_name,
> const char *name, bool val)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index a0fb3e1aa2f5..f1bdf2c6e5cd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -21,7 +21,8 @@ struct drm_i915_private;
> * mode: debugfs file permissions, one of {0400, 0600, 0}, use 0 to not create
> * debugfs file
> */
> -#define INTEL_DISPLAY_PARAMS_FOR_EACH(param)
> +#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> + param(int, enable_fbc, -1, 0600) \
>
> #define MEMBER(T, member, ...) T member;
> struct intel_display_params {
> diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> index 4820d21cc942..bde12fe62275 100644
> --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> @@ -1174,7 +1174,7 @@ static int intel_fbc_check_plane(struct intel_atomic_state *state,
> return 0;
> }
>
> - if (!i915->params.enable_fbc) {
> + if (!i915->display.params.enable_fbc) {
> plane_state->no_fbc_reason = "disabled per module param or by default";
> return 0;
> }
> @@ -1751,8 +1751,8 @@ void intel_fbc_handle_fifo_underrun_irq(struct drm_i915_private *i915)
> */
> static int intel_sanitize_fbc_option(struct drm_i915_private *i915)
> {
> - if (i915->params.enable_fbc >= 0)
> - return !!i915->params.enable_fbc;
> + if (i915->display.params.enable_fbc >= 0)
> + return !!i915->display.params.enable_fbc;
It was like this before your change, but just as a side-comment, it
would e simpler to just return true here, because !!enable_fbc will
always be true here.
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 04/24] drm/i915/display: Move psr related module parameters under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (2 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 03/24] drm/i915/display: Move enable_fbc module parameter under display Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 11:02 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 05/24] drm/i915/display: Move vbt_firmware module parameter " Jouni Högander
` (23 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
.../gpu/drm/i915/display/intel_display_params.c | 15 +++++++++++++++
.../gpu/drm/i915/display/intel_display_params.h | 5 +++++
drivers/gpu/drm/i915/display/intel_psr.c | 14 +++++++-------
drivers/gpu/drm/i915/i915_params.c | 15 ---------------
drivers/gpu/drm/i915/i915_params.h | 3 ---
5 files changed, 27 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 330613cd64db..eac82deede4c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -31,6 +31,21 @@ intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
+intel_display_param_named_unsafe(enable_psr, int, 0400,
+ "Enable PSR "
+ "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
+ "Default: -1 (use per-chip default)");
+
+intel_display_param_named(psr_safest_params, bool, 0400,
+ "Replace PSR VBT parameters by the safest and not optimal ones. This "
+ "is helpful to detect if PSR issues are related to bad values set in "
+ " VBT. (0=use VBT parameters, 1=use safest parameters)");
+
+intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
+ "Enable PSR2 selective fetch "
+ "(0=disabled, 1=enabled) "
+ "Default: 0");
+
__maybe_unused
static void _param_print_bool(struct drm_printer *p, const char *driver_name,
const char *name, bool val)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index f1bdf2c6e5cd..99b79bed9363 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -6,6 +6,8 @@
#ifndef _INTEL_DISPLAY_PARAMS_H_
#define _INTEL_DISPLAY_PARAMS_H_
+#include <linux/types.h>
+
struct drm_printer;
struct drm_i915_private;
@@ -23,6 +25,9 @@ struct drm_i915_private;
*/
#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
param(int, enable_fbc, -1, 0600) \
+ param(int, enable_psr, -1, 0600) \
+ param(bool, psr_safest_params, false, 0400) \
+ param(bool, enable_psr2_sel_fetch, true, 0400) \
#define MEMBER(T, member, ...) T member;
struct intel_display_params {
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 4f1f31fc9529..ecd24a0b86cb 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -179,9 +179,9 @@ static bool psr_global_enabled(struct intel_dp *intel_dp)
switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
case I915_PSR_DEBUG_DEFAULT:
- if (i915->params.enable_psr == -1)
+ if (i915->display.params.enable_psr == -1)
return connector->panel.vbt.psr.enable;
- return i915->params.enable_psr;
+ return i915->display.params.enable_psr;
case I915_PSR_DEBUG_DISABLE:
return false;
default:
@@ -198,7 +198,7 @@ static bool psr2_global_enabled(struct intel_dp *intel_dp)
case I915_PSR_DEBUG_FORCE_PSR1:
return false;
default:
- if (i915->params.enable_psr == 1)
+ if (i915->display.params.enable_psr == 1)
return false;
return true;
}
@@ -606,7 +606,7 @@ static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp)
if (DISPLAY_VER(dev_priv) >= 11)
val |= EDP_PSR_TP4_TIME_0us;
- if (dev_priv->params.psr_safest_params) {
+ if (dev_priv->display.params.psr_safest_params) {
val |= EDP_PSR_TP1_TIME_2500us;
val |= EDP_PSR_TP2_TP3_TIME_2500us;
goto check_tp3_sel;
@@ -700,7 +700,7 @@ static u32 intel_psr2_get_tp_time(struct intel_dp *intel_dp)
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
u32 val = 0;
- if (dev_priv->params.psr_safest_params)
+ if (dev_priv->display.params.psr_safest_params)
return EDP_PSR2_TP2_TIME_2500us;
if (connector->panel.vbt.psr.psr2_tp2_tp3_wakeup_time_us >= 0 &&
@@ -943,7 +943,7 @@ static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp,
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
- if (!dev_priv->params.enable_psr2_sel_fetch &&
+ if (!dev_priv->display.params.enable_psr2_sel_fetch &&
intel_dp->psr.debug != I915_PSR_DEBUG_ENABLE_SEL_FETCH) {
drm_dbg_kms(&dev_priv->drm,
"PSR2 sel fetch not enabled, disabled by parameter\n");
@@ -1056,7 +1056,7 @@ static bool _compute_psr2_wake_times(struct intel_dp *intel_dp,
fast_wake_lines > max_wake_lines)
return false;
- if (i915->params.psr_safest_params)
+ if (i915->display.params.psr_safest_params)
io_wake_lines = fast_wake_lines = max_wake_lines;
/* According to Bspec lower limit should be set as 7 lines. */
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 42700b854b79..c65e3314ae48 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -102,21 +102,6 @@ i915_param_named_unsafe(enable_hangcheck, bool, 0400,
"WARNING: Disabling this can cause system wide hangs. "
"(default: true)");
-i915_param_named_unsafe(enable_psr, int, 0400,
- "Enable PSR "
- "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
- "Default: -1 (use per-chip default)");
-
-i915_param_named(psr_safest_params, bool, 0400,
- "Replace PSR VBT parameters by the safest and not optimal ones. This "
- "is helpful to detect if PSR issues are related to bad values set in "
- " VBT. (0=use VBT parameters, 1=use safest parameters)");
-
-i915_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
- "Enable PSR2 selective fetch "
- "(0=disabled, 1=enabled) "
- "Default: 0");
-
i915_param_named_unsafe(enable_sagv, bool, 0600,
"Enable system agent voltage/frequency scaling (SAGV) (default: true)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index e674de29f92c..47a05c4a8e89 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -52,10 +52,7 @@ struct drm_printer;
param(int, panel_use_ssc, -1, 0600) \
param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
- param(int, enable_psr, -1, 0600) \
param(bool, enable_dpt, true, 0400) \
- param(bool, psr_safest_params, false, 0400) \
- param(bool, enable_psr2_sel_fetch, true, 0400) \
param(bool, enable_sagv, true, 0600) \
param(int, disable_power_well, -1, 0400) \
param(int, enable_ips, 1, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 04/24] drm/i915/display: Move psr related module parameters under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 04/24] drm/i915/display: Move psr related module parameters " Jouni Högander
@ 2023-10-23 11:02 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 11:02 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> .../gpu/drm/i915/display/intel_display_params.c | 15 +++++++++++++++
> .../gpu/drm/i915/display/intel_display_params.h | 5 +++++
> drivers/gpu/drm/i915/display/intel_psr.c | 14 +++++++-------
> drivers/gpu/drm/i915/i915_params.c | 15 ---------------
> drivers/gpu/drm/i915/i915_params.h | 3 ---
> 5 files changed, 27 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 330613cd64db..eac82deede4c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -31,6 +31,21 @@ intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
>
> +intel_display_param_named_unsafe(enable_psr, int, 0400,
> + "Enable PSR "
> + "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> + "Default: -1 (use per-chip default)");
> +
> +intel_display_param_named(psr_safest_params, bool, 0400,
> + "Replace PSR VBT parameters by the safest and not optimal ones. This "
> + "is helpful to detect if PSR issues are related to bad values set in "
> + " VBT. (0=use VBT parameters, 1=use safest parameters)");
You don't say that the default here is 0.
> +
> +intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
> + "Enable PSR2 selective fetch "
> + "(0=disabled, 1=enabled) "
> + "Default: 0");
> +
And here you say the default is 0, but...
> __maybe_unused
> static void _param_print_bool(struct drm_printer *p, const char *driver_name,
> const char *name, bool val)
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index f1bdf2c6e5cd..99b79bed9363 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -6,6 +6,8 @@
> #ifndef _INTEL_DISPLAY_PARAMS_H_
> #define _INTEL_DISPLAY_PARAMS_H_
>
> +#include <linux/types.h>
> +
> struct drm_printer;
> struct drm_i915_private;
>
> @@ -23,6 +25,9 @@ struct drm_i915_private;
> */
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> param(int, enable_fbc, -1, 0600) \
> + param(int, enable_psr, -1, 0600) \
> + param(bool, psr_safest_params, false, 0400) \
> + param(bool, enable_psr2_sel_fetch, true, 0400) \
...it's actually true.
>
> #define MEMBER(T, member, ...) T member;
> struct intel_display_params {
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4f1f31fc9529..ecd24a0b86cb 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -179,9 +179,9 @@ static bool psr_global_enabled(struct intel_dp *intel_dp)
>
> switch (intel_dp->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
> case I915_PSR_DEBUG_DEFAULT:
> - if (i915->params.enable_psr == -1)
> + if (i915->display.params.enable_psr == -1)
> return connector->panel.vbt.psr.enable;
> - return i915->params.enable_psr;
> + return i915->display.params.enable_psr;
> case I915_PSR_DEBUG_DISABLE:
> return false;
> default:
> @@ -198,7 +198,7 @@ static bool psr2_global_enabled(struct intel_dp *intel_dp)
> case I915_PSR_DEBUG_FORCE_PSR1:
> return false;
> default:
> - if (i915->params.enable_psr == 1)
> + if (i915->display.params.enable_psr == 1)
> return false;
> return true;
> }
> @@ -606,7 +606,7 @@ static u32 intel_psr1_get_tp_time(struct intel_dp *intel_dp)
> if (DISPLAY_VER(dev_priv) >= 11)
> val |= EDP_PSR_TP4_TIME_0us;
>
> - if (dev_priv->params.psr_safest_params) {
> + if (dev_priv->display.params.psr_safest_params) {
> val |= EDP_PSR_TP1_TIME_2500us;
> val |= EDP_PSR_TP2_TP3_TIME_2500us;
> goto check_tp3_sel;
> @@ -700,7 +700,7 @@ static u32 intel_psr2_get_tp_time(struct intel_dp *intel_dp)
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> u32 val = 0;
>
> - if (dev_priv->params.psr_safest_params)
> + if (dev_priv->display.params.psr_safest_params)
> return EDP_PSR2_TP2_TIME_2500us;
>
> if (connector->panel.vbt.psr.psr2_tp2_tp3_wakeup_time_us >= 0 &&
> @@ -943,7 +943,7 @@ static bool intel_psr2_sel_fetch_config_valid(struct intel_dp *intel_dp,
> {
> struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>
> - if (!dev_priv->params.enable_psr2_sel_fetch &&
> + if (!dev_priv->display.params.enable_psr2_sel_fetch &&
> intel_dp->psr.debug != I915_PSR_DEBUG_ENABLE_SEL_FETCH) {
> drm_dbg_kms(&dev_priv->drm,
> "PSR2 sel fetch not enabled, disabled by parameter\n");
> @@ -1056,7 +1056,7 @@ static bool _compute_psr2_wake_times(struct intel_dp *intel_dp,
> fast_wake_lines > max_wake_lines)
> return false;
>
> - if (i915->params.psr_safest_params)
> + if (i915->display.params.psr_safest_params)
> io_wake_lines = fast_wake_lines = max_wake_lines;
>
> /* According to Bspec lower limit should be set as 7 lines. */
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 42700b854b79..c65e3314ae48 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -102,21 +102,6 @@ i915_param_named_unsafe(enable_hangcheck, bool, 0400,
> "WARNING: Disabling this can cause system wide hangs. "
> "(default: true)");
>
> -i915_param_named_unsafe(enable_psr, int, 0400,
> - "Enable PSR "
> - "(0=disabled, 1=enable up to PSR1, 2=enable up to PSR2) "
> - "Default: -1 (use per-chip default)");
> -
> -i915_param_named(psr_safest_params, bool, 0400,
> - "Replace PSR VBT parameters by the safest and not optimal ones. This "
> - "is helpful to detect if PSR issues are related to bad values set in "
> - " VBT. (0=use VBT parameters, 1=use safest parameters)");
> -
> -i915_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
> - "Enable PSR2 selective fetch "
> - "(0=disabled, 1=enabled) "
> - "Default: 0");
> -
> i915_param_named_unsafe(enable_sagv, bool, 0600,
> "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
>
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index e674de29f92c..47a05c4a8e89 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -52,10 +52,7 @@ struct drm_printer;
> param(int, panel_use_ssc, -1, 0600) \
> param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_dc, -1, 0400) \
> - param(int, enable_psr, -1, 0600) \
> param(bool, enable_dpt, true, 0400) \
> - param(bool, psr_safest_params, false, 0400) \
> - param(bool, enable_psr2_sel_fetch, true, 0400) \
I can see that it was wrong already before, but better fix it while at
it.
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 05/24] drm/i915/display: Move vbt_firmware module parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (3 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 04/24] drm/i915/display: Move psr related module parameters " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 12:14 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 06/24] drm/i915/display: Move lvds_channel_mode " Jouni Högander
` (22 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index eac82deede4c..72f1782e27fe 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -27,6 +27,9 @@ static struct intel_display_params intel_display_modparams __read_mostly = {
* debugfs mode to 0.
*/
+intel_display_param_named_unsafe(vbt_firmware, charp, 0400,
+ "Load VBT from specified file under /lib/firmware");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 99b79bed9363..a6f37c55523d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -24,6 +24,7 @@ struct drm_i915_private;
* debugfs file
*/
#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
+ param(char *, vbt_firmware, NULL, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
index 84078fb82b2f..1ce785db6a5e 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.c
+++ b/drivers/gpu/drm/i915/display/intel_opregion.c
@@ -841,7 +841,7 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
{
struct intel_opregion *opregion = &dev_priv->display.opregion;
const struct firmware *fw = NULL;
- const char *name = dev_priv->params.vbt_firmware;
+ const char *name = dev_priv->display.params.vbt_firmware;
int ret;
if (!name || !*name)
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index c65e3314ae48..9d0535d774c9 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -87,9 +87,6 @@ i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
i915_param_named_unsafe(reset, uint, 0400,
"Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])");
-i915_param_named_unsafe(vbt_firmware, charp, 0400,
- "Load VBT from specified file under /lib/firmware");
-
#if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
i915_param_named(error_capture, bool, 0400,
"Record the GPU state following a hang. "
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 47a05c4a8e89..37a1d31a233c 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -46,7 +46,6 @@ struct drm_printer;
* debugfs file
*/
#define I915_PARAMS_FOR_EACH(param) \
- param(char *, vbt_firmware, NULL, 0400) \
param(int, modeset, -1, 0400) \
param(int, lvds_channel_mode, 0, 0400) \
param(int, panel_use_ssc, -1, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 05/24] drm/i915/display: Move vbt_firmware module parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 05/24] drm/i915/display: Move vbt_firmware module parameter " Jouni Högander
@ 2023-10-23 12:14 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 12:14 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_opregion.c | 2 +-
> drivers/gpu/drm/i915/i915_params.c | 3 ---
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index eac82deede4c..72f1782e27fe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -27,6 +27,9 @@ static struct intel_display_params intel_display_modparams __read_mostly = {
> * debugfs mode to 0.
> */
>
> +intel_display_param_named_unsafe(vbt_firmware, charp, 0400,
> + "Load VBT from specified file under /lib/firmware");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 99b79bed9363..a6f37c55523d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -24,6 +24,7 @@ struct drm_i915_private;
> * debugfs file
> */
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> + param(char *, vbt_firmware, NULL, 0400) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_opregion.c b/drivers/gpu/drm/i915/display/intel_opregion.c
> index 84078fb82b2f..1ce785db6a5e 100644
> --- a/drivers/gpu/drm/i915/display/intel_opregion.c
> +++ b/drivers/gpu/drm/i915/display/intel_opregion.c
> @@ -841,7 +841,7 @@ static int intel_load_vbt_firmware(struct drm_i915_private *dev_priv)
> {
> struct intel_opregion *opregion = &dev_priv->display.opregion;
> const struct firmware *fw = NULL;
> - const char *name = dev_priv->params.vbt_firmware;
> + const char *name = dev_priv->display.params.vbt_firmware;
> int ret;
>
> if (!name || !*name)
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index c65e3314ae48..9d0535d774c9 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -87,9 +87,6 @@ i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
> i915_param_named_unsafe(reset, uint, 0400,
> "Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])");
>
> -i915_param_named_unsafe(vbt_firmware, charp, 0400,
> - "Load VBT from specified file under /lib/firmware");
> -
> #if IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR)
> i915_param_named(error_capture, bool, 0400,
> "Record the GPU state following a hang. "
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index 47a05c4a8e89..37a1d31a233c 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -46,7 +46,6 @@ struct drm_printer;
> * debugfs file
> */
> #define I915_PARAMS_FOR_EACH(param) \
> - param(char *, vbt_firmware, NULL, 0400) \
> param(int, modeset, -1, 0400) \
> param(int, lvds_channel_mode, 0, 0400) \
> param(int, panel_use_ssc, -1, 0600) \
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 06/24] drm/i915/display: Move lvds_channel_mode module parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (4 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 05/24] drm/i915/display: Move vbt_firmware module parameter " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:13 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 07/24] drm/i915/display: Move panel_use_ssc " Jouni Högander
` (21 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 3 ++-
drivers/gpu/drm/i915/display/intel_lvds.c | 4 ++--
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 72f1782e27fe..cdc42bc575b8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -30,6 +30,10 @@ static struct intel_display_params intel_display_modparams __read_mostly = {
intel_display_param_named_unsafe(vbt_firmware, charp, 0400,
"Load VBT from specified file under /lib/firmware");
+intel_display_param_named_unsafe(lvds_channel_mode, int, 0400,
+ "Specify LVDS channel mode "
+ "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index a6f37c55523d..a4988ef44837 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -25,7 +25,8 @@ struct drm_i915_private;
*/
#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
param(char *, vbt_firmware, NULL, 0400) \
- param(int, enable_fbc, -1, 0600) \
+ param(int, lvds_channel_mode, 0, 0400) \
+ param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
param(bool, enable_psr2_sel_fetch, true, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_lvds.c b/drivers/gpu/drm/i915/display/intel_lvds.c
index 2a4ca7e65775..4b114fde57b1 100644
--- a/drivers/gpu/drm/i915/display/intel_lvds.c
+++ b/drivers/gpu/drm/i915/display/intel_lvds.c
@@ -794,8 +794,8 @@ static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
unsigned int val;
/* use the module option value if specified */
- if (i915->params.lvds_channel_mode > 0)
- return i915->params.lvds_channel_mode == 2;
+ if (i915->display.params.lvds_channel_mode > 0)
+ return i915->display.params.lvds_channel_mode == 2;
/* single channel LVDS is limited to 112 MHz */
if (fixed_mode->clock > 112999)
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 9d0535d774c9..ea55cc2c4854 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
-i915_param_named_unsafe(lvds_channel_mode, int, 0400,
- "Specify LVDS channel mode "
- "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
-
i915_param_named_unsafe(panel_use_ssc, int, 0400,
"Use Spread Spectrum Clock with panels [LVDS/eDP] "
"(default: auto from VBT)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 37a1d31a233c..03ec2c2b589d 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, lvds_channel_mode, 0, 0400) \
param(int, panel_use_ssc, -1, 0600) \
param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 06/24] drm/i915/display: Move lvds_channel_mode module parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 06/24] drm/i915/display: Move lvds_channel_mode " Jouni Högander
@ 2023-10-23 13:13 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:13 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
> drivers/gpu/drm/i915/display/intel_display_params.h | 3 ++-
> drivers/gpu/drm/i915/display/intel_lvds.c | 4 ++--
> drivers/gpu/drm/i915/i915_params.c | 4 ----
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 72f1782e27fe..cdc42bc575b8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -30,6 +30,10 @@ static struct intel_display_params intel_display_modparams __read_mostly = {
> intel_display_param_named_unsafe(vbt_firmware, charp, 0400,
> "Load VBT from specified file under /lib/firmware");
>
> +intel_display_param_named_unsafe(lvds_channel_mode, int, 0400,
> + "Specify LVDS channel mode "
> + "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index a6f37c55523d..a4988ef44837 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -25,7 +25,8 @@ struct drm_i915_private;
> */
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> param(char *, vbt_firmware, NULL, 0400) \
> - param(int, enable_fbc, -1, 0600) \
> + param(int, lvds_channel_mode, 0, 0400) \
> + param(int, enable_fbc, -1, 0600) \
The enable_fbc line shouldn't be changed here. Was there some missing
spaces? If so, it should be fixed in the patch that added enable_fbc.
With this fixed:
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 07/24] drm/i915/display: Move panel_use_ssc module parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (5 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 06/24] drm/i915/display: Move lvds_channel_mode " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:15 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 08/24] drm/i915/display: Move vbt_sdvo_panel_type " Jouni Högander
` (20 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_panel.c | 4 ++--
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index cdc42bc575b8..e25d70653c0f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -34,6 +34,10 @@ intel_display_param_named_unsafe(lvds_channel_mode, int, 0400,
"Specify LVDS channel mode "
"(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
+intel_display_param_named_unsafe(panel_use_ssc, int, 0400,
+ "Use Spread Spectrum Clock with panels [LVDS/eDP] "
+ "(default: auto from VBT)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index a4988ef44837..4b326baf146f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -26,6 +26,7 @@ struct drm_i915_private;
#define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
param(char *, vbt_firmware, NULL, 0400) \
param(int, lvds_channel_mode, 0, 0400) \
+ param(int, panel_use_ssc, -1, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
index 483beedac5b8..0d8e5320a4f8 100644
--- a/drivers/gpu/drm/i915/display/intel_panel.c
+++ b/drivers/gpu/drm/i915/display/intel_panel.c
@@ -46,8 +46,8 @@
bool intel_panel_use_ssc(struct drm_i915_private *i915)
{
- if (i915->params.panel_use_ssc >= 0)
- return i915->params.panel_use_ssc != 0;
+ if (i915->display.params.panel_use_ssc >= 0)
+ return i915->display.params.panel_use_ssc != 0;
return i915->display.vbt.lvds_use_ssc &&
!intel_has_quirk(i915, QUIRK_LVDS_SSC_DISABLE);
}
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index ea55cc2c4854..4123424b2c2e 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
-i915_param_named_unsafe(panel_use_ssc, int, 0400,
- "Use Spread Spectrum Clock with panels [LVDS/eDP] "
- "(default: auto from VBT)");
-
i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
"Override/Ignore selection of SDVO panel mode in the VBT "
"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 03ec2c2b589d..0bd365889e73 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, panel_use_ssc, -1, 0600) \
param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
param(bool, enable_dpt, true, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 07/24] drm/i915/display: Move panel_use_ssc module parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 07/24] drm/i915/display: Move panel_use_ssc " Jouni Högander
@ 2023-10-23 13:15 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:15 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_panel.c | 4 ++--
> drivers/gpu/drm/i915/i915_params.c | 4 ----
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index cdc42bc575b8..e25d70653c0f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -34,6 +34,10 @@ intel_display_param_named_unsafe(lvds_channel_mode, int, 0400,
> "Specify LVDS channel mode "
> "(0=probe BIOS [default], 1=single-channel, 2=dual-channel)");
>
> +intel_display_param_named_unsafe(panel_use_ssc, int, 0400,
> + "Use Spread Spectrum Clock with panels [LVDS/eDP] "
> + "(default: auto from VBT)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index a4988ef44837..4b326baf146f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -26,6 +26,7 @@ struct drm_i915_private;
> #define INTEL_DISPLAY_PARAMS_FOR_EACH(param) \
> param(char *, vbt_firmware, NULL, 0400) \
> param(int, lvds_channel_mode, 0, 0400) \
> + param(int, panel_use_ssc, -1, 0600) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_panel.c b/drivers/gpu/drm/i915/display/intel_panel.c
> index 483beedac5b8..0d8e5320a4f8 100644
> --- a/drivers/gpu/drm/i915/display/intel_panel.c
> +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> @@ -46,8 +46,8 @@
>
> bool intel_panel_use_ssc(struct drm_i915_private *i915)
> {
> - if (i915->params.panel_use_ssc >= 0)
> - return i915->params.panel_use_ssc != 0;
> + if (i915->display.params.panel_use_ssc >= 0)
> + return i915->display.params.panel_use_ssc != 0;
> return i915->display.vbt.lvds_use_ssc &&
> !intel_has_quirk(i915, QUIRK_LVDS_SSC_DISABLE);
> }
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index ea55cc2c4854..4123424b2c2e 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
> "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
> "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
>
> -i915_param_named_unsafe(panel_use_ssc, int, 0400,
> - "Use Spread Spectrum Clock with panels [LVDS/eDP] "
> - "(default: auto from VBT)");
> -
> i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
> "Override/Ignore selection of SDVO panel mode in the VBT "
> "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index 03ec2c2b589d..0bd365889e73 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, panel_use_ssc, -1, 0600) \
> param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 08/24] drm/i915/display: Move vbt_sdvo_panel_type module parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (6 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 07/24] drm/i915/display: Move panel_use_ssc " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:17 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 09/24] drm/i915/display: Move enable_dc " Jouni Högander
` (19 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 4e8f1e91bb08..70c0491aac42 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1116,7 +1116,7 @@ parse_sdvo_panel_data(struct drm_i915_private *i915,
struct drm_display_mode *panel_fixed_mode;
int index;
- index = i915->params.vbt_sdvo_panel_type;
+ index = i915->display.params.vbt_sdvo_panel_type;
if (index == -2) {
drm_dbg_kms(&i915->drm,
"Ignore SDVO panel mode from BIOS VBT tables.\n");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index e25d70653c0f..6a5be37ec3af 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -38,6 +38,10 @@ intel_display_param_named_unsafe(panel_use_ssc, int, 0400,
"Use Spread Spectrum Clock with panels [LVDS/eDP] "
"(default: auto from VBT)");
+intel_display_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
+ "Override/Ignore selection of SDVO panel mode in the VBT "
+ "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 4b326baf146f..c40a3cd57ffc 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -27,6 +27,7 @@ struct drm_i915_private;
param(char *, vbt_firmware, NULL, 0400) \
param(int, lvds_channel_mode, 0, 0400) \
param(int, panel_use_ssc, -1, 0600) \
+ param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 4123424b2c2e..d0abcbd526a7 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
-i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
- "Override/Ignore selection of SDVO panel mode in the VBT "
- "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
-
i915_param_named_unsafe(reset, uint, 0400,
"Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 0bd365889e73..1ea332dfbb5d 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
param(bool, enable_dpt, true, 0400) \
param(bool, enable_sagv, true, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 08/24] drm/i915/display: Move vbt_sdvo_panel_type module parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 08/24] drm/i915/display: Move vbt_sdvo_panel_type " Jouni Högander
@ 2023-10-23 13:17 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:17 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 4 ----
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 4e8f1e91bb08..70c0491aac42 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1116,7 +1116,7 @@ parse_sdvo_panel_data(struct drm_i915_private *i915,
> struct drm_display_mode *panel_fixed_mode;
> int index;
>
> - index = i915->params.vbt_sdvo_panel_type;
> + index = i915->display.params.vbt_sdvo_panel_type;
> if (index == -2) {
> drm_dbg_kms(&i915->drm,
> "Ignore SDVO panel mode from BIOS VBT tables.\n");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index e25d70653c0f..6a5be37ec3af 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -38,6 +38,10 @@ intel_display_param_named_unsafe(panel_use_ssc, int, 0400,
> "Use Spread Spectrum Clock with panels [LVDS/eDP] "
> "(default: auto from VBT)");
>
> +intel_display_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
> + "Override/Ignore selection of SDVO panel mode in the VBT "
> + "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 4b326baf146f..c40a3cd57ffc 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -27,6 +27,7 @@ struct drm_i915_private;
> param(char *, vbt_firmware, NULL, 0400) \
> param(int, lvds_channel_mode, 0, 0400) \
> param(int, panel_use_ssc, -1, 0600) \
> + param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 4123424b2c2e..d0abcbd526a7 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -72,10 +72,6 @@ i915_param_named_unsafe(enable_dc, int, 0400,
> "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
> "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
>
> -i915_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
> - "Override/Ignore selection of SDVO panel mode in the VBT "
> - "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
> -
> i915_param_named_unsafe(reset, uint, 0400,
> "Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])");
>
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index 0bd365889e73..1ea332dfbb5d 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 09/24] drm/i915/display: Move enable_dc module parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (7 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 08/24] drm/i915/display: Move vbt_sdvo_panel_type " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:18 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 10/24] drm/i915/display: Move enable_dpt " Jouni Högander
` (18 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 5 +++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
drivers/gpu/drm/i915/i915_params.c | 5 -----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 6a5be37ec3af..7a528e72c970 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -42,6 +42,11 @@ intel_display_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
"Override/Ignore selection of SDVO panel mode in the VBT "
"(-2=ignore, -1=auto [default], index in VBT BIOS table)");
+intel_display_param_named_unsafe(enable_dc, int, 0400,
+ "Enable power-saving display C-states. "
+ "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
+ "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index c40a3cd57ffc..8721179b3f09 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -28,6 +28,7 @@ struct drm_i915_private;
param(int, lvds_channel_mode, 0, 0400) \
param(int, panel_use_ssc, -1, 0600) \
param(int, vbt_sdvo_panel_type, -1, 0400) \
+ param(int, enable_dc, -1, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index e25785ae1c20..4832eb8da080 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -1020,7 +1020,7 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
sanitize_disable_power_well_option(dev_priv,
dev_priv->params.disable_power_well);
power_domains->allowed_dc_mask =
- get_allowed_dc_mask(dev_priv, dev_priv->params.enable_dc);
+ get_allowed_dc_mask(dev_priv, dev_priv->display.params.enable_dc);
power_domains->target_dc_state =
sanitize_target_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6);
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index d0abcbd526a7..3d370e43df3c 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -67,11 +67,6 @@ i915_param_named(modeset, int, 0400,
"Use kernel modesetting [KMS] (0=disable, "
"1=on, -1=force vga console preference [default])");
-i915_param_named_unsafe(enable_dc, int, 0400,
- "Enable power-saving display C-states. "
- "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
- "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
-
i915_param_named_unsafe(reset, uint, 0400,
"Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 1ea332dfbb5d..c3487b9d6937 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, enable_dc, -1, 0400) \
param(bool, enable_dpt, true, 0400) \
param(bool, enable_sagv, true, 0600) \
param(int, disable_power_well, -1, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 09/24] drm/i915/display: Move enable_dc module parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 09/24] drm/i915/display: Move enable_dc " Jouni Högander
@ 2023-10-23 13:18 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:18 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 5 +++++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_display_power.c | 2 +-
> drivers/gpu/drm/i915/i915_params.c | 5 -----
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 6a5be37ec3af..7a528e72c970 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -42,6 +42,11 @@ intel_display_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
> "Override/Ignore selection of SDVO panel mode in the VBT "
> "(-2=ignore, -1=auto [default], index in VBT BIOS table)");
>
> +intel_display_param_named_unsafe(enable_dc, int, 0400,
> + "Enable power-saving display C-states. "
> + "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
> + "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index c40a3cd57ffc..8721179b3f09 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -28,6 +28,7 @@ struct drm_i915_private;
> param(int, lvds_channel_mode, 0, 0400) \
> param(int, panel_use_ssc, -1, 0600) \
> param(int, vbt_sdvo_panel_type, -1, 0400) \
> + param(int, enable_dc, -1, 0400) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index e25785ae1c20..4832eb8da080 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1020,7 +1020,7 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
> sanitize_disable_power_well_option(dev_priv,
> dev_priv->params.disable_power_well);
> power_domains->allowed_dc_mask =
> - get_allowed_dc_mask(dev_priv, dev_priv->params.enable_dc);
> + get_allowed_dc_mask(dev_priv, dev_priv->display.params.enable_dc);
>
> power_domains->target_dc_state =
> sanitize_target_dc_state(dev_priv, DC_STATE_EN_UPTO_DC6);
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index d0abcbd526a7..3d370e43df3c 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -67,11 +67,6 @@ i915_param_named(modeset, int, 0400,
> "Use kernel modesetting [KMS] (0=disable, "
> "1=on, -1=force vga console preference [default])");
>
> -i915_param_named_unsafe(enable_dc, int, 0400,
> - "Enable power-saving display C-states. "
> - "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
> - "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
> -
> i915_param_named_unsafe(reset, uint, 0400,
> "Attempt GPU resets (0=disabled, 1=full gpu reset, 2=engine reset [default])");
>
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index 1ea332dfbb5d..c3487b9d6937 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
> param(int, disable_power_well, -1, 0400) \
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 10/24] drm/i915/display: Move enable_dpt module parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (8 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 09/24] drm/i915/display: Move enable_dc " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:19 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 11/24] drm/i915/display: Move enable_sagv " Jouni Högander
` (17 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dpt.c | 6 ++++--
drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
drivers/gpu/drm/i915/display/skl_universal_plane.c | 2 +-
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
7 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 7a528e72c970..8f222b5bfd8d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -47,6 +47,9 @@ intel_display_param_named_unsafe(enable_dc, int, 0400,
"(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
"3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
+intel_display_param_named_unsafe(enable_dpt, bool, 0400,
+ "Enable display page table (DPT) (default: true)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 8721179b3f09..c67ed16670c3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -29,6 +29,7 @@ struct drm_i915_private;
param(int, panel_use_ssc, -1, 0600) \
param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
+ param(bool, enable_dpt, true, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c
index 48582b31b7f7..2b067cb952f0 100644
--- a/drivers/gpu/drm/i915/display/intel_dpt.c
+++ b/drivers/gpu/drm/i915/display/intel_dpt.c
@@ -332,11 +332,13 @@ void intel_dpt_configure(struct intel_crtc *crtc)
intel_de_rmw(i915, PLANE_CHICKEN(pipe, plane_id),
PLANE_CHICKEN_DISABLE_DPT,
- i915->params.enable_dpt ? 0 : PLANE_CHICKEN_DISABLE_DPT);
+ i915->display.params.enable_dpt ? 0 :
+ PLANE_CHICKEN_DISABLE_DPT);
}
} else if (DISPLAY_VER(i915) == 13) {
intel_de_rmw(i915, CHICKEN_MISC_2,
CHICKEN_MISC_DISABLE_DPT,
- i915->params.enable_dpt ? 0 : CHICKEN_MISC_DISABLE_DPT);
+ i915->display.params.enable_dpt ? 0 :
+ CHICKEN_MISC_DISABLE_DPT);
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
index 19b35ece31f1..9a48eb7dcf8b 100644
--- a/drivers/gpu/drm/i915/display/intel_fb.c
+++ b/drivers/gpu/drm/i915/display/intel_fb.c
@@ -764,7 +764,7 @@ bool intel_fb_modifier_uses_dpt(struct drm_i915_private *i915, u64 modifier)
bool intel_fb_uses_dpt(const struct drm_framebuffer *fb)
{
- return fb && to_i915(fb->dev)->params.enable_dpt &&
+ return fb && to_i915(fb->dev)->display.params.enable_dpt &&
intel_fb_modifier_uses_dpt(to_i915(fb->dev), fb->modifier);
}
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 245a64332cc7..6fb5612bff2b 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -2489,7 +2489,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
goto error;
}
- if (!dev_priv->params.enable_dpt &&
+ if (!dev_priv->display.params.enable_dpt &&
intel_fb_modifier_uses_dpt(dev_priv, fb->modifier)) {
drm_dbg_kms(&dev_priv->drm, "DPT disabled, skipping initial FB\n");
goto error;
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 3d370e43df3c..773a0a709fc6 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -95,9 +95,6 @@ i915_param_named_unsafe(disable_power_well, int, 0400,
i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
-i915_param_named_unsafe(enable_dpt, bool, 0400,
- "Enable display page table (DPT) (default: true)");
-
i915_param_named_unsafe(load_detect_test, bool, 0400,
"Force-enable the VGA load detect code for testing (default:false). "
"For developers only.");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index c3487b9d6937..b8728990cb8b 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(bool, enable_dpt, true, 0400) \
param(bool, enable_sagv, true, 0600) \
param(int, disable_power_well, -1, 0400) \
param(int, enable_ips, 1, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 10/24] drm/i915/display: Move enable_dpt module parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 10/24] drm/i915/display: Move enable_dpt " Jouni Högander
@ 2023-10-23 13:19 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:19 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_dpt.c | 6 ++++--
> drivers/gpu/drm/i915/display/intel_fb.c | 2 +-
> drivers/gpu/drm/i915/display/skl_universal_plane.c | 2 +-
> drivers/gpu/drm/i915/i915_params.c | 3 ---
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 7 files changed, 10 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 7a528e72c970..8f222b5bfd8d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -47,6 +47,9 @@ intel_display_param_named_unsafe(enable_dc, int, 0400,
> "(-1=auto [default]; 0=disable; 1=up to DC5; 2=up to DC6; "
> "3=up to DC5 with DC3CO; 4=up to DC6 with DC3CO)");
>
> +intel_display_param_named_unsafe(enable_dpt, bool, 0400,
> + "Enable display page table (DPT) (default: true)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 8721179b3f09..c67ed16670c3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -29,6 +29,7 @@ struct drm_i915_private;
> param(int, panel_use_ssc, -1, 0600) \
> param(int, vbt_sdvo_panel_type, -1, 0400) \
> param(int, enable_dc, -1, 0400) \
> + param(bool, enable_dpt, true, 0400) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_dpt.c b/drivers/gpu/drm/i915/display/intel_dpt.c
> index 48582b31b7f7..2b067cb952f0 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpt.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpt.c
> @@ -332,11 +332,13 @@ void intel_dpt_configure(struct intel_crtc *crtc)
>
> intel_de_rmw(i915, PLANE_CHICKEN(pipe, plane_id),
> PLANE_CHICKEN_DISABLE_DPT,
> - i915->params.enable_dpt ? 0 : PLANE_CHICKEN_DISABLE_DPT);
> + i915->display.params.enable_dpt ? 0 :
> + PLANE_CHICKEN_DISABLE_DPT);
> }
> } else if (DISPLAY_VER(i915) == 13) {
> intel_de_rmw(i915, CHICKEN_MISC_2,
> CHICKEN_MISC_DISABLE_DPT,
> - i915->params.enable_dpt ? 0 : CHICKEN_MISC_DISABLE_DPT);
> + i915->display.params.enable_dpt ? 0 :
> + CHICKEN_MISC_DISABLE_DPT);
> }
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_fb.c b/drivers/gpu/drm/i915/display/intel_fb.c
> index 19b35ece31f1..9a48eb7dcf8b 100644
> --- a/drivers/gpu/drm/i915/display/intel_fb.c
> +++ b/drivers/gpu/drm/i915/display/intel_fb.c
> @@ -764,7 +764,7 @@ bool intel_fb_modifier_uses_dpt(struct drm_i915_private *i915, u64 modifier)
>
> bool intel_fb_uses_dpt(const struct drm_framebuffer *fb)
> {
> - return fb && to_i915(fb->dev)->params.enable_dpt &&
> + return fb && to_i915(fb->dev)->display.params.enable_dpt &&
> intel_fb_modifier_uses_dpt(to_i915(fb->dev), fb->modifier);
> }
>
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index 245a64332cc7..6fb5612bff2b 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -2489,7 +2489,7 @@ skl_get_initial_plane_config(struct intel_crtc *crtc,
> goto error;
> }
>
> - if (!dev_priv->params.enable_dpt &&
> + if (!dev_priv->display.params.enable_dpt &&
> intel_fb_modifier_uses_dpt(dev_priv, fb->modifier)) {
> drm_dbg_kms(&dev_priv->drm, "DPT disabled, skipping initial FB\n");
> goto error;
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 3d370e43df3c..773a0a709fc6 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -95,9 +95,6 @@ i915_param_named_unsafe(disable_power_well, int, 0400,
>
> i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
>
> -i915_param_named_unsafe(enable_dpt, bool, 0400,
> - "Enable display page table (DPT) (default: true)");
> -
> i915_param_named_unsafe(load_detect_test, bool, 0400,
> "Force-enable the VGA load detect code for testing (default:false). "
> "For developers only.");
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index c3487b9d6937..b8728990cb8b 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
> param(int, disable_power_well, -1, 0400) \
> param(int, enable_ips, 1, 0600) \
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 11/24] drm/i915/display: Move enable_sagv module parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (9 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 10/24] drm/i915/display: Move enable_dpt " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:22 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 12/24] drm/i915/display: Move disable_power_well " Jouni Högander
` (16 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/skl_watermark.c | 5 +++--
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 8f222b5bfd8d..efc311837ff1 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -50,6 +50,9 @@ intel_display_param_named_unsafe(enable_dc, int, 0400,
intel_display_param_named_unsafe(enable_dpt, bool, 0400,
"Enable display page table (DPT) (default: true)");
+intel_display_param_named_unsafe(enable_sagv, bool, 0600,
+ "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index c67ed16670c3..06e920c9aa36 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -30,6 +30,7 @@ struct drm_i915_private;
param(int, vbt_sdvo_panel_type, -1, 0400) \
param(int, enable_dc, -1, 0400) \
param(bool, enable_dpt, true, 0400) \
+ param(bool, enable_sagv, true, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 99b8ccdc3dfa..56588d6e24ae 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -412,7 +412,7 @@ static bool intel_crtc_can_enable_sagv(const struct intel_crtc_state *crtc_state
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
- if (!i915->params.enable_sagv)
+ if (!i915->display.params.enable_sagv)
return false;
if (DISPLAY_VER(i915) >= 12)
@@ -3702,7 +3702,8 @@ static int intel_sagv_status_show(struct seq_file *m, void *unused)
};
seq_printf(m, "SAGV available: %s\n", str_yes_no(intel_has_sagv(i915)));
- seq_printf(m, "SAGV modparam: %s\n", str_enabled_disabled(i915->params.enable_sagv));
+ seq_printf(m, "SAGV modparam: %s\n",
+ str_enabled_disabled(i915->display.params.enable_sagv));
seq_printf(m, "SAGV status: %s\n", sagv_status[i915->display.sagv.status]);
seq_printf(m, "SAGV block time: %d usec\n", i915->display.sagv.block_time_us);
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 773a0a709fc6..51e706f6e57e 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -82,9 +82,6 @@ i915_param_named_unsafe(enable_hangcheck, bool, 0400,
"WARNING: Disabling this can cause system wide hangs. "
"(default: true)");
-i915_param_named_unsafe(enable_sagv, bool, 0600,
- "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
-
i915_param_named_unsafe(force_probe, charp, 0400,
"Force probe options for specified supported devices. "
"See CONFIG_DRM_I915_FORCE_PROBE for details.");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index b8728990cb8b..066f15783580 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(bool, enable_sagv, true, 0600) \
param(int, disable_power_well, -1, 0400) \
param(int, enable_ips, 1, 0600) \
param(int, invert_brightness, 0, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 11/24] drm/i915/display: Move enable_sagv module parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 11/24] drm/i915/display: Move enable_sagv " Jouni Högander
@ 2023-10-23 13:22 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:22 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/skl_watermark.c | 5 +++--
> drivers/gpu/drm/i915/i915_params.c | 3 ---
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 8f222b5bfd8d..efc311837ff1 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -50,6 +50,9 @@ intel_display_param_named_unsafe(enable_dc, int, 0400,
> intel_display_param_named_unsafe(enable_dpt, bool, 0400,
> "Enable display page table (DPT) (default: true)");
>
> +intel_display_param_named_unsafe(enable_sagv, bool, 0600,
> + "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
> +
Shouldn't it be 0400 here?
With this fixed:
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 12/24] drm/i915/display: Move disable_power_well module parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (10 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 11/24] drm/i915/display: Move enable_sagv " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:23 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 13/24] drm/i915/display: Move enable_ips " Jouni Högander
` (15 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_display_power.c | 12 ++++++------
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index efc311837ff1..86b46cff1718 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -53,6 +53,10 @@ intel_display_param_named_unsafe(enable_dpt, bool, 0400,
intel_display_param_named_unsafe(enable_sagv, bool, 0600,
"Enable system agent voltage/frequency scaling (SAGV) (default: true)");
+intel_display_param_named_unsafe(disable_power_well, int, 0400,
+ "Disable display power wells when possible "
+ "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 06e920c9aa36..998f99a2857c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -31,6 +31,7 @@ struct drm_i915_private;
param(int, enable_dc, -1, 0400) \
param(bool, enable_dpt, true, 0400) \
param(bool, enable_sagv, true, 0600) \
+ param(int, disable_power_well, -1, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 4832eb8da080..e390595d7341 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -967,7 +967,7 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
DISPLAY_VER(dev_priv) >= 11 ?
DC_STATE_EN_DC9 : 0;
- if (!dev_priv->params.disable_power_well)
+ if (!dev_priv->display.params.disable_power_well)
max_dc = 0;
if (enable_dc >= 0 && enable_dc <= max_dc) {
@@ -1016,9 +1016,9 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
{
struct i915_power_domains *power_domains = &dev_priv->display.power.domains;
- dev_priv->params.disable_power_well =
+ dev_priv->display.params.disable_power_well =
sanitize_disable_power_well_option(dev_priv,
- dev_priv->params.disable_power_well);
+ dev_priv->display.params.disable_power_well);
power_domains->allowed_dc_mask =
get_allowed_dc_mask(dev_priv, dev_priv->display.params.enable_dc);
@@ -1950,7 +1950,7 @@ void intel_power_domains_init_hw(struct drm_i915_private *i915, bool resume)
intel_display_power_get(i915, POWER_DOMAIN_INIT);
/* Disable power support if the user asked so. */
- if (!i915->params.disable_power_well) {
+ if (!i915->display.params.disable_power_well) {
drm_WARN_ON(&i915->drm, power_domains->disable_wakeref);
i915->display.power.domains.disable_wakeref = intel_display_power_get(i915,
POWER_DOMAIN_INIT);
@@ -1977,7 +1977,7 @@ void intel_power_domains_driver_remove(struct drm_i915_private *i915)
fetch_and_zero(&i915->display.power.domains.init_wakeref);
/* Remove the refcount we took to keep power well support disabled. */
- if (!i915->params.disable_power_well)
+ if (!i915->display.params.disable_power_well)
intel_display_power_put(i915, POWER_DOMAIN_INIT,
fetch_and_zero(&i915->display.power.domains.disable_wakeref));
@@ -2096,7 +2096,7 @@ void intel_power_domains_suspend(struct drm_i915_private *i915, bool s2idle)
* Even if power well support was disabled we still want to disable
* power wells if power domains must be deinitialized for suspend.
*/
- if (!i915->params.disable_power_well)
+ if (!i915->display.params.disable_power_well)
intel_display_power_put(i915, POWER_DOMAIN_INIT,
fetch_and_zero(&i915->display.power.domains.disable_wakeref));
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 51e706f6e57e..eab02f71a4e5 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -86,10 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
"Force probe options for specified supported devices. "
"See CONFIG_DRM_I915_FORCE_PROBE for details.");
-i915_param_named_unsafe(disable_power_well, int, 0400,
- "Disable display power wells when possible "
- "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
-
i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
i915_param_named_unsafe(load_detect_test, bool, 0400,
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 066f15783580..060464df03c2 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, disable_power_well, -1, 0400) \
param(int, enable_ips, 1, 0600) \
param(int, invert_brightness, 0, 0600) \
param(int, enable_guc, -1, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 12/24] drm/i915/display: Move disable_power_well module parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 12/24] drm/i915/display: Move disable_power_well " Jouni Högander
@ 2023-10-23 13:23 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:23 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_display_power.c | 12 ++++++------
> drivers/gpu/drm/i915/i915_params.c | 4 ----
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index efc311837ff1..86b46cff1718 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -53,6 +53,10 @@ intel_display_param_named_unsafe(enable_dpt, bool, 0400,
> intel_display_param_named_unsafe(enable_sagv, bool, 0600,
> "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
>
> +intel_display_param_named_unsafe(disable_power_well, int, 0400,
> + "Disable display power wells when possible "
> + "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 06e920c9aa36..998f99a2857c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -31,6 +31,7 @@ struct drm_i915_private;
> param(int, enable_dc, -1, 0400) \
> param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
> + param(int, disable_power_well, -1, 0400) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 4832eb8da080..e390595d7341 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -967,7 +967,7 @@ static u32 get_allowed_dc_mask(const struct drm_i915_private *dev_priv,
> DISPLAY_VER(dev_priv) >= 11 ?
> DC_STATE_EN_DC9 : 0;
>
> - if (!dev_priv->params.disable_power_well)
> + if (!dev_priv->display.params.disable_power_well)
> max_dc = 0;
>
> if (enable_dc >= 0 && enable_dc <= max_dc) {
> @@ -1016,9 +1016,9 @@ int intel_power_domains_init(struct drm_i915_private *dev_priv)
> {
> struct i915_power_domains *power_domains = &dev_priv->display.power.domains;
>
> - dev_priv->params.disable_power_well =
> + dev_priv->display.params.disable_power_well =
> sanitize_disable_power_well_option(dev_priv,
> - dev_priv->params.disable_power_well);
> + dev_priv->display.params.disable_power_well);
> power_domains->allowed_dc_mask =
> get_allowed_dc_mask(dev_priv, dev_priv->display.params.enable_dc);
>
> @@ -1950,7 +1950,7 @@ void intel_power_domains_init_hw(struct drm_i915_private *i915, bool resume)
> intel_display_power_get(i915, POWER_DOMAIN_INIT);
>
> /* Disable power support if the user asked so. */
> - if (!i915->params.disable_power_well) {
> + if (!i915->display.params.disable_power_well) {
> drm_WARN_ON(&i915->drm, power_domains->disable_wakeref);
> i915->display.power.domains.disable_wakeref = intel_display_power_get(i915,
> POWER_DOMAIN_INIT);
> @@ -1977,7 +1977,7 @@ void intel_power_domains_driver_remove(struct drm_i915_private *i915)
> fetch_and_zero(&i915->display.power.domains.init_wakeref);
>
> /* Remove the refcount we took to keep power well support disabled. */
> - if (!i915->params.disable_power_well)
> + if (!i915->display.params.disable_power_well)
> intel_display_power_put(i915, POWER_DOMAIN_INIT,
> fetch_and_zero(&i915->display.power.domains.disable_wakeref));
>
> @@ -2096,7 +2096,7 @@ void intel_power_domains_suspend(struct drm_i915_private *i915, bool s2idle)
> * Even if power well support was disabled we still want to disable
> * power wells if power domains must be deinitialized for suspend.
> */
> - if (!i915->params.disable_power_well)
> + if (!i915->display.params.disable_power_well)
> intel_display_power_put(i915, POWER_DOMAIN_INIT,
> fetch_and_zero(&i915->display.power.domains.disable_wakeref));
>
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 51e706f6e57e..eab02f71a4e5 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -86,10 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
> "Force probe options for specified supported devices. "
> "See CONFIG_DRM_I915_FORCE_PROBE for details.");
>
> -i915_param_named_unsafe(disable_power_well, int, 0400,
> - "Disable display power wells when possible "
> - "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
> -
> i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
>
> i915_param_named_unsafe(load_detect_test, bool, 0400,
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index 066f15783580..060464df03c2 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -47,7 +47,6 @@ struct drm_printer;
> */
> #define I915_PARAMS_FOR_EACH(param) \
> param(int, modeset, -1, 0400) \
> - param(int, disable_power_well, -1, 0400) \
> param(int, enable_ips, 1, 0600) \
> param(int, invert_brightness, 0, 0600) \
> param(int, enable_guc, -1, 0400) \
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 13/24] drm/i915/display: Move enable_ips module parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (11 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 12/24] drm/i915/display: Move disable_power_well " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:25 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 14/24] drm/i915/display: Move invert_brightness " Jouni Högander
` (14 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/hsw_ips.c | 4 ++--
drivers/gpu/drm/i915/display/intel_display_params.c | 2 ++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 2 --
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c
index 7dc38ac02092..611a7d6ef80c 100644
--- a/drivers/gpu/drm/i915/display/hsw_ips.c
+++ b/drivers/gpu/drm/i915/display/hsw_ips.c
@@ -193,7 +193,7 @@ bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state)
if (!hsw_crtc_supports_ips(crtc))
return false;
- if (!i915->params.enable_ips)
+ if (!i915->display.params.enable_ips)
return false;
if (crtc_state->pipe_bpp > 24)
@@ -329,7 +329,7 @@ static int hsw_ips_debugfs_status_show(struct seq_file *m, void *unused)
wakeref = intel_runtime_pm_get(&i915->runtime_pm);
seq_printf(m, "Enabled by kernel parameter: %s\n",
- str_yes_no(i915->params.enable_ips));
+ str_yes_no(i915->display.params.enable_ips));
if (DISPLAY_VER(i915) >= 8) {
seq_puts(m, "Currently: unknown\n");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 86b46cff1718..c2399e11203c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -57,6 +57,8 @@ intel_display_param_named_unsafe(disable_power_well, int, 0400,
"Disable display power wells when possible "
"(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
+i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 998f99a2857c..11c21a3a3124 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -32,6 +32,7 @@ struct drm_i915_private;
param(bool, enable_dpt, true, 0400) \
param(bool, enable_sagv, true, 0600) \
param(int, disable_power_well, -1, 0400) \
+ param(int, enable_ips, 1, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index eab02f71a4e5..54dcce97da2a 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -86,8 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
"Force probe options for specified supported devices. "
"See CONFIG_DRM_I915_FORCE_PROBE for details.");
-i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
-
i915_param_named_unsafe(load_detect_test, bool, 0400,
"Force-enable the VGA load detect code for testing (default:false). "
"For developers only.");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 060464df03c2..18bb8a93e0e8 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, enable_ips, 1, 0600) \
param(int, invert_brightness, 0, 0600) \
param(int, enable_guc, -1, 0400) \
param(int, guc_log_level, -1, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 13/24] drm/i915/display: Move enable_ips module parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 13/24] drm/i915/display: Move enable_ips " Jouni Högander
@ 2023-10-23 13:25 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:25 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/hsw_ips.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_display_params.c | 2 ++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 2 --
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/hsw_ips.c b/drivers/gpu/drm/i915/display/hsw_ips.c
> index 7dc38ac02092..611a7d6ef80c 100644
> --- a/drivers/gpu/drm/i915/display/hsw_ips.c
> +++ b/drivers/gpu/drm/i915/display/hsw_ips.c
> @@ -193,7 +193,7 @@ bool hsw_crtc_state_ips_capable(const struct intel_crtc_state *crtc_state)
> if (!hsw_crtc_supports_ips(crtc))
> return false;
>
> - if (!i915->params.enable_ips)
> + if (!i915->display.params.enable_ips)
> return false;
>
> if (crtc_state->pipe_bpp > 24)
> @@ -329,7 +329,7 @@ static int hsw_ips_debugfs_status_show(struct seq_file *m, void *unused)
> wakeref = intel_runtime_pm_get(&i915->runtime_pm);
>
> seq_printf(m, "Enabled by kernel parameter: %s\n",
> - str_yes_no(i915->params.enable_ips));
> + str_yes_no(i915->display.params.enable_ips));
>
> if (DISPLAY_VER(i915) >= 8) {
> seq_puts(m, "Currently: unknown\n");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 86b46cff1718..c2399e11203c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -57,6 +57,8 @@ intel_display_param_named_unsafe(disable_power_well, int, 0400,
> "Disable display power wells when possible "
> "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
>
> +i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 998f99a2857c..11c21a3a3124 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -32,6 +32,7 @@ struct drm_i915_private;
> param(bool, enable_dpt, true, 0400) \
> param(bool, enable_sagv, true, 0600) \
> param(int, disable_power_well, -1, 0400) \
> + param(int, enable_ips, 1, 0600) \
Why isn't this a boolean and set to true instead of int and 1?
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 14/24] drm/i915/display: Move invert_brightness module parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (12 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 13/24] drm/i915/display: Move enable_ips " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:30 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 15/24] drm/i915/display: Move edp_vswing " Jouni Högander
` (13 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_backlight.c | 9 +++++----
drivers/gpu/drm/i915/display/intel_display_params.c | 9 ++++++++-
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 7 -------
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c b/drivers/gpu/drm/i915/display/intel_backlight.c
index 2e8f17c04522..612d4cd9dacb 100644
--- a/drivers/gpu/drm/i915/display/intel_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_backlight.c
@@ -88,10 +88,10 @@ u32 intel_backlight_invert_pwm_level(struct intel_connector *connector, u32 val)
drm_WARN_ON(&i915->drm, panel->backlight.pwm_level_max == 0);
- if (i915->params.invert_brightness < 0)
+ if (i915->display.params.invert_brightness < 0)
return val;
- if (i915->params.invert_brightness > 0 ||
+ if (i915->display.params.invert_brightness > 0 ||
intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)) {
return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min;
}
@@ -132,8 +132,9 @@ u32 intel_backlight_level_from_pwm(struct intel_connector *connector, u32 val)
drm_WARN_ON_ONCE(&i915->drm,
panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0);
- if (i915->params.invert_brightness > 0 ||
- (i915->params.invert_brightness == 0 && intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)))
+ if (i915->display.params.invert_brightness > 0 ||
+ (i915->display.params.invert_brightness == 0 &&
+ intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)))
val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min);
return scale(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max,
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index c2399e11203c..8d8050a22bf7 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -57,7 +57,14 @@ intel_display_param_named_unsafe(disable_power_well, int, 0400,
"Disable display power wells when possible "
"(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
-i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
+intel_display_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
+
+intel_display_param_named_unsafe(invert_brightness, int, 0400,
+ "Invert backlight brightness "
+ "(-1 force normal, 0 machine defaults, 1 force inversion), please "
+ "report PCI device ID, subsystem vendor and subsystem device ID "
+ "to dri-devel@lists.freedesktop.org, if your machine needs it. "
+ "It will then be included in an upcoming module version.");
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 11c21a3a3124..23fa03ea38c9 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -33,6 +33,7 @@ struct drm_i915_private;
param(bool, enable_sagv, true, 0600) \
param(int, disable_power_well, -1, 0400) \
param(int, enable_ips, 1, 0600) \
+ param(int, invert_brightness, 0, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 54dcce97da2a..423fe54484e1 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -94,13 +94,6 @@ i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
"Force a modeset during gpu reset for testing (default:false). "
"For developers only.");
-i915_param_named_unsafe(invert_brightness, int, 0400,
- "Invert backlight brightness "
- "(-1 force normal, 0 machine defaults, 1 force inversion), please "
- "report PCI device ID, subsystem vendor and subsystem device ID "
- "to dri-devel@lists.freedesktop.org, if your machine needs it. "
- "It will then be included in an upcoming module version.");
-
i915_param_named(disable_display, bool, 0400,
"Disable display (default: false)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 18bb8a93e0e8..ae0873443a65 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -47,7 +47,6 @@ struct drm_printer;
*/
#define I915_PARAMS_FOR_EACH(param) \
param(int, modeset, -1, 0400) \
- param(int, invert_brightness, 0, 0600) \
param(int, enable_guc, -1, 0400) \
param(int, guc_log_level, -1, 0400) \
param(char *, guc_firmware_path, NULL, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 14/24] drm/i915/display: Move invert_brightness module parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 14/24] drm/i915/display: Move invert_brightness " Jouni Högander
@ 2023-10-23 13:30 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:30 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_backlight.c | 9 +++++----
> drivers/gpu/drm/i915/display/intel_display_params.c | 9 ++++++++-
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 7 -------
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 14 insertions(+), 13 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_backlight.c b/drivers/gpu/drm/i915/display/intel_backlight.c
> index 2e8f17c04522..612d4cd9dacb 100644
> --- a/drivers/gpu/drm/i915/display/intel_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_backlight.c
> @@ -88,10 +88,10 @@ u32 intel_backlight_invert_pwm_level(struct intel_connector *connector, u32 val)
>
> drm_WARN_ON(&i915->drm, panel->backlight.pwm_level_max == 0);
>
> - if (i915->params.invert_brightness < 0)
> + if (i915->display.params.invert_brightness < 0)
> return val;
>
> - if (i915->params.invert_brightness > 0 ||
> + if (i915->display.params.invert_brightness > 0 ||
> intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)) {
> return panel->backlight.pwm_level_max - val + panel->backlight.pwm_level_min;
> }
> @@ -132,8 +132,9 @@ u32 intel_backlight_level_from_pwm(struct intel_connector *connector, u32 val)
> drm_WARN_ON_ONCE(&i915->drm,
> panel->backlight.max == 0 || panel->backlight.pwm_level_max == 0);
>
> - if (i915->params.invert_brightness > 0 ||
> - (i915->params.invert_brightness == 0 && intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)))
> + if (i915->display.params.invert_brightness > 0 ||
> + (i915->display.params.invert_brightness == 0 &&
> + intel_has_quirk(i915, QUIRK_INVERT_BRIGHTNESS)))
> val = panel->backlight.pwm_level_max - (val - panel->backlight.pwm_level_min);
>
> return scale(val, panel->backlight.pwm_level_min, panel->backlight.pwm_level_max,
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index c2399e11203c..8d8050a22bf7 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -57,7 +57,14 @@ intel_display_param_named_unsafe(disable_power_well, int, 0400,
> "Disable display power wells when possible "
> "(-1=auto [default], 0=power wells always on, 1=power wells disabled when possible)");
>
> -i915_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
> +intel_display_param_named_unsafe(enable_ips, int, 0400, "Enable IPS (default: true)");
> +
This change is in the wrong patch. It should be moved to the previous
one.
With this fixed:
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 15/24] drm/i915/display: Move edp_vswing module parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (13 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 14/24] drm/i915/display: Move invert_brightness " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:46 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 16/24] drm/i915/display: Move enable_dpcd_backlightmodule " Jouni Högander
` (12 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_bios.c | 4 ++--
drivers/gpu/drm/i915/display/intel_display_params.c | 6 ++++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 6 ------
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
index 70c0491aac42..69db1a3a1499 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -1514,9 +1514,9 @@ parse_edp(struct drm_i915_private *i915,
u8 vswing;
/* Don't read from VBT if module parameter has valid value*/
- if (i915->params.edp_vswing) {
+ if (i915->display.params.edp_vswing) {
panel->vbt.edp.low_vswing =
- i915->params.edp_vswing == 1;
+ i915->display.params.edp_vswing == 1;
} else {
vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
panel->vbt.edp.low_vswing = vswing == 0;
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 8d8050a22bf7..a16adfa36b64 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -66,6 +66,12 @@ intel_display_param_named_unsafe(invert_brightness, int, 0400,
"to dri-devel@lists.freedesktop.org, if your machine needs it. "
"It will then be included in an upcoming module version.");
+/* WA to get away with the default setting in VBT for early platforms.Will be removed */
+intel_display_param_named_unsafe(edp_vswing, int, 0400,
+ "Ignore/Override vswing pre-emph table selection from VBT "
+ "(0=use value from vbt [default], 1=low power swing(200mV),"
+ "2=default swing(400mV))");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 23fa03ea38c9..9e749ea97707 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -34,6 +34,7 @@ struct drm_i915_private;
param(int, disable_power_well, -1, 0400) \
param(int, enable_ips, 1, 0600) \
param(int, invert_brightness, 0, 0600) \
+ param(int, edp_vswing, 0, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 423fe54484e1..6b9df9f9d842 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -111,12 +111,6 @@ i915_param_named(verbose_state_checks, bool, 0600,
i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
"Force enable atomic functionality on platforms that don't have full support yet.");
-/* WA to get away with the default setting in VBT for early platforms.Will be removed */
-i915_param_named_unsafe(edp_vswing, int, 0400,
- "Ignore/Override vswing pre-emph table selection from VBT "
- "(0=use value from vbt [default], 1=low power swing(200mV),"
- "2=default swing(400mV))");
-
i915_param_named_unsafe(enable_guc, int, 0400,
"Enable GuC load for GuC submission and/or HuC load. "
"Required functionality can be selected using bitmask values. "
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index ae0873443a65..c33edaee5032 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -55,7 +55,6 @@ struct drm_printer;
param(char *, gsc_firmware_path, NULL, 0400) \
param(bool, memtest, false, 0400) \
param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \
- param(int, edp_vswing, 0, 0400) \
param(unsigned int, reset, 3, 0600) \
param(unsigned int, inject_probe_failure, 0, 0) \
param(int, enable_dpcd_backlight, -1, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 15/24] drm/i915/display: Move edp_vswing module parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 15/24] drm/i915/display: Move edp_vswing " Jouni Högander
@ 2023-10-23 13:46 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:46 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_bios.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_display_params.c | 6 ++++++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 6 ------
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
> index 70c0491aac42..69db1a3a1499 100644
> --- a/drivers/gpu/drm/i915/display/intel_bios.c
> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
> @@ -1514,9 +1514,9 @@ parse_edp(struct drm_i915_private *i915,
> u8 vswing;
>
> /* Don't read from VBT if module parameter has valid value*/
> - if (i915->params.edp_vswing) {
> + if (i915->display.params.edp_vswing) {
> panel->vbt.edp.low_vswing =
> - i915->params.edp_vswing == 1;
> + i915->display.params.edp_vswing == 1;
> } else {
> vswing = (edp->edp_vswing_preemph >> (panel_type * 4)) & 0xF;
> panel->vbt.edp.low_vswing = vswing == 0;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 8d8050a22bf7..a16adfa36b64 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -66,6 +66,12 @@ intel_display_param_named_unsafe(invert_brightness, int, 0400,
> "to dri-devel@lists.freedesktop.org, if your machine needs it. "
> "It will then be included in an upcoming module version.");
>
> +/* WA to get away with the default setting in VBT for early platforms.Will be removed */
> +intel_display_param_named_unsafe(edp_vswing, int, 0400,
> + "Ignore/Override vswing pre-emph table selection from VBT "
> + "(0=use value from vbt [default], 1=low power swing(200mV),"
> + "2=default swing(400mV))");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 23fa03ea38c9..9e749ea97707 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -34,6 +34,7 @@ struct drm_i915_private;
> param(int, disable_power_well, -1, 0400) \
> param(int, enable_ips, 1, 0600) \
> param(int, invert_brightness, 0, 0600) \
> + param(int, edp_vswing, 0, 0400) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 423fe54484e1..6b9df9f9d842 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -111,12 +111,6 @@ i915_param_named(verbose_state_checks, bool, 0600,
> i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
> "Force enable atomic functionality on platforms that don't have full support yet.");
>
> -/* WA to get away with the default setting in VBT for early platforms.Will be removed */
> -i915_param_named_unsafe(edp_vswing, int, 0400,
> - "Ignore/Override vswing pre-emph table selection from VBT "
> - "(0=use value from vbt [default], 1=low power swing(200mV),"
> - "2=default swing(400mV))");
> -
> i915_param_named_unsafe(enable_guc, int, 0400,
> "Enable GuC load for GuC submission and/or HuC load. "
> "Required functionality can be selected using bitmask values. "
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index ae0873443a65..c33edaee5032 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -55,7 +55,6 @@ struct drm_printer;
> param(char *, gsc_firmware_path, NULL, 0400) \
> param(bool, memtest, false, 0400) \
> param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \
> - param(int, edp_vswing, 0, 0400) \
> param(unsigned int, reset, 3, 0600) \
> param(unsigned int, inject_probe_failure, 0, 0) \
> param(int, enable_dpcd_backlight, -1, 0600) \
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 16/24] drm/i915/display: Move enable_dpcd_backlightmodule parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (14 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 15/24] drm/i915/display: Move edp_vswing " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:47 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 17/24] drm/i915/display: Move load_detect_test " Jouni Högander
` (11 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++--
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index a16adfa36b64..01b732819aab 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -72,6 +72,10 @@ intel_display_param_named_unsafe(edp_vswing, int, 0400,
"(0=use value from vbt [default], 1=low power swing(200mV),"
"2=default swing(400mV))");
+intel_display_param_named(enable_dpcd_backlight, int, 0400,
+ "Enable support for DPCD backlight control"
+ "(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 9e749ea97707..6c08ed07bb58 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -35,6 +35,7 @@ struct drm_i915_private;
param(int, enable_ips, 1, 0600) \
param(int, invert_brightness, 0, 0600) \
param(int, edp_vswing, 0, 0400) \
+ param(int, enable_dpcd_backlight, -1, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
index 95cc5251843e..1c2912ce59a5 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
@@ -146,7 +146,7 @@ intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector)
* HDR static metadata we need to start maintaining table of
* ranges for such panels.
*/
- if (i915->params.enable_dpcd_backlight != INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL &&
+ if (i915->display.params.enable_dpcd_backlight != INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL &&
!(connector->base.hdr_sink_metadata.hdmi_type1.metadata_type &
BIT(HDMI_STATIC_METADATA_TYPE1))) {
drm_info(&i915->drm,
@@ -489,7 +489,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
/* Check the VBT and user's module parameters to figure out which
* interfaces to probe
*/
- switch (i915->params.enable_dpcd_backlight) {
+ switch (i915->display.params.enable_dpcd_backlight) {
case INTEL_DP_AUX_BACKLIGHT_OFF:
return -ENODEV;
case INTEL_DP_AUX_BACKLIGHT_AUTO:
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 6b9df9f9d842..e15cd8491c7f 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -140,10 +140,6 @@ i915_param_named_unsafe(inject_probe_failure, uint, 0400,
"Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)");
#endif
-i915_param_named(enable_dpcd_backlight, int, 0400,
- "Enable support for DPCD backlight control"
- "(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
-
#if IS_ENABLED(CONFIG_DRM_I915_GVT)
i915_param_named(enable_gvt, bool, 0400,
"Enable support for Intel GVT-g graphics virtualization host support(default:false)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index c33edaee5032..8169234338b1 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -57,7 +57,6 @@ struct drm_printer;
param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \
param(unsigned int, reset, 3, 0600) \
param(unsigned int, inject_probe_failure, 0, 0) \
- param(int, enable_dpcd_backlight, -1, 0600) \
param(char *, force_probe, CONFIG_DRM_I915_FORCE_PROBE, 0400) \
param(unsigned int, request_timeout_ms, CONFIG_DRM_I915_REQUEST_TIMEOUT, CONFIG_DRM_I915_REQUEST_TIMEOUT ? 0600 : 0) \
param(unsigned int, lmem_size, 0, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 16/24] drm/i915/display: Move enable_dpcd_backlightmodule parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 16/24] drm/i915/display: Move enable_dpcd_backlightmodule " Jouni Högander
@ 2023-10-23 13:47 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:47 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c | 4 ++--
> drivers/gpu/drm/i915/i915_params.c | 4 ----
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index a16adfa36b64..01b732819aab 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -72,6 +72,10 @@ intel_display_param_named_unsafe(edp_vswing, int, 0400,
> "(0=use value from vbt [default], 1=low power swing(200mV),"
> "2=default swing(400mV))");
>
> +intel_display_param_named(enable_dpcd_backlight, int, 0400,
> + "Enable support for DPCD backlight control"
> + "(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 9e749ea97707..6c08ed07bb58 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -35,6 +35,7 @@ struct drm_i915_private;
> param(int, enable_ips, 1, 0600) \
> param(int, invert_brightness, 0, 0600) \
> param(int, edp_vswing, 0, 0400) \
> + param(int, enable_dpcd_backlight, -1, 0600) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> index 95cc5251843e..1c2912ce59a5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
> @@ -146,7 +146,7 @@ intel_dp_aux_supports_hdr_backlight(struct intel_connector *connector)
> * HDR static metadata we need to start maintaining table of
> * ranges for such panels.
> */
> - if (i915->params.enable_dpcd_backlight != INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL &&
> + if (i915->display.params.enable_dpcd_backlight != INTEL_DP_AUX_BACKLIGHT_FORCE_INTEL &&
> !(connector->base.hdr_sink_metadata.hdmi_type1.metadata_type &
> BIT(HDMI_STATIC_METADATA_TYPE1))) {
> drm_info(&i915->drm,
> @@ -489,7 +489,7 @@ int intel_dp_aux_init_backlight_funcs(struct intel_connector *connector)
> /* Check the VBT and user's module parameters to figure out which
> * interfaces to probe
> */
> - switch (i915->params.enable_dpcd_backlight) {
> + switch (i915->display.params.enable_dpcd_backlight) {
> case INTEL_DP_AUX_BACKLIGHT_OFF:
> return -ENODEV;
> case INTEL_DP_AUX_BACKLIGHT_AUTO:
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 6b9df9f9d842..e15cd8491c7f 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -140,10 +140,6 @@ i915_param_named_unsafe(inject_probe_failure, uint, 0400,
> "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)");
> #endif
>
> -i915_param_named(enable_dpcd_backlight, int, 0400,
> - "Enable support for DPCD backlight control"
> - "(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
> -
> #if IS_ENABLED(CONFIG_DRM_I915_GVT)
> i915_param_named(enable_gvt, bool, 0400,
> "Enable support for Intel GVT-g graphics virtualization host support(default:false)");
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index c33edaee5032..8169234338b1 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -57,7 +57,6 @@ struct drm_printer;
> param(int, mmio_debug, -IS_ENABLED(CONFIG_DRM_I915_DEBUG_MMIO), 0600) \
> param(unsigned int, reset, 3, 0600) \
> param(unsigned int, inject_probe_failure, 0, 0) \
> - param(int, enable_dpcd_backlight, -1, 0600) \
> param(char *, force_probe, CONFIG_DRM_I915_FORCE_PROBE, 0400) \
> param(unsigned int, request_timeout_ms, CONFIG_DRM_I915_REQUEST_TIMEOUT, CONFIG_DRM_I915_REQUEST_TIMEOUT ? 0600 : 0) \
> param(unsigned int, lmem_size, 0, 0400) \
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 17/24] drm/i915/display: Move load_detect_test parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (15 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 16/24] drm/i915/display: Move enable_dpcd_backlightmodule " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:49 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 18/24] drm/i915/display: Move force_reset_modeset_test " Jouni Högander
` (10 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_crt.c | 4 ++--
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
index 913e5d230a4d..0e33a0523a75 100644
--- a/drivers/gpu/drm/i915/display/intel_crt.c
+++ b/drivers/gpu/drm/i915/display/intel_crt.c
@@ -841,7 +841,7 @@ intel_crt_detect(struct drm_connector *connector,
if (!intel_display_device_enabled(dev_priv))
return connector_status_disconnected;
- if (dev_priv->params.load_detect_test) {
+ if (dev_priv->display.params.load_detect_test) {
wakeref = intel_display_power_get(dev_priv,
intel_encoder->power_domain);
goto load_detect;
@@ -901,7 +901,7 @@ intel_crt_detect(struct drm_connector *connector,
else if (DISPLAY_VER(dev_priv) < 4)
status = intel_crt_load_detect(crt,
to_intel_crtc(connector->state->crtc)->pipe);
- else if (dev_priv->params.load_detect_test)
+ else if (dev_priv->display.params.load_detect_test)
status = connector_status_disconnected;
else
status = connector_status_unknown;
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 01b732819aab..3c0e93934ac2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -76,6 +76,10 @@ intel_display_param_named(enable_dpcd_backlight, int, 0400,
"Enable support for DPCD backlight control"
"(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
+intel_display_param_named_unsafe(load_detect_test, bool, 0400,
+ "Force-enable the VGA load detect code for testing (default:false). "
+ "For developers only.");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 6c08ed07bb58..8b36b73437b2 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -36,6 +36,7 @@ struct drm_i915_private;
param(int, invert_brightness, 0, 0600) \
param(int, edp_vswing, 0, 0400) \
param(int, enable_dpcd_backlight, -1, 0600) \
+ param(bool, load_detect_test, false, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index e15cd8491c7f..cb56973a2394 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -86,10 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
"Force probe options for specified supported devices. "
"See CONFIG_DRM_I915_FORCE_PROBE for details.");
-i915_param_named_unsafe(load_detect_test, bool, 0400,
- "Force-enable the VGA load detect code for testing (default:false). "
- "For developers only.");
-
i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
"Force a modeset during gpu reset for testing (default:false). "
"For developers only.");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 8169234338b1..cf5448bbc087 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -63,7 +63,6 @@ struct drm_printer;
param(unsigned int, lmem_bar_size, 0, 0400) \
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
- param(bool, load_detect_test, false, 0600) \
param(bool, force_reset_modeset_test, false, 0600) \
param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
param(bool, disable_display, false, 0400) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 17/24] drm/i915/display: Move load_detect_test parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 17/24] drm/i915/display: Move load_detect_test " Jouni Högander
@ 2023-10-23 13:49 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:49 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_crt.c | 4 ++--
> drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 4 ----
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_crt.c b/drivers/gpu/drm/i915/display/intel_crt.c
> index 913e5d230a4d..0e33a0523a75 100644
> --- a/drivers/gpu/drm/i915/display/intel_crt.c
> +++ b/drivers/gpu/drm/i915/display/intel_crt.c
> @@ -841,7 +841,7 @@ intel_crt_detect(struct drm_connector *connector,
> if (!intel_display_device_enabled(dev_priv))
> return connector_status_disconnected;
>
> - if (dev_priv->params.load_detect_test) {
> + if (dev_priv->display.params.load_detect_test) {
> wakeref = intel_display_power_get(dev_priv,
> intel_encoder->power_domain);
> goto load_detect;
> @@ -901,7 +901,7 @@ intel_crt_detect(struct drm_connector *connector,
> else if (DISPLAY_VER(dev_priv) < 4)
> status = intel_crt_load_detect(crt,
> to_intel_crtc(connector->state->crtc)->pipe);
> - else if (dev_priv->params.load_detect_test)
> + else if (dev_priv->display.params.load_detect_test)
> status = connector_status_disconnected;
> else
> status = connector_status_unknown;
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 01b732819aab..3c0e93934ac2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -76,6 +76,10 @@ intel_display_param_named(enable_dpcd_backlight, int, 0400,
> "Enable support for DPCD backlight control"
> "(-1=use per-VBT LFP backlight type setting [default], 0=disabled, 1=enable, 2=force VESA interface, 3=force Intel interface)");
>
> +intel_display_param_named_unsafe(load_detect_test, bool, 0400,
> + "Force-enable the VGA load detect code for testing (default:false). "
> + "For developers only.");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 6c08ed07bb58..8b36b73437b2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -36,6 +36,7 @@ struct drm_i915_private;
> param(int, invert_brightness, 0, 0600) \
> param(int, edp_vswing, 0, 0400) \
> param(int, enable_dpcd_backlight, -1, 0600) \
> + param(bool, load_detect_test, false, 0600) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index e15cd8491c7f..cb56973a2394 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -86,10 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
> "Force probe options for specified supported devices. "
> "See CONFIG_DRM_I915_FORCE_PROBE for details.");
>
> -i915_param_named_unsafe(load_detect_test, bool, 0400,
> - "Force-enable the VGA load detect code for testing (default:false). "
> - "For developers only.");
> -
> i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
> "Force a modeset during gpu reset for testing (default:false). "
> "For developers only.");
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index 8169234338b1..cf5448bbc087 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -63,7 +63,6 @@ struct drm_printer;
> param(unsigned int, lmem_bar_size, 0, 0400) \
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> - param(bool, load_detect_test, false, 0600) \
> param(bool, force_reset_modeset_test, false, 0600) \
> param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> param(bool, disable_display, false, 0400) \
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 18/24] drm/i915/display: Move force_reset_modeset_test parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (16 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 17/24] drm/i915/display: Move load_detect_test " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:50 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 19/24] drm/i915/display: Move disable_display " Jouni Högander
` (9 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_display_reset.c | 2 +-
drivers/gpu/drm/i915/i915_params.c | 4 ----
drivers/gpu/drm/i915/i915_params.h | 2 +-
5 files changed, 7 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 3c0e93934ac2..7f330a5e1188 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -80,6 +80,10 @@ intel_display_param_named_unsafe(load_detect_test, bool, 0400,
"Force-enable the VGA load detect code for testing (default:false). "
"For developers only.");
+intel_display_param_named_unsafe(force_reset_modeset_test, bool, 0400,
+ "Force a modeset during gpu reset for testing (default:false). "
+ "For developers only.");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 8b36b73437b2..25f238e63ff8 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -37,6 +37,7 @@ struct drm_i915_private;
param(int, edp_vswing, 0, 0400) \
param(int, enable_dpcd_backlight, -1, 0600) \
param(bool, load_detect_test, false, 0600) \
+ param(bool, force_reset_modeset_test, false, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c
index 17178d5d7788..c2c347b22448 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.c
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.c
@@ -29,7 +29,7 @@ void intel_display_reset_prepare(struct drm_i915_private *dev_priv)
return;
/* reset doesn't touch the display */
- if (!dev_priv->params.force_reset_modeset_test &&
+ if (!dev_priv->display.params.force_reset_modeset_test &&
!gpu_reset_clobbers_display(dev_priv))
return;
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index cb56973a2394..497e39b1dcfb 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -86,10 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
"Force probe options for specified supported devices. "
"See CONFIG_DRM_I915_FORCE_PROBE for details.");
-i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
- "Force a modeset during gpu reset for testing (default:false). "
- "For developers only.");
-
i915_param_named(disable_display, bool, 0400,
"Disable display (default: false)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index cf5448bbc087..5fa77ecb8d31 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -63,7 +63,7 @@ struct drm_printer;
param(unsigned int, lmem_bar_size, 0, 0400) \
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
- param(bool, force_reset_modeset_test, false, 0600) \
+ param(bool, force_reset_modeset_test, false, 0600) \
param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
param(bool, disable_display, false, 0400) \
param(bool, verbose_state_checks, true, 0) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 18/24] drm/i915/display: Move force_reset_modeset_test parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 18/24] drm/i915/display: Move force_reset_modeset_test " Jouni Högander
@ 2023-10-23 13:50 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:50 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 4 ++++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_display_reset.c | 2 +-
> drivers/gpu/drm/i915/i915_params.c | 4 ----
> drivers/gpu/drm/i915/i915_params.h | 2 +-
> 5 files changed, 7 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 3c0e93934ac2..7f330a5e1188 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -80,6 +80,10 @@ intel_display_param_named_unsafe(load_detect_test, bool, 0400,
> "Force-enable the VGA load detect code for testing (default:false). "
> "For developers only.");
>
> +intel_display_param_named_unsafe(force_reset_modeset_test, bool, 0400,
> + "Force a modeset during gpu reset for testing (default:false). "
> + "For developers only.");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 8b36b73437b2..25f238e63ff8 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -37,6 +37,7 @@ struct drm_i915_private;
> param(int, edp_vswing, 0, 0400) \
> param(int, enable_dpcd_backlight, -1, 0600) \
> param(bool, load_detect_test, false, 0600) \
> + param(bool, force_reset_modeset_test, false, 0600) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c
> index 17178d5d7788..c2c347b22448 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_reset.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_reset.c
> @@ -29,7 +29,7 @@ void intel_display_reset_prepare(struct drm_i915_private *dev_priv)
> return;
>
> /* reset doesn't touch the display */
> - if (!dev_priv->params.force_reset_modeset_test &&
> + if (!dev_priv->display.params.force_reset_modeset_test &&
> !gpu_reset_clobbers_display(dev_priv))
> return;
>
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index cb56973a2394..497e39b1dcfb 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -86,10 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
> "Force probe options for specified supported devices. "
> "See CONFIG_DRM_I915_FORCE_PROBE for details.");
>
> -i915_param_named_unsafe(force_reset_modeset_test, bool, 0400,
> - "Force a modeset during gpu reset for testing (default:false). "
> - "For developers only.");
> -
> i915_param_named(disable_display, bool, 0400,
> "Disable display (default: false)");
>
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index cf5448bbc087..5fa77ecb8d31 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -63,7 +63,7 @@ struct drm_printer;
> param(unsigned int, lmem_bar_size, 0, 0400) \
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> - param(bool, force_reset_modeset_test, false, 0600) \
> + param(bool, force_reset_modeset_test, false, 0600) \
> param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> param(bool, disable_display, false, 0400) \
> param(bool, verbose_state_checks, true, 0) \
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 19/24] drm/i915/display: Move disable_display parameter under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (17 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 18/24] drm/i915/display: Move force_reset_modeset_test " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:51 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 20/24] drm/i915/display: Use device parameters instead of module in I915_STATE_WARN Jouni Högander
` (8 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_device.c | 3 ++-
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 2 --
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index e80842d1e7c7..50841818fb59 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1153,5 +1153,6 @@ bool intel_display_device_enabled(struct drm_i915_private *i915)
/* Only valid when HAS_DISPLAY() is true */
drm_WARN_ON(&i915->drm, !HAS_DISPLAY(i915));
- return !i915->params.disable_display && !intel_opregion_headless_sku(i915);
+ return !i915->display.params.disable_display &&
+ !intel_opregion_headless_sku(i915);
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 7f330a5e1188..06e68c7fec1c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -84,6 +84,9 @@ intel_display_param_named_unsafe(force_reset_modeset_test, bool, 0400,
"Force a modeset during gpu reset for testing (default:false). "
"For developers only.");
+intel_display_param_named(disable_display, bool, 0400,
+ "Disable display (default: false)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 25f238e63ff8..60d9c3d59fe4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -38,6 +38,7 @@ struct drm_i915_private;
param(int, enable_dpcd_backlight, -1, 0600) \
param(bool, load_detect_test, false, 0600) \
param(bool, force_reset_modeset_test, false, 0600) \
+ param(bool, disable_display, false, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 497e39b1dcfb..3205c6b62670 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -86,9 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
"Force probe options for specified supported devices. "
"See CONFIG_DRM_I915_FORCE_PROBE for details.");
-i915_param_named(disable_display, bool, 0400,
- "Disable display (default: false)");
-
i915_param_named(memtest, bool, 0400,
"Perform a read/write test of all device memory on module load (default: off)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 5fa77ecb8d31..8bce7d057634 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -63,9 +63,7 @@ struct drm_printer;
param(unsigned int, lmem_bar_size, 0, 0400) \
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
- param(bool, force_reset_modeset_test, false, 0600) \
param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
- param(bool, disable_display, false, 0400) \
param(bool, verbose_state_checks, true, 0) \
param(bool, nuclear_pageflip, false, 0400) \
param(bool, enable_dp_mst, true, 0600) \
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 19/24] drm/i915/display: Move disable_display parameter under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 19/24] drm/i915/display: Move disable_display " Jouni Högander
@ 2023-10-23 13:51 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:51 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_device.c | 3 ++-
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 3 ---
> drivers/gpu/drm/i915/i915_params.h | 2 --
> 5 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index e80842d1e7c7..50841818fb59 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -1153,5 +1153,6 @@ bool intel_display_device_enabled(struct drm_i915_private *i915)
> /* Only valid when HAS_DISPLAY() is true */
> drm_WARN_ON(&i915->drm, !HAS_DISPLAY(i915));
>
> - return !i915->params.disable_display && !intel_opregion_headless_sku(i915);
> + return !i915->display.params.disable_display &&
> + !intel_opregion_headless_sku(i915);
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 7f330a5e1188..06e68c7fec1c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -84,6 +84,9 @@ intel_display_param_named_unsafe(force_reset_modeset_test, bool, 0400,
> "Force a modeset during gpu reset for testing (default:false). "
> "For developers only.");
>
> +intel_display_param_named(disable_display, bool, 0400,
> + "Disable display (default: false)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 25f238e63ff8..60d9c3d59fe4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -38,6 +38,7 @@ struct drm_i915_private;
> param(int, enable_dpcd_backlight, -1, 0600) \
> param(bool, load_detect_test, false, 0600) \
> param(bool, force_reset_modeset_test, false, 0600) \
> + param(bool, disable_display, false, 0400) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 497e39b1dcfb..3205c6b62670 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -86,9 +86,6 @@ i915_param_named_unsafe(force_probe, charp, 0400,
> "Force probe options for specified supported devices. "
> "See CONFIG_DRM_I915_FORCE_PROBE for details.");
>
> -i915_param_named(disable_display, bool, 0400,
> - "Disable display (default: false)");
> -
> i915_param_named(memtest, bool, 0400,
> "Perform a read/write test of all device memory on module load (default: off)");
>
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index 5fa77ecb8d31..8bce7d057634 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -63,9 +63,7 @@ struct drm_printer;
> param(unsigned int, lmem_bar_size, 0, 0400) \
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> - param(bool, force_reset_modeset_test, false, 0600) \
> param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> - param(bool, disable_display, false, 0400) \
> param(bool, verbose_state_checks, true, 0) \
> param(bool, nuclear_pageflip, false, 0400) \
> param(bool, enable_dp_mst, true, 0600) \
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 20/24] drm/i915/display: Use device parameters instead of module in I915_STATE_WARN
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (18 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 19/24] drm/i915/display: Move disable_display " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 13:57 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 21/24] drm/i915/display: Move verbose_state_checks under display Jouni Högander
` (7 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Also make module parameter as non writable.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/i915_params.c | 3 +--
2 files changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 0e5dffe8f018..ba3548f9768d 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -552,7 +552,7 @@ bool assert_port_valid(struct drm_i915_private *i915, enum port port);
struct drm_device *drm = &(__i915)->drm; \
int __ret_warn_on = !!(condition); \
if (unlikely(__ret_warn_on)) \
- if (!drm_WARN(drm, i915_modparams.verbose_state_checks, format)) \
+ if (!drm_WARN(drm, __i915->params.verbose_state_checks, format)) \
drm_err(drm, format); \
unlikely(__ret_warn_on); \
})
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 3205c6b62670..4e8c088c69fd 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -93,8 +93,7 @@ i915_param_named(mmio_debug, int, 0400,
"Enable the MMIO debug code for the first N failures (default: off). "
"This may negatively affect performance.");
-/* Special case writable file */
-i915_param_named(verbose_state_checks, bool, 0600,
+i915_param_named(verbose_state_checks, bool, 0400,
"Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 20/24] drm/i915/display: Use device parameters instead of module in I915_STATE_WARN
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 20/24] drm/i915/display: Use device parameters instead of module in I915_STATE_WARN Jouni Högander
@ 2023-10-23 13:57 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 13:57 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Also make module parameter as non writable.
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> drivers/gpu/drm/i915/i915_params.c | 3 +--
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 0e5dffe8f018..ba3548f9768d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -552,7 +552,7 @@ bool assert_port_valid(struct drm_i915_private *i915, enum port port);
> struct drm_device *drm = &(__i915)->drm; \
> int __ret_warn_on = !!(condition); \
> if (unlikely(__ret_warn_on)) \
> - if (!drm_WARN(drm, i915_modparams.verbose_state_checks, format)) \
> + if (!drm_WARN(drm, __i915->params.verbose_state_checks, format)) \
> drm_err(drm, format); \
> unlikely(__ret_warn_on); \
> })
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 3205c6b62670..4e8c088c69fd 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -93,8 +93,7 @@ i915_param_named(mmio_debug, int, 0400,
> "Enable the MMIO debug code for the first N failures (default: off). "
> "This may negatively affect performance.");
>
> -/* Special case writable file */
> -i915_param_named(verbose_state_checks, bool, 0600,
> +i915_param_named(verbose_state_checks, bool, 0400,
> "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
>
> i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 21/24] drm/i915/display: Move verbose_state_checks under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (19 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 20/24] drm/i915/display: Use device parameters instead of module in I915_STATE_WARN Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 14:00 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 22/24] drm/i915/display: Move nuclear_pageflip " Jouni Högander
` (6 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index ba3548f9768d..bc95fb377386 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -552,7 +552,7 @@ bool assert_port_valid(struct drm_i915_private *i915, enum port port);
struct drm_device *drm = &(__i915)->drm; \
int __ret_warn_on = !!(condition); \
if (unlikely(__ret_warn_on)) \
- if (!drm_WARN(drm, __i915->params.verbose_state_checks, format)) \
+ if (!drm_WARN(drm, __i915->display.params.verbose_state_checks, format)) \
drm_err(drm, format); \
unlikely(__ret_warn_on); \
})
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 06e68c7fec1c..e86766639396 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -87,6 +87,9 @@ intel_display_param_named_unsafe(force_reset_modeset_test, bool, 0400,
intel_display_param_named(disable_display, bool, 0400,
"Disable display (default: false)");
+intel_display_param_named(verbose_state_checks, bool, 0400,
+ "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index 60d9c3d59fe4..b35443f51375 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -39,6 +39,7 @@ struct drm_i915_private;
param(bool, load_detect_test, false, 0600) \
param(bool, force_reset_modeset_test, false, 0600) \
param(bool, disable_display, false, 0400) \
+ param(bool, verbose_state_checks, true, 0) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 4e8c088c69fd..72614c139222 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -93,9 +93,6 @@ i915_param_named(mmio_debug, int, 0400,
"Enable the MMIO debug code for the first N failures (default: off). "
"This may negatively affect performance.");
-i915_param_named(verbose_state_checks, bool, 0400,
- "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
-
i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
"Force enable atomic functionality on platforms that don't have full support yet.");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 8bce7d057634..4b543beb17ca 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -64,7 +64,6 @@ struct drm_printer;
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
- param(bool, verbose_state_checks, true, 0) \
param(bool, nuclear_pageflip, false, 0400) \
param(bool, enable_dp_mst, true, 0600) \
param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 : 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 21/24] drm/i915/display: Move verbose_state_checks under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 21/24] drm/i915/display: Move verbose_state_checks under display Jouni Högander
@ 2023-10-23 14:00 ` Luca Coelho
2023-10-24 8:22 ` Hogander, Jouni
0 siblings, 1 reply; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 14:00 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 3 ---
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index ba3548f9768d..bc95fb377386 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -552,7 +552,7 @@ bool assert_port_valid(struct drm_i915_private *i915, enum port port);
> struct drm_device *drm = &(__i915)->drm; \
> int __ret_warn_on = !!(condition); \
> if (unlikely(__ret_warn_on)) \
> - if (!drm_WARN(drm, __i915->params.verbose_state_checks, format)) \
> + if (!drm_WARN(drm, __i915->display.params.verbose_state_checks, format)) \
> drm_err(drm, format); \
> unlikely(__ret_warn_on); \
> })
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 06e68c7fec1c..e86766639396 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -87,6 +87,9 @@ intel_display_param_named_unsafe(force_reset_modeset_test, bool, 0400,
> intel_display_param_named(disable_display, bool, 0400,
> "Disable display (default: false)");
>
> +intel_display_param_named(verbose_state_checks, bool, 0400,
> + "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index 60d9c3d59fe4..b35443f51375 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -39,6 +39,7 @@ struct drm_i915_private;
> param(bool, load_detect_test, false, 0600) \
> param(bool, force_reset_modeset_test, false, 0600) \
> param(bool, disable_display, false, 0400) \
> + param(bool, verbose_state_checks, true, 0) \
Why is this one 0? Why can't we even read it?
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [Intel-gfx] [PATCH v2 21/24] drm/i915/display: Move verbose_state_checks under display
2023-10-23 14:00 ` Luca Coelho
@ 2023-10-24 8:22 ` Hogander, Jouni
2023-10-24 11:31 ` Luca Coelho
0 siblings, 1 reply; 64+ messages in thread
From: Hogander, Jouni @ 2023-10-24 8:22 UTC (permalink / raw)
To: luca@coelho.fi, intel-gfx@lists.freedesktop.org; +Cc: Nikula, Jani
On Mon, 2023-10-23 at 17:00 +0300, Luca Coelho wrote:
> On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> > drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> > drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> > drivers/gpu/drm/i915/i915_params.c | 3 ---
> > drivers/gpu/drm/i915/i915_params.h | 1 -
> > 5 files changed, 5 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> > b/drivers/gpu/drm/i915/display/intel_display.h
> > index ba3548f9768d..bc95fb377386 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> > @@ -552,7 +552,7 @@ bool assert_port_valid(struct drm_i915_private
> > *i915, enum port port);
> > struct drm_device *drm = &(__i915)-
> > >drm; \
> > int __ret_warn_on =
> > !!(condition); \
> > if
> > (unlikely(__ret_warn_on)) \
> > - if (!drm_WARN(drm, __i915-
> > >params.verbose_state_checks, format)) \
> > + if (!drm_WARN(drm, __i915-
> > >display.params.verbose_state_checks, format)) \
> > drm_err(drm,
> > format); \
> > unlikely(__ret_warn_on);
> > \
> > })
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > index 06e68c7fec1c..e86766639396 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > @@ -87,6 +87,9 @@
> > intel_display_param_named_unsafe(force_reset_modeset_test, bool,
> > 0400,
> > intel_display_param_named(disable_display, bool, 0400,
> > "Disable display (default: false)");
> >
> > +intel_display_param_named(verbose_state_checks, bool, 0400,
> > + "Enable verbose logs (ie. WARN_ON()) in case of unexpected
> > hw state conditions.");
> > +
> > intel_display_param_named_unsafe(enable_fbc, int, 0400,
> > "Enable frame buffer compression for power savings "
> > "(default: -1 (use per-chip default))");
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> > b/drivers/gpu/drm/i915/display/intel_display_params.h
> > index 60d9c3d59fe4..b35443f51375 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> > @@ -39,6 +39,7 @@ struct drm_i915_private;
> > param(bool, load_detect_test, false, 0600) \
> > param(bool, force_reset_modeset_test, false, 0600) \
> > param(bool, disable_display, false, 0400) \
> > + param(bool, verbose_state_checks, true, 0) \
>
> Why is this one 0? Why can't we even read it?
I found this comment in older commit message written by Jani Nikula:
"0 mode will bypass debugfs creation. Use it for verbose_state_checks
which will need special attention in follow-up work."
BR,
Jouni Högander
>
>
> --
> Cheers,
> Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [Intel-gfx] [PATCH v2 21/24] drm/i915/display: Move verbose_state_checks under display
2023-10-24 8:22 ` Hogander, Jouni
@ 2023-10-24 11:31 ` Luca Coelho
2023-10-24 12:12 ` Jani Nikula
0 siblings, 1 reply; 64+ messages in thread
From: Luca Coelho @ 2023-10-24 11:31 UTC (permalink / raw)
To: Hogander, Jouni, intel-gfx@lists.freedesktop.org; +Cc: Nikula, Jani
On Tue, 2023-10-24 at 08:22 +0000, Hogander, Jouni wrote:
> On Mon, 2023-10-23 at 17:00 +0300, Luca Coelho wrote:
> > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> > > drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> > > drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> > > drivers/gpu/drm/i915/i915_params.c | 3 ---
> > > drivers/gpu/drm/i915/i915_params.h | 1 -
> > > 5 files changed, 5 insertions(+), 5 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> > > b/drivers/gpu/drm/i915/display/intel_display.h
> > > index ba3548f9768d..bc95fb377386 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> > > @@ -552,7 +552,7 @@ bool assert_port_valid(struct drm_i915_private
> > > *i915, enum port port);
> > > struct drm_device *drm = &(__i915)-
> > > > drm; \
> > > int __ret_warn_on =
> > > !!(condition); \
> > > if
> > > (unlikely(__ret_warn_on)) \
> > > - if (!drm_WARN(drm, __i915-
> > > > params.verbose_state_checks, format)) \
> > > + if (!drm_WARN(drm, __i915-
> > > > display.params.verbose_state_checks, format)) \
> > > drm_err(drm,
> > > format); \
> > > unlikely(__ret_warn_on);
> > > \
> > > })
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > index 06e68c7fec1c..e86766639396 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > @@ -87,6 +87,9 @@
> > > intel_display_param_named_unsafe(force_reset_modeset_test, bool,
> > > 0400,
> > > intel_display_param_named(disable_display, bool, 0400,
> > > "Disable display (default: false)");
> > >
> > > +intel_display_param_named(verbose_state_checks, bool, 0400,
> > > + "Enable verbose logs (ie. WARN_ON()) in case of unexpected
> > > hw state conditions.");
> > > +
> > > intel_display_param_named_unsafe(enable_fbc, int, 0400,
> > > "Enable frame buffer compression for power savings "
> > > "(default: -1 (use per-chip default))");
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
> > > b/drivers/gpu/drm/i915/display/intel_display_params.h
> > > index 60d9c3d59fe4..b35443f51375 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> > > @@ -39,6 +39,7 @@ struct drm_i915_private;
> > > param(bool, load_detect_test, false, 0600) \
> > > param(bool, force_reset_modeset_test, false, 0600) \
> > > param(bool, disable_display, false, 0400) \
> > > + param(bool, verbose_state_checks, true, 0) \
> >
> > Why is this one 0? Why can't we even read it?
>
> I found this comment in older commit message written by Jani Nikula:
>
> "0 mode will bypass debugfs creation. Use it for verbose_state_checks
> which will need special attention in follow-up work."
This sounds pretty odd, why wouldn't we want it to be even read?
In any case, it's not related to this patch, so:
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [Intel-gfx] [PATCH v2 21/24] drm/i915/display: Move verbose_state_checks under display
2023-10-24 11:31 ` Luca Coelho
@ 2023-10-24 12:12 ` Jani Nikula
2023-10-24 12:19 ` Hogander, Jouni
0 siblings, 1 reply; 64+ messages in thread
From: Jani Nikula @ 2023-10-24 12:12 UTC (permalink / raw)
To: Luca Coelho, Hogander, Jouni, intel-gfx@lists.freedesktop.org
On Tue, 24 Oct 2023, Luca Coelho <luca@coelho.fi> wrote:
> On Tue, 2023-10-24 at 08:22 +0000, Hogander, Jouni wrote:
>> On Mon, 2023-10-23 at 17:00 +0300, Luca Coelho wrote:
>> > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
>> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
>> > > ---
>> > > drivers/gpu/drm/i915/display/intel_display.h | 2 +-
>> > > drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
>> > > drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
>> > > drivers/gpu/drm/i915/i915_params.c | 3 ---
>> > > drivers/gpu/drm/i915/i915_params.h | 1 -
>> > > 5 files changed, 5 insertions(+), 5 deletions(-)
>> > >
>> > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h
>> > > b/drivers/gpu/drm/i915/display/intel_display.h
>> > > index ba3548f9768d..bc95fb377386 100644
>> > > --- a/drivers/gpu/drm/i915/display/intel_display.h
>> > > +++ b/drivers/gpu/drm/i915/display/intel_display.h
>> > > @@ -552,7 +552,7 @@ bool assert_port_valid(struct drm_i915_private
>> > > *i915, enum port port);
>> > > struct drm_device *drm = &(__i915)-
>> > > > drm; \
>> > > int __ret_warn_on =
>> > > !!(condition); \
>> > > if
>> > > (unlikely(__ret_warn_on)) \
>> > > - if (!drm_WARN(drm, __i915-
>> > > > params.verbose_state_checks, format)) \
>> > > + if (!drm_WARN(drm, __i915-
>> > > > display.params.verbose_state_checks, format)) \
>> > > drm_err(drm,
>> > > format); \
>> > > unlikely(__ret_warn_on);
>> > > \
>> > > })
>> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
>> > > b/drivers/gpu/drm/i915/display/intel_display_params.c
>> > > index 06e68c7fec1c..e86766639396 100644
>> > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
>> > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
>> > > @@ -87,6 +87,9 @@
>> > > intel_display_param_named_unsafe(force_reset_modeset_test, bool,
>> > > 0400,
>> > > intel_display_param_named(disable_display, bool, 0400,
>> > > "Disable display (default: false)");
>> > >
>> > > +intel_display_param_named(verbose_state_checks, bool, 0400,
>> > > + "Enable verbose logs (ie. WARN_ON()) in case of unexpected
>> > > hw state conditions.");
>> > > +
>> > > intel_display_param_named_unsafe(enable_fbc, int, 0400,
>> > > "Enable frame buffer compression for power savings "
>> > > "(default: -1 (use per-chip default))");
>> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h
>> > > b/drivers/gpu/drm/i915/display/intel_display_params.h
>> > > index 60d9c3d59fe4..b35443f51375 100644
>> > > --- a/drivers/gpu/drm/i915/display/intel_display_params.h
>> > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
>> > > @@ -39,6 +39,7 @@ struct drm_i915_private;
>> > > param(bool, load_detect_test, false, 0600) \
>> > > param(bool, force_reset_modeset_test, false, 0600) \
>> > > param(bool, disable_display, false, 0400) \
>> > > + param(bool, verbose_state_checks, true, 0) \
>> >
>> > Why is this one 0? Why can't we even read it?
>>
>> I found this comment in older commit message written by Jani Nikula:
>>
>> "0 mode will bypass debugfs creation. Use it for verbose_state_checks
>> which will need special attention in follow-up work."
>
> This sounds pretty odd, why wouldn't we want it to be even read?
I *think* I remember why.
When I added the device parameters, I915_STATE_WARN(), the only user of
verbose_state_checks, did not have the i915 parameter yet. So it could
not access the device parameter.
Thus the verbose_state_checks *module* parameter had to have 0600 mode,
and modifying that runtime meant that the *device* parameter, even as
read-only, would have gone out of sync and shown a different value.
I only added the i915 parameter to I915_STATE_WARN() last May, but
clearly did not follow through with the parameter change.
From now on, it should use the device param like the rest of the code,
it should have a mutable debugfs file, and the module parameter should
be 0400.
BR,
Jani.
>
> In any case, it's not related to this patch, so:
>
> Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
>
> --
> Cheers,
> Luca.
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [Intel-gfx] [PATCH v2 21/24] drm/i915/display: Move verbose_state_checks under display
2023-10-24 12:12 ` Jani Nikula
@ 2023-10-24 12:19 ` Hogander, Jouni
0 siblings, 0 replies; 64+ messages in thread
From: Hogander, Jouni @ 2023-10-24 12:19 UTC (permalink / raw)
To: luca@coelho.fi, Nikula, Jani, intel-gfx@lists.freedesktop.org
On Tue, 2023-10-24 at 15:12 +0300, Jani Nikula wrote:
> On Tue, 24 Oct 2023, Luca Coelho <luca@coelho.fi> wrote:
> > On Tue, 2023-10-24 at 08:22 +0000, Hogander, Jouni wrote:
> > > On Mon, 2023-10-23 at 17:00 +0300, Luca Coelho wrote:
> > > > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > > ---
> > > > > drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> > > > > drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> > > > > drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> > > > > drivers/gpu/drm/i915/i915_params.c | 3 ---
> > > > > drivers/gpu/drm/i915/i915_params.h | 1 -
> > > > > 5 files changed, 5 insertions(+), 5 deletions(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.h
> > > > > b/drivers/gpu/drm/i915/display/intel_display.h
> > > > > index ba3548f9768d..bc95fb377386 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_display.h
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_display.h
> > > > > @@ -552,7 +552,7 @@ bool assert_port_valid(struct
> > > > > drm_i915_private
> > > > > *i915, enum port port);
> > > > > struct drm_device *drm = &(__i915)-
> > > > > > drm; \
> > > > > int __ret_warn_on =
> > > > > !!(condition); \
> > > > > if
> > > > > (unlikely(__ret_warn_on))
> > > > > \
> > > > > - if (!drm_WARN(drm, __i915-
> > > > > > params.verbose_state_checks, format)) \
> > > > > + if (!drm_WARN(drm, __i915-
> > > > > > display.params.verbose_state_checks, format)) \
> > > > > drm_err(drm,
> > > > > format); \
> > > > > unlikely(__ret_warn_on);
> > > > >
> > > > > \
> > > > > })
> > > > > diff --git
> > > > > a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > index 06e68c7fec1c..e86766639396 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > @@ -87,6 +87,9 @@
> > > > > intel_display_param_named_unsafe(force_reset_modeset_test,
> > > > > bool,
> > > > > 0400,
> > > > > intel_display_param_named(disable_display, bool, 0400,
> > > > > "Disable display (default: false)");
> > > > >
> > > > > +intel_display_param_named(verbose_state_checks, bool, 0400,
> > > > > + "Enable verbose logs (ie. WARN_ON()) in case of
> > > > > unexpected
> > > > > hw state conditions.");
> > > > > +
> > > > > intel_display_param_named_unsafe(enable_fbc, int, 0400,
> > > > > "Enable frame buffer compression for power savings "
> > > > > "(default: -1 (use per-chip default))");
> > > > > diff --git
> > > > > a/drivers/gpu/drm/i915/display/intel_display_params.h
> > > > > b/drivers/gpu/drm/i915/display/intel_display_params.h
> > > > > index 60d9c3d59fe4..b35443f51375 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> > > > > @@ -39,6 +39,7 @@ struct drm_i915_private;
> > > > > param(bool, load_detect_test, false, 0600) \
> > > > > param(bool, force_reset_modeset_test, false, 0600) \
> > > > > param(bool, disable_display, false, 0400) \
> > > > > + param(bool, verbose_state_checks, true, 0) \
> > > >
> > > > Why is this one 0? Why can't we even read it?
> > >
> > > I found this comment in older commit message written by Jani
> > > Nikula:
> > >
> > > "0 mode will bypass debugfs creation. Use it for
> > > verbose_state_checks
> > > which will need special attention in follow-up work."
> >
> > This sounds pretty odd, why wouldn't we want it to be even read?
>
> I *think* I remember why.
>
> When I added the device parameters, I915_STATE_WARN(), the only user
> of
> verbose_state_checks, did not have the i915 parameter yet. So it
> could
> not access the device parameter.
>
> Thus the verbose_state_checks *module* parameter had to have 0600
> mode,
> and modifying that runtime meant that the *device* parameter, even as
> read-only, would have gone out of sync and shown a different value.
>
> I only added the i915 parameter to I915_STATE_WARN() last May, but
> clearly did not follow through with the parameter change.
>
> From now on, it should use the device param like the rest of the
> code,
> it should have a mutable debugfs file, and the module parameter
> should
> be 0400.
Ok, I will still do this change and resend.
BR,
Jouni Högander
>
>
> BR,
> Jani.
>
>
> >
> > In any case, it's not related to this patch, so:
> >
> > Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
> >
> > --
> > Cheers,
> > Luca.
>
> --
> Jani Nikula, Intel
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 22/24] drm/i915/display: Move nuclear_pageflip under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (20 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 21/24] drm/i915/display: Move verbose_state_checks under display Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 14:01 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 23/24] drm/i915/display: Move enable_dp_mst " Jouni Högander
` (5 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_device.c | 2 +-
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index 50841818fb59..0b522c6a8d6f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1113,7 +1113,7 @@ void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
}
/* Disable nuclear pageflip by default on pre-g4x */
- if (!i915->params.nuclear_pageflip &&
+ if (!i915->display.params.nuclear_pageflip &&
DISPLAY_VER(i915) < 5 && !IS_G4X(i915))
i915->drm.driver_features &= ~DRIVER_ATOMIC;
}
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index e86766639396..3045a1b9b704 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -90,6 +90,9 @@ intel_display_param_named(disable_display, bool, 0400,
intel_display_param_named(verbose_state_checks, bool, 0400,
"Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
+intel_display_param_named_unsafe(nuclear_pageflip, bool, 0400,
+ "Force enable atomic functionality on platforms that don't have full support yet.");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index b35443f51375..d25e17f88a78 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -40,6 +40,7 @@ struct drm_i915_private;
param(bool, force_reset_modeset_test, false, 0600) \
param(bool, disable_display, false, 0400) \
param(bool, verbose_state_checks, true, 0) \
+ param(bool, nuclear_pageflip, false, 0400) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 72614c139222..18424873442d 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -93,9 +93,6 @@ i915_param_named(mmio_debug, int, 0400,
"Enable the MMIO debug code for the first N failures (default: off). "
"This may negatively affect performance.");
-i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
- "Force enable atomic functionality on platforms that don't have full support yet.");
-
i915_param_named_unsafe(enable_guc, int, 0400,
"Enable GuC load for GuC submission and/or HuC load. "
"Required functionality can be selected using bitmask values. "
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index 4b543beb17ca..c7fff571db2c 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -64,7 +64,6 @@ struct drm_printer;
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
- param(bool, nuclear_pageflip, false, 0400) \
param(bool, enable_dp_mst, true, 0600) \
param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 : 0)
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 22/24] drm/i915/display: Move nuclear_pageflip under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 22/24] drm/i915/display: Move nuclear_pageflip " Jouni Högander
@ 2023-10-23 14:01 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 14:01 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_device.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/i915_params.c | 3 ---
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 5 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
> index 50841818fb59..0b522c6a8d6f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_device.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_device.c
> @@ -1113,7 +1113,7 @@ void intel_display_device_info_runtime_init(struct drm_i915_private *i915)
> }
>
> /* Disable nuclear pageflip by default on pre-g4x */
> - if (!i915->params.nuclear_pageflip &&
> + if (!i915->display.params.nuclear_pageflip &&
> DISPLAY_VER(i915) < 5 && !IS_G4X(i915))
> i915->drm.driver_features &= ~DRIVER_ATOMIC;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index e86766639396..3045a1b9b704 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -90,6 +90,9 @@ intel_display_param_named(disable_display, bool, 0400,
> intel_display_param_named(verbose_state_checks, bool, 0400,
> "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
>
> +intel_display_param_named_unsafe(nuclear_pageflip, bool, 0400,
> + "Force enable atomic functionality on platforms that don't have full support yet.");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index b35443f51375..d25e17f88a78 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -40,6 +40,7 @@ struct drm_i915_private;
> param(bool, force_reset_modeset_test, false, 0600) \
> param(bool, disable_display, false, 0400) \
> param(bool, verbose_state_checks, true, 0) \
> + param(bool, nuclear_pageflip, false, 0400) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 72614c139222..18424873442d 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -93,9 +93,6 @@ i915_param_named(mmio_debug, int, 0400,
> "Enable the MMIO debug code for the first N failures (default: off). "
> "This may negatively affect performance.");
>
> -i915_param_named_unsafe(nuclear_pageflip, bool, 0400,
> - "Force enable atomic functionality on platforms that don't have full support yet.");
> -
> i915_param_named_unsafe(enable_guc, int, 0400,
> "Enable GuC load for GuC submission and/or HuC load. "
> "Required functionality can be selected using bitmask values. "
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index 4b543beb17ca..c7fff571db2c 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -64,7 +64,6 @@ struct drm_printer;
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> - param(bool, nuclear_pageflip, false, 0400) \
> param(bool, enable_dp_mst, true, 0600) \
> param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 : 0)
>
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 23/24] drm/i915/display: Move enable_dp_mst under display
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (21 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 22/24] drm/i915/display: Move nuclear_pageflip " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 14:01 ` Luca Coelho
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 24/24] drm/i915/display: Use same permissions for enable_sagv as for rest Jouni Högander
` (4 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 6 +++---
drivers/gpu/drm/i915/i915_params.c | 3 ---
drivers/gpu/drm/i915/i915_params.h | 1 -
5 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 3045a1b9b704..8e6353c1c25e 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -93,6 +93,9 @@ intel_display_param_named(verbose_state_checks, bool, 0400,
intel_display_param_named_unsafe(nuclear_pageflip, bool, 0400,
"Force enable atomic functionality on platforms that don't have full support yet.");
+intel_display_param_named_unsafe(enable_dp_mst, bool, 0400,
+ "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)");
+
intel_display_param_named_unsafe(enable_fbc, int, 0400,
"Enable frame buffer compression for power savings "
"(default: -1 (use per-chip default))");
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
index d25e17f88a78..83c4429ada35 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.h
+++ b/drivers/gpu/drm/i915/display/intel_display_params.h
@@ -41,6 +41,7 @@ struct drm_i915_private;
param(bool, disable_display, false, 0400) \
param(bool, verbose_state_checks, true, 0) \
param(bool, nuclear_pageflip, false, 0400) \
+ param(bool, enable_dp_mst, true, 0600) \
param(int, enable_fbc, -1, 0600) \
param(int, enable_psr, -1, 0600) \
param(bool, psr_safest_params, false, 0400) \
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
index 4f6835a7578e..f90d8cace6a6 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -3749,7 +3749,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)
{
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
- return i915->params.enable_dp_mst &&
+ return i915->display.params.enable_dp_mst &&
intel_dp_mst_source_support(intel_dp) &&
drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
}
@@ -3767,13 +3767,13 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
encoder->base.base.id, encoder->base.name,
str_yes_no(intel_dp_mst_source_support(intel_dp)),
str_yes_no(sink_can_mst),
- str_yes_no(i915->params.enable_dp_mst));
+ str_yes_no(i915->display.params.enable_dp_mst));
if (!intel_dp_mst_source_support(intel_dp))
return;
intel_dp->is_mst = sink_can_mst &&
- i915->params.enable_dp_mst;
+ i915->display.params.enable_dp_mst;
drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,
intel_dp->is_mst);
diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
index 18424873442d..de43048543e8 100644
--- a/drivers/gpu/drm/i915/i915_params.c
+++ b/drivers/gpu/drm/i915/i915_params.c
@@ -114,9 +114,6 @@ i915_param_named_unsafe(dmc_firmware_path, charp, 0400,
i915_param_named_unsafe(gsc_firmware_path, charp, 0400,
"GSC firmware path to use instead of the default one");
-i915_param_named_unsafe(enable_dp_mst, bool, 0400,
- "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)");
-
#if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
i915_param_named_unsafe(inject_probe_failure, uint, 0400,
"Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)");
diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
index c7fff571db2c..1315d7fac850 100644
--- a/drivers/gpu/drm/i915/i915_params.h
+++ b/drivers/gpu/drm/i915/i915_params.h
@@ -64,7 +64,6 @@ struct drm_printer;
/* leave bools at the end to not create holes */ \
param(bool, enable_hangcheck, true, 0600) \
param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
- param(bool, enable_dp_mst, true, 0600) \
param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 : 0)
#define MEMBER(T, member, ...) T member;
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 23/24] drm/i915/display: Move enable_dp_mst under display
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 23/24] drm/i915/display: Move enable_dp_mst " Jouni Högander
@ 2023-10-23 14:01 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 14:01 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 3 +++
> drivers/gpu/drm/i915/display/intel_display_params.h | 1 +
> drivers/gpu/drm/i915/display/intel_dp.c | 6 +++---
> drivers/gpu/drm/i915/i915_params.c | 3 ---
> drivers/gpu/drm/i915/i915_params.h | 1 -
> 5 files changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 3045a1b9b704..8e6353c1c25e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -93,6 +93,9 @@ intel_display_param_named(verbose_state_checks, bool, 0400,
> intel_display_param_named_unsafe(nuclear_pageflip, bool, 0400,
> "Force enable atomic functionality on platforms that don't have full support yet.");
>
> +intel_display_param_named_unsafe(enable_dp_mst, bool, 0400,
> + "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)");
> +
> intel_display_param_named_unsafe(enable_fbc, int, 0400,
> "Enable frame buffer compression for power savings "
> "(default: -1 (use per-chip default))");
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.h b/drivers/gpu/drm/i915/display/intel_display_params.h
> index d25e17f88a78..83c4429ada35 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.h
> @@ -41,6 +41,7 @@ struct drm_i915_private;
> param(bool, disable_display, false, 0400) \
> param(bool, verbose_state_checks, true, 0) \
> param(bool, nuclear_pageflip, false, 0400) \
> + param(bool, enable_dp_mst, true, 0600) \
> param(int, enable_fbc, -1, 0600) \
> param(int, enable_psr, -1, 0600) \
> param(bool, psr_safest_params, false, 0400) \
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index 4f6835a7578e..f90d8cace6a6 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -3749,7 +3749,7 @@ intel_dp_can_mst(struct intel_dp *intel_dp)
> {
> struct drm_i915_private *i915 = dp_to_i915(intel_dp);
>
> - return i915->params.enable_dp_mst &&
> + return i915->display.params.enable_dp_mst &&
> intel_dp_mst_source_support(intel_dp) &&
> drm_dp_read_mst_cap(&intel_dp->aux, intel_dp->dpcd);
> }
> @@ -3767,13 +3767,13 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
> encoder->base.base.id, encoder->base.name,
> str_yes_no(intel_dp_mst_source_support(intel_dp)),
> str_yes_no(sink_can_mst),
> - str_yes_no(i915->params.enable_dp_mst));
> + str_yes_no(i915->display.params.enable_dp_mst));
>
> if (!intel_dp_mst_source_support(intel_dp))
> return;
>
> intel_dp->is_mst = sink_can_mst &&
> - i915->params.enable_dp_mst;
> + i915->display.params.enable_dp_mst;
>
> drm_dp_mst_topology_mgr_set_mst(&intel_dp->mst_mgr,
> intel_dp->is_mst);
> diff --git a/drivers/gpu/drm/i915/i915_params.c b/drivers/gpu/drm/i915/i915_params.c
> index 18424873442d..de43048543e8 100644
> --- a/drivers/gpu/drm/i915/i915_params.c
> +++ b/drivers/gpu/drm/i915/i915_params.c
> @@ -114,9 +114,6 @@ i915_param_named_unsafe(dmc_firmware_path, charp, 0400,
> i915_param_named_unsafe(gsc_firmware_path, charp, 0400,
> "GSC firmware path to use instead of the default one");
>
> -i915_param_named_unsafe(enable_dp_mst, bool, 0400,
> - "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)");
> -
> #if IS_ENABLED(CONFIG_DRM_I915_DEBUG)
> i915_param_named_unsafe(inject_probe_failure, uint, 0400,
> "Force an error after a number of failure check points (0:disabled (default), N:force failure at the Nth failure check point)");
> diff --git a/drivers/gpu/drm/i915/i915_params.h b/drivers/gpu/drm/i915/i915_params.h
> index c7fff571db2c..1315d7fac850 100644
> --- a/drivers/gpu/drm/i915/i915_params.h
> +++ b/drivers/gpu/drm/i915/i915_params.h
> @@ -64,7 +64,6 @@ struct drm_printer;
> /* leave bools at the end to not create holes */ \
> param(bool, enable_hangcheck, true, 0600) \
> param(bool, error_capture, true, IS_ENABLED(CONFIG_DRM_I915_CAPTURE_ERROR) ? 0600 : 0) \
> - param(bool, enable_dp_mst, true, 0600) \
> param(bool, enable_gvt, false, IS_ENABLED(CONFIG_DRM_I915_GVT) ? 0400 : 0)
>
> #define MEMBER(T, member, ...) T member;
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] [PATCH v2 24/24] drm/i915/display: Use same permissions for enable_sagv as for rest
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (22 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 23/24] drm/i915/display: Move enable_dp_mst " Jouni Högander
@ 2023-10-16 11:16 ` Jouni Högander
2023-10-23 14:06 ` Luca Coelho
2023-10-16 11:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Framework for display parameters (rev3) Patchwork
` (3 subsequent siblings)
27 siblings, 1 reply; 64+ messages in thread
From: Jouni Högander @ 2023-10-16 11:16 UTC (permalink / raw)
To: intel-gfx
Generally we have writable device parameters in debugfs. No need
to allow writing module parameters.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_params.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
index 8e6353c1c25e..077f2dee2975 100644
--- a/drivers/gpu/drm/i915/display/intel_display_params.c
+++ b/drivers/gpu/drm/i915/display/intel_display_params.c
@@ -50,7 +50,7 @@ intel_display_param_named_unsafe(enable_dc, int, 0400,
intel_display_param_named_unsafe(enable_dpt, bool, 0400,
"Enable display page table (DPT) (default: true)");
-intel_display_param_named_unsafe(enable_sagv, bool, 0600,
+intel_display_param_named_unsafe(enable_sagv, bool, 0400,
"Enable system agent voltage/frequency scaling (SAGV) (default: true)");
intel_display_param_named_unsafe(disable_power_well, int, 0400,
--
2.34.1
^ permalink raw reply related [flat|nested] 64+ messages in thread* Re: [Intel-gfx] [PATCH v2 24/24] drm/i915/display: Use same permissions for enable_sagv as for rest
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 24/24] drm/i915/display: Use same permissions for enable_sagv as for rest Jouni Högander
@ 2023-10-23 14:06 ` Luca Coelho
2023-10-24 8:51 ` Hogander, Jouni
0 siblings, 1 reply; 64+ messages in thread
From: Luca Coelho @ 2023-10-23 14:06 UTC (permalink / raw)
To: Jouni Högander, intel-gfx
On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> Generally we have writable device parameters in debugfs. No need
> to allow writing module parameters.
>
> Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display_params.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c b/drivers/gpu/drm/i915/display/intel_display_params.c
> index 8e6353c1c25e..077f2dee2975 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> @@ -50,7 +50,7 @@ intel_display_param_named_unsafe(enable_dc, int, 0400,
> intel_display_param_named_unsafe(enable_dpt, bool, 0400,
> "Enable display page table (DPT) (default: true)");
>
> -intel_display_param_named_unsafe(enable_sagv, bool, 0600,
> +intel_display_param_named_unsafe(enable_sagv, bool, 0400,
> "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
>
> intel_display_param_named_unsafe(disable_power_well, int, 0400,
This, as well as other similar changes throughout this series, could be
controversial, since it's a userspace API change of sorts. It used to
be possible to write but it won't be anymore. But, as we discussed
offline, it shouldn't be problem, because probably nobody is writing to
them, and most likely doing so wouldn't have the expected result, since
the device copies were not getting updated.
Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [Intel-gfx] [PATCH v2 24/24] drm/i915/display: Use same permissions for enable_sagv as for rest
2023-10-23 14:06 ` Luca Coelho
@ 2023-10-24 8:51 ` Hogander, Jouni
2023-10-24 11:33 ` Luca Coelho
0 siblings, 1 reply; 64+ messages in thread
From: Hogander, Jouni @ 2023-10-24 8:51 UTC (permalink / raw)
To: luca@coelho.fi, intel-gfx@lists.freedesktop.org
On Mon, 2023-10-23 at 17:06 +0300, Luca Coelho wrote:
> On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > Generally we have writable device parameters in debugfs. No need
> > to allow writing module parameters.
> >
> > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_display_params.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > index 8e6353c1c25e..077f2dee2975 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > @@ -50,7 +50,7 @@ intel_display_param_named_unsafe(enable_dc, int,
> > 0400,
> > intel_display_param_named_unsafe(enable_dpt, bool, 0400,
> > "Enable display page table (DPT) (default: true)");
> >
> > -intel_display_param_named_unsafe(enable_sagv, bool, 0600,
> > +intel_display_param_named_unsafe(enable_sagv, bool, 0400,
> > "Enable system agent voltage/frequency scaling (SAGV)
> > (default: true)");
> >
> > intel_display_param_named_unsafe(disable_power_well, int, 0400,
>
> This, as well as other similar changes throughout this series, could
> be
> controversial, since it's a userspace API change of sorts. It used
> to
> be possible to write but it won't be anymore. But, as we discussed
> offline, it shouldn't be problem, because probably nobody is writing
> to
> them, and most likely doing so wouldn't have the expected result,
> since
> the device copies were not getting updated.
>
> Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
Thank you Luca. I actually moved this change to patch 11 due to your
comment there and added your rb tag there. I was planning to drop this
patch. Are you fine with this?
BR,
Jouni Högander
>
> --
> Cheers,
> Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [Intel-gfx] [PATCH v2 24/24] drm/i915/display: Use same permissions for enable_sagv as for rest
2023-10-24 8:51 ` Hogander, Jouni
@ 2023-10-24 11:33 ` Luca Coelho
2023-10-24 12:15 ` Jani Nikula
0 siblings, 1 reply; 64+ messages in thread
From: Luca Coelho @ 2023-10-24 11:33 UTC (permalink / raw)
To: Hogander, Jouni, intel-gfx@lists.freedesktop.org
On Tue, 2023-10-24 at 08:51 +0000, Hogander, Jouni wrote:
> On Mon, 2023-10-23 at 17:06 +0300, Luca Coelho wrote:
> > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > Generally we have writable device parameters in debugfs. No need
> > > to allow writing module parameters.
> > >
> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > ---
> > > drivers/gpu/drm/i915/display/intel_display_params.c | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > index 8e6353c1c25e..077f2dee2975 100644
> > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > @@ -50,7 +50,7 @@ intel_display_param_named_unsafe(enable_dc, int,
> > > 0400,
> > > intel_display_param_named_unsafe(enable_dpt, bool, 0400,
> > > "Enable display page table (DPT) (default: true)");
> > >
> > > -intel_display_param_named_unsafe(enable_sagv, bool, 0600,
> > > +intel_display_param_named_unsafe(enable_sagv, bool, 0400,
> > > "Enable system agent voltage/frequency scaling (SAGV)
> > > (default: true)");
> > >
> > > intel_display_param_named_unsafe(disable_power_well, int, 0400,
> >
> > This, as well as other similar changes throughout this series, could
> > be
> > controversial, since it's a userspace API change of sorts. It used
> > to
> > be possible to write but it won't be anymore. But, as we discussed
> > offline, it shouldn't be problem, because probably nobody is writing
> > to
> > them, and most likely doing so wouldn't have the expected result,
> > since
> > the device copies were not getting updated.
> >
> > Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
>
> Thank you Luca. I actually moved this change to patch 11 due to your
> comment there and added your rb tag there. I was planning to drop this
> patch. Are you fine with this?
Yes, this is fine. I'll review your cahnges in v3 and give the missing
r-b tags there, if applicable.
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [Intel-gfx] [PATCH v2 24/24] drm/i915/display: Use same permissions for enable_sagv as for rest
2023-10-24 11:33 ` Luca Coelho
@ 2023-10-24 12:15 ` Jani Nikula
2023-10-24 12:50 ` Luca Coelho
0 siblings, 1 reply; 64+ messages in thread
From: Jani Nikula @ 2023-10-24 12:15 UTC (permalink / raw)
To: Luca Coelho, Hogander, Jouni, intel-gfx@lists.freedesktop.org
On Tue, 24 Oct 2023, Luca Coelho <luca@coelho.fi> wrote:
> On Tue, 2023-10-24 at 08:51 +0000, Hogander, Jouni wrote:
>> On Mon, 2023-10-23 at 17:06 +0300, Luca Coelho wrote:
>> > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
>> > > Generally we have writable device parameters in debugfs. No need
>> > > to allow writing module parameters.
>> > >
>> > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
>> > > ---
>> > > drivers/gpu/drm/i915/display/intel_display_params.c | 2 +-
>> > > 1 file changed, 1 insertion(+), 1 deletion(-)
>> > >
>> > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
>> > > b/drivers/gpu/drm/i915/display/intel_display_params.c
>> > > index 8e6353c1c25e..077f2dee2975 100644
>> > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
>> > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
>> > > @@ -50,7 +50,7 @@ intel_display_param_named_unsafe(enable_dc, int,
>> > > 0400,
>> > > intel_display_param_named_unsafe(enable_dpt, bool, 0400,
>> > > "Enable display page table (DPT) (default: true)");
>> > >
>> > > -intel_display_param_named_unsafe(enable_sagv, bool, 0600,
>> > > +intel_display_param_named_unsafe(enable_sagv, bool, 0400,
>> > > "Enable system agent voltage/frequency scaling (SAGV)
>> > > (default: true)");
>> > >
>> > > intel_display_param_named_unsafe(disable_power_well, int, 0400,
>> >
>> > This, as well as other similar changes throughout this series, could
>> > be
>> > controversial, since it's a userspace API change of sorts. It used
>> > to
>> > be possible to write but it won't be anymore. But, as we discussed
>> > offline, it shouldn't be problem, because probably nobody is writing
>> > to
>> > them, and most likely doing so wouldn't have the expected result,
>> > since
>> > the device copies were not getting updated.
>> >
>> > Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
>>
>> Thank you Luca. I actually moved this change to patch 11 due to your
>> comment there and added your rb tag there. I was planning to drop this
>> patch. Are you fine with this?
>
> Yes, this is fine. I'll review your cahnges in v3 and give the missing
> r-b tags there, if applicable.
I think this change is good and frankly needed. It's confusing to be
able to modify the module param without it having any effect.
These are for debug, the param is designated "unsafe", and for these I
don't really care if someone complains they can't write to the file
anymore.
BR,
Jani.
>
> --
> Cheers,
> Luca.
--
Jani Nikula, Intel
^ permalink raw reply [flat|nested] 64+ messages in thread
* Re: [Intel-gfx] [PATCH v2 24/24] drm/i915/display: Use same permissions for enable_sagv as for rest
2023-10-24 12:15 ` Jani Nikula
@ 2023-10-24 12:50 ` Luca Coelho
0 siblings, 0 replies; 64+ messages in thread
From: Luca Coelho @ 2023-10-24 12:50 UTC (permalink / raw)
To: Jani Nikula, Hogander, Jouni, intel-gfx@lists.freedesktop.org
On Tue, 2023-10-24 at 15:15 +0300, Jani Nikula wrote:
> On Tue, 24 Oct 2023, Luca Coelho <luca@coelho.fi> wrote:
> > On Tue, 2023-10-24 at 08:51 +0000, Hogander, Jouni wrote:
> > > On Mon, 2023-10-23 at 17:06 +0300, Luca Coelho wrote:
> > > > On Mon, 2023-10-16 at 14:16 +0300, Jouni Högander wrote:
> > > > > Generally we have writable device parameters in debugfs. No need
> > > > > to allow writing module parameters.
> > > > >
> > > > > Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
> > > > > ---
> > > > > drivers/gpu/drm/i915/display/intel_display_params.c | 2 +-
> > > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > index 8e6353c1c25e..077f2dee2975 100644
> > > > > --- a/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > +++ b/drivers/gpu/drm/i915/display/intel_display_params.c
> > > > > @@ -50,7 +50,7 @@ intel_display_param_named_unsafe(enable_dc, int,
> > > > > 0400,
> > > > > intel_display_param_named_unsafe(enable_dpt, bool, 0400,
> > > > > "Enable display page table (DPT) (default: true)");
> > > > >
> > > > > -intel_display_param_named_unsafe(enable_sagv, bool, 0600,
> > > > > +intel_display_param_named_unsafe(enable_sagv, bool, 0400,
> > > > > "Enable system agent voltage/frequency scaling (SAGV)
> > > > > (default: true)");
> > > > >
> > > > > intel_display_param_named_unsafe(disable_power_well, int, 0400,
> > > >
> > > > This, as well as other similar changes throughout this series, could
> > > > be
> > > > controversial, since it's a userspace API change of sorts. It used
> > > > to
> > > > be possible to write but it won't be anymore. But, as we discussed
> > > > offline, it shouldn't be problem, because probably nobody is writing
> > > > to
> > > > them, and most likely doing so wouldn't have the expected result,
> > > > since
> > > > the device copies were not getting updated.
> > > >
> > > > Reviewed-by: Luca Coelho <luciano.coelho@intel.com>
> > >
> > > Thank you Luca. I actually moved this change to patch 11 due to your
> > > comment there and added your rb tag there. I was planning to drop this
> > > patch. Are you fine with this?
> >
> > Yes, this is fine. I'll review your cahnges in v3 and give the missing
> > r-b tags there, if applicable.
>
> I think this change is good and frankly needed. It's confusing to be
> able to modify the module param without it having any effect.
>
> These are for debug, the param is designated "unsafe", and for these I
> don't really care if someone complains they can't write to the file
> anymore.
Right, this was my conclusion as well, and thus, got my r-b. :)
--
Cheers,
Luca.
^ permalink raw reply [flat|nested] 64+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Framework for display parameters (rev3)
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (23 preceding siblings ...)
2023-10-16 11:16 ` [Intel-gfx] [PATCH v2 24/24] drm/i915/display: Use same permissions for enable_sagv as for rest Jouni Högander
@ 2023-10-16 11:42 ` Patchwork
2023-10-16 11:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
27 siblings, 0 replies; 64+ messages in thread
From: Patchwork @ 2023-10-16 11:42 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-gfx
== Series Details ==
Series: Framework for display parameters (rev3)
URL : https://patchwork.freedesktop.org/series/124645/
State : warning
== Summary ==
Error: dim checkpatch failed
b5f879154dd6 drm/i915/display: Add framework to add parameters specific to display
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
File "scripts/spdxcheck.py", line 6, in <module>
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:79: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#79:
new file mode 100644
-:207: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#207: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:124:
+intel_display_debugfs_create_int(const char *name, umode_t mode,
+ struct dentry *parent, int *value)
-:216: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#216: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:133:
+intel_display_debugfs_create_uint(const char *name, umode_t mode,
+ struct dentry *parent, unsigned int *value)
-:223: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mode' - possible side-effects?
#223: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:140:
+#define _intel_display_param_create_file(parent, name, mode, valp) \
+ do { \
+ if (mode) \
+ _Generic(valp, \
+ bool * : debugfs_create_bool, \
+ int * : intel_display_debugfs_create_int, \
+ unsigned int * : intel_display_debugfs_create_uint, \
+ unsigned long * : debugfs_create_ulong, \
+ char ** : debugfs_create_str) \
+ (name, mode, parent, valp); \
+ } while (0)
-:223: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'valp' - possible side-effects?
#223: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:140:
+#define _intel_display_param_create_file(parent, name, mode, valp) \
+ do { \
+ if (mode) \
+ _Generic(valp, \
+ bool * : debugfs_create_bool, \
+ int * : intel_display_debugfs_create_int, \
+ unsigned int * : intel_display_debugfs_create_uint, \
+ unsigned long * : debugfs_create_ulong, \
+ char ** : debugfs_create_str) \
+ (name, mode, parent, valp); \
+ } while (0)
-:226: CHECK:CAMELCASE: Avoid CamelCase: <_Generic>
#226: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:143:
+ _Generic(valp, \
-:231: CHECK:SPACING: spaces preferred around that '*' (ctx:WxO)
#231: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:148:
+ char ** : debugfs_create_str) \
^
-:231: ERROR:SPACING: space prohibited after that '*' (ctx:OxW)
#231: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:148:
+ char ** : debugfs_create_str) \
^
-:255: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#255: FILE: drivers/gpu/drm/i915/display/intel_display_debugfs_params.c:172:
+#define REGISTER(T, x, unused, mode, ...) _intel_display_param_create_file( \
+ dir, #x, mode, &i915->display.params.x);
-:332: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'name' - possible side-effects?
#332: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:9:
+#define intel_display_param_named(name, T, perm, desc) \
+ module_param_named(name, intel_display_modparams.name, T, perm); \
+ MODULE_PARM_DESC(name, desc)
-:335: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'name' - possible side-effects?
#335: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:12:
+#define intel_display_param_named_unsafe(name, T, perm, desc) \
+ module_param_named_unsafe(name, intel_display_modparams.name, T, perm); \
+ MODULE_PARM_DESC(name, desc)
-:344: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#344: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:21:
+};
+/*
-:362: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#362: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:39:
+#define _param_dup(valp) \
+ _Generic(valp, \
+ char ** : _param_dup_charp, \
+ default : _param_nop) \
+ (valp)
-:362: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'valp' - possible side-effects?
#362: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:39:
+#define _param_dup(valp) \
+ _Generic(valp, \
+ char ** : _param_dup_charp, \
+ default : _param_nop) \
+ (valp)
-:364: CHECK:SPACING: spaces preferred around that '*' (ctx:WxO)
#364: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:41:
+ char ** : _param_dup_charp, \
^
-:364: ERROR:SPACING: space prohibited after that '*' (ctx:OxW)
#364: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:41:
+ char ** : _param_dup_charp, \
^
-:365: WARNING:TABSTOP: Statements should start on a tabstop
#365: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:42:
+ default : _param_nop) \
-:365: ERROR:TRAILING_STATEMENTS: trailing statements should be on next line
#365: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:42:
+ default : _param_nop) \
-:371: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'x' may be better as '(x)' to avoid precedence issues
#371: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:48:
+#define DUP(T, x, ...) _param_dup(&dest->x);
-:371: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#371: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:48:
+#define DUP(T, x, ...) _param_dup(&dest->x);
-:382: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#382: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:59:
+#define _param_free(valp) \
+ _Generic(valp, \
+ char ** : _param_free_charp, \
+ default : _param_nop) \
+ (valp)
-:382: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'valp' - possible side-effects?
#382: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:59:
+#define _param_free(valp) \
+ _Generic(valp, \
+ char ** : _param_free_charp, \
+ default : _param_nop) \
+ (valp)
-:384: CHECK:SPACING: spaces preferred around that '*' (ctx:WxO)
#384: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:61:
+ char ** : _param_free_charp, \
^
-:384: ERROR:SPACING: space prohibited after that '*' (ctx:OxW)
#384: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:61:
+ char ** : _param_free_charp, \
^
-:385: WARNING:TABSTOP: Statements should start on a tabstop
#385: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:62:
+ default : _param_nop) \
-:385: ERROR:TRAILING_STATEMENTS: trailing statements should be on next line
#385: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:62:
+ default : _param_nop) \
-:391: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'x' may be better as '(x)' to avoid precedence issues
#391: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:68:
+#define FREE(T, x, ...) _param_free(¶ms->x);
-:391: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#391: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:68:
+#define FREE(T, x, ...) _param_free(¶ms->x);
-:401: WARNING:SPDX_LICENSE_TAG: Improper SPDX comment style for 'drivers/gpu/drm/i915/display/intel_display_params.h', please use '/*' instead
#401: FILE: drivers/gpu/drm/i915/display/intel_display_params.h:1:
+// SPDX-License-Identifier: MIT
-:401: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#401: FILE: drivers/gpu/drm/i915/display/intel_display_params.h:1:
+// SPDX-License-Identifier: MIT
-:425: ERROR:MULTISTATEMENT_MACRO_USE_DO_WHILE: Macros with multiple statements should be enclosed in a do - while loop
#425: FILE: drivers/gpu/drm/i915/display/intel_display_params.h:25:
+#define MEMBER(T, member, ...) T member;
-:425: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#425: FILE: drivers/gpu/drm/i915/display/intel_display_params.h:25:
+#define MEMBER(T, member, ...) T member;
-:429: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#429: FILE: drivers/gpu/drm/i915/display/intel_display_params.h:29:
+};
+#undef MEMBER
total: 8 errors, 9 warnings, 16 checks, 372 lines checked
a9ecd43fe419 drm/i915/display: Dump also display parameters
-:62: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'val' - possible side-effects?
#62: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:65:
+#define _param_print(p, driver_name, name, val) \
+ _Generic(val, \
+ bool : _param_print_bool, \
+ int : _param_print_int, \
+ unsigned int : _param_print_uint, \
+ unsigned long : _param_print_ulong, \
+ char * : _param_print_charp)(p, driver_name, name, val)
-:63: CHECK:CAMELCASE: Avoid CamelCase: <_Generic>
#63: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:66:
+ _Generic(val, \
-:79: WARNING:TRAILING_SEMICOLON: macros should not use a trailing semicolon
#79: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:82:
+#define PRINT(T, x, ...) _param_print(p, i915->drm.driver->name, #x, i915->display.params.x);
total: 0 errors, 1 warnings, 2 checks, 128 lines checked
1bdf32e74da2 drm/i915/display: Move enable_fbc module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:34: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#34: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:31:
+intel_display_param_named_unsafe(enable_fbc, int, 0400,
+ "Enable frame buffer compression for power savings "
total: 0 errors, 1 warnings, 1 checks, 73 lines checked
3c6c64b6178d drm/i915/display: Move psr related module parameters under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:35:
+intel_display_param_named_unsafe(enable_psr, int, 0400,
+ "Enable PSR "
-:26: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#26: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:40:
+intel_display_param_named(psr_safest_params, bool, 0400,
+ "Replace PSR VBT parameters by the safest and not optimal ones. This "
-:31: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#31: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:45:
+intel_display_param_named_unsafe(enable_psr2_sel_fetch, bool, 0400,
+ "Enable PSR2 selective fetch "
total: 0 errors, 1 warnings, 3 checks, 120 lines checked
5b094ffa8588 drm/i915/display: Move vbt_firmware module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:31:
+intel_display_param_named_unsafe(vbt_firmware, charp, 0400,
+ "Load VBT from specified file under /lib/firmware");
total: 0 errors, 1 warnings, 1 checks, 40 lines checked
cfdfe93121b3 drm/i915/display: Move lvds_channel_mode module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:34:
+intel_display_param_named_unsafe(lvds_channel_mode, int, 0400,
+ "Specify LVDS channel mode "
total: 0 errors, 1 warnings, 1 checks, 46 lines checked
7fc5e6b8c19b drm/i915/display: Move panel_use_ssc module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:38:
+intel_display_param_named_unsafe(panel_use_ssc, int, 0400,
+ "Use Spread Spectrum Clock with panels [LVDS/eDP] "
total: 0 errors, 1 warnings, 1 checks, 44 lines checked
6c9d449fc6f9 drm/i915/display: Move vbt_sdvo_panel_type module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:34: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#34: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:42:
+intel_display_param_named_unsafe(vbt_sdvo_panel_type, int, 0400,
+ "Override/Ignore selection of SDVO panel mode in the VBT "
total: 0 errors, 1 warnings, 1 checks, 42 lines checked
26d5fef4237d drm/i915/display: Move enable_dc module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:46:
+intel_display_param_named_unsafe(enable_dc, int, 0400,
+ "Enable power-saving display C-states. "
total: 0 errors, 1 warnings, 1 checks, 44 lines checked
49ea7e891aeb drm/i915/display: Move enable_dpt module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:51:
+intel_display_param_named_unsafe(enable_dpt, bool, 0400,
+ "Enable display page table (DPT) (default: true)");
total: 0 errors, 1 warnings, 1 checks, 63 lines checked
7626e8cbd21a drm/i915/display: Move enable_sagv module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:54:
+intel_display_param_named_unsafe(enable_sagv, bool, 0600,
+ "Enable system agent voltage/frequency scaling (SAGV) (default: true)");
total: 0 errors, 1 warnings, 1 checks, 49 lines checked
823f9537a15a drm/i915/display: Move disable_power_well module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:57:
+intel_display_param_named_unsafe(disable_power_well, int, 0400,
+ "Disable display power wells when possible "
total: 0 errors, 1 warnings, 1 checks, 77 lines checked
e2ae9e3b50a4 drm/i915/display: Move enable_ips module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
total: 0 errors, 1 warnings, 0 checks, 46 lines checked
e0af7fbee796 drm/i915/display: Move invert_brightness module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:53: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#53: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:63:
+intel_display_param_named_unsafe(invert_brightness, int, 0400,
+ "Invert backlight brightness "
total: 0 errors, 1 warnings, 1 checks, 65 lines checked
12e14692bad7 drm/i915/display: Move edp_vswing module parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:38: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#38: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:71:
+intel_display_param_named_unsafe(edp_vswing, int, 0400,
+ "Ignore/Override vswing pre-emph table selection from VBT "
total: 0 errors, 1 warnings, 1 checks, 49 lines checked
7d0be537e0e2 drm/i915/display: Move enable_dpcd_backlightmodule parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:76:
+intel_display_param_named(enable_dpcd_backlight, int, 0400,
+ "Enable support for DPCD backlight control"
total: 0 errors, 1 warnings, 1 checks, 50 lines checked
af46e2f0298d drm/i915/display: Move load_detect_test parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:43: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#43: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:80:
+intel_display_param_named_unsafe(load_detect_test, bool, 0400,
+ "Force-enable the VGA load detect code for testing (default:false). "
total: 0 errors, 1 warnings, 1 checks, 50 lines checked
37c4f496e191 drm/i915/display: Move force_reset_modeset_test parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:21: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#21: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:84:
+intel_display_param_named_unsafe(force_reset_modeset_test, bool, 0400,
+ "Force a modeset during gpu reset for testing (default:false). "
total: 0 errors, 1 warnings, 1 checks, 43 lines checked
bd12ea3feddf drm/i915/display: Move disable_display parameter under display
-:11: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:33: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#33: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:88:
+intel_display_param_named(disable_display, bool, 0400,
+ "Disable display (default: false)");
total: 0 errors, 1 warnings, 1 checks, 41 lines checked
22a1c56acd14 drm/i915/display: Use device parameters instead of module in I915_STATE_WARN
-:38: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#38: FILE: drivers/gpu/drm/i915/i915_params.c:97:
+i915_param_named(verbose_state_checks, bool, 0400,
"Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
total: 0 errors, 0 warnings, 1 checks, 17 lines checked
07c9bfa33f61 drm/i915/display: Move verbose_state_checks under display
-:10: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:33: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#33: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:91:
+intel_display_param_named(verbose_state_checks, bool, 0400,
+ "Enable verbose logs (ie. WARN_ON()) in case of unexpected hw state conditions.");
total: 0 errors, 1 warnings, 1 checks, 40 lines checked
14b7107b76f1 drm/i915/display: Move nuclear_pageflip under display
-:10: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:33: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#33: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:94:
+intel_display_param_named_unsafe(nuclear_pageflip, bool, 0400,
+ "Force enable atomic functionality on platforms that don't have full support yet.");
total: 0 errors, 1 warnings, 1 checks, 40 lines checked
a9556e698002 drm/i915/display: Move enable_dp_mst under display
-:10: WARNING:COMMIT_MESSAGE: Missing commit description - Add an appropriate one
-:20: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#20: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:97:
+intel_display_param_named_unsafe(enable_dp_mst, bool, 0400,
+ "Enable multi-stream transport (MST) for new DisplayPort sinks. (default: true)");
total: 0 errors, 1 warnings, 1 checks, 55 lines checked
b08c63c91437 drm/i915/display: Use same permissions for enable_sagv as for rest
-:25: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#25: FILE: drivers/gpu/drm/i915/display/intel_display_params.c:54:
+intel_display_param_named_unsafe(enable_sagv, bool, 0400,
"Enable system agent voltage/frequency scaling (SAGV) (default: true)");
total: 0 errors, 0 warnings, 1 checks, 8 lines checked
^ permalink raw reply [flat|nested] 64+ messages in thread* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for Framework for display parameters (rev3)
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (24 preceding siblings ...)
2023-10-16 11:42 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Framework for display parameters (rev3) Patchwork
@ 2023-10-16 11:42 ` Patchwork
2023-10-16 11:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-10-16 14:24 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
27 siblings, 0 replies; 64+ messages in thread
From: Patchwork @ 2023-10-16 11:42 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-gfx
== Series Details ==
Series: Framework for display parameters (rev3)
URL : https://patchwork.freedesktop.org/series/124645/
State : warning
== Summary ==
Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 64+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for Framework for display parameters (rev3)
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (25 preceding siblings ...)
2023-10-16 11:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2023-10-16 11:54 ` Patchwork
2023-10-16 14:24 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
27 siblings, 0 replies; 64+ messages in thread
From: Patchwork @ 2023-10-16 11:54 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 10516 bytes --]
== Series Details ==
Series: Framework for display parameters (rev3)
URL : https://patchwork.freedesktop.org/series/124645/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_13758 -> Patchwork_124645v3
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/index.html
Participating hosts (32 -> 32)
------------------------------
Additional (3): fi-cfl-8109u bat-atsm-1 fi-elk-e7500
Missing (3): fi-kbl-soraka bat-dg2-9 fi-pnv-d510
Known issues
------------
Here are the changes found in Patchwork_124645v3 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3@lmem0:
- bat-atsm-1: NOTRUN -> [DMESG-WARN][1] ([i915#8841]) +4 other tests dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@gem_exec_suspend@basic-s3@lmem0.html
* igt@gem_huc_copy@huc-copy:
- fi-cfl-8109u: NOTRUN -> [SKIP][2] ([fdo#109271] / [i915#2190])
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/fi-cfl-8109u/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@verify-random:
- fi-cfl-8109u: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#4613]) +3 other tests skip
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/fi-cfl-8109u/igt@gem_lmem_swapping@verify-random.html
* igt@gem_mmap@basic:
- bat-atsm-1: NOTRUN -> [SKIP][4] ([i915#4083])
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@gem_mmap@basic.html
* igt@gem_tiled_fence_blits@basic:
- bat-atsm-1: NOTRUN -> [SKIP][5] ([i915#4077]) +2 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@gem_tiled_fence_blits@basic.html
* igt@gem_tiled_pread_basic:
- bat-atsm-1: NOTRUN -> [SKIP][6] ([i915#4079]) +1 other test skip
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@gem_tiled_pread_basic.html
* igt@i915_pm_rps@basic-api:
- bat-atsm-1: NOTRUN -> [SKIP][7] ([i915#6621])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@i915_pm_rps@basic-api.html
* igt@i915_suspend@basic-s3-without-i915:
- bat-atsm-1: NOTRUN -> [SKIP][8] ([i915#6645])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@i915_suspend@basic-s3-without-i915.html
* igt@kms_addfb_basic@size-max:
- bat-atsm-1: NOTRUN -> [SKIP][9] ([i915#6077]) +36 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@kms_addfb_basic@size-max.html
* igt@kms_addfb_basic@tile-pitch-mismatch:
- bat-atsm-1: NOTRUN -> [SKIP][10] ([i915#5608] / [i915#6077])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@kms_addfb_basic@tile-pitch-mismatch.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-atsm-1: NOTRUN -> [SKIP][11] ([i915#5608] / [i915#6078]) +1 other test skip
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
- fi-cfl-8109u: NOTRUN -> [SKIP][12] ([fdo#109271]) +10 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/fi-cfl-8109u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@basic-flip-after-cursor-atomic:
- bat-atsm-1: NOTRUN -> [SKIP][13] ([i915#6078]) +8 other tests skip
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@kms_cursor_legacy@basic-flip-after-cursor-atomic.html
* igt@kms_flip@basic-plain-flip:
- bat-atsm-1: NOTRUN -> [SKIP][14] ([i915#6166]) +3 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@kms_flip@basic-plain-flip.html
* igt@kms_force_connector_basic@prune-stale-modes:
- bat-atsm-1: NOTRUN -> [SKIP][15] ([i915#6093]) +4 other tests skip
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@kms_force_connector_basic@prune-stale-modes.html
* igt@kms_frontbuffer_tracking@basic:
- fi-bsw-nick: [PASS][16] -> [FAIL][17] ([i915#9276])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/fi-bsw-nick/igt@kms_frontbuffer_tracking@basic.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/fi-bsw-nick/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24:
- bat-atsm-1: NOTRUN -> [SKIP][18] ([i915#1836]) +7 other tests skip
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-xr24.html
* igt@kms_prop_blob@basic:
- bat-atsm-1: NOTRUN -> [SKIP][19] ([i915#7357])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@kms_prop_blob@basic.html
* igt@kms_psr@cursor_plane_move:
- fi-elk-e7500: NOTRUN -> [SKIP][20] ([fdo#109271]) +21 other tests skip
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/fi-elk-e7500/igt@kms_psr@cursor_plane_move.html
* igt@kms_psr@sprite_plane_onoff:
- bat-atsm-1: NOTRUN -> [SKIP][21] ([i915#1072]) +3 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@kms_psr@sprite_plane_onoff.html
* igt@kms_setmode@basic-clone-single-crtc:
- bat-atsm-1: NOTRUN -> [SKIP][22] ([i915#6094])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-fence-flip:
- bat-atsm-1: NOTRUN -> [SKIP][23] ([fdo#109295] / [i915#6078])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@prime_vgem@basic-fence-flip.html
* igt@prime_vgem@basic-fence-mmap:
- bat-atsm-1: NOTRUN -> [SKIP][24] ([fdo#109295] / [i915#4077]) +1 other test skip
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-write:
- bat-atsm-1: NOTRUN -> [SKIP][25] ([fdo#109295]) +2 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/bat-atsm-1/igt@prime_vgem@basic-write.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1836]: https://gitlab.freedesktop.org/drm/intel/issues/1836
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#5608]: https://gitlab.freedesktop.org/drm/intel/issues/5608
[i915#6077]: https://gitlab.freedesktop.org/drm/intel/issues/6077
[i915#6078]: https://gitlab.freedesktop.org/drm/intel/issues/6078
[i915#6093]: https://gitlab.freedesktop.org/drm/intel/issues/6093
[i915#6094]: https://gitlab.freedesktop.org/drm/intel/issues/6094
[i915#6166]: https://gitlab.freedesktop.org/drm/intel/issues/6166
[i915#6621]: https://gitlab.freedesktop.org/drm/intel/issues/6621
[i915#6645]: https://gitlab.freedesktop.org/drm/intel/issues/6645
[i915#7357]: https://gitlab.freedesktop.org/drm/intel/issues/7357
[i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841
[i915#9276]: https://gitlab.freedesktop.org/drm/intel/issues/9276
Build changes
-------------
* Linux: CI_DRM_13758 -> Patchwork_124645v3
CI-20190529: 20190529
CI_DRM_13758: 870d4469b6720c7dceaf65d6cf4576ee7d8863f8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7540: 93c5ec2105500f7083d0cb50db3fbb3bca3776bb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_124645v3: 870d4469b6720c7dceaf65d6cf4576ee7d8863f8 @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
e3460b66aeee drm/i915/display: Use same permissions for enable_sagv as for rest
1bcc70d94e02 drm/i915/display: Move enable_dp_mst under display
419444168ca6 drm/i915/display: Move nuclear_pageflip under display
ecf7ee988155 drm/i915/display: Move verbose_state_checks under display
727ea9b5a12e drm/i915/display: Use device parameters instead of module in I915_STATE_WARN
ac5405f6f5cb drm/i915/display: Move disable_display parameter under display
ca909fd492f5 drm/i915/display: Move force_reset_modeset_test parameter under display
71875bfde975 drm/i915/display: Move load_detect_test parameter under display
34e12e81f61a drm/i915/display: Move enable_dpcd_backlightmodule parameter under display
cf8739fa1bb4 drm/i915/display: Move edp_vswing module parameter under display
5081e799c0d6 drm/i915/display: Move invert_brightness module parameter under display
191712ef36ea drm/i915/display: Move enable_ips module parameter under display
abcb8b18a5e1 drm/i915/display: Move disable_power_well module parameter under display
ad814f02e139 drm/i915/display: Move enable_sagv module parameter under display
b60b08fe4e7d drm/i915/display: Move enable_dpt module parameter under display
9998102e9c77 drm/i915/display: Move enable_dc module parameter under display
7492cff6543b drm/i915/display: Move vbt_sdvo_panel_type module parameter under display
3c924f2831c0 drm/i915/display: Move panel_use_ssc module parameter under display
22312aaefe99 drm/i915/display: Move lvds_channel_mode module parameter under display
4c690dac050b drm/i915/display: Move vbt_firmware module parameter under display
d6ccc4d5f7d2 drm/i915/display: Move psr related module parameters under display
aa2852c0aafd drm/i915/display: Move enable_fbc module parameter under display
802df5131804 drm/i915/display: Dump also display parameters
00f7959c2048 drm/i915/display: Add framework to add parameters specific to display
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/index.html
[-- Attachment #2: Type: text/html, Size: 12535 bytes --]
^ permalink raw reply [flat|nested] 64+ messages in thread* [Intel-gfx] ✗ Fi.CI.IGT: failure for Framework for display parameters (rev3)
2023-10-16 11:16 [Intel-gfx] [PATCH v2 00/24] Framework for display parameters Jouni Högander
` (26 preceding siblings ...)
2023-10-16 11:54 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2023-10-16 14:24 ` Patchwork
27 siblings, 0 replies; 64+ messages in thread
From: Patchwork @ 2023-10-16 14:24 UTC (permalink / raw)
To: Jouni Högander; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 68589 bytes --]
== Series Details ==
Series: Framework for display parameters (rev3)
URL : https://patchwork.freedesktop.org/series/124645/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_13758_full -> Patchwork_124645v3_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_124645v3_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_124645v3_full, please notify your bug team (lgci.bug.filing@intel.com) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (10 -> 11)
------------------------------
Additional (1): shard-tglu0
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_124645v3_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_exec_suspend@basic-s0@smem:
- shard-dg2: [PASS][1] -> [INCOMPLETE][2] +1 other test incomplete
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-dg2-6/igt@gem_exec_suspend@basic-s0@smem.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-3/igt@gem_exec_suspend@basic-s0@smem.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* {igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-3}:
- shard-dg2: NOTRUN -> [INCOMPLETE][3]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-5/igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-3.html
New tests
---------
New tests have been introduced between CI_DRM_13758_full and Patchwork_124645v3_full:
### New IGT tests (2) ###
* igt@kms_vblank@wait-forked-hang@pipe-a-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
* igt@kms_vblank@wait-forked-hang@pipe-d-dp-4:
- Statuses : 1 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_124645v3_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@drm_fdinfo@busy-check-all@ccs0:
- shard-mtlp: NOTRUN -> [SKIP][4] ([i915#8414]) +5 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@drm_fdinfo@busy-check-all@ccs0.html
* igt@drm_fdinfo@most-busy-idle-check-all@vecs1:
- shard-dg2: NOTRUN -> [SKIP][5] ([i915#8414]) +20 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@drm_fdinfo@most-busy-idle-check-all@vecs1.html
* igt@drm_fdinfo@virtual-busy-hang:
- shard-dg1: NOTRUN -> [SKIP][6] ([i915#8414])
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@drm_fdinfo@virtual-busy-hang.html
* igt@gem_bad_reloc@negative-reloc-lut:
- shard-dg1: NOTRUN -> [SKIP][7] ([i915#3281]) +6 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@gem_bad_reloc@negative-reloc-lut.html
* igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0:
- shard-dg2: NOTRUN -> [INCOMPLETE][8] ([i915#7297])
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-smem-lmem0.html
* igt@gem_close_race@multigpu-basic-process:
- shard-mtlp: NOTRUN -> [SKIP][9] ([i915#7697])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@gem_close_race@multigpu-basic-process.html
* igt@gem_close_race@multigpu-basic-threads:
- shard-dg2: NOTRUN -> [SKIP][10] ([i915#7697]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@gem_close_race@multigpu-basic-threads.html
* igt@gem_create@create-ext-set-pat:
- shard-dg2: NOTRUN -> [SKIP][11] ([i915#8562])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@gem_create@create-ext-set-pat.html
* igt@gem_ctx_persistence@heartbeat-stop:
- shard-mtlp: NOTRUN -> [SKIP][12] ([i915#8555])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@gem_ctx_persistence@heartbeat-stop.html
* igt@gem_ctx_sseu@engines:
- shard-dg1: NOTRUN -> [SKIP][13] ([i915#280])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@gem_ctx_sseu@engines.html
* igt@gem_ctx_sseu@invalid-sseu:
- shard-dg2: NOTRUN -> [SKIP][14] ([i915#280])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@gem_ctx_sseu@invalid-sseu.html
* igt@gem_eio@reset-stress:
- shard-dg1: [PASS][15] -> [FAIL][16] ([i915#5784])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-dg1-14/igt@gem_eio@reset-stress.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@gem_eio@reset-stress.html
* igt@gem_exec_balancer@bonded-pair:
- shard-mtlp: NOTRUN -> [SKIP][17] ([i915#4771])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@gem_exec_balancer@bonded-pair.html
- shard-dg2: NOTRUN -> [SKIP][18] ([i915#4771])
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@gem_exec_balancer@bonded-pair.html
* igt@gem_exec_balancer@hog:
- shard-dg2: NOTRUN -> [SKIP][19] ([i915#4812])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@gem_exec_balancer@hog.html
* igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-rkl: NOTRUN -> [SKIP][20] ([i915#4525])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@gem_exec_balancer@parallel-keep-submit-fence.html
* igt@gem_exec_capture@capture-invisible@lmem0:
- shard-dg2: NOTRUN -> [SKIP][21] ([i915#6334]) +1 other test skip
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@gem_exec_capture@capture-invisible@lmem0.html
* igt@gem_exec_fair@basic-none-rrul:
- shard-dg2: NOTRUN -> [SKIP][22] ([i915#3539] / [i915#4852]) +1 other test skip
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@gem_exec_fair@basic-none-rrul.html
* igt@gem_exec_fair@basic-pace@rcs0:
- shard-rkl: [PASS][23] -> [FAIL][24] ([i915#2842]) +1 other test fail
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-rkl-6/igt@gem_exec_fair@basic-pace@rcs0.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-6/igt@gem_exec_fair@basic-pace@rcs0.html
* igt@gem_exec_fair@basic-throttle:
- shard-mtlp: NOTRUN -> [SKIP][25] ([i915#4473] / [i915#4771]) +1 other test skip
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@gem_exec_fair@basic-throttle.html
* igt@gem_exec_fence@concurrent:
- shard-dg1: NOTRUN -> [SKIP][26] ([i915#4812])
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@gem_exec_fence@concurrent.html
* igt@gem_exec_flush@basic-batch-kernel-default-uc:
- shard-mtlp: [PASS][27] -> [DMESG-FAIL][28] ([i915#8962])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-mtlp-1/igt@gem_exec_flush@basic-batch-kernel-default-uc.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-4/igt@gem_exec_flush@basic-batch-kernel-default-uc.html
* igt@gem_exec_flush@basic-batch-kernel-default-wb:
- shard-dg1: NOTRUN -> [SKIP][29] ([i915#3539] / [i915#4852]) +1 other test skip
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@gem_exec_flush@basic-batch-kernel-default-wb.html
* igt@gem_exec_params@secure-non-master:
- shard-dg1: NOTRUN -> [SKIP][30] ([fdo#112283])
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@gem_exec_params@secure-non-master.html
* igt@gem_exec_reloc@basic-gtt-wc-noreloc:
- shard-rkl: NOTRUN -> [SKIP][31] ([i915#3281]) +2 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@gem_exec_reloc@basic-gtt-wc-noreloc.html
* igt@gem_exec_reloc@basic-range:
- shard-mtlp: NOTRUN -> [SKIP][32] ([i915#3281]) +6 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@gem_exec_reloc@basic-range.html
* igt@gem_exec_reloc@basic-wc:
- shard-dg2: NOTRUN -> [SKIP][33] ([i915#3281]) +5 other tests skip
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@gem_exec_reloc@basic-wc.html
* igt@gem_fence_thrash@bo-copy:
- shard-mtlp: NOTRUN -> [SKIP][34] ([i915#4860])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@gem_fence_thrash@bo-copy.html
* igt@gem_fence_thrash@bo-write-verify-threaded-none:
- shard-dg1: NOTRUN -> [SKIP][35] ([i915#4860])
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@gem_fence_thrash@bo-write-verify-threaded-none.html
* igt@gem_fence_thrash@bo-write-verify-x:
- shard-dg2: NOTRUN -> [SKIP][36] ([i915#4860])
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@gem_fence_thrash@bo-write-verify-x.html
* igt@gem_lmem_swapping@heavy-verify-multi-ccs:
- shard-mtlp: NOTRUN -> [SKIP][37] ([i915#4613])
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html
- shard-apl: NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#4613])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-apl4/igt@gem_lmem_swapping@heavy-verify-multi-ccs.html
* igt@gem_lmem_swapping@smem-oom:
- shard-rkl: NOTRUN -> [SKIP][39] ([i915#4613])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@gem_lmem_swapping@smem-oom.html
* igt@gem_lmem_swapping@smem-oom@lmem0:
- shard-dg2: [PASS][40] -> [TIMEOUT][41] ([i915#5493])
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-dg2-11/igt@gem_lmem_swapping@smem-oom@lmem0.html
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-3/igt@gem_lmem_swapping@smem-oom@lmem0.html
* igt@gem_madvise@dontneed-before-exec:
- shard-mtlp: NOTRUN -> [SKIP][42] ([i915#3282]) +2 other tests skip
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@gem_madvise@dontneed-before-exec.html
* igt@gem_mmap@big-bo:
- shard-dg1: NOTRUN -> [SKIP][43] ([i915#4083]) +2 other tests skip
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@gem_mmap@big-bo.html
* igt@gem_mmap@short-mmap:
- shard-mtlp: NOTRUN -> [SKIP][44] ([i915#4083]) +1 other test skip
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@gem_mmap@short-mmap.html
* igt@gem_mmap_gtt@cpuset-big-copy:
- shard-dg2: NOTRUN -> [SKIP][45] ([i915#4077]) +9 other tests skip
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-5/igt@gem_mmap_gtt@cpuset-big-copy.html
* igt@gem_mmap_gtt@hang-busy:
- shard-mtlp: NOTRUN -> [SKIP][46] ([i915#4077]) +8 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@gem_mmap_gtt@hang-busy.html
* igt@gem_mmap_gtt@zero-extend:
- shard-dg1: NOTRUN -> [SKIP][47] ([i915#4077]) +5 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@gem_mmap_gtt@zero-extend.html
* igt@gem_mmap_wc@write-cpu-read-wc-unflushed:
- shard-dg2: NOTRUN -> [SKIP][48] ([i915#4083]) +5 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@gem_mmap_wc@write-cpu-read-wc-unflushed.html
* igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
- shard-dg1: NOTRUN -> [SKIP][49] ([i915#3282]) +2 other tests skip
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
* igt@gem_pread@snoop:
- shard-dg2: NOTRUN -> [SKIP][50] ([i915#3282]) +2 other tests skip
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@gem_pread@snoop.html
* igt@gem_pxp@display-protected-crc:
- shard-dg1: NOTRUN -> [SKIP][51] ([i915#4270]) +2 other tests skip
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@gem_pxp@display-protected-crc.html
* igt@gem_pxp@protected-encrypted-src-copy-not-readible:
- shard-rkl: NOTRUN -> [SKIP][52] ([i915#4270])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@gem_pxp@protected-encrypted-src-copy-not-readible.html
* igt@gem_pxp@reject-modify-context-protection-off-1:
- shard-mtlp: NOTRUN -> [SKIP][53] ([i915#4270]) +1 other test skip
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@gem_pxp@reject-modify-context-protection-off-1.html
* igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
- shard-dg2: NOTRUN -> [SKIP][54] ([i915#4270]) +3 other tests skip
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-5/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html
* igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-ccs:
- shard-mtlp: NOTRUN -> [SKIP][55] ([i915#8428]) +3 other tests skip
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@gem_render_copy@y-tiled-ccs-to-yf-tiled-ccs.html
* igt@gem_set_tiling_vs_blt@untiled-to-tiled:
- shard-mtlp: NOTRUN -> [SKIP][56] ([i915#4079])
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@gem_set_tiling_vs_blt@untiled-to-tiled.html
* igt@gem_softpin@evict-snoop-interruptible:
- shard-dg2: NOTRUN -> [SKIP][57] ([i915#4885])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@gem_softpin@evict-snoop-interruptible.html
* igt@gem_userptr_blits@coherency-unsync:
- shard-dg1: NOTRUN -> [SKIP][58] ([i915#3297])
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@gem_userptr_blits@coherency-unsync.html
* igt@gem_userptr_blits@create-destroy-unsync:
- shard-dg2: NOTRUN -> [SKIP][59] ([i915#3297]) +3 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@gem_userptr_blits@create-destroy-unsync.html
* igt@gem_userptr_blits@dmabuf-sync:
- shard-mtlp: NOTRUN -> [SKIP][60] ([i915#3297]) +2 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@gem_userptr_blits@dmabuf-sync.html
- shard-apl: NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#3323])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-apl4/igt@gem_userptr_blits@dmabuf-sync.html
* igt@gem_userptr_blits@sd-probe:
- shard-dg2: NOTRUN -> [SKIP][62] ([i915#3297] / [i915#4958])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@gem_userptr_blits@sd-probe.html
* igt@gem_userptr_blits@vma-merge:
- shard-dg1: NOTRUN -> [FAIL][63] ([i915#3318])
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@gem_userptr_blits@vma-merge.html
* igt@gen3_render_mixed_blits:
- shard-rkl: NOTRUN -> [SKIP][64] ([fdo#109289]) +1 other test skip
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@gen3_render_mixed_blits.html
* igt@gen3_render_tiledy_blits:
- shard-dg1: NOTRUN -> [SKIP][65] ([fdo#109289])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@gen3_render_tiledy_blits.html
* igt@gen7_exec_parse@basic-offset:
- shard-dg2: NOTRUN -> [SKIP][66] ([fdo#109289]) +2 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-5/igt@gen7_exec_parse@basic-offset.html
* igt@gen9_exec_parse@basic-rejected:
- shard-rkl: NOTRUN -> [SKIP][67] ([i915#2527]) +1 other test skip
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@gen9_exec_parse@basic-rejected.html
* igt@gen9_exec_parse@batch-zero-length:
- shard-mtlp: NOTRUN -> [SKIP][68] ([i915#2856]) +2 other tests skip
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@gen9_exec_parse@batch-zero-length.html
* igt@gen9_exec_parse@bb-start-param:
- shard-dg2: NOTRUN -> [SKIP][69] ([i915#2856]) +3 other tests skip
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@gen9_exec_parse@bb-start-param.html
* igt@gen9_exec_parse@valid-registers:
- shard-dg1: NOTRUN -> [SKIP][70] ([i915#2527]) +1 other test skip
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@gen9_exec_parse@valid-registers.html
* igt@i915_module_load@load:
- shard-dg2: NOTRUN -> [SKIP][71] ([i915#6227])
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@i915_module_load@load.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-mtlp: [PASS][72] -> [ABORT][73] ([i915#8489] / [i915#8668])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-mtlp-4/igt@i915_module_load@reload-with-fault-injection.html
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-8/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_rc6_residency@rc6-idle@rcs0:
- shard-dg1: [PASS][74] -> [FAIL][75] ([i915#3591])
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-dg1-12/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-17/igt@i915_pm_rc6_residency@rc6-idle@rcs0.html
* igt@i915_pm_rpm@gem-execbuf-stress-pc8:
- shard-dg2: NOTRUN -> [SKIP][76] ([fdo#109293] / [fdo#109506])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@i915_pm_rpm@gem-execbuf-stress-pc8.html
* igt@i915_pm_rps@thresholds-idle@gt0:
- shard-dg2: NOTRUN -> [SKIP][77] ([i915#8925])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@i915_pm_rps@thresholds-idle@gt0.html
- shard-mtlp: NOTRUN -> [SKIP][78] ([i915#8925])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@i915_pm_rps@thresholds-idle@gt0.html
* igt@i915_pm_rps@thresholds-idle@gt1:
- shard-mtlp: NOTRUN -> [SKIP][79] ([i915#3555] / [i915#8925])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@i915_pm_rps@thresholds-idle@gt1.html
* igt@i915_query@hwconfig_table:
- shard-rkl: NOTRUN -> [SKIP][80] ([i915#6245])
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@i915_query@hwconfig_table.html
* igt@i915_query@query-topology-coherent-slice-mask:
- shard-mtlp: NOTRUN -> [SKIP][81] ([i915#6188])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@i915_query@query-topology-coherent-slice-mask.html
* igt@kms_addfb_basic@basic-x-tiled-legacy:
- shard-dg1: NOTRUN -> [SKIP][82] ([i915#4212])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@kms_addfb_basic@basic-x-tiled-legacy.html
* igt@kms_async_flips@test-cursor:
- shard-mtlp: NOTRUN -> [SKIP][83] ([i915#6229])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@kms_async_flips@test-cursor.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-dg1: NOTRUN -> [SKIP][84] ([i915#1769] / [i915#3555])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-180:
- shard-dg1: NOTRUN -> [SKIP][85] ([i915#4538] / [i915#5286]) +2 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@kms_big_fb@4-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-rkl: NOTRUN -> [SKIP][86] ([i915#5286])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@linear-32bpp-rotate-270:
- shard-apl: NOTRUN -> [SKIP][87] ([fdo#109271]) +79 other tests skip
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-apl4/igt@kms_big_fb@linear-32bpp-rotate-270.html
- shard-dg2: NOTRUN -> [SKIP][88] ([fdo#111614]) +2 other tests skip
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@kms_big_fb@linear-32bpp-rotate-270.html
* igt@kms_big_fb@linear-32bpp-rotate-90:
- shard-dg1: NOTRUN -> [SKIP][89] ([i915#3638]) +2 other tests skip
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@kms_big_fb@linear-32bpp-rotate-90.html
* igt@kms_big_fb@linear-64bpp-rotate-90:
- shard-rkl: NOTRUN -> [SKIP][90] ([fdo#111614] / [i915#3638])
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@kms_big_fb@linear-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-tglu: [PASS][91] -> [FAIL][92] ([i915#3743]) +2 other tests fail
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-tglu-4/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-tglu-7/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180:
- shard-rkl: NOTRUN -> [SKIP][93] ([fdo#110723]) +1 other test skip
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-dg1: NOTRUN -> [SKIP][94] ([i915#4538]) +1 other test skip
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
- shard-dg2: NOTRUN -> [SKIP][95] ([i915#4538] / [i915#5190]) +4 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-mtlp: NOTRUN -> [SKIP][96] ([fdo#111615]) +5 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-dg1: NOTRUN -> [SKIP][97] ([fdo#111827])
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-mtlp: NOTRUN -> [SKIP][98] ([fdo#111827])
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_color@ctm-red-to-blue:
- shard-dg2: NOTRUN -> [SKIP][99] ([fdo#111827])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@kms_chamelium_color@ctm-red-to-blue.html
* igt@kms_chamelium_edid@hdmi-edid-read:
- shard-mtlp: NOTRUN -> [SKIP][100] ([i915#7828]) +4 other tests skip
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@kms_chamelium_edid@hdmi-edid-read.html
* igt@kms_chamelium_frames@hdmi-cmp-planar-formats:
- shard-dg1: NOTRUN -> [SKIP][101] ([i915#7828]) +3 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@kms_chamelium_frames@hdmi-cmp-planar-formats.html
* igt@kms_chamelium_frames@hdmi-crc-fast:
- shard-dg2: NOTRUN -> [SKIP][102] ([i915#7828]) +11 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@kms_chamelium_frames@hdmi-crc-fast.html
* igt@kms_chamelium_frames@hdmi-frame-dump:
- shard-rkl: NOTRUN -> [SKIP][103] ([i915#7828]) +1 other test skip
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@kms_chamelium_frames@hdmi-frame-dump.html
* igt@kms_content_protection@atomic-dpms:
- shard-dg1: NOTRUN -> [SKIP][104] ([i915#7116])
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-dg1: NOTRUN -> [SKIP][105] ([i915#3299])
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@lic@pipe-a-dp-4:
- shard-dg2: NOTRUN -> [TIMEOUT][106] ([i915#7173])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-11/igt@kms_content_protection@lic@pipe-a-dp-4.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-dg2: NOTRUN -> [SKIP][107] ([i915#3359])
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-5/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-mtlp: NOTRUN -> [SKIP][108] ([i915#3555] / [i915#8814]) +1 other test skip
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-random-32x32:
- shard-rkl: NOTRUN -> [SKIP][109] ([i915#3555])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@kms_cursor_crc@cursor-random-32x32.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-mtlp: NOTRUN -> [SKIP][110] ([i915#3359])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-dg2: NOTRUN -> [SKIP][111] ([i915#3555]) +3 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-5/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_crc@cursor-suspend@pipe-b-vga-1:
- shard-snb: NOTRUN -> [DMESG-WARN][112] ([i915#8841]) +1 other test dmesg-warn
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-snb5/igt@kms_cursor_crc@cursor-suspend@pipe-b-vga-1.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy:
- shard-dg1: NOTRUN -> [SKIP][113] ([fdo#111825]) +15 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@kms_cursor_legacy@2x-flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
- shard-mtlp: NOTRUN -> [SKIP][114] ([i915#3546]) +3 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-mtlp: NOTRUN -> [SKIP][115] ([i915#4213]) +1 other test skip
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
- shard-rkl: NOTRUN -> [SKIP][116] ([fdo#111825]) +3 other tests skip
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
- shard-dg2: NOTRUN -> [SKIP][117] ([fdo#109274] / [i915#5354]) +4 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size:
- shard-glk: [PASS][118] -> [FAIL][119] ([i915#2346])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-glk8/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions-varying-size.html
* igt@kms_draw_crc@draw-method-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][120] ([i915#3555] / [i915#8812])
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@kms_draw_crc@draw-method-mmap-gtt.html
* igt@kms_draw_crc@draw-method-mmap-wc:
- shard-dg1: NOTRUN -> [SKIP][121] ([i915#8812])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@kms_draw_crc@draw-method-mmap-wc.html
* igt@kms_dsc@dsc-with-bpc:
- shard-dg2: NOTRUN -> [SKIP][122] ([i915#3555] / [i915#3840]) +1 other test skip
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@kms_dsc@dsc-with-bpc.html
- shard-mtlp: NOTRUN -> [SKIP][123] ([i915#3555] / [i915#3840])
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@kms_dsc@dsc-with-bpc.html
* igt@kms_flip@2x-flip-vs-absolute-wf_vblank:
- shard-mtlp: NOTRUN -> [SKIP][124] ([i915#3637]) +2 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@kms_flip@2x-flip-vs-absolute-wf_vblank.html
* igt@kms_flip@2x-flip-vs-fences:
- shard-dg2: NOTRUN -> [SKIP][125] ([i915#8381])
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@kms_flip@2x-flip-vs-fences.html
* igt@kms_flip@2x-flip-vs-rmfb-interruptible:
- shard-mtlp: NOTRUN -> [SKIP][126] ([fdo#111767] / [i915#3637])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
- shard-apl: NOTRUN -> [SKIP][127] ([fdo#109271] / [fdo#111767])
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-apl2/igt@kms_flip@2x-flip-vs-rmfb-interruptible.html
* igt@kms_flip@2x-modeset-vs-vblank-race:
- shard-dg2: NOTRUN -> [SKIP][128] ([fdo#109274]) +5 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@kms_flip@2x-modeset-vs-vblank-race.html
* igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][129] ([i915#3555] / [i915#8810])
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@kms_flip_scaled_crc@flip-32bpp-linear-to-64bpp-linear-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][130] ([i915#2672])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode:
- shard-dg1: NOTRUN -> [SKIP][131] ([i915#2587] / [i915#2672])
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-32bpp-4tile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-default-mode:
- shard-mtlp: NOTRUN -> [SKIP][132] ([i915#2672] / [i915#3555]) +1 other test skip
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode:
- shard-dg2: NOTRUN -> [SKIP][133] ([i915#2672]) +3 other tests skip
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack-mmap-gtt:
- shard-mtlp: NOTRUN -> [SKIP][134] ([i915#8708]) +4 other tests skip
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@kms_frontbuffer_tracking@fbc-1p-indfb-fliptrack-mmap-gtt.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-rkl: NOTRUN -> [SKIP][135] ([i915#3023]) +5 other tests skip
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-dg2: NOTRUN -> [SKIP][136] ([i915#8708]) +17 other tests skip
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt:
- shard-rkl: NOTRUN -> [SKIP][137] ([fdo#111825] / [i915#1825]) +6 other tests skip
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc:
- shard-dg1: NOTRUN -> [SKIP][138] ([i915#8708]) +11 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt:
- shard-dg1: NOTRUN -> [SKIP][139] ([i915#3458]) +6 other tests skip
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt:
- shard-dg2: NOTRUN -> [SKIP][140] ([i915#3458]) +17 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt:
- shard-dg2: NOTRUN -> [SKIP][141] ([i915#5354]) +29 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render:
- shard-mtlp: NOTRUN -> [SKIP][142] ([i915#1825]) +16 other tests skip
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html
* igt@kms_hdr@bpc-switch-dpms:
- shard-rkl: NOTRUN -> [SKIP][143] ([i915#3555] / [i915#8228]) +2 other tests skip
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-7/igt@kms_hdr@bpc-switch-dpms.html
* igt@kms_hdr@static-toggle-dpms:
- shard-dg2: NOTRUN -> [SKIP][144] ([i915#3555] / [i915#8228])
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-dg2: NOTRUN -> [SKIP][145] ([i915#4816])
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c:
- shard-mtlp: NOTRUN -> [SKIP][146] ([fdo#109289])
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@kms_pipe_b_c_ivb@pipe-b-double-modeset-then-modeset-pipe-c.html
* igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-4:
- shard-dg2: [PASS][147] -> [FAIL][148] ([fdo#103375])
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-dg2-11/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-4.html
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-11/igt@kms_pipe_crc_basic@suspend-read-crc@pipe-a-dp-4.html
* igt@kms_plane_lowres@tiling-yf:
- shard-dg1: NOTRUN -> [SKIP][149] ([i915#3555]) +6 other tests skip
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@kms_plane_lowres@tiling-yf.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-dg2: NOTRUN -> [SKIP][150] ([i915#6953])
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-7/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1:
- shard-rkl: NOTRUN -> [FAIL][151] ([i915#8292])
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-7/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4:
- shard-dg1: NOTRUN -> [FAIL][152] ([i915#8292])
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-15/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-4.html
* igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][153] ([i915#5176]) +1 other test skip
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-pixel-formats@pipe-b-edp-1.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-hdmi-a-1:
- shard-rkl: NOTRUN -> [SKIP][154] ([i915#5235]) +3 other tests skip
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-7/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-b-hdmi-a-1.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-d-hdmi-a-4:
- shard-dg1: NOTRUN -> [SKIP][155] ([i915#5235]) +11 other tests skip
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-15/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-d-hdmi-a-4.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-a-hdmi-a-3:
- shard-dg2: NOTRUN -> [SKIP][156] ([i915#5235]) +11 other tests skip
[156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25@pipe-a-hdmi-a-3.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-hdmi-a-1:
- shard-snb: NOTRUN -> [SKIP][157] ([fdo#109271]) +20 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-snb1/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-a-hdmi-a-1.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-c-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][158] ([i915#5235]) +2 other tests skip
[158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-c-edp-1.html
* igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-d-edp-1:
- shard-mtlp: NOTRUN -> [SKIP][159] ([i915#3555] / [i915#5235])
[159]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@kms_plane_scaling@planes-upscale-factor-0-25-downscale-factor-0-5@pipe-d-edp-1.html
* igt@kms_prime@d3hot:
- shard-dg2: NOTRUN -> [SKIP][160] ([i915#6524] / [i915#6805])
[160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@kms_prime@d3hot.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-apl: NOTRUN -> [SKIP][161] ([fdo#109271] / [i915#658])
[161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-apl4/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area:
- shard-dg1: NOTRUN -> [SKIP][162] ([fdo#111068] / [i915#658]) +1 other test skip
[162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@kms_psr2_sf@overlay-primary-update-sf-dmg-area.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-dg2: NOTRUN -> [SKIP][163] ([i915#658]) +1 other test skip
[163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@no_drrs:
- shard-dg2: NOTRUN -> [SKIP][164] ([i915#1072]) +2 other tests skip
[164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@kms_psr@no_drrs.html
* igt@kms_psr@primary_mmap_gtt:
- shard-dg1: NOTRUN -> [SKIP][165] ([i915#1072] / [i915#4078]) +1 other test skip
[165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@kms_psr@primary_mmap_gtt.html
* igt@kms_psr@psr2_cursor_plane_move:
- shard-rkl: NOTRUN -> [SKIP][166] ([i915#1072])
[166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@kms_psr@psr2_cursor_plane_move.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-dg2: NOTRUN -> [SKIP][167] ([i915#5461] / [i915#658])
[167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
- shard-dg2: NOTRUN -> [SKIP][168] ([i915#5190]) +10 other tests skip
[168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
- shard-dg2: NOTRUN -> [SKIP][169] ([i915#4235] / [i915#5190])
[169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
- shard-mtlp: NOTRUN -> [SKIP][170] ([i915#4235]) +1 other test skip
[170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-dg1: NOTRUN -> [SKIP][171] ([fdo#111615] / [i915#5289])
[171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_tv_load_detect@load-detect:
- shard-dg2: NOTRUN -> [SKIP][172] ([fdo#109309])
[172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@kms_tv_load_detect@load-detect.html
* igt@kms_writeback@writeback-fb-id:
- shard-dg1: NOTRUN -> [SKIP][173] ([i915#2437])
[173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@kms_writeback@writeback-fb-id.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-dg2: NOTRUN -> [SKIP][174] ([i915#2437])
[174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-5/igt@kms_writeback@writeback-pixel-formats.html
* igt@perf@global-sseu-config:
- shard-mtlp: NOTRUN -> [SKIP][175] ([i915#7387])
[175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@perf@global-sseu-config.html
* igt@perf@global-sseu-config-invalid:
- shard-dg2: NOTRUN -> [SKIP][176] ([i915#7387])
[176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-3/igt@perf@global-sseu-config-invalid.html
* igt@perf@non-zero-reason@0-rcs0:
- shard-dg2: [PASS][177] -> [FAIL][178] ([i915#9100])
[177]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-dg2-2/igt@perf@non-zero-reason@0-rcs0.html
[178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-11/igt@perf@non-zero-reason@0-rcs0.html
* igt@perf_pmu@busy-double-start@bcs0:
- shard-mtlp: [PASS][179] -> [FAIL][180] ([i915#4349]) +4 other tests fail
[179]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-mtlp-1/igt@perf_pmu@busy-double-start@bcs0.html
[180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-4/igt@perf_pmu@busy-double-start@bcs0.html
* igt@perf_pmu@cpu-hotplug:
- shard-dg2: NOTRUN -> [SKIP][181] ([i915#8850])
[181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@perf_pmu@cpu-hotplug.html
* igt@perf_pmu@event-wait@rcs0:
- shard-mtlp: NOTRUN -> [SKIP][182] ([i915#3555] / [i915#8807])
[182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@perf_pmu@event-wait@rcs0.html
* igt@prime_vgem@basic-fence-mmap:
- shard-mtlp: NOTRUN -> [SKIP][183] ([i915#3708] / [i915#4077])
[183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@prime_vgem@basic-fence-mmap.html
- shard-dg2: NOTRUN -> [SKIP][184] ([i915#3708] / [i915#4077])
[184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-2/igt@prime_vgem@basic-fence-mmap.html
* igt@prime_vgem@basic-gtt:
- shard-dg1: NOTRUN -> [SKIP][185] ([i915#3708] / [i915#4077])
[185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@prime_vgem@basic-gtt.html
* igt@prime_vgem@fence-flip-hang:
- shard-mtlp: NOTRUN -> [SKIP][186] ([i915#3708])
[186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@prime_vgem@fence-flip-hang.html
* igt@prime_vgem@fence-read-hang:
- shard-dg2: NOTRUN -> [SKIP][187] ([i915#3708])
[187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@prime_vgem@fence-read-hang.html
* igt@syncobj_timeline@signal-array:
- shard-mtlp: [PASS][188] -> [DMESG-WARN][189] ([i915#2017])
[188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-mtlp-8/igt@syncobj_timeline@signal-array.html
[189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-7/igt@syncobj_timeline@signal-array.html
* igt@sysfs_heartbeat_interval@precise@vecs0:
- shard-mtlp: [PASS][190] -> [ABORT][191] ([i915#9262])
[190]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-mtlp-2/igt@sysfs_heartbeat_interval@precise@vecs0.html
[191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-4/igt@sysfs_heartbeat_interval@precise@vecs0.html
* igt@tools_test@sysfs_l3_parity:
- shard-mtlp: NOTRUN -> [SKIP][192] ([i915#4818])
[192]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@tools_test@sysfs_l3_parity.html
* igt@v3d/v3d_perfmon@get-values-invalid-pointer:
- shard-mtlp: NOTRUN -> [SKIP][193] ([i915#2575]) +6 other tests skip
[193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@v3d/v3d_perfmon@get-values-invalid-pointer.html
* igt@v3d/v3d_submit_cl@bad-multisync-in-sync:
- shard-dg1: NOTRUN -> [SKIP][194] ([i915#2575]) +3 other tests skip
[194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@v3d/v3d_submit_cl@bad-multisync-in-sync.html
* igt@v3d/v3d_submit_csd@bad-flag:
- shard-rkl: NOTRUN -> [SKIP][195] ([fdo#109315]) +2 other tests skip
[195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@v3d/v3d_submit_csd@bad-flag.html
* igt@v3d/v3d_submit_csd@single-out-sync:
- shard-dg2: NOTRUN -> [SKIP][196] ([i915#2575]) +8 other tests skip
[196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-5/igt@v3d/v3d_submit_csd@single-out-sync.html
* igt@vc4/vc4_mmap@mmap-bad-handle:
- shard-rkl: NOTRUN -> [SKIP][197] ([i915#7711]) +1 other test skip
[197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-4/igt@vc4/vc4_mmap@mmap-bad-handle.html
* igt@vc4/vc4_mmap@mmap-bo:
- shard-dg2: NOTRUN -> [SKIP][198] ([i915#7711]) +5 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@vc4/vc4_mmap@mmap-bo.html
* igt@vc4/vc4_purgeable_bo@mark-purgeable-twice:
- shard-mtlp: NOTRUN -> [SKIP][199] ([i915#7711]) +4 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-6/igt@vc4/vc4_purgeable_bo@mark-purgeable-twice.html
* igt@vc4/vc4_purgeable_bo@mark-willneed:
- shard-dg1: NOTRUN -> [SKIP][200] ([i915#7711]) +3 other tests skip
[200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-19/igt@vc4/vc4_purgeable_bo@mark-willneed.html
#### Possible fixes ####
* igt@drm_fdinfo@virtual-idle:
- shard-rkl: [FAIL][201] ([i915#7742]) -> [PASS][202]
[201]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-rkl-6/igt@drm_fdinfo@virtual-idle.html
[202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-6/igt@drm_fdinfo@virtual-idle.html
* igt@gem_ctx_persistence@legacy-engines-hostile-preempt@bsd1:
- shard-mtlp: [ABORT][203] ([i915#9262]) -> [PASS][204]
[203]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-mtlp-4/igt@gem_ctx_persistence@legacy-engines-hostile-preempt@bsd1.html
[204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-1/igt@gem_ctx_persistence@legacy-engines-hostile-preempt@bsd1.html
* igt@gem_exec_fair@basic-none@bcs0:
- shard-rkl: [FAIL][205] ([i915#2842]) -> [PASS][206] +1 other test pass
[205]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-rkl-6/igt@gem_exec_fair@basic-none@bcs0.html
[206]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-rkl-6/igt@gem_exec_fair@basic-none@bcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [FAIL][207] ([i915#2842]) -> [PASS][208]
[207]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-glk3/igt@gem_exec_fair@basic-pace-share@rcs0.html
[208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-glk1/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_parallel@fds@vcs1:
- shard-dg2: [INCOMPLETE][209] -> [PASS][210]
[209]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-dg2-11/igt@gem_exec_parallel@fds@vcs1.html
[210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-3/igt@gem_exec_parallel@fds@vcs1.html
* igt@gem_spin_batch@user-each:
- shard-mtlp: [DMESG-FAIL][211] ([i915#8962]) -> [PASS][212]
[211]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-mtlp-4/igt@gem_spin_batch@user-each.html
[212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-8/igt@gem_spin_batch@user-each.html
* igt@i915_module_load@reload-with-fault-injection:
- shard-dg2: [DMESG-WARN][213] ([i915#8617]) -> [PASS][214]
[213]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-dg2-5/igt@i915_module_load@reload-with-fault-injection.html
[214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-6/igt@i915_module_load@reload-with-fault-injection.html
* igt@i915_pm_freq_api@freq-suspend@gt0:
- shard-dg2: [INCOMPLETE][215] ([i915#9407]) -> [PASS][216]
[215]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-dg2-1/igt@i915_pm_freq_api@freq-suspend@gt0.html
[216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-1/igt@i915_pm_freq_api@freq-suspend@gt0.html
* igt@i915_selftest@live@gt_heartbeat:
- shard-apl: [DMESG-FAIL][217] ([i915#5334]) -> [PASS][218]
[217]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-apl6/igt@i915_selftest@live@gt_heartbeat.html
[218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-apl6/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-tglu: [FAIL][219] ([i915#3743]) -> [PASS][220]
[219]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-tglu-3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-tglu-3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* {igt@kms_ccs@pipe-a-random-ccs-data-y-tiled-gen12-rc-ccs}:
- shard-dg1: [INCOMPLETE][221] ([i915#2295]) -> [PASS][222]
[221]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-dg1-17/igt@kms_ccs@pipe-a-random-ccs-data-y-tiled-gen12-rc-ccs.html
[222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-12/igt@kms_ccs@pipe-a-random-ccs-data-y-tiled-gen12-rc-ccs.html
* igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
- shard-glk: [FAIL][223] ([i915#2346]) -> [PASS][224]
[223]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-glk2/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-glk4/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
- shard-apl: [FAIL][225] ([i915#2346]) -> [PASS][226]
[225]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-apl3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
[226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-apl7/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1:
- shard-tglu: [FAIL][227] ([i915#9196]) -> [PASS][228]
[227]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-tglu-5/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html
[228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-tglu-5/igt@kms_universal_plane@cursor-fb-leak@pipe-a-hdmi-a-1.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1:
- shard-mtlp: [FAIL][229] ([i915#9196]) -> [PASS][230]
[229]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-mtlp-7/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html
[230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-5/igt@kms_universal_plane@cursor-fb-leak@pipe-b-edp-1.html
* {igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-dp-1}:
- shard-apl: [INCOMPLETE][231] -> [PASS][232]
[231]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-apl1/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-dp-1.html
[232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-apl2/igt@kms_vblank@ts-continuation-dpms-suspend@pipe-c-dp-1.html
* igt@prime_busy@hang-wait@ccs0:
- shard-mtlp: [ABORT][233] ([i915#9414]) -> [PASS][234] +1 other test pass
[233]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-mtlp-3/igt@prime_busy@hang-wait@ccs0.html
[234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-mtlp-3/igt@prime_busy@hang-wait@ccs0.html
#### Warnings ####
* igt@gem_create@create-ext-cpu-access-big:
- shard-dg2: [INCOMPLETE][235] ([i915#9364]) -> [ABORT][236] ([i915#7461])
[235]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-dg2-2/igt@gem_create@create-ext-cpu-access-big.html
[236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg2-3/igt@gem_create@create-ext-cpu-access-big.html
* igt@i915_pm_rc6_residency@rc6-idle@vcs0:
- shard-tglu: [WARN][237] ([i915#2681]) -> [FAIL][238] ([i915#2681] / [i915#3591])
[237]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-tglu-9/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
[238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-tglu-10/igt@i915_pm_rc6_residency@rc6-idle@vcs0.html
* igt@kms_flip@flip-vs-suspend@b-vga1:
- shard-snb: [DMESG-WARN][239] ([i915#8841]) -> [DMESG-WARN][240] ([i915#5090] / [i915#8841])
[239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-snb4/igt@kms_flip@flip-vs-suspend@b-vga1.html
[240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-snb6/igt@kms_flip@flip-vs-suspend@b-vga1.html
* igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt:
- shard-dg1: [SKIP][241] ([i915#8708]) -> [SKIP][242] ([i915#4423] / [i915#8708])
[241]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_13758/shard-dg1-18/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
[242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/shard-dg1-15/igt@kms_frontbuffer_tracking@fbc-1p-shrfb-fliptrack-mmap-gtt.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#103375]: https://bugs.freedesktop.org/show_bug.cgi?id=103375
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109293]: https://bugs.freedesktop.org/show_bug.cgi?id=109293
[fdo#109309]: https://bugs.freedesktop.org/show_bug.cgi?id=109309
[fdo#109315]: https://bugs.freedesktop.org/show_bug.cgi?id=109315
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111767]: https://bugs.freedesktop.org/show_bug.cgi?id=111767
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[fdo#112283]: https://bugs.freedesktop.org/show_bug.cgi?id=112283
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#2017]: https://gitlab.freedesktop.org/drm/intel/issues/2017
[i915#2295]: https://gitlab.freedesktop.org/drm/intel/issues/2295
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2575]: https://gitlab.freedesktop.org/drm/intel/issues/2575
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#2672]: https://gitlab.freedesktop.org/drm/intel/issues/2672
[i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
[i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#3023]: https://gitlab.freedesktop.org/drm/intel/issues/3023
[i915#3281]: https://gitlab.freedesktop.org/drm/intel/issues/3281
[i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
[i915#3318]: https://gitlab.freedesktop.org/drm/intel/issues/3318
[i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3361]: https://gitlab.freedesktop.org/drm/intel/issues/3361
[i915#3458]: https://gitlab.freedesktop.org/drm/intel/issues/3458
[i915#3539]: https://gitlab.freedesktop.org/drm/intel/issues/3539
[i915#3546]: https://gitlab.freedesktop.org/drm/intel/issues/3546
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
[i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
[i915#3638]: https://gitlab.freedesktop.org/drm/intel/issues/3638
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#3743]: https://gitlab.freedesktop.org/drm/intel/issues/3743
[i915#3840]: https://gitlab.freedesktop.org/drm/intel/issues/3840
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4078]: https://gitlab.freedesktop.org/drm/intel/issues/4078
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4235]: https://gitlab.freedesktop.org/drm/intel/issues/4235
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4349]: https://gitlab.freedesktop.org/drm/intel/issues/4349
[i915#4423]: https://gitlab.freedesktop.org/drm/intel/issues/4423
[i915#4473]: https://gitlab.freedesktop.org/drm/intel/issues/4473
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4538]: https://gitlab.freedesktop.org/drm/intel/issues/4538
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4771]: https://gitlab.freedesktop.org/drm/intel/issues/4771
[i915#4812]: https://gitlab.freedesktop.org/drm/intel/issues/4812
[i915#4816]: https://gitlab.freedesktop.org/drm/intel/issues/4816
[i915#4818]: https://gitlab.freedesktop.org/drm/intel/issues/4818
[i915#4852]: https://gitlab.freedesktop.org/drm/intel/issues/4852
[i915#4854]: https://gitlab.freedesktop.org/drm/intel/issues/4854
[i915#4860]: https://gitlab.freedesktop.org/drm/intel/issues/4860
[i915#4885]: https://gitlab.freedesktop.org/drm/intel/issues/4885
[i915#4958]: https://gitlab.freedesktop.org/drm/intel/issues/4958
[i915#5090]: https://gitlab.freedesktop.org/drm/intel/issues/5090
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
[i915#5334]: https://gitlab.freedesktop.org/drm/intel/issues/5334
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
[i915#5493]: https://gitlab.freedesktop.org/drm/intel/issues/5493
[i915#5784]: https://gitlab.freedesktop.org/drm/intel/issues/5784
[i915#6095]: https://gitlab.freedesktop.org/drm/intel/issues/6095
[i915#6188]: https://gitlab.freedesktop.org/drm/intel/issues/6188
[i915#6227]: https://gitlab.freedesktop.org/drm/intel/issues/6227
[i915#6229]: https://gitlab.freedesktop.org/drm/intel/issues/6229
[i915#6245]: https://gitlab.freedesktop.org/drm/intel/issues/6245
[i915#6334]: https://gitlab.freedesktop.org/drm/intel/issues/6334
[i915#6524]: https://gitlab.freedesktop.org/drm/intel/issues/6524
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#6805]: https://gitlab.freedesktop.org/drm/intel/issues/6805
[i915#6953]: https://gitlab.freedesktop.org/drm/intel/issues/6953
[i915#7116]: https://gitlab.freedesktop.org/drm/intel/issues/7116
[i915#7173]: https://gitlab.freedesktop.org/drm/intel/issues/7173
[i915#7297]: https://gitlab.freedesktop.org/drm/intel/issues/7297
[i915#7387]: https://gitlab.freedesktop.org/drm/intel/issues/7387
[i915#7461]: https://gitlab.freedesktop.org/drm/intel/issues/7461
[i915#7697]: https://gitlab.freedesktop.org/drm/intel/issues/7697
[i915#7711]: https://gitlab.freedesktop.org/drm/intel/issues/7711
[i915#7742]: https://gitlab.freedesktop.org/drm/intel/issues/7742
[i915#7828]: https://gitlab.freedesktop.org/drm/intel/issues/7828
[i915#8228]: https://gitlab.freedesktop.org/drm/intel/issues/8228
[i915#8292]: https://gitlab.freedesktop.org/drm/intel/issues/8292
[i915#8381]: https://gitlab.freedesktop.org/drm/intel/issues/8381
[i915#8414]: https://gitlab.freedesktop.org/drm/intel/issues/8414
[i915#8428]: https://gitlab.freedesktop.org/drm/intel/issues/8428
[i915#8489]: https://gitlab.freedesktop.org/drm/intel/issues/8489
[i915#8555]: https://gitlab.freedesktop.org/drm/intel/issues/8555
[i915#8562]: https://gitlab.freedesktop.org/drm/intel/issues/8562
[i915#8617]: https://gitlab.freedesktop.org/drm/intel/issues/8617
[i915#8668]: https://gitlab.freedesktop.org/drm/intel/issues/8668
[i915#8708]: https://gitlab.freedesktop.org/drm/intel/issues/8708
[i915#8709]: https://gitlab.freedesktop.org/drm/intel/issues/8709
[i915#8807]: https://gitlab.freedesktop.org/drm/intel/issues/8807
[i915#8810]: https://gitlab.freedesktop.org/drm/intel/issues/8810
[i915#8812]: https://gitlab.freedesktop.org/drm/intel/issues/8812
[i915#8814]: https://gitlab.freedesktop.org/drm/intel/issues/8814
[i915#8841]: https://gitlab.freedesktop.org/drm/intel/issues/8841
[i915#8850]: https://gitlab.freedesktop.org/drm/intel/issues/8850
[i915#8925]: https://gitlab.freedesktop.org/drm/intel/issues/8925
[i915#8962]: https://gitlab.freedesktop.org/drm/intel/issues/8962
[i915#9100]: https://gitlab.freedesktop.org/drm/intel/issues/9100
[i915#9196]: https://gitlab.freedesktop.org/drm/intel/issues/9196
[i915#9262]: https://gitlab.freedesktop.org/drm/intel/issues/9262
[i915#9295]: https://gitlab.freedesktop.org/drm/intel/issues/9295
[i915#9310]: https://gitlab.freedesktop.org/drm/intel/issues/9310
[i915#9364]: https://gitlab.freedesktop.org/drm/intel/issues/9364
[i915#9407]: https://gitlab.freedesktop.org/drm/intel/issues/9407
[i915#9414]: https://gitlab.freedesktop.org/drm/intel/issues/9414
[i915#9423]: https://gitlab.freedesktop.org/drm/intel/issues/9423
[i915#9519]: https://gitlab.freedesktop.org/drm/intel/issues/9519
Build changes
-------------
* Linux: CI_DRM_13758 -> Patchwork_124645v3
* Piglit: None -> piglit_4509
CI-20190529: 20190529
CI_DRM_13758: 870d4469b6720c7dceaf65d6cf4576ee7d8863f8 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_7540: 93c5ec2105500f7083d0cb50db3fbb3bca3776bb @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_124645v3: 870d4469b6720c7dceaf65d6cf4576ee7d8863f8 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_124645v3/index.html
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