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From: Volodymyr Babchuk <Volodymyr_Babchuk@epam.com>
To: Jan Beulich <jbeulich@suse.com>
Cc: "xen-devel@lists.xenproject.org" <xen-devel@lists.xenproject.org>,
	"Oleksandr Andrushchenko" <Oleksandr_Andrushchenko@epam.com>,
	"Roger Pau Monné" <roger.pau@citrix.com>
Subject: Re: [PATCH v8 02/13] vpci: use per-domain PCI lock to protect vpci structure
Date: Thu, 27 Jul 2023 15:13:59 +0000	[thread overview]
Message-ID: <87jzulbd5e.fsf@epam.com> (raw)
In-Reply-To: <2d5c6adf-321d-5bbc-c5b5-4ea3d255bf42@suse.com>


Jan,

Jan Beulich <jbeulich@suse.com> writes:

> On 27.07.2023 12:31, Volodymyr Babchuk wrote:
>> 
>> Hi Jan
>> 
>> Jan Beulich <jbeulich@suse.com> writes:
>> 
>>> On 27.07.2023 02:56, Volodymyr Babchuk wrote:
>>>> Hi Roger,
>>>>
>>>> Roger Pau Monné <roger.pau@citrix.com> writes:
>>>>
>>>>> On Wed, Jul 26, 2023 at 01:17:58AM +0000, Volodymyr Babchuk wrote:
>>>>>>
>>>>>> Hi Roger,
>>>>>>
>>>>>> Roger Pau Monné <roger.pau@citrix.com> writes:
>>>>>>
>>>>>>> On Thu, Jul 20, 2023 at 12:32:31AM +0000, Volodymyr Babchuk wrote:
>>>>>>>> From: Oleksandr Andrushchenko <oleksandr_andrushchenko@epam.com>
>>>>>>>> @@ -498,6 +537,7 @@ void vpci_write(pci_sbdf_t sbdf, unsigned int reg, unsigned int size,
>>>>>>>>          ASSERT(data_offset < size);
>>>>>>>>      }
>>>>>>>>      spin_unlock(&pdev->vpci->lock);
>>>>>>>> +    unlock_locks(d);
>>>>>>>
>>>>>>> There's one issue here, some handlers will cal pcidevs_lock(), which
>>>>>>> will result in a lock over inversion, as in the previous patch we
>>>>>>> agreed that the locking order was pcidevs_lock first, d->pci_lock
>>>>>>> after.
>>>>>>>
>>>>>>> For example the MSI control_write() handler will call
>>>>>>> vpci_msi_arch_enable() which takes the pcidevs lock.  I think I will
>>>>>>> have to look into using a dedicated lock for MSI related handling, as
>>>>>>> that's the only place where I think we have this pattern of taking the
>>>>>>> pcidevs_lock after the d->pci_lock.
>>>>>>
>>>>>> I'll mention this in the commit message. Is there something else that I
>>>>>> should do right now?
>>>>>
>>>>> Well, I don't think we want to commit this as-is with a known lock
>>>>> inversion.
>>>>>
>>>>> The functions that require the pcidevs lock are:
>>>>>
>>>>> pt_irq_{create,destroy}_bind()
>>>>> unmap_domain_pirq()
>>>>>
>>>>> AFAICT those functions require the lock in order to assert that the
>>>>> underlying device doesn't go away, as they do also use d->event_lock
>>>>> in order to get exclusive access to the data fields.  Please double
>>>>> check that I'm not mistaken.
>>>>
>>>> You are right, all three function does not access any of PCI state
>>>> directly. However...
>>>>
>>>>> If that's accurate you will have to check the call tree that spawns
>>>>> from those functions in order to modify the asserts to check for
>>>>> either the pcidevs or the per-domain pci_list lock being taken.
>>>>
>>>> ... I checked calls for PT_IRQ_TYPE_MSI case, there is only call that
>>>> bothers me: hvm_pi_update_irte(), which calls IO-MMU code via
>>>> vmx_pi_update_irte():
>>>>
>>>> amd_iommu_msi_msg_update_ire() or msi_msg_write_remap_rte().
>>>>
>>>> Both functions read basic pdev fields like sbfd or type. I see no
>>>> problem there, as values of those fields are not supposed to be changed.
>>>
>>> But whether fields are basic or will never change doesn't matter when
>>> the pdev struct itself suddenly disappears.
>> 
>> This is not a problem, as it is expected that d->pci_lock is being held,
>> so pdev structure will not disappear. I am trying to answer another
>> question: is d->pci_lock enough or pcidevs_lock is also should required?
>
> To answer such questions, may I ask that you first firmly write down
> (and submit) what each of the locks guards?

I can do this for a newly introduced lock. So domain->pci_lock guards:

1. domain->pcidevs_list. This means that PCI devices can't be added to
or removed from a domain, when the lock is taken in read mode. As a
byproduct, any pdev assigned to a domain can't be deleted because we
need to deassign it first. To modify domain->pcidevs_list we need to
hold both d->pci_lock in write mode and pcidevs_lock.

2. Presence of pdev->vpci struct for any pdev assigned to a domain. The
structure itself is locked by pdev->vpci->lock. But to add/remove
pdev->vpci itself we need to hold d->pci_lock in the write mode.

As for pcidevs_lock, AFAIK, there is no strictly written rules, what is
exactly is protected by this lock.

-- 
WBR, Volodymyr

  reply	other threads:[~2023-07-27 15:14 UTC|newest]

Thread overview: 73+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-20  0:32 [PATCH v8 00/13] PCI devices passthrough on Arm, part 3 Volodymyr Babchuk
2023-07-20  0:32 ` [PATCH v8 03/13] vpci: restrict unhandled read/write operations for guests Volodymyr Babchuk
2023-07-20 11:32   ` Roger Pau Monné
2023-07-20  0:32 ` [PATCH v8 04/13] vpci: add hooks for PCI device assign/de-assign Volodymyr Babchuk
2023-07-20 12:36   ` Roger Pau Monné
2023-07-26  1:38     ` Volodymyr Babchuk
2023-07-26  8:42       ` Roger Pau Monné
2023-07-24  9:41   ` Jan Beulich
2023-07-20  0:32 ` [PATCH v8 02/13] vpci: use per-domain PCI lock to protect vpci structure Volodymyr Babchuk
2023-07-20 11:20   ` Roger Pau Monné
2023-07-20 13:27     ` Jan Beulich
2023-07-20 13:50       ` Roger Pau Monné
2023-07-24  0:07         ` Volodymyr Babchuk
2023-07-24  7:59           ` Roger Pau Monné
2023-07-20 15:53     ` Jan Beulich
2023-07-26  1:17     ` Volodymyr Babchuk
2023-07-26  6:39       ` Jan Beulich
2023-07-26  9:35       ` Roger Pau Monné
2023-07-27  0:56         ` Volodymyr Babchuk
2023-07-27  7:41           ` Jan Beulich
2023-07-27 10:31             ` Volodymyr Babchuk
2023-07-27 11:37               ` Jan Beulich
2023-07-27 15:13                 ` Volodymyr Babchuk [this message]
2023-07-27 12:42           ` Roger Pau Monné
2023-07-27 12:56             ` Jan Beulich
2023-07-27 14:43               ` Roger Pau Monné
2023-07-28  0:21             ` Volodymyr Babchuk
2023-07-28 13:55               ` Roger Pau Monné
2023-07-20 16:03   ` Jan Beulich
2023-07-20 16:14     ` Roger Pau Monné
2023-07-21  6:02       ` Jan Beulich
2023-07-21  7:43         ` Roger Pau Monné
2023-07-21  8:48           ` Jan Beulich
2023-07-20 16:09   ` Jan Beulich
2023-07-20  0:32 ` [PATCH v8 01/13] pci: introduce per-domain PCI rwlock Volodymyr Babchuk
2023-07-20  9:45   ` Roger Pau Monné
2023-07-20 22:57     ` Volodymyr Babchuk
2023-07-20 15:40   ` Jan Beulich
2023-07-20 23:37     ` Volodymyr Babchuk
2023-07-20  0:32 ` [PATCH v8 06/13] rangeset: add RANGESETF_no_print flag Volodymyr Babchuk
2023-07-20  0:32 ` [PATCH v8 07/13] vpci/header: handle p2m range sets per BAR Volodymyr Babchuk
2023-07-21 11:49   ` Roger Pau Monné
2023-07-20  0:32 ` [PATCH v8 05/13] vpci/header: implement guest BAR register handlers Volodymyr Babchuk
2023-07-20 16:01   ` Roger Pau Monné
2023-07-21 10:36   ` Rahul Singh
2023-07-21 10:50     ` Jan Beulich
2023-07-21 11:52       ` Roger Pau Monné
2023-07-20  0:32 ` [PATCH v8 11/13] vpci: add initial support for virtual PCI bus topology Volodymyr Babchuk
2023-07-20  6:50   ` Jan Beulich
2023-07-21  0:43     ` Volodymyr Babchuk
2023-07-21 13:53   ` Roger Pau Monné
2023-07-21 14:00   ` Roger Pau Monné
2023-07-26 21:35   ` Stewart Hildebrand
2023-07-20  0:32 ` [PATCH v8 08/13] vpci/header: program p2m with guest BAR view Volodymyr Babchuk
2023-07-21 13:05   ` Roger Pau Monné
2023-07-24 10:30     ` Jan Beulich
2023-07-24 10:43   ` Jan Beulich
2023-07-24 13:16     ` Roger Pau Monné
2023-07-24 13:31       ` Jan Beulich
2023-07-24 13:42         ` Roger Pau Monné
2023-07-20  0:32 ` [PATCH v8 10/13] vpci/header: reset the command register when adding devices Volodymyr Babchuk
2023-07-21 13:37   ` Roger Pau Monné
2023-07-20  0:32 ` [PATCH v8 09/13] vpci/header: emulate PCI_COMMAND register for guests Volodymyr Babchuk
2023-07-21 13:32   ` Roger Pau Monné
2023-07-21 13:40     ` Roger Pau Monné
2023-07-24 11:06     ` Jan Beulich
2023-07-24 11:03   ` Jan Beulich
2023-07-20  0:32 ` [PATCH v8 12/13] xen/arm: translate virtual PCI bus topology " Volodymyr Babchuk
2023-07-20  6:54   ` Jan Beulich
2023-07-21 14:09   ` Roger Pau Monné
2023-07-24  8:02   ` Roger Pau Monné
2023-07-20  0:32 ` [PATCH v8 13/13] xen/arm: account IO handlers for emulated PCI MSI-X Volodymyr Babchuk
2023-07-20  0:41 ` [PATCH v8 00/13] PCI devices passthrough on Arm, part 3 Volodymyr Babchuk

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