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From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: "Belgaumkar, Vinay" <vinay.belgaumkar@intel.com>
Cc: igt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: Re: [igt-dev] [PATCH i-g-t 2/2] i915_pm_freq_api: Add some basic SLPC igt tests
Date: Mon, 03 Apr 2023 08:36:42 -0700	[thread overview]
Message-ID: <87jzytdlkl.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <7327d651-d31f-8e20-a9a9-38b0ec37b86a@intel.com>

On Mon, 03 Apr 2023 08:23:45 -0700, Belgaumkar, Vinay wrote:
>
>
> On 3/31/2023 4:56 PM, Dixit, Ashutosh wrote:
> > On Mon, 27 Mar 2023 19:00:28 -0700, Vinay Belgaumkar wrote:
> > Hi Vinay,
> >
> >> +/*
> >> + * Too many intermediate components and steps before freq is adjusted
> >> + * Specially if workload is under execution, so let's wait 100 ms.
> >> + */
> >> +#define ACT_FREQ_LATENCY_US 100000
> >> +
> >> +static uint32_t get_freq(int dirfd, uint8_t id)
> >> +{
> >> +	uint32_t val;
> >> +
> >> +	igt_require(igt_sysfs_rps_scanf(dirfd, id, "%u", &val) == 1);
> > igt_assert?
> ok.
> >
> >> +static void test_freq_basic_api(int dirfd, int gt)
> >> +{
> >> +	uint32_t rpn, rp0, rpe;
> >> +
> >> +	/* Save frequencies */
> >> +	rpn = get_freq(dirfd, RPS_RPn_FREQ_MHZ);
> >> +	rp0 = get_freq(dirfd, RPS_RP0_FREQ_MHZ);
> >> +	rpe = get_freq(dirfd, RPS_RP1_FREQ_MHZ);
> >> +	igt_info("System min freq: %dMHz; max freq: %dMHz\n", rpn, rp0);
> >> +
> >> +	/*
> >> +	 * Negative bound tests
> >> +	 * RPn is the floor
> >> +	 * RP0 is the ceiling
> >> +	 */
> >> +	igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rpn - 1) < 0);
> >> +	igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rp0 + 1) < 0);
> >> +	igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rpn - 1) < 0);
> > Is this supposed to be RPS_MAX_FREQ_MHZ?
> We could do this check for max as well. But this is trying to see if min
> can be set to below rpn.

In that case this statement is the same as the first one (2 lines
above). Is that needed?



> >> +	igt_assert(set_freq(dirfd, RPS_MAX_FREQ_MHZ, rp0 + 1) < 0);
> >> +
> > After addressing the above, this is:
> >
> > Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> >
> > Also, before merging it would be good to see the results of the new
> > tests. So could you add a HAX patch adding the new tests to
> > fast-feedback.testlist and resend the series?
>
> Sure, will do. Thanks for the review.
>
> Vinay.
>
> >
> > Thanks.
> > --
> > Ashutosh

WARNING: multiple messages have this Message-ID (diff)
From: "Dixit, Ashutosh" <ashutosh.dixit@intel.com>
To: "Belgaumkar, Vinay" <vinay.belgaumkar@intel.com>
Cc: igt-dev@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [igt-dev] [PATCH i-g-t 2/2] i915_pm_freq_api: Add some basic SLPC igt tests
Date: Mon, 03 Apr 2023 08:36:42 -0700	[thread overview]
Message-ID: <87jzytdlkl.wl-ashutosh.dixit@intel.com> (raw)
In-Reply-To: <7327d651-d31f-8e20-a9a9-38b0ec37b86a@intel.com>

On Mon, 03 Apr 2023 08:23:45 -0700, Belgaumkar, Vinay wrote:
>
>
> On 3/31/2023 4:56 PM, Dixit, Ashutosh wrote:
> > On Mon, 27 Mar 2023 19:00:28 -0700, Vinay Belgaumkar wrote:
> > Hi Vinay,
> >
> >> +/*
> >> + * Too many intermediate components and steps before freq is adjusted
> >> + * Specially if workload is under execution, so let's wait 100 ms.
> >> + */
> >> +#define ACT_FREQ_LATENCY_US 100000
> >> +
> >> +static uint32_t get_freq(int dirfd, uint8_t id)
> >> +{
> >> +	uint32_t val;
> >> +
> >> +	igt_require(igt_sysfs_rps_scanf(dirfd, id, "%u", &val) == 1);
> > igt_assert?
> ok.
> >
> >> +static void test_freq_basic_api(int dirfd, int gt)
> >> +{
> >> +	uint32_t rpn, rp0, rpe;
> >> +
> >> +	/* Save frequencies */
> >> +	rpn = get_freq(dirfd, RPS_RPn_FREQ_MHZ);
> >> +	rp0 = get_freq(dirfd, RPS_RP0_FREQ_MHZ);
> >> +	rpe = get_freq(dirfd, RPS_RP1_FREQ_MHZ);
> >> +	igt_info("System min freq: %dMHz; max freq: %dMHz\n", rpn, rp0);
> >> +
> >> +	/*
> >> +	 * Negative bound tests
> >> +	 * RPn is the floor
> >> +	 * RP0 is the ceiling
> >> +	 */
> >> +	igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rpn - 1) < 0);
> >> +	igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rp0 + 1) < 0);
> >> +	igt_assert(set_freq(dirfd, RPS_MIN_FREQ_MHZ, rpn - 1) < 0);
> > Is this supposed to be RPS_MAX_FREQ_MHZ?
> We could do this check for max as well. But this is trying to see if min
> can be set to below rpn.

In that case this statement is the same as the first one (2 lines
above). Is that needed?



> >> +	igt_assert(set_freq(dirfd, RPS_MAX_FREQ_MHZ, rp0 + 1) < 0);
> >> +
> > After addressing the above, this is:
> >
> > Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
> >
> > Also, before merging it would be good to see the results of the new
> > tests. So could you add a HAX patch adding the new tests to
> > fast-feedback.testlist and resend the series?
>
> Sure, will do. Thanks for the review.
>
> Vinay.
>
> >
> > Thanks.
> > --
> > Ashutosh

  reply	other threads:[~2023-04-03 15:36 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-28  2:00 [igt-dev] [PATCH i-g-t 0/2] tests/slpc: Add basic IGT test Vinay Belgaumkar
2023-03-28  2:00 ` [Intel-gfx] " Vinay Belgaumkar
2023-03-28  2:00 ` [igt-dev] [PATCH i-g-t 1/2] lib/debugfs: Add per GT debugfs helpers Vinay Belgaumkar
2023-03-28  2:00   ` [Intel-gfx] " Vinay Belgaumkar
2023-03-31 23:30   ` [igt-dev] " Dixit, Ashutosh
2023-03-31 23:30     ` Dixit, Ashutosh
2023-03-28  2:00 ` [igt-dev] [PATCH i-g-t 2/2] i915_pm_freq_api: Add some basic SLPC igt tests Vinay Belgaumkar
2023-03-28  2:00   ` [Intel-gfx] " Vinay Belgaumkar
2023-03-31 23:56   ` [igt-dev] " Dixit, Ashutosh
2023-03-31 23:56     ` [Intel-gfx] " Dixit, Ashutosh
2023-04-03 15:23     ` Belgaumkar, Vinay
2023-04-03 15:23       ` [Intel-gfx] " Belgaumkar, Vinay
2023-04-03 15:36       ` Dixit, Ashutosh [this message]
2023-04-03 15:36         ` Dixit, Ashutosh
2023-04-03 17:22         ` Belgaumkar, Vinay
2023-04-03 17:22           ` [Intel-gfx] " Belgaumkar, Vinay
2023-03-28  2:33 ` [igt-dev] ✓ Fi.CI.BAT: success for tests/slpc: Add basic IGT test Patchwork
2023-03-28 10:22 ` [igt-dev] ✓ Fi.CI.IGT: " Patchwork

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