* [Intel-gfx] [PATCH 0/2] A few CT updates @ 2022-01-20 18:36 ` Matthew Brost 0 siblings, 0 replies; 14+ messages in thread From: Matthew Brost @ 2022-01-20 18:36 UTC (permalink / raw) To: intel-gfx, dri-devel A couple of minor CT updates. 1 for performance, 1 for extra debug. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Matthew Brost (2): drm/i915/guc: Don't check CT descriptor status before CT write / read drm/i915/guc: Print CT descriptor status in CT debug function drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.34.1 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 0/2] A few CT updates @ 2022-01-20 18:36 ` Matthew Brost 0 siblings, 0 replies; 14+ messages in thread From: Matthew Brost @ 2022-01-20 18:36 UTC (permalink / raw) To: intel-gfx, dri-devel Cc: daniele.ceraolospurio, john.c.harrison, michal.wajdeczko A couple of minor CT updates. 1 for performance, 1 for extra debug. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Matthew Brost (2): drm/i915/guc: Don't check CT descriptor status before CT write / read drm/i915/guc: Print CT descriptor status in CT debug function drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 10 ++++++++++ 1 file changed, 10 insertions(+) -- 2.34.1 ^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 1/2] drm/i915/guc: Don't check CT descriptor status before CT write / read 2022-01-20 18:36 ` Matthew Brost @ 2022-01-20 18:36 ` Matthew Brost -1 siblings, 0 replies; 14+ messages in thread From: Matthew Brost @ 2022-01-20 18:36 UTC (permalink / raw) To: intel-gfx, dri-devel Don't check CT descriptor status, unless CONFIG_DRM_I915_DEBUG_GUC is set, before CT write / read as this could result in a read across the PCIe bus thus adding latency to every CT write / read. On well behavied systems this vaue should always read as zero. For some reason it doesn't the CT channel is broken and will eventually recover from a GT reset, albeit the GT reset will not be triggered immediately by seeing that descriptor status is non-zero. v2: (CI) - Fix build error (hide corrupted label in write function behind CONFIG_DRM_I915_DEBUG_GUC) Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c index de89d40abd38d..948cf31429412 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c @@ -379,8 +379,10 @@ static int ct_write(struct intel_guc_ct *ct, u32 *cmds = ctb->cmds; unsigned int i; +#ifdef CONFIG_DRM_I915_DEBUG_GUC if (unlikely(desc->status)) goto corrupted; +#endif GEM_BUG_ON(tail > size); @@ -445,11 +447,13 @@ static int ct_write(struct intel_guc_ct *ct, return 0; +#ifdef CONFIG_DRM_I915_DEBUG_GUC corrupted: CT_ERROR(ct, "Corrupted descriptor head=%u tail=%u status=%#x\n", desc->head, desc->tail, desc->status); ctb->broken = true; return -EPIPE; +#endif } /** @@ -815,8 +819,10 @@ static int ct_read(struct intel_guc_ct *ct, struct ct_incoming_msg **msg) if (unlikely(ctb->broken)) return -EPIPE; +#ifdef CONFIG_DRM_I915_DEBUG_GUC if (unlikely(desc->status)) goto corrupted; +#endif GEM_BUG_ON(head > size); -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 1/2] drm/i915/guc: Don't check CT descriptor status before CT write / read @ 2022-01-20 18:36 ` Matthew Brost 0 siblings, 0 replies; 14+ messages in thread From: Matthew Brost @ 2022-01-20 18:36 UTC (permalink / raw) To: intel-gfx, dri-devel Cc: daniele.ceraolospurio, john.c.harrison, michal.wajdeczko Don't check CT descriptor status, unless CONFIG_DRM_I915_DEBUG_GUC is set, before CT write / read as this could result in a read across the PCIe bus thus adding latency to every CT write / read. On well behavied systems this vaue should always read as zero. For some reason it doesn't the CT channel is broken and will eventually recover from a GT reset, albeit the GT reset will not be triggered immediately by seeing that descriptor status is non-zero. v2: (CI) - Fix build error (hide corrupted label in write function behind CONFIG_DRM_I915_DEBUG_GUC) Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c index de89d40abd38d..948cf31429412 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c @@ -379,8 +379,10 @@ static int ct_write(struct intel_guc_ct *ct, u32 *cmds = ctb->cmds; unsigned int i; +#ifdef CONFIG_DRM_I915_DEBUG_GUC if (unlikely(desc->status)) goto corrupted; +#endif GEM_BUG_ON(tail > size); @@ -445,11 +447,13 @@ static int ct_write(struct intel_guc_ct *ct, return 0; +#ifdef CONFIG_DRM_I915_DEBUG_GUC corrupted: CT_ERROR(ct, "Corrupted descriptor head=%u tail=%u status=%#x\n", desc->head, desc->tail, desc->status); ctb->broken = true; return -EPIPE; +#endif } /** @@ -815,8 +819,10 @@ static int ct_read(struct intel_guc_ct *ct, struct ct_incoming_msg **msg) if (unlikely(ctb->broken)) return -EPIPE; +#ifdef CONFIG_DRM_I915_DEBUG_GUC if (unlikely(desc->status)) goto corrupted; +#endif GEM_BUG_ON(head > size); -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Don't check CT descriptor status before CT write / read 2022-01-20 18:36 ` Matthew Brost @ 2022-01-21 7:28 ` Jani Nikula -1 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2022-01-21 7:28 UTC (permalink / raw) To: Matthew Brost, intel-gfx, dri-devel On Thu, 20 Jan 2022, Matthew Brost <matthew.brost@intel.com> wrote: > Don't check CT descriptor status, unless CONFIG_DRM_I915_DEBUG_GUC is > set, before CT write / read as this could result in a read across the > PCIe bus thus adding latency to every CT write / read. On well behavied > systems this vaue should always read as zero. For some reason it doesn't > the CT channel is broken and will eventually recover from a GT reset, > albeit the GT reset will not be triggered immediately by seeing that > descriptor status is non-zero. > > v2: > (CI) > - Fix build error (hide corrupted label in write function behind > CONFIG_DRM_I915_DEBUG_GUC) > > Signed-off-by: Matthew Brost <matthew.brost@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > index de89d40abd38d..948cf31429412 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > @@ -379,8 +379,10 @@ static int ct_write(struct intel_guc_ct *ct, > u32 *cmds = ctb->cmds; > unsigned int i; > > +#ifdef CONFIG_DRM_I915_DEBUG_GUC > if (unlikely(desc->status)) > goto corrupted; > +#endif Please don't add #ifdefs inline. You can use IS_ENABLED(CONFIG_DRM_I915_DEBUG_GUC) in if statements, but otherwise the code needs to be split out to a separate function. BR, Jani. > > GEM_BUG_ON(tail > size); > > @@ -445,11 +447,13 @@ static int ct_write(struct intel_guc_ct *ct, > > return 0; > > +#ifdef CONFIG_DRM_I915_DEBUG_GUC > corrupted: > CT_ERROR(ct, "Corrupted descriptor head=%u tail=%u status=%#x\n", > desc->head, desc->tail, desc->status); > ctb->broken = true; > return -EPIPE; > +#endif > } > > /** > @@ -815,8 +819,10 @@ static int ct_read(struct intel_guc_ct *ct, struct ct_incoming_msg **msg) > if (unlikely(ctb->broken)) > return -EPIPE; > > +#ifdef CONFIG_DRM_I915_DEBUG_GUC > if (unlikely(desc->status)) > goto corrupted; > +#endif > > GEM_BUG_ON(head > size); -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] drm/i915/guc: Don't check CT descriptor status before CT write / read @ 2022-01-21 7:28 ` Jani Nikula 0 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2022-01-21 7:28 UTC (permalink / raw) To: Matthew Brost, intel-gfx, dri-devel Cc: daniele.ceraolospurio, john.c.harrison, michal.wajdeczko On Thu, 20 Jan 2022, Matthew Brost <matthew.brost@intel.com> wrote: > Don't check CT descriptor status, unless CONFIG_DRM_I915_DEBUG_GUC is > set, before CT write / read as this could result in a read across the > PCIe bus thus adding latency to every CT write / read. On well behavied > systems this vaue should always read as zero. For some reason it doesn't > the CT channel is broken and will eventually recover from a GT reset, > albeit the GT reset will not be triggered immediately by seeing that > descriptor status is non-zero. > > v2: > (CI) > - Fix build error (hide corrupted label in write function behind > CONFIG_DRM_I915_DEBUG_GUC) > > Signed-off-by: Matthew Brost <matthew.brost@intel.com> > --- > drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > index de89d40abd38d..948cf31429412 100644 > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > @@ -379,8 +379,10 @@ static int ct_write(struct intel_guc_ct *ct, > u32 *cmds = ctb->cmds; > unsigned int i; > > +#ifdef CONFIG_DRM_I915_DEBUG_GUC > if (unlikely(desc->status)) > goto corrupted; > +#endif Please don't add #ifdefs inline. You can use IS_ENABLED(CONFIG_DRM_I915_DEBUG_GUC) in if statements, but otherwise the code needs to be split out to a separate function. BR, Jani. > > GEM_BUG_ON(tail > size); > > @@ -445,11 +447,13 @@ static int ct_write(struct intel_guc_ct *ct, > > return 0; > > +#ifdef CONFIG_DRM_I915_DEBUG_GUC > corrupted: > CT_ERROR(ct, "Corrupted descriptor head=%u tail=%u status=%#x\n", > desc->head, desc->tail, desc->status); > ctb->broken = true; > return -EPIPE; > +#endif > } > > /** > @@ -815,8 +819,10 @@ static int ct_read(struct intel_guc_ct *ct, struct ct_incoming_msg **msg) > if (unlikely(ctb->broken)) > return -EPIPE; > > +#ifdef CONFIG_DRM_I915_DEBUG_GUC > if (unlikely(desc->status)) > goto corrupted; > +#endif > > GEM_BUG_ON(head > size); -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Don't check CT descriptor status before CT write / read 2022-01-21 7:28 ` Jani Nikula @ 2022-01-21 21:03 ` Matthew Brost -1 siblings, 0 replies; 14+ messages in thread From: Matthew Brost @ 2022-01-21 21:03 UTC (permalink / raw) To: Jani Nikula; +Cc: intel-gfx, dri-devel On Fri, Jan 21, 2022 at 09:28:46AM +0200, Jani Nikula wrote: > On Thu, 20 Jan 2022, Matthew Brost <matthew.brost@intel.com> wrote: > > Don't check CT descriptor status, unless CONFIG_DRM_I915_DEBUG_GUC is > > set, before CT write / read as this could result in a read across the > > PCIe bus thus adding latency to every CT write / read. On well behavied > > systems this vaue should always read as zero. For some reason it doesn't > > the CT channel is broken and will eventually recover from a GT reset, > > albeit the GT reset will not be triggered immediately by seeing that > > descriptor status is non-zero. > > > > v2: > > (CI) > > - Fix build error (hide corrupted label in write function behind > > CONFIG_DRM_I915_DEBUG_GUC) > > > > Signed-off-by: Matthew Brost <matthew.brost@intel.com> > > --- > > drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > > index de89d40abd38d..948cf31429412 100644 > > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > > @@ -379,8 +379,10 @@ static int ct_write(struct intel_guc_ct *ct, > > u32 *cmds = ctb->cmds; > > unsigned int i; > > > > +#ifdef CONFIG_DRM_I915_DEBUG_GUC > > if (unlikely(desc->status)) > > goto corrupted; > > +#endif > > Please don't add #ifdefs inline. You can use > IS_ENABLED(CONFIG_DRM_I915_DEBUG_GUC) in if statements, but otherwise > the code needs to be split out to a separate function. > Sure, but I feel like I've actually been by someone else to not use the IS_ENABLED macro and use ifdefs inlines... Matt > BR, > Jani. > > > > > GEM_BUG_ON(tail > size); > > > > @@ -445,11 +447,13 @@ static int ct_write(struct intel_guc_ct *ct, > > > > return 0; > > > > +#ifdef CONFIG_DRM_I915_DEBUG_GUC > > corrupted: > > CT_ERROR(ct, "Corrupted descriptor head=%u tail=%u status=%#x\n", > > desc->head, desc->tail, desc->status); > > ctb->broken = true; > > return -EPIPE; > > +#endif > > } > > > > /** > > @@ -815,8 +819,10 @@ static int ct_read(struct intel_guc_ct *ct, struct ct_incoming_msg **msg) > > if (unlikely(ctb->broken)) > > return -EPIPE; > > > > +#ifdef CONFIG_DRM_I915_DEBUG_GUC > > if (unlikely(desc->status)) > > goto corrupted; > > +#endif > > > > GEM_BUG_ON(head > size); > > -- > Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] drm/i915/guc: Don't check CT descriptor status before CT write / read @ 2022-01-21 21:03 ` Matthew Brost 0 siblings, 0 replies; 14+ messages in thread From: Matthew Brost @ 2022-01-21 21:03 UTC (permalink / raw) To: Jani Nikula Cc: intel-gfx, daniele.ceraolospurio, john.c.harrison, dri-devel, michal.wajdeczko On Fri, Jan 21, 2022 at 09:28:46AM +0200, Jani Nikula wrote: > On Thu, 20 Jan 2022, Matthew Brost <matthew.brost@intel.com> wrote: > > Don't check CT descriptor status, unless CONFIG_DRM_I915_DEBUG_GUC is > > set, before CT write / read as this could result in a read across the > > PCIe bus thus adding latency to every CT write / read. On well behavied > > systems this vaue should always read as zero. For some reason it doesn't > > the CT channel is broken and will eventually recover from a GT reset, > > albeit the GT reset will not be triggered immediately by seeing that > > descriptor status is non-zero. > > > > v2: > > (CI) > > - Fix build error (hide corrupted label in write function behind > > CONFIG_DRM_I915_DEBUG_GUC) > > > > Signed-off-by: Matthew Brost <matthew.brost@intel.com> > > --- > > drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 ++++++ > > 1 file changed, 6 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > > index de89d40abd38d..948cf31429412 100644 > > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c > > @@ -379,8 +379,10 @@ static int ct_write(struct intel_guc_ct *ct, > > u32 *cmds = ctb->cmds; > > unsigned int i; > > > > +#ifdef CONFIG_DRM_I915_DEBUG_GUC > > if (unlikely(desc->status)) > > goto corrupted; > > +#endif > > Please don't add #ifdefs inline. You can use > IS_ENABLED(CONFIG_DRM_I915_DEBUG_GUC) in if statements, but otherwise > the code needs to be split out to a separate function. > Sure, but I feel like I've actually been by someone else to not use the IS_ENABLED macro and use ifdefs inlines... Matt > BR, > Jani. > > > > > GEM_BUG_ON(tail > size); > > > > @@ -445,11 +447,13 @@ static int ct_write(struct intel_guc_ct *ct, > > > > return 0; > > > > +#ifdef CONFIG_DRM_I915_DEBUG_GUC > > corrupted: > > CT_ERROR(ct, "Corrupted descriptor head=%u tail=%u status=%#x\n", > > desc->head, desc->tail, desc->status); > > ctb->broken = true; > > return -EPIPE; > > +#endif > > } > > > > /** > > @@ -815,8 +819,10 @@ static int ct_read(struct intel_guc_ct *ct, struct ct_incoming_msg **msg) > > if (unlikely(ctb->broken)) > > return -EPIPE; > > > > +#ifdef CONFIG_DRM_I915_DEBUG_GUC > > if (unlikely(desc->status)) > > goto corrupted; > > +#endif > > > > GEM_BUG_ON(head > size); > > -- > Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [Intel-gfx] [PATCH 1/2] drm/i915/guc: Don't check CT descriptor status before CT write / read 2022-01-21 21:03 ` Matthew Brost @ 2022-01-24 13:07 ` Jani Nikula -1 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2022-01-24 13:07 UTC (permalink / raw) To: Matthew Brost; +Cc: intel-gfx, dri-devel On Fri, 21 Jan 2022, Matthew Brost <matthew.brost@intel.com> wrote: > On Fri, Jan 21, 2022 at 09:28:46AM +0200, Jani Nikula wrote: >> On Thu, 20 Jan 2022, Matthew Brost <matthew.brost@intel.com> wrote: >> > Don't check CT descriptor status, unless CONFIG_DRM_I915_DEBUG_GUC is >> > set, before CT write / read as this could result in a read across the >> > PCIe bus thus adding latency to every CT write / read. On well behavied >> > systems this vaue should always read as zero. For some reason it doesn't >> > the CT channel is broken and will eventually recover from a GT reset, >> > albeit the GT reset will not be triggered immediately by seeing that >> > descriptor status is non-zero. >> > >> > v2: >> > (CI) >> > - Fix build error (hide corrupted label in write function behind >> > CONFIG_DRM_I915_DEBUG_GUC) >> > >> > Signed-off-by: Matthew Brost <matthew.brost@intel.com> >> > --- >> > drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 ++++++ >> > 1 file changed, 6 insertions(+) >> > >> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c >> > index de89d40abd38d..948cf31429412 100644 >> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c >> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c >> > @@ -379,8 +379,10 @@ static int ct_write(struct intel_guc_ct *ct, >> > u32 *cmds = ctb->cmds; >> > unsigned int i; >> > >> > +#ifdef CONFIG_DRM_I915_DEBUG_GUC >> > if (unlikely(desc->status)) >> > goto corrupted; >> > +#endif >> >> Please don't add #ifdefs inline. You can use >> IS_ENABLED(CONFIG_DRM_I915_DEBUG_GUC) in if statements, but otherwise >> the code needs to be split out to a separate function. >> > > Sure, but I feel like I've actually been by someone else to not use the > IS_ENABLED macro and use ifdefs inlines... Citation needed. Basically never use #if/#ifdef inline. Only use them at the top level like this: #if IS_ENABLED(CONFIG_FOO) static int bar(void) { /* implementation with foo */ } #else static int bar(void) { /* implementation without foo */ } #endif Sometimes you can avoid the above boilerplate with IS_ENABLED() inline: if (IS_ENABLED(CONFIG_FOO)) ... Basically if you think #if/#ifdef inline is the easiest, you need to refactor the code to do it cleanly without them. BR, Jani. > > Matt > >> BR, >> Jani. >> >> > >> > GEM_BUG_ON(tail > size); >> > >> > @@ -445,11 +447,13 @@ static int ct_write(struct intel_guc_ct *ct, >> > >> > return 0; >> > >> > +#ifdef CONFIG_DRM_I915_DEBUG_GUC >> > corrupted: >> > CT_ERROR(ct, "Corrupted descriptor head=%u tail=%u status=%#x\n", >> > desc->head, desc->tail, desc->status); >> > ctb->broken = true; >> > return -EPIPE; >> > +#endif >> > } >> > >> > /** >> > @@ -815,8 +819,10 @@ static int ct_read(struct intel_guc_ct *ct, struct ct_incoming_msg **msg) >> > if (unlikely(ctb->broken)) >> > return -EPIPE; >> > >> > +#ifdef CONFIG_DRM_I915_DEBUG_GUC >> > if (unlikely(desc->status)) >> > goto corrupted; >> > +#endif >> > >> > GEM_BUG_ON(head > size); >> >> -- >> Jani Nikula, Intel Open Source Graphics Center -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] drm/i915/guc: Don't check CT descriptor status before CT write / read @ 2022-01-24 13:07 ` Jani Nikula 0 siblings, 0 replies; 14+ messages in thread From: Jani Nikula @ 2022-01-24 13:07 UTC (permalink / raw) To: Matthew Brost Cc: intel-gfx, daniele.ceraolospurio, john.c.harrison, dri-devel, michal.wajdeczko On Fri, 21 Jan 2022, Matthew Brost <matthew.brost@intel.com> wrote: > On Fri, Jan 21, 2022 at 09:28:46AM +0200, Jani Nikula wrote: >> On Thu, 20 Jan 2022, Matthew Brost <matthew.brost@intel.com> wrote: >> > Don't check CT descriptor status, unless CONFIG_DRM_I915_DEBUG_GUC is >> > set, before CT write / read as this could result in a read across the >> > PCIe bus thus adding latency to every CT write / read. On well behavied >> > systems this vaue should always read as zero. For some reason it doesn't >> > the CT channel is broken and will eventually recover from a GT reset, >> > albeit the GT reset will not be triggered immediately by seeing that >> > descriptor status is non-zero. >> > >> > v2: >> > (CI) >> > - Fix build error (hide corrupted label in write function behind >> > CONFIG_DRM_I915_DEBUG_GUC) >> > >> > Signed-off-by: Matthew Brost <matthew.brost@intel.com> >> > --- >> > drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 6 ++++++ >> > 1 file changed, 6 insertions(+) >> > >> > diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c >> > index de89d40abd38d..948cf31429412 100644 >> > --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c >> > +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c >> > @@ -379,8 +379,10 @@ static int ct_write(struct intel_guc_ct *ct, >> > u32 *cmds = ctb->cmds; >> > unsigned int i; >> > >> > +#ifdef CONFIG_DRM_I915_DEBUG_GUC >> > if (unlikely(desc->status)) >> > goto corrupted; >> > +#endif >> >> Please don't add #ifdefs inline. You can use >> IS_ENABLED(CONFIG_DRM_I915_DEBUG_GUC) in if statements, but otherwise >> the code needs to be split out to a separate function. >> > > Sure, but I feel like I've actually been by someone else to not use the > IS_ENABLED macro and use ifdefs inlines... Citation needed. Basically never use #if/#ifdef inline. Only use them at the top level like this: #if IS_ENABLED(CONFIG_FOO) static int bar(void) { /* implementation with foo */ } #else static int bar(void) { /* implementation without foo */ } #endif Sometimes you can avoid the above boilerplate with IS_ENABLED() inline: if (IS_ENABLED(CONFIG_FOO)) ... Basically if you think #if/#ifdef inline is the easiest, you need to refactor the code to do it cleanly without them. BR, Jani. > > Matt > >> BR, >> Jani. >> >> > >> > GEM_BUG_ON(tail > size); >> > >> > @@ -445,11 +447,13 @@ static int ct_write(struct intel_guc_ct *ct, >> > >> > return 0; >> > >> > +#ifdef CONFIG_DRM_I915_DEBUG_GUC >> > corrupted: >> > CT_ERROR(ct, "Corrupted descriptor head=%u tail=%u status=%#x\n", >> > desc->head, desc->tail, desc->status); >> > ctb->broken = true; >> > return -EPIPE; >> > +#endif >> > } >> > >> > /** >> > @@ -815,8 +819,10 @@ static int ct_read(struct intel_guc_ct *ct, struct ct_incoming_msg **msg) >> > if (unlikely(ctb->broken)) >> > return -EPIPE; >> > >> > +#ifdef CONFIG_DRM_I915_DEBUG_GUC >> > if (unlikely(desc->status)) >> > goto corrupted; >> > +#endif >> > >> > GEM_BUG_ON(head > size); >> >> -- >> Jani Nikula, Intel Open Source Graphics Center -- Jani Nikula, Intel Open Source Graphics Center ^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/guc: Print CT descriptor status in CT debug function 2022-01-20 18:36 ` Matthew Brost @ 2022-01-20 18:36 ` Matthew Brost -1 siblings, 0 replies; 14+ messages in thread From: Matthew Brost @ 2022-01-20 18:36 UTC (permalink / raw) To: intel-gfx, dri-devel Noticed that the CT descriptor status was not printed in the CT debug function, add that in. Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c index 948cf31429412..5df2e3413796e 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c @@ -1219,10 +1219,14 @@ void intel_guc_ct_print_info(struct intel_guc_ct *ct, ct->ctbs.send.desc->head); drm_printf(p, "Tail: %u\n", ct->ctbs.send.desc->tail); + drm_printf(p, "Status: %u\n", + ct->ctbs.send.desc->status); drm_printf(p, "G2H Space: %u\n", atomic_read(&ct->ctbs.recv.space) * 4); drm_printf(p, "Head: %u\n", ct->ctbs.recv.desc->head); drm_printf(p, "Tail: %u\n", ct->ctbs.recv.desc->tail); + drm_printf(p, "Status: %u\n", + ct->ctbs.recv.desc->status); } -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/2] drm/i915/guc: Print CT descriptor status in CT debug function @ 2022-01-20 18:36 ` Matthew Brost 0 siblings, 0 replies; 14+ messages in thread From: Matthew Brost @ 2022-01-20 18:36 UTC (permalink / raw) To: intel-gfx, dri-devel Cc: daniele.ceraolospurio, john.c.harrison, michal.wajdeczko Noticed that the CT descriptor status was not printed in the CT debug function, add that in. Signed-off-by: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c index 948cf31429412..5df2e3413796e 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ct.c @@ -1219,10 +1219,14 @@ void intel_guc_ct_print_info(struct intel_guc_ct *ct, ct->ctbs.send.desc->head); drm_printf(p, "Tail: %u\n", ct->ctbs.send.desc->tail); + drm_printf(p, "Status: %u\n", + ct->ctbs.send.desc->status); drm_printf(p, "G2H Space: %u\n", atomic_read(&ct->ctbs.recv.space) * 4); drm_printf(p, "Head: %u\n", ct->ctbs.recv.desc->head); drm_printf(p, "Tail: %u\n", ct->ctbs.recv.desc->tail); + drm_printf(p, "Status: %u\n", + ct->ctbs.recv.desc->status); } -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for A few CT updates 2022-01-20 18:36 ` Matthew Brost ` (2 preceding siblings ...) (?) @ 2022-01-20 21:15 ` Patchwork -1 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2022-01-20 21:15 UTC (permalink / raw) To: Matthew Brost; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 7385 bytes --] == Series Details == Series: A few CT updates URL : https://patchwork.freedesktop.org/series/99117/ State : success == Summary == CI Bug Log - changes from CI_DRM_11114 -> Patchwork_22044 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/index.html Participating hosts (42 -> 36) ------------------------------ Additional (2): fi-kbl-soraka fi-ilk-650 Missing (8): bat-dg1-6 bat-dg1-5 fi-bsw-cyan bat-adlp-6 bat-adlp-4 fi-pnv-d510 fi-bdw-samus bat-jsl-1 Known issues ------------ Here are the changes found in Patchwork_22044 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@amdgpu/amd_cs_nop@nop-compute0: - fi-ilk-650: NOTRUN -> [SKIP][1] ([fdo#109271]) +39 similar issues [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-ilk-650/igt@amdgpu/amd_cs_nop@nop-compute0.html * igt@amdgpu/amd_cs_nop@sync-fork-gfx0: - fi-skl-6600u: NOTRUN -> [SKIP][2] ([fdo#109271]) +21 similar issues [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-skl-6600u/igt@amdgpu/amd_cs_nop@sync-fork-gfx0.html * igt@gem_exec_fence@basic-busy@bcs0: - fi-kbl-soraka: NOTRUN -> [SKIP][3] ([fdo#109271]) +8 similar issues [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-kbl-soraka/igt@gem_exec_fence@basic-busy@bcs0.html * igt@gem_huc_copy@huc-copy: - fi-skl-6600u: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#2190]) [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html - fi-kbl-soraka: NOTRUN -> [SKIP][5] ([fdo#109271] / [i915#2190]) [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-kbl-soraka/igt@gem_huc_copy@huc-copy.html * igt@gem_lmem_swapping@basic: - fi-kbl-soraka: NOTRUN -> [SKIP][6] ([fdo#109271] / [i915#4613]) +3 similar issues [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-kbl-soraka/igt@gem_lmem_swapping@basic.html * igt@gem_lmem_swapping@verify-random: - fi-skl-6600u: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#4613]) +3 similar issues [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-skl-6600u/igt@gem_lmem_swapping@verify-random.html * igt@i915_selftest@live@gt_pm: - fi-kbl-soraka: NOTRUN -> [DMESG-FAIL][8] ([i915#1886] / [i915#2291]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-kbl-soraka/igt@i915_selftest@live@gt_pm.html * igt@i915_selftest@live@hangcheck: - fi-hsw-4770: [PASS][9] -> [INCOMPLETE][10] ([i915#3303]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html - fi-snb-2600: [PASS][11] -> [INCOMPLETE][12] ([i915#3921]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/fi-snb-2600/igt@i915_selftest@live@hangcheck.html [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-snb-2600/igt@i915_selftest@live@hangcheck.html * igt@kms_chamelium@common-hpd-after-suspend: - fi-kbl-soraka: NOTRUN -> [SKIP][13] ([fdo#109271] / [fdo#111827]) +8 similar issues [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-kbl-soraka/igt@kms_chamelium@common-hpd-after-suspend.html * igt@kms_chamelium@dp-hpd-fast: - fi-ilk-650: NOTRUN -> [SKIP][14] ([fdo#109271] / [fdo#111827]) +8 similar issues [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-ilk-650/igt@kms_chamelium@dp-hpd-fast.html * igt@kms_chamelium@vga-edid-read: - fi-skl-6600u: NOTRUN -> [SKIP][15] ([fdo#109271] / [fdo#111827]) +8 similar issues [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-skl-6600u/igt@kms_chamelium@vga-edid-read.html * igt@kms_frontbuffer_tracking@basic: - fi-cml-u2: [PASS][16] -> [DMESG-WARN][17] ([i915#4269]) [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-cml-u2/igt@kms_frontbuffer_tracking@basic.html * igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d: - fi-skl-6600u: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#533]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-skl-6600u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html - fi-kbl-soraka: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#533]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-kbl-soraka/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html * igt@runner@aborted: - fi-hsw-4770: NOTRUN -> [FAIL][20] ([fdo#109271] / [i915#1436] / [i915#4312]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-hsw-4770/igt@runner@aborted.html #### Possible fixes #### * igt@core_hotunplug@unbind-rebind: - fi-bwr-2160: [FAIL][21] ([i915#3194]) -> [PASS][22] [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/fi-bwr-2160/igt@core_hotunplug@unbind-rebind.html [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-bwr-2160/igt@core_hotunplug@unbind-rebind.html * igt@gem_flink_basic@bad-flink: - fi-skl-6600u: [INCOMPLETE][23] ([i915#4547]) -> [PASS][24] [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/fi-skl-6600u/igt@gem_flink_basic@bad-flink.html [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271 [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827 [i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436 [i915#1886]: https://gitlab.freedesktop.org/drm/intel/issues/1886 [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190 [i915#2291]: https://gitlab.freedesktop.org/drm/intel/issues/2291 [i915#3194]: https://gitlab.freedesktop.org/drm/intel/issues/3194 [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303 [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921 [i915#4269]: https://gitlab.freedesktop.org/drm/intel/issues/4269 [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312 [i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547 [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613 [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533 Build changes ------------- * Linux: CI_DRM_11114 -> Patchwork_22044 CI-20190529: 20190529 CI_DRM_11114: 95f7fe1c9f81eff6c3faab2a73ccaca51440f73c @ git://anongit.freedesktop.org/gfx-ci/linux IGT_6329: 38f656fdd61119105ecfa2c4dac157cd7dcad204 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_22044: 773c9d914d1fa58dca6145c9780106ca96191b1b @ git://anongit.freedesktop.org/gfx-ci/linux == Linux commits == 773c9d914d1f drm/i915/guc: Print CT descriptor status in CT debug function 2184bc451622 drm/i915/guc: Don't check CT descriptor status before CT write / read == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/index.html [-- Attachment #2: Type: text/html, Size: 9569 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
* [Intel-gfx] ✓ Fi.CI.IGT: success for A few CT updates 2022-01-20 18:36 ` Matthew Brost ` (3 preceding siblings ...) (?) @ 2022-01-21 0:02 ` Patchwork -1 siblings, 0 replies; 14+ messages in thread From: Patchwork @ 2022-01-21 0:02 UTC (permalink / raw) To: Matthew Brost; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 30239 bytes --] == Series Details == Series: A few CT updates URL : https://patchwork.freedesktop.org/series/99117/ State : success == Summary == CI Bug Log - changes from CI_DRM_11114_full -> Patchwork_22044_full ==================================================== Summary ------- **SUCCESS** No regressions found. Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Known issues ------------ Here are the changes found in Patchwork_22044_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@gem_ctx_persistence@engines-hang: - shard-snb: NOTRUN -> [SKIP][1] ([fdo#109271] / [i915#1099]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-snb4/igt@gem_ctx_persistence@engines-hang.html * igt@gem_eio@in-flight-contexts-immediate: - shard-tglb: [PASS][2] -> [TIMEOUT][3] ([i915#3063]) [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-tglb5/igt@gem_eio@in-flight-contexts-immediate.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@gem_eio@in-flight-contexts-immediate.html * igt@gem_exec_balancer@parallel: - shard-iclb: [PASS][4] -> [SKIP][5] ([i915#4525]) +1 similar issue [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-iclb1/igt@gem_exec_balancer@parallel.html [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb6/igt@gem_exec_balancer@parallel.html * igt@gem_exec_fair@basic-pace@rcs0: - shard-glk: [PASS][6] -> [FAIL][7] ([i915#2842]) [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-glk2/igt@gem_exec_fair@basic-pace@rcs0.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-glk6/igt@gem_exec_fair@basic-pace@rcs0.html * igt@gem_exec_fair@basic-pace@vcs0: - shard-iclb: [PASS][8] -> [FAIL][9] ([i915#2842]) +1 similar issue [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-iclb8/igt@gem_exec_fair@basic-pace@vcs0.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb6/igt@gem_exec_fair@basic-pace@vcs0.html * igt@gem_exec_fair@basic-pace@vcs1: - shard-kbl: [PASS][10] -> [FAIL][11] ([i915#2842]) +1 similar issue [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs1.html * igt@gem_exec_fair@basic-throttle@rcs0: - shard-iclb: [PASS][12] -> [FAIL][13] ([i915#2849]) [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-iclb3/igt@gem_exec_fair@basic-throttle@rcs0.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb8/igt@gem_exec_fair@basic-throttle@rcs0.html * igt@gem_exec_suspend@basic-s3@smem: - shard-apl: NOTRUN -> [DMESG-WARN][14] ([i915#180]) [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl4/igt@gem_exec_suspend@basic-s3@smem.html * igt@gem_exec_whisper@basic-contexts: - shard-glk: [PASS][15] -> [DMESG-WARN][16] ([i915#118]) +1 similar issue [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-glk6/igt@gem_exec_whisper@basic-contexts.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-glk2/igt@gem_exec_whisper@basic-contexts.html * igt@gem_lmem_swapping@heavy-multi: - shard-tglb: NOTRUN -> [SKIP][17] ([i915#4613]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@gem_lmem_swapping@heavy-multi.html * igt@gem_lmem_swapping@parallel-multi: - shard-apl: NOTRUN -> [SKIP][18] ([fdo#109271] / [i915#4613]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl6/igt@gem_lmem_swapping@parallel-multi.html - shard-kbl: NOTRUN -> [SKIP][19] ([fdo#109271] / [i915#4613]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl3/igt@gem_lmem_swapping@parallel-multi.html * igt@gem_lmem_swapping@parallel-random: - shard-skl: NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#4613]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl9/igt@gem_lmem_swapping@parallel-random.html * igt@gem_pread@exhaustion: - shard-apl: NOTRUN -> [WARN][21] ([i915#2658]) [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl6/igt@gem_pread@exhaustion.html - shard-kbl: NOTRUN -> [WARN][22] ([i915#2658]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl3/igt@gem_pread@exhaustion.html * igt@gen7_exec_parse@basic-offset: - shard-apl: NOTRUN -> [SKIP][23] ([fdo#109271]) +73 similar issues [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl6/igt@gen7_exec_parse@basic-offset.html * igt@gen7_exec_parse@basic-rejected: - shard-iclb: NOTRUN -> [SKIP][24] ([fdo#109289]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb6/igt@gen7_exec_parse@basic-rejected.html * igt@gen9_exec_parse@batch-without-end: - shard-tglb: NOTRUN -> [SKIP][25] ([i915#2527] / [i915#2856]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@gen9_exec_parse@batch-without-end.html * igt@i915_module_load@reload-with-fault-injection: - shard-skl: [PASS][26] -> [DMESG-WARN][27] ([i915#1982]) +1 similar issue [26]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-skl9/igt@i915_module_load@reload-with-fault-injection.html [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl10/igt@i915_module_load@reload-with-fault-injection.html * igt@i915_pm_rpm@dpms-non-lpsp: - shard-tglb: NOTRUN -> [SKIP][28] ([fdo#111644] / [i915#1397] / [i915#2411]) [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@i915_pm_rpm@dpms-non-lpsp.html * igt@i915_pm_sseu@full-enable: - shard-tglb: NOTRUN -> [SKIP][29] ([i915#4387]) [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@i915_pm_sseu@full-enable.html * igt@i915_suspend@sysfs-reader: - shard-skl: [PASS][30] -> [INCOMPLETE][31] ([i915#4817]) [30]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-skl8/igt@i915_suspend@sysfs-reader.html [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl3/igt@i915_suspend@sysfs-reader.html - shard-kbl: [PASS][32] -> [DMESG-WARN][33] ([i915#180]) +2 similar issues [32]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-kbl7/igt@i915_suspend@sysfs-reader.html [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl1/igt@i915_suspend@sysfs-reader.html * igt@kms_async_flips@alternate-sync-async-flip: - shard-skl: [PASS][34] -> [FAIL][35] ([i915#2521]) [34]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-skl7/igt@kms_async_flips@alternate-sync-async-flip.html [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl3/igt@kms_async_flips@alternate-sync-async-flip.html * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip: - shard-kbl: NOTRUN -> [SKIP][36] ([fdo#109271] / [i915#3777]) [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-apl: NOTRUN -> [SKIP][37] ([fdo#109271] / [i915#3777]) [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip: - shard-skl: NOTRUN -> [SKIP][38] ([fdo#109271] / [i915#3777]) +1 similar issue [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html * igt@kms_big_fb@yf-tiled-64bpp-rotate-270: - shard-tglb: NOTRUN -> [SKIP][39] ([fdo#111615]) +2 similar issues [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_big_fb@yf-tiled-64bpp-rotate-270.html * igt@kms_big_joiner@2x-modeset: - shard-tglb: NOTRUN -> [SKIP][40] ([i915#2705]) [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_big_joiner@2x-modeset.html * igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs: - shard-tglb: NOTRUN -> [SKIP][41] ([fdo#111615] / [i915#3689]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_ccs@pipe-a-ccs-on-another-bo-yf_tiled_ccs.html * igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_mc_ccs: - shard-tglb: NOTRUN -> [SKIP][42] ([i915#3689] / [i915#3886]) +2 similar issues [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_ccs@pipe-b-bad-aux-stride-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs: - shard-kbl: NOTRUN -> [SKIP][43] ([fdo#109271] / [i915#3886]) +3 similar issues [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl3/igt@kms_ccs@pipe-b-bad-rotation-90-y_tiled_gen12_mc_ccs.html * igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_ccs: - shard-tglb: NOTRUN -> [SKIP][44] ([i915#3689]) +1 similar issue [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_ccs@pipe-b-ccs-on-another-bo-y_tiled_ccs.html * igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc: - shard-apl: NOTRUN -> [SKIP][45] ([fdo#109271] / [i915#3886]) +3 similar issues [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl4/igt@kms_ccs@pipe-b-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc: - shard-iclb: NOTRUN -> [SKIP][46] ([fdo#109278] / [i915#3886]) +1 similar issue [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb7/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_rc_ccs_cc.html * igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc: - shard-skl: NOTRUN -> [SKIP][47] ([fdo#109271] / [i915#3886]) +1 similar issue [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl9/igt@kms_ccs@pipe-c-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html * igt@kms_chamelium@common-hpd-after-suspend: - shard-apl: NOTRUN -> [SKIP][48] ([fdo#109271] / [fdo#111827]) +4 similar issues [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl4/igt@kms_chamelium@common-hpd-after-suspend.html * igt@kms_chamelium@hdmi-mode-timings: - shard-kbl: NOTRUN -> [SKIP][49] ([fdo#109271] / [fdo#111827]) +3 similar issues [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl1/igt@kms_chamelium@hdmi-mode-timings.html * igt@kms_chamelium@vga-hpd-after-suspend: - shard-tglb: NOTRUN -> [SKIP][50] ([fdo#109284] / [fdo#111827]) +2 similar issues [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_chamelium@vga-hpd-after-suspend.html * igt@kms_color_chamelium@pipe-d-ctm-0-5: - shard-skl: NOTRUN -> [SKIP][51] ([fdo#109271] / [fdo#111827]) +2 similar issues [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl9/igt@kms_color_chamelium@pipe-d-ctm-0-5.html * igt@kms_color_chamelium@pipe-d-degamma: - shard-snb: NOTRUN -> [SKIP][52] ([fdo#109271] / [fdo#111827]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-snb4/igt@kms_color_chamelium@pipe-d-degamma.html - shard-iclb: NOTRUN -> [SKIP][53] ([fdo#109278] / [fdo#109284] / [fdo#111827]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb8/igt@kms_color_chamelium@pipe-d-degamma.html * igt@kms_content_protection@dp-mst-type-1: - shard-tglb: NOTRUN -> [SKIP][54] ([i915#3116]) [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_content_protection@dp-mst-type-1.html * igt@kms_cursor_crc@pipe-a-cursor-max-size-offscreen: - shard-tglb: NOTRUN -> [SKIP][55] ([i915#3359]) +1 similar issue [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_cursor_crc@pipe-a-cursor-max-size-offscreen.html * igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen: - shard-skl: NOTRUN -> [SKIP][56] ([fdo#109271]) +54 similar issues [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl9/igt@kms_cursor_crc@pipe-b-cursor-32x32-onscreen.html * igt@kms_cursor_crc@pipe-b-cursor-512x512-offscreen: - shard-tglb: NOTRUN -> [SKIP][57] ([fdo#109279] / [i915#3359]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_cursor_crc@pipe-b-cursor-512x512-offscreen.html * igt@kms_cursor_crc@pipe-d-cursor-32x10-sliding: - shard-snb: NOTRUN -> [SKIP][58] ([fdo#109271]) +20 similar issues [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-snb4/igt@kms_cursor_crc@pipe-d-cursor-32x10-sliding.html * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy: - shard-tglb: NOTRUN -> [SKIP][59] ([fdo#109274] / [fdo#111825]) +2 similar issues [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-legacy.html * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy: - shard-tglb: NOTRUN -> [SKIP][60] ([i915#4103]) [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html * igt@kms_cursor_legacy@pipe-d-single-bo: - shard-kbl: NOTRUN -> [SKIP][61] ([fdo#109271] / [i915#533]) +1 similar issue [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl1/igt@kms_cursor_legacy@pipe-d-single-bo.html * igt@kms_fbcon_fbt@fbc-suspend: - shard-apl: [PASS][62] -> [INCOMPLETE][63] ([i915#180] / [i915#1982]) [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-apl2/igt@kms_fbcon_fbt@fbc-suspend.html [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl1/igt@kms_fbcon_fbt@fbc-suspend.html * igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a2: - shard-glk: [PASS][64] -> [FAIL][65] ([i915#79]) [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-glk5/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a2.html [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-glk4/igt@kms_flip@flip-vs-expired-vblank@b-hdmi-a2.html * igt@kms_flip@flip-vs-suspend-interruptible@c-dp1: - shard-apl: [PASS][66] -> [DMESG-WARN][67] ([i915#180]) +3 similar issues [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-apl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl1/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling: - shard-iclb: [PASS][68] -> [SKIP][69] ([i915#3701]) +1 similar issue [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-iclb6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb2/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-downscaling.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-gtt: - shard-tglb: NOTRUN -> [SKIP][70] ([fdo#109280] / [fdo#111825]) +5 similar issues [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt: - shard-iclb: NOTRUN -> [SKIP][71] ([fdo#109280]) +3 similar issues [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt.html * igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d: - shard-iclb: NOTRUN -> [SKIP][72] ([fdo#109278]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb6/igt@kms_pipe_crc_basic@nonblocking-crc-pipe-d.html * igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max: - shard-kbl: NOTRUN -> [FAIL][73] ([fdo#108145] / [i915#265]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl3/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html - shard-apl: NOTRUN -> [FAIL][74] ([fdo#108145] / [i915#265]) [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl6/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html * igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb: - shard-apl: NOTRUN -> [FAIL][75] ([i915#265]) [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl4/igt@kms_plane_alpha_blend@pipe-b-alpha-transparent-fb.html * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min: - shard-skl: NOTRUN -> [FAIL][76] ([fdo#108145] / [i915#265]) +1 similar issue [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html * igt@kms_plane_lowres@pipe-b-tiling-y: - shard-tglb: NOTRUN -> [SKIP][77] ([i915#3536]) [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_plane_lowres@pipe-b-tiling-y.html * igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area: - shard-kbl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#658]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl1/igt@kms_psr2_sf@overlay-plane-update-sf-dmg-area.html * igt@kms_psr2_sf@plane-move-sf-dmg-area: - shard-tglb: NOTRUN -> [SKIP][79] ([i915#2920]) [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_psr2_sf@plane-move-sf-dmg-area.html * igt@kms_psr@psr2_basic: - shard-iclb: [PASS][80] -> [SKIP][81] ([fdo#109441]) +1 similar issue [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-iclb2/igt@kms_psr@psr2_basic.html [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb6/igt@kms_psr@psr2_basic.html * igt@kms_psr@psr2_primary_mmap_cpu: - shard-kbl: NOTRUN -> [SKIP][82] ([fdo#109271]) +70 similar issues [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl3/igt@kms_psr@psr2_primary_mmap_cpu.html * igt@kms_psr@psr2_sprite_plane_move: - shard-tglb: NOTRUN -> [FAIL][83] ([i915#132] / [i915#3467]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@kms_psr@psr2_sprite_plane_move.html * igt@nouveau_crc@pipe-c-ctx-flip-detection: - shard-tglb: NOTRUN -> [SKIP][84] ([i915#2530]) [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@nouveau_crc@pipe-c-ctx-flip-detection.html * igt@prime_nv_pcopy@test_semaphore: - shard-tglb: NOTRUN -> [SKIP][85] ([fdo#109291]) [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@prime_nv_pcopy@test_semaphore.html * igt@sysfs_clients@sema-50: - shard-kbl: NOTRUN -> [SKIP][86] ([fdo#109271] / [i915#2994]) +1 similar issue [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl3/igt@sysfs_clients@sema-50.html - shard-apl: NOTRUN -> [SKIP][87] ([fdo#109271] / [i915#2994]) [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl6/igt@sysfs_clients@sema-50.html * igt@sysfs_clients@split-25: - shard-skl: NOTRUN -> [SKIP][88] ([fdo#109271] / [i915#2994]) +1 similar issue [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl9/igt@sysfs_clients@split-25.html #### Possible fixes #### * igt@gem_eio@in-flight-suspend: - shard-kbl: [INCOMPLETE][89] ([i915#180] / [i915#3614]) -> [PASS][90] [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-kbl1/igt@gem_eio@in-flight-suspend.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl3/igt@gem_eio@in-flight-suspend.html - shard-apl: [INCOMPLETE][91] ([i915#180]) -> [PASS][92] [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-apl8/igt@gem_eio@in-flight-suspend.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl6/igt@gem_eio@in-flight-suspend.html * igt@gem_exec_balancer@parallel-contexts: - shard-iclb: [SKIP][93] ([i915#4525]) -> [PASS][94] +1 similar issue [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-iclb3/igt@gem_exec_balancer@parallel-contexts.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb1/igt@gem_exec_balancer@parallel-contexts.html * igt@gem_exec_capture@pi@rcs0: - shard-skl: [INCOMPLETE][95] ([i915#4547]) -> [PASS][96] [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-skl9/igt@gem_exec_capture@pi@rcs0.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl4/igt@gem_exec_capture@pi@rcs0.html * igt@gem_exec_fair@basic-pace@vecs0: - shard-kbl: [FAIL][97] ([i915#2842]) -> [PASS][98] [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-kbl6/igt@gem_exec_fair@basic-pace@vecs0.html [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl6/igt@gem_exec_fair@basic-pace@vecs0.html * igt@gem_huc_copy@huc-copy: - shard-tglb: [SKIP][99] ([i915#2190]) -> [PASS][100] [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-tglb7/igt@gem_huc_copy@huc-copy.html [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb2/igt@gem_huc_copy@huc-copy.html * igt@gem_ppgtt@blt-vs-render-ctx0: - shard-tglb: [DMESG-FAIL][101] -> [PASS][102] [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-tglb2/igt@gem_ppgtt@blt-vs-render-ctx0.html [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-tglb3/igt@gem_ppgtt@blt-vs-render-ctx0.html * igt@i915_selftest@live@hangcheck: - shard-snb: [INCOMPLETE][103] ([i915#3921]) -> [PASS][104] [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-snb2/igt@i915_selftest@live@hangcheck.html [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-snb4/igt@i915_selftest@live@hangcheck.html * igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen: - shard-glk: [DMESG-WARN][105] ([i915#118]) -> [PASS][106] [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-glk8/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-glk6/igt@kms_cursor_crc@pipe-a-cursor-64x64-onscreen.html * igt@kms_cursor_crc@pipe-b-cursor-suspend: - shard-kbl: [DMESG-WARN][107] ([i915#180]) -> [PASS][108] +1 similar issue [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-kbl1/igt@kms_cursor_crc@pipe-b-cursor-suspend.html [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-suspend.html * igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2: - shard-glk: [FAIL][109] ([i915#79]) -> [PASS][110] [109]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank@bc-hdmi-a1-hdmi-a2.html * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1: - shard-skl: [FAIL][111] ([i915#79]) -> [PASS][112] [111]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl8/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html * igt@kms_flip@flip-vs-suspend@a-dp1: - shard-apl: [DMESG-WARN][113] ([i915#180]) -> [PASS][114] +3 similar issues [113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-apl4/igt@kms_flip@flip-vs-suspend@a-dp1.html [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl4/igt@kms_flip@flip-vs-suspend@a-dp1.html * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling: - shard-glk: [FAIL][115] ([i915#4911]) -> [PASS][116] +1 similar issue [115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-glk8/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-glk3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc: - shard-skl: [FAIL][117] ([fdo#108145] / [i915#265]) -> [PASS][118] [117]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-skl7/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-skl3/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html * igt@kms_psr@psr2_cursor_mmap_cpu: - shard-iclb: [SKIP][119] ([fdo#109441]) -> [PASS][120] +3 similar issues [119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-iclb6/igt@kms_psr@psr2_cursor_mmap_cpu.html [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html * igt@kms_vblank@pipe-a-ts-continuation-suspend: - shard-apl: [DMESG-WARN][121] ([i915#180] / [i915#295]) -> [PASS][122] [121]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-apl4/igt@kms_vblank@pipe-a-ts-continuation-suspend.html [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-apl3/igt@kms_vblank@pipe-a-ts-continuation-suspend.html #### Warnings #### * igt@gem_exec_balancer@parallel-ordering: - shard-iclb: [FAIL][123] ([i915#4916]) -> [SKIP][124] ([i915#4525]) [123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-iclb1/igt@gem_exec_balancer@parallel-ordering.html [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb5/igt@gem_exec_balancer@parallel-ordering.html * igt@gem_exec_fair@basic-pace@vcs0: - shard-kbl: [FAIL][125] ([i915#2842]) -> [SKIP][126] ([fdo#109271]) [125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs0.html [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl6/igt@gem_exec_fair@basic-pace@vcs0.html * igt@i915_pm_rc6_residency@rc6-fence: - shard-iclb: [WARN][127] ([i915#1804] / [i915#2684]) -> [WARN][128] ([i915#2684]) [127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-iclb6/igt@i915_pm_rc6_residency@rc6-fence.html [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb2/igt@i915_pm_rc6_residency@rc6-fence.html * igt@i915_pm_rc6_residency@rc6-idle: - shard-iclb: [FAIL][129] ([i915#2680]) -> [WARN][130] ([i915#1804] / [i915#2684]) [129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-iclb7/igt@i915_pm_rc6_residency@rc6-idle.html [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb4/igt@i915_pm_rc6_residency@rc6-idle.html * igt@kms_psr2_su@page_flip-nv12: - shard-iclb: [SKIP][131] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [FAIL][132] ([i915#4148]) [131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-iclb6/igt@kms_psr2_su@page_flip-nv12.html [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-iclb2/igt@kms_psr2_su@page_flip-nv12.html * igt@runner@aborted: - shard-kbl: ([FAIL][133], [FAIL][134], [FAIL][135], [FAIL][136], [FAIL][137], [FAIL][138]) ([i915#1436] / [i915#180] / [i915#1814] / [i915#3002] / [i915#4312] / [i915#92]) -> ([FAIL][139], [FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144]) ([i915#180] / [i915#1814] / [i915#3002] / [i915#4312] / [i915#602] / [i915#92]) [133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-kbl1/igt@runner@aborted.html [134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-kbl1/igt@runner@aborted.html [135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-kbl1/igt@runner@aborted.html [136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-kbl1/igt@runner@aborted.html [137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-kbl1/igt@runner@aborted.html [138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11114/shard-kbl7/igt@runner@aborted.html [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl1/igt@runner@aborted.html [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl1/igt@runner@aborted.html [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl1/igt@runner@aborted.html [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl1/igt@runner@aborted.html [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl1/igt@runner@aborted.html [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/shard-kbl6/igt@runner@aborted.html - shard-apl: ([FAIL][145], [FAIL][146], [FAIL][147], [FAIL][148], [FAIL][149], [FAIL][150]) ([i915#180] / [i915#1814] / [i915#3002] / [i91 == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22044/index.html [-- Attachment #2: Type: text/html, Size: 34002 bytes --] ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2022-01-24 13:08 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2022-01-20 18:36 [Intel-gfx] [PATCH 0/2] A few CT updates Matthew Brost 2022-01-20 18:36 ` Matthew Brost 2022-01-20 18:36 ` [Intel-gfx] [PATCH 1/2] drm/i915/guc: Don't check CT descriptor status before CT write / read Matthew Brost 2022-01-20 18:36 ` Matthew Brost 2022-01-21 7:28 ` [Intel-gfx] " Jani Nikula 2022-01-21 7:28 ` Jani Nikula 2022-01-21 21:03 ` [Intel-gfx] " Matthew Brost 2022-01-21 21:03 ` Matthew Brost 2022-01-24 13:07 ` [Intel-gfx] " Jani Nikula 2022-01-24 13:07 ` Jani Nikula 2022-01-20 18:36 ` [Intel-gfx] [PATCH 2/2] drm/i915/guc: Print CT descriptor status in CT debug function Matthew Brost 2022-01-20 18:36 ` Matthew Brost 2022-01-20 21:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success for A few CT updates Patchwork 2022-01-21 0:02 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
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