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From: "Alex Bennée" <alex.bennee@linaro.org>
To: qemu-arm@nongnu.org
Cc: qemu-devel@nongnu.org, laurent.desnogues@gmail.com,
	peter.maydell@linaro.org
Subject: Re: [PATCH v6 09/20] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state
Date: Mon, 14 Oct 2019 17:39:53 +0100	[thread overview]
Message-ID: <87k197mgbq.fsf@linaro.org> (raw)
In-Reply-To: <20191011155546.14342-10-richard.henderson@linaro.org>


Richard Henderson <richard.henderson@linaro.org> writes:

> We do not need to compute any of these values for M-profile.
> Further, XSCALE_CPAR overlaps VECSTRIDE so obviously the two
> sets must be mutually exclusive.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

> ---
>  target/arm/helper.c | 21 ++++++++++++++-------
>  1 file changed, 14 insertions(+), 7 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index ddd21edfcf..e2a62cf19a 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -11235,21 +11235,28 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
>              }
>          } else {
>              flags = rebuild_hflags_a32(env, fp_el, mmu_idx);
> +
> +            /*
> +             * Note that XSCALE_CPAR shares bits with VECSTRIDE.
> +             * Note that VECLEN+VECSTRIDE are RES0 for M-profile.
> +             */
> +            if (arm_feature(env, ARM_FEATURE_XSCALE)) {
> +                flags = FIELD_DP32(flags, TBFLAG_A32,
> +                                   XSCALE_CPAR, env->cp15.c15_cpar);
> +            } else {
> +                flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN,
> +                                   env->vfp.vec_len);
> +                flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE,
> +                                   env->vfp.vec_stride);
> +            }
>          }
>
>          flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb);
> -        flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len);
> -        flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride);
>          flags = FIELD_DP32(flags, TBFLAG_A32, CONDEXEC, env->condexec_bits);
>          if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30)
>              || arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) {
>              flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1);
>          }
> -        /* Note that XSCALE_CPAR shares bits with VECSTRIDE */
> -        if (arm_feature(env, ARM_FEATURE_XSCALE)) {
> -            flags = FIELD_DP32(flags, TBFLAG_A32,
> -                               XSCALE_CPAR, env->cp15.c15_cpar);
> -        }
>      }
>
>      /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine


--
Alex Bennée

WARNING: multiple messages have this Message-ID (diff)
From: "Alex Bennée" <alex.bennee@linaro.org>
To: qemu-arm@nongnu.org
Cc: laurent.desnogues@gmail.com, peter.maydell@linaro.org,
	qemu-devel@nongnu.org
Subject: Re: [PATCH v6 09/20] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state
Date: Mon, 14 Oct 2019 17:39:53 +0100	[thread overview]
Message-ID: <87k197mgbq.fsf@linaro.org> (raw)
In-Reply-To: <20191011155546.14342-10-richard.henderson@linaro.org>


Richard Henderson <richard.henderson@linaro.org> writes:

> We do not need to compute any of these values for M-profile.
> Further, XSCALE_CPAR overlaps VECSTRIDE so obviously the two
> sets must be mutually exclusive.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

> ---
>  target/arm/helper.c | 21 ++++++++++++++-------
>  1 file changed, 14 insertions(+), 7 deletions(-)
>
> diff --git a/target/arm/helper.c b/target/arm/helper.c
> index ddd21edfcf..e2a62cf19a 100644
> --- a/target/arm/helper.c
> +++ b/target/arm/helper.c
> @@ -11235,21 +11235,28 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc,
>              }
>          } else {
>              flags = rebuild_hflags_a32(env, fp_el, mmu_idx);
> +
> +            /*
> +             * Note that XSCALE_CPAR shares bits with VECSTRIDE.
> +             * Note that VECLEN+VECSTRIDE are RES0 for M-profile.
> +             */
> +            if (arm_feature(env, ARM_FEATURE_XSCALE)) {
> +                flags = FIELD_DP32(flags, TBFLAG_A32,
> +                                   XSCALE_CPAR, env->cp15.c15_cpar);
> +            } else {
> +                flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN,
> +                                   env->vfp.vec_len);
> +                flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE,
> +                                   env->vfp.vec_stride);
> +            }
>          }
>
>          flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb);
> -        flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len);
> -        flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride);
>          flags = FIELD_DP32(flags, TBFLAG_A32, CONDEXEC, env->condexec_bits);
>          if (env->vfp.xregs[ARM_VFP_FPEXC] & (1 << 30)
>              || arm_el_is_aa64(env, 1) || arm_feature(env, ARM_FEATURE_M)) {
>              flags = FIELD_DP32(flags, TBFLAG_A32, VFPEN, 1);
>          }
> -        /* Note that XSCALE_CPAR shares bits with VECSTRIDE */
> -        if (arm_feature(env, ARM_FEATURE_XSCALE)) {
> -            flags = FIELD_DP32(flags, TBFLAG_A32,
> -                               XSCALE_CPAR, env->cp15.c15_cpar);
> -        }
>      }
>
>      /* The SS_ACTIVE and PSTATE_SS bits correspond to the state machine


--
Alex Bennée


  reply	other threads:[~2019-10-14 16:39 UTC|newest]

Thread overview: 56+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-10-11 15:55 [PATCH v6 00/20] target/arm: Reduce overhead of cpu_get_tb_cpu_state Richard Henderson
2019-10-11 15:55 ` [PATCH v6 01/20] target/arm: Split out rebuild_hflags_common Richard Henderson
2019-10-11 15:55 ` [PATCH v6 02/20] target/arm: Split out rebuild_hflags_a64 Richard Henderson
2019-10-14 15:43   ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 03/20] target/arm: Split out rebuild_hflags_common_32 Richard Henderson
2019-10-14 15:53   ` Alex Bennée
2019-10-14 15:53     ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 04/20] target/arm: Split arm_cpu_data_is_big_endian Richard Henderson
2019-10-14 16:01   ` Alex Bennée
2019-10-14 16:01     ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 05/20] target/arm: Split out rebuild_hflags_m32 Richard Henderson
2019-10-14 16:13   ` Alex Bennée
2019-10-14 16:13     ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 06/20] target/arm: Reduce tests vs M-profile in cpu_get_tb_cpu_state Richard Henderson
2019-10-14 16:17   ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 07/20] target/arm: Split out rebuild_hflags_a32 Richard Henderson
2019-10-14 16:17   ` Alex Bennée
2019-10-14 16:17     ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 08/20] target/arm: Split out rebuild_hflags_aprofile Richard Henderson
2019-10-14 16:19   ` Alex Bennée
2019-10-14 16:19     ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 09/20] target/arm: Hoist XSCALE_CPAR, VECLEN, VECSTRIDE in cpu_get_tb_cpu_state Richard Henderson
2019-10-14 16:39   ` Alex Bennée [this message]
2019-10-14 16:39     ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 10/20] target/arm: Simplify set of PSTATE_SS " Richard Henderson
2019-10-14 18:21   ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 11/20] target/arm: Hoist computation of TBFLAG_A32.VFPEN Richard Henderson
2019-10-14 18:46   ` Alex Bennée
2019-10-14 18:46     ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 12/20] target/arm: Add arm_rebuild_hflags Richard Henderson
2019-10-14 18:47   ` Alex Bennée
2019-10-14 18:47     ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 13/20] target/arm: Split out arm_mmu_idx_el Richard Henderson
2019-10-14 18:49   ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 14/20] target/arm: Hoist store to cs_base in cpu_get_tb_cpu_state Richard Henderson
2019-10-14 18:51   ` Alex Bennée
2019-10-14 18:51     ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 15/20] target/arm: Add HELPER(rebuild_hflags_{a32, a64, m32}) Richard Henderson
2019-10-14 18:59   ` Alex Bennée
2019-10-14 18:59     ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 16/20] target/arm: Rebuild hflags at EL changes Richard Henderson
2019-10-14 19:01   ` Alex Bennée
2019-10-14 19:01     ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 17/20] target/arm: Rebuild hflags at MSR writes Richard Henderson
2019-10-14 19:03   ` Alex Bennée
2019-10-14 19:03     ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 18/20] target/arm: Rebuild hflags at CPSR writes Richard Henderson
2019-10-14 19:08   ` Alex Bennée
2019-10-14 19:08     ` Alex Bennée
2019-10-14 19:15     ` Richard Henderson
2019-10-11 15:55 ` [PATCH v6 19/20] target/arm: Rebuild hflags for M-profile Richard Henderson
2019-10-14 19:08   ` Alex Bennée
2019-10-11 15:55 ` [PATCH v6 20/20] target/arm: Rely on hflags correct in cpu_get_tb_cpu_state Richard Henderson
2019-10-17 15:26 ` [PATCH v6 00/20] target/arm: Reduce overhead of cpu_get_tb_cpu_state Peter Maydell
2019-10-17 16:25   ` Richard Henderson
2019-10-17 17:01     ` Peter Maydell

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