* Full-ppgtt for Haswell and co, almost there!
@ 2018-06-05 7:19 Chris Wilson
2018-06-05 7:19 ` [PATCH 01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member Chris Wilson
` (13 more replies)
0 siblings, 14 replies; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 7:19 UTC (permalink / raw)
To: intel-gfx
To fix the resource starvation issue, we need to make the page
directories evictable so that we can reclaim the Global GTT on demand.
To fully fix it, I need to make the page directory allocation lazy (atm
we are running out of memory even in the most basic of IGT stress tests)
and ideally swappable (but that's less likely to happen today).
So to get the ball rolling, I wanted to show the series that gets us to
the point of having evictable page directories, since it required quite
a few tweaks along the way.
Fwiw, switching between mm does appear to be working. It seems we have
ironed out most of our earlier kinks.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* [PATCH 01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
@ 2018-06-05 7:19 ` Chris Wilson
2018-06-05 14:38 ` Mika Kuoppala
2018-06-05 7:19 ` [PATCH 02/11] drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the object list Chris Wilson
` (12 subsequent siblings)
13 siblings, 1 reply; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 7:19 UTC (permalink / raw)
To: intel-gfx
In the near future, I want to subclass gen6_hw_ppgtt as it contains a
few specialised members and I wish to add more. To avoid the ugliness of
using ppgtt->base.base, rename the i915_hw_ppgtt base member
(i915_address_space) as vm, which is our common shorthand for an
i915_address_space local.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
drivers/gpu/drm/i915/gvt/aperture_gm.c | 2 +-
drivers/gpu/drm/i915/gvt/gvt.h | 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
drivers/gpu/drm/i915/i915_drv.h | 2 +-
drivers/gpu/drm/i915/i915_gem.c | 30 +-
drivers/gpu/drm/i915/i915_gem_context.c | 10 +-
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 16 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 329 +++++++++---------
drivers/gpu/drm/i915/i915_gem_gtt.h | 8 +-
drivers/gpu/drm/i915/i915_gem_render_state.c | 2 +-
drivers/gpu/drm/i915/i915_gem_shrinker.c | 2 +-
drivers/gpu/drm/i915/i915_gem_stolen.c | 6 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 9 +-
drivers/gpu/drm/i915/i915_trace.h | 4 +-
drivers/gpu/drm/i915/i915_vgpu.c | 8 +-
drivers/gpu/drm/i915/i915_vma.c | 2 +-
drivers/gpu/drm/i915/intel_engine_cs.c | 4 +-
drivers/gpu/drm/i915/intel_guc.c | 2 +-
drivers/gpu/drm/i915/intel_guc_submission.c | 2 +-
drivers/gpu/drm/i915/intel_lrc.c | 10 +-
drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +-
drivers/gpu/drm/i915/selftests/huge_pages.c | 50 +--
.../gpu/drm/i915/selftests/i915_gem_context.c | 6 +-
.../gpu/drm/i915/selftests/i915_gem_evict.c | 34 +-
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 110 +++---
.../gpu/drm/i915/selftests/i915_gem_object.c | 6 +-
drivers/gpu/drm/i915/selftests/i915_request.c | 5 +-
drivers/gpu/drm/i915/selftests/i915_vma.c | 31 +-
.../gpu/drm/i915/selftests/intel_hangcheck.c | 4 +-
drivers/gpu/drm/i915/selftests/intel_lrc.c | 2 +-
.../drm/i915/selftests/intel_workarounds.c | 2 +-
drivers/gpu/drm/i915/selftests/mock_gtt.c | 66 ++--
32 files changed, 388 insertions(+), 388 deletions(-)
diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c b/drivers/gpu/drm/i915/gvt/aperture_gm.c
index 7c9ec4f4f36c..380eeb2a0e83 100644
--- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
+++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
@@ -61,7 +61,7 @@ static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
}
mutex_lock(&dev_priv->drm.struct_mutex);
- ret = i915_gem_gtt_insert(&dev_priv->ggtt.base, node,
+ ret = i915_gem_gtt_insert(&dev_priv->ggtt.vm, node,
size, I915_GTT_PAGE_SIZE,
I915_COLOR_UNEVICTABLE,
start, end, flags);
diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
index 05d15a095310..2ff0d40281a9 100644
--- a/drivers/gpu/drm/i915/gvt/gvt.h
+++ b/drivers/gpu/drm/i915/gvt/gvt.h
@@ -361,9 +361,9 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt);
#define gvt_aperture_sz(gvt) (gvt->dev_priv->ggtt.mappable_end)
#define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.gmadr.start)
-#define gvt_ggtt_gm_sz(gvt) (gvt->dev_priv->ggtt.base.total)
+#define gvt_ggtt_gm_sz(gvt) (gvt->dev_priv->ggtt.vm.total)
#define gvt_ggtt_sz(gvt) \
- ((gvt->dev_priv->ggtt.base.total >> PAGE_SHIFT) << 3)
+ ((gvt->dev_priv->ggtt.vm.total >> PAGE_SHIFT) << 3)
#define gvt_hidden_sz(gvt) (gvt_ggtt_gm_sz(gvt) - gvt_aperture_sz(gvt))
#define gvt_aperture_gmadr_base(gvt) (0)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 15e86d34a81c..698af45e229c 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -328,7 +328,7 @@ static int per_file_stats(int id, void *ptr, void *data)
} else {
struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vma->vm);
- if (ppgtt->base.file != stats->file_priv)
+ if (ppgtt->vm.file != stats->file_priv)
continue;
}
@@ -508,7 +508,7 @@ static int i915_gem_object_info(struct seq_file *m, void *data)
dpy_count, dpy_size);
seq_printf(m, "%llu [%pa] gtt total\n",
- ggtt->base.total, &ggtt->mappable_end);
+ ggtt->vm.total, &ggtt->mappable_end);
seq_printf(m, "Supported page sizes: %s\n",
stringify_page_sizes(INTEL_INFO(dev_priv)->page_sizes,
buf, sizeof(buf)));
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 06ecac4c3253..a4bb30c32a52 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3213,7 +3213,7 @@ struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
static inline struct i915_hw_ppgtt *
i915_vm_to_ppgtt(struct i915_address_space *vm)
{
- return container_of(vm, struct i915_hw_ppgtt, base);
+ return container_of(vm, struct i915_hw_ppgtt, vm);
}
/* i915_gem_fence_reg.c */
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index cb680ddafa0c..6ce29d1c20be 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -65,7 +65,7 @@ insert_mappable_node(struct i915_ggtt *ggtt,
struct drm_mm_node *node, u32 size)
{
memset(node, 0, sizeof(*node));
- return drm_mm_insert_node_in_range(&ggtt->base.mm, node,
+ return drm_mm_insert_node_in_range(&ggtt->vm.mm, node,
size, 0, I915_COLOR_UNEVICTABLE,
0, ggtt->mappable_end,
DRM_MM_INSERT_LOW);
@@ -249,17 +249,17 @@ i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
struct i915_vma *vma;
u64 pinned;
- pinned = ggtt->base.reserved;
+ pinned = ggtt->vm.reserved;
mutex_lock(&dev->struct_mutex);
- list_for_each_entry(vma, &ggtt->base.active_list, vm_link)
+ list_for_each_entry(vma, &ggtt->vm.active_list, vm_link)
if (i915_vma_is_pinned(vma))
pinned += vma->node.size;
- list_for_each_entry(vma, &ggtt->base.inactive_list, vm_link)
+ list_for_each_entry(vma, &ggtt->vm.inactive_list, vm_link)
if (i915_vma_is_pinned(vma))
pinned += vma->node.size;
mutex_unlock(&dev->struct_mutex);
- args->aper_size = ggtt->base.total;
+ args->aper_size = ggtt->vm.total;
args->aper_available_size = args->aper_size - pinned;
return 0;
@@ -1223,9 +1223,9 @@ i915_gem_gtt_pread(struct drm_i915_gem_object *obj,
page_length = remain < page_length ? remain : page_length;
if (node.allocated) {
wmb();
- ggtt->base.insert_page(&ggtt->base,
- i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
- node.start, I915_CACHE_NONE, 0);
+ ggtt->vm.insert_page(&ggtt->vm,
+ i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
+ node.start, I915_CACHE_NONE, 0);
wmb();
} else {
page_base += offset & PAGE_MASK;
@@ -1246,8 +1246,7 @@ i915_gem_gtt_pread(struct drm_i915_gem_object *obj,
out_unpin:
if (node.allocated) {
wmb();
- ggtt->base.clear_range(&ggtt->base,
- node.start, node.size);
+ ggtt->vm.clear_range(&ggtt->vm, node.start, node.size);
remove_mappable_node(&node);
} else {
i915_vma_unpin(vma);
@@ -1426,9 +1425,9 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
page_length = remain < page_length ? remain : page_length;
if (node.allocated) {
wmb(); /* flush the write before we modify the GGTT */
- ggtt->base.insert_page(&ggtt->base,
- i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
- node.start, I915_CACHE_NONE, 0);
+ ggtt->vm.insert_page(&ggtt->vm,
+ i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
+ node.start, I915_CACHE_NONE, 0);
wmb(); /* flush modifications to the GGTT (insert_page) */
} else {
page_base += offset & PAGE_MASK;
@@ -1455,8 +1454,7 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
out_unpin:
if (node.allocated) {
wmb();
- ggtt->base.clear_range(&ggtt->base,
- node.start, node.size);
+ ggtt->vm.clear_range(&ggtt->vm, node.start, node.size);
remove_mappable_node(&node);
} else {
i915_vma_unpin(vma);
@@ -4374,7 +4372,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
u64 flags)
{
struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
- struct i915_address_space *vm = &dev_priv->ggtt.base;
+ struct i915_address_space *vm = &dev_priv->ggtt.vm;
struct i915_vma *vma;
int ret;
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index 38c6e9e4e91b..b2c7ac1b074d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -197,7 +197,7 @@ static void context_close(struct i915_gem_context *ctx)
*/
lut_close(ctx);
if (ctx->ppgtt)
- i915_ppgtt_close(&ctx->ppgtt->base);
+ i915_ppgtt_close(&ctx->ppgtt->vm);
ctx->file_priv = ERR_PTR(-EBADF);
i915_gem_context_put(ctx);
@@ -249,7 +249,7 @@ static u32 default_desc_template(const struct drm_i915_private *i915,
desc = GEN8_CTX_VALID | GEN8_CTX_PRIVILEGE;
address_mode = INTEL_LEGACY_32B_CONTEXT;
- if (ppgtt && i915_vm_is_48bit(&ppgtt->base))
+ if (ppgtt && i915_vm_is_48bit(&ppgtt->vm))
address_mode = INTEL_LEGACY_64B_CONTEXT;
desc |= address_mode << GEN8_CTX_ADDRESSING_MODE_SHIFT;
@@ -810,11 +810,11 @@ int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
break;
case I915_CONTEXT_PARAM_GTT_SIZE:
if (ctx->ppgtt)
- args->value = ctx->ppgtt->base.total;
+ args->value = ctx->ppgtt->vm.total;
else if (to_i915(dev)->mm.aliasing_ppgtt)
- args->value = to_i915(dev)->mm.aliasing_ppgtt->base.total;
+ args->value = to_i915(dev)->mm.aliasing_ppgtt->vm.total;
else
- args->value = to_i915(dev)->ggtt.base.total;
+ args->value = to_i915(dev)->ggtt.vm.total;
break;
case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
args->value = i915_gem_context_no_error_capture(ctx);
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index f627a8c47c58..eefd449502e2 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -703,7 +703,7 @@ static int eb_select_context(struct i915_execbuffer *eb)
return -ENOENT;
eb->ctx = ctx;
- eb->vm = ctx->ppgtt ? &ctx->ppgtt->base : &eb->i915->ggtt.base;
+ eb->vm = ctx->ppgtt ? &ctx->ppgtt->vm : &eb->i915->ggtt.vm;
eb->context_flags = 0;
if (ctx->flags & CONTEXT_NO_ZEROMAP)
@@ -943,9 +943,9 @@ static void reloc_cache_reset(struct reloc_cache *cache)
if (cache->node.allocated) {
struct i915_ggtt *ggtt = cache_to_ggtt(cache);
- ggtt->base.clear_range(&ggtt->base,
- cache->node.start,
- cache->node.size);
+ ggtt->vm.clear_range(&ggtt->vm,
+ cache->node.start,
+ cache->node.size);
drm_mm_remove_node(&cache->node);
} else {
i915_vma_unpin((struct i915_vma *)cache->node.mm);
@@ -1016,7 +1016,7 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj,
if (IS_ERR(vma)) {
memset(&cache->node, 0, sizeof(cache->node));
err = drm_mm_insert_node_in_range
- (&ggtt->base.mm, &cache->node,
+ (&ggtt->vm.mm, &cache->node,
PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
0, ggtt->mappable_end,
DRM_MM_INSERT_LOW);
@@ -1037,9 +1037,9 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj,
offset = cache->node.start;
if (cache->node.allocated) {
wmb();
- ggtt->base.insert_page(&ggtt->base,
- i915_gem_object_get_dma_address(obj, page),
- offset, I915_CACHE_NONE, 0);
+ ggtt->vm.insert_page(&ggtt->vm,
+ i915_gem_object_get_dma_address(obj, page),
+ offset, I915_CACHE_NONE, 0);
} else {
offset += page << PAGE_SHIFT;
}
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index de9180516308..12b1386e47e9 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -780,7 +780,7 @@ static void gen8_initialize_pml4(struct i915_address_space *vm,
*/
static void mark_tlbs_dirty(struct i915_hw_ppgtt *ppgtt)
{
- ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->base.i915)->ring_mask;
+ ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->vm.i915)->ring_mask;
}
/* Removes entries from a single page table, releasing it if it's empty.
@@ -973,7 +973,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
gen8_pte_t *vaddr;
bool ret;
- GEM_BUG_ON(idx->pdpe >= i915_pdpes_per_pdp(&ppgtt->base));
+ GEM_BUG_ON(idx->pdpe >= i915_pdpes_per_pdp(&ppgtt->vm));
pd = pdp->page_directory[idx->pdpe];
vaddr = kmap_atomic_px(pd->page_table[idx->pde]);
do {
@@ -1004,7 +1004,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
break;
}
- GEM_BUG_ON(idx->pdpe >= i915_pdpes_per_pdp(&ppgtt->base));
+ GEM_BUG_ON(idx->pdpe >= i915_pdpes_per_pdp(&ppgtt->vm));
pd = pdp->page_directory[idx->pdpe];
}
@@ -1233,7 +1233,7 @@ static int gen8_init_scratch(struct i915_address_space *vm)
static int gen8_ppgtt_notify_vgt(struct i915_hw_ppgtt *ppgtt, bool create)
{
- struct i915_address_space *vm = &ppgtt->base;
+ struct i915_address_space *vm = &ppgtt->vm;
struct drm_i915_private *dev_priv = vm->i915;
enum vgt_g2v_type msg;
int i;
@@ -1294,13 +1294,13 @@ static void gen8_ppgtt_cleanup_4lvl(struct i915_hw_ppgtt *ppgtt)
int i;
for (i = 0; i < GEN8_PML4ES_PER_PML4; i++) {
- if (ppgtt->pml4.pdps[i] == ppgtt->base.scratch_pdp)
+ if (ppgtt->pml4.pdps[i] == ppgtt->vm.scratch_pdp)
continue;
- gen8_ppgtt_cleanup_3lvl(&ppgtt->base, ppgtt->pml4.pdps[i]);
+ gen8_ppgtt_cleanup_3lvl(&ppgtt->vm, ppgtt->pml4.pdps[i]);
}
- cleanup_px(&ppgtt->base, &ppgtt->pml4);
+ cleanup_px(&ppgtt->vm, &ppgtt->pml4);
}
static void gen8_ppgtt_cleanup(struct i915_address_space *vm)
@@ -1314,7 +1314,7 @@ static void gen8_ppgtt_cleanup(struct i915_address_space *vm)
if (use_4lvl(vm))
gen8_ppgtt_cleanup_4lvl(ppgtt);
else
- gen8_ppgtt_cleanup_3lvl(&ppgtt->base, &ppgtt->pdp);
+ gen8_ppgtt_cleanup_3lvl(&ppgtt->vm, &ppgtt->pdp);
gen8_free_scratch(vm);
}
@@ -1450,7 +1450,7 @@ static void gen8_dump_pdp(struct i915_hw_ppgtt *ppgtt,
gen8_pte_t scratch_pte,
struct seq_file *m)
{
- struct i915_address_space *vm = &ppgtt->base;
+ struct i915_address_space *vm = &ppgtt->vm;
struct i915_page_directory *pd;
u32 pdpe;
@@ -1460,7 +1460,7 @@ static void gen8_dump_pdp(struct i915_hw_ppgtt *ppgtt,
u64 pd_start = start;
u32 pde;
- if (pdp->page_directory[pdpe] == ppgtt->base.scratch_pd)
+ if (pdp->page_directory[pdpe] == ppgtt->vm.scratch_pd)
continue;
seq_printf(m, "\tPDPE #%d\n", pdpe);
@@ -1468,7 +1468,7 @@ static void gen8_dump_pdp(struct i915_hw_ppgtt *ppgtt,
u32 pte;
gen8_pte_t *pt_vaddr;
- if (pd->page_table[pde] == ppgtt->base.scratch_pt)
+ if (pd->page_table[pde] == ppgtt->vm.scratch_pt)
continue;
pt_vaddr = kmap_atomic_px(pt);
@@ -1501,10 +1501,10 @@ static void gen8_dump_pdp(struct i915_hw_ppgtt *ppgtt,
static void gen8_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
{
- struct i915_address_space *vm = &ppgtt->base;
+ struct i915_address_space *vm = &ppgtt->vm;
const gen8_pte_t scratch_pte =
gen8_pte_encode(vm->scratch_page.daddr, I915_CACHE_LLC);
- u64 start = 0, length = ppgtt->base.total;
+ u64 start = 0, length = ppgtt->vm.total;
if (use_4lvl(vm)) {
u64 pml4e;
@@ -1512,7 +1512,7 @@ static void gen8_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
struct i915_page_directory_pointer *pdp;
gen8_for_each_pml4e(pdp, pml4, start, length, pml4e) {
- if (pml4->pdps[pml4e] == ppgtt->base.scratch_pdp)
+ if (pml4->pdps[pml4e] == ppgtt->vm.scratch_pdp)
continue;
seq_printf(m, " PML4E #%llu\n", pml4e);
@@ -1525,10 +1525,10 @@ static void gen8_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
static int gen8_preallocate_top_level_pdp(struct i915_hw_ppgtt *ppgtt)
{
- struct i915_address_space *vm = &ppgtt->base;
+ struct i915_address_space *vm = &ppgtt->vm;
struct i915_page_directory_pointer *pdp = &ppgtt->pdp;
struct i915_page_directory *pd;
- u64 start = 0, length = ppgtt->base.total;
+ u64 start = 0, length = ppgtt->vm.total;
u64 from = start;
unsigned int pdpe;
@@ -1564,11 +1564,11 @@ static int gen8_preallocate_top_level_pdp(struct i915_hw_ppgtt *ppgtt)
*/
static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
{
- struct i915_address_space *vm = &ppgtt->base;
+ struct i915_address_space *vm = &ppgtt->vm;
struct drm_i915_private *dev_priv = vm->i915;
int ret;
- ppgtt->base.total = USES_FULL_48BIT_PPGTT(dev_priv) ?
+ ppgtt->vm.total = USES_FULL_48BIT_PPGTT(dev_priv) ?
1ULL << 48 :
1ULL << 32;
@@ -1576,26 +1576,26 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
* And we are not sure about the latter so play safe for now.
*/
if (IS_CHERRYVIEW(dev_priv) || IS_BROXTON(dev_priv))
- ppgtt->base.pt_kmap_wc = true;
+ ppgtt->vm.pt_kmap_wc = true;
- ret = gen8_init_scratch(&ppgtt->base);
+ ret = gen8_init_scratch(&ppgtt->vm);
if (ret) {
- ppgtt->base.total = 0;
+ ppgtt->vm.total = 0;
return ret;
}
if (use_4lvl(vm)) {
- ret = setup_px(&ppgtt->base, &ppgtt->pml4);
+ ret = setup_px(&ppgtt->vm, &ppgtt->pml4);
if (ret)
goto free_scratch;
- gen8_initialize_pml4(&ppgtt->base, &ppgtt->pml4);
+ gen8_initialize_pml4(&ppgtt->vm, &ppgtt->pml4);
- ppgtt->base.allocate_va_range = gen8_ppgtt_alloc_4lvl;
- ppgtt->base.insert_entries = gen8_ppgtt_insert_4lvl;
- ppgtt->base.clear_range = gen8_ppgtt_clear_4lvl;
+ ppgtt->vm.allocate_va_range = gen8_ppgtt_alloc_4lvl;
+ ppgtt->vm.insert_entries = gen8_ppgtt_insert_4lvl;
+ ppgtt->vm.clear_range = gen8_ppgtt_clear_4lvl;
} else {
- ret = __pdp_init(&ppgtt->base, &ppgtt->pdp);
+ ret = __pdp_init(&ppgtt->vm, &ppgtt->pdp);
if (ret)
goto free_scratch;
@@ -1607,35 +1607,35 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
}
}
- ppgtt->base.allocate_va_range = gen8_ppgtt_alloc_3lvl;
- ppgtt->base.insert_entries = gen8_ppgtt_insert_3lvl;
- ppgtt->base.clear_range = gen8_ppgtt_clear_3lvl;
+ ppgtt->vm.allocate_va_range = gen8_ppgtt_alloc_3lvl;
+ ppgtt->vm.insert_entries = gen8_ppgtt_insert_3lvl;
+ ppgtt->vm.clear_range = gen8_ppgtt_clear_3lvl;
}
if (intel_vgpu_active(dev_priv))
gen8_ppgtt_notify_vgt(ppgtt, true);
- ppgtt->base.cleanup = gen8_ppgtt_cleanup;
- ppgtt->base.bind_vma = gen8_ppgtt_bind_vma;
- ppgtt->base.unbind_vma = ppgtt_unbind_vma;
- ppgtt->base.set_pages = ppgtt_set_pages;
- ppgtt->base.clear_pages = clear_pages;
+ ppgtt->vm.cleanup = gen8_ppgtt_cleanup;
+ ppgtt->vm.bind_vma = gen8_ppgtt_bind_vma;
+ ppgtt->vm.unbind_vma = ppgtt_unbind_vma;
+ ppgtt->vm.set_pages = ppgtt_set_pages;
+ ppgtt->vm.clear_pages = clear_pages;
ppgtt->debug_dump = gen8_dump_ppgtt;
return 0;
free_scratch:
- gen8_free_scratch(&ppgtt->base);
+ gen8_free_scratch(&ppgtt->vm);
return ret;
}
static void gen6_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
{
- struct i915_address_space *vm = &ppgtt->base;
+ struct i915_address_space *vm = &ppgtt->vm;
struct i915_page_table *unused;
gen6_pte_t scratch_pte;
u32 pd_entry, pte, pde;
- u32 start = 0, length = ppgtt->base.total;
+ u32 start = 0, length = ppgtt->vm.total;
scratch_pte = vm->pte_encode(vm->scratch_page.daddr,
I915_CACHE_LLC, 0);
@@ -1972,8 +1972,8 @@ static void gen6_ppgtt_cleanup(struct i915_address_space *vm)
static int gen6_ppgtt_allocate_page_directories(struct i915_hw_ppgtt *ppgtt)
{
- struct i915_address_space *vm = &ppgtt->base;
- struct drm_i915_private *dev_priv = ppgtt->base.i915;
+ struct i915_address_space *vm = &ppgtt->vm;
+ struct drm_i915_private *dev_priv = ppgtt->vm.i915;
struct i915_ggtt *ggtt = &dev_priv->ggtt;
int ret;
@@ -1981,16 +1981,16 @@ static int gen6_ppgtt_allocate_page_directories(struct i915_hw_ppgtt *ppgtt)
* allocator works in address space sizes, so it's multiplied by page
* size. We allocate at the top of the GTT to avoid fragmentation.
*/
- BUG_ON(!drm_mm_initialized(&ggtt->base.mm));
+ BUG_ON(!drm_mm_initialized(&ggtt->vm.mm));
ret = gen6_init_scratch(vm);
if (ret)
return ret;
- ret = i915_gem_gtt_insert(&ggtt->base, &ppgtt->node,
+ ret = i915_gem_gtt_insert(&ggtt->vm, &ppgtt->node,
GEN6_PD_SIZE, GEN6_PD_ALIGN,
I915_COLOR_UNEVICTABLE,
- 0, ggtt->base.total,
+ 0, ggtt->vm.total,
PIN_HIGH);
if (ret)
goto err_out;
@@ -2023,16 +2023,16 @@ static void gen6_scratch_va_range(struct i915_hw_ppgtt *ppgtt,
u32 pde;
gen6_for_each_pde(unused, &ppgtt->pd, start, length, pde)
- ppgtt->pd.page_table[pde] = ppgtt->base.scratch_pt;
+ ppgtt->pd.page_table[pde] = ppgtt->vm.scratch_pt;
}
static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
{
- struct drm_i915_private *dev_priv = ppgtt->base.i915;
+ struct drm_i915_private *dev_priv = ppgtt->vm.i915;
struct i915_ggtt *ggtt = &dev_priv->ggtt;
int ret;
- ppgtt->base.pte_encode = ggtt->base.pte_encode;
+ ppgtt->vm.pte_encode = ggtt->vm.pte_encode;
if (intel_vgpu_active(dev_priv) || IS_GEN6(dev_priv))
ppgtt->switch_mm = gen6_mm_switch;
else if (IS_HASWELL(dev_priv))
@@ -2046,24 +2046,24 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
if (ret)
return ret;
- ppgtt->base.total = I915_PDES * GEN6_PTES * PAGE_SIZE;
+ ppgtt->vm.total = I915_PDES * GEN6_PTES * PAGE_SIZE;
- gen6_scratch_va_range(ppgtt, 0, ppgtt->base.total);
- gen6_write_page_range(ppgtt, 0, ppgtt->base.total);
+ gen6_scratch_va_range(ppgtt, 0, ppgtt->vm.total);
+ gen6_write_page_range(ppgtt, 0, ppgtt->vm.total);
- ret = gen6_alloc_va_range(&ppgtt->base, 0, ppgtt->base.total);
+ ret = gen6_alloc_va_range(&ppgtt->vm, 0, ppgtt->vm.total);
if (ret) {
- gen6_ppgtt_cleanup(&ppgtt->base);
+ gen6_ppgtt_cleanup(&ppgtt->vm);
return ret;
}
- ppgtt->base.clear_range = gen6_ppgtt_clear_range;
- ppgtt->base.insert_entries = gen6_ppgtt_insert_entries;
- ppgtt->base.bind_vma = gen6_ppgtt_bind_vma;
- ppgtt->base.unbind_vma = ppgtt_unbind_vma;
- ppgtt->base.set_pages = ppgtt_set_pages;
- ppgtt->base.clear_pages = clear_pages;
- ppgtt->base.cleanup = gen6_ppgtt_cleanup;
+ ppgtt->vm.clear_range = gen6_ppgtt_clear_range;
+ ppgtt->vm.insert_entries = gen6_ppgtt_insert_entries;
+ ppgtt->vm.bind_vma = gen6_ppgtt_bind_vma;
+ ppgtt->vm.unbind_vma = ppgtt_unbind_vma;
+ ppgtt->vm.set_pages = ppgtt_set_pages;
+ ppgtt->vm.clear_pages = clear_pages;
+ ppgtt->vm.cleanup = gen6_ppgtt_cleanup;
ppgtt->debug_dump = gen6_dump_ppgtt;
DRM_DEBUG_DRIVER("Allocated pde space (%lldM) at GTT entry: %llx\n",
@@ -2079,8 +2079,8 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
static int __hw_ppgtt_init(struct i915_hw_ppgtt *ppgtt,
struct drm_i915_private *dev_priv)
{
- ppgtt->base.i915 = dev_priv;
- ppgtt->base.dma = &dev_priv->drm.pdev->dev;
+ ppgtt->vm.i915 = dev_priv;
+ ppgtt->vm.dma = &dev_priv->drm.pdev->dev;
if (INTEL_GEN(dev_priv) < 8)
return gen6_ppgtt_init(ppgtt);
@@ -2190,10 +2190,10 @@ i915_ppgtt_create(struct drm_i915_private *dev_priv,
}
kref_init(&ppgtt->ref);
- i915_address_space_init(&ppgtt->base, dev_priv, name);
- ppgtt->base.file = fpriv;
+ i915_address_space_init(&ppgtt->vm, dev_priv, name);
+ ppgtt->vm.file = fpriv;
- trace_i915_ppgtt_create(&ppgtt->base);
+ trace_i915_ppgtt_create(&ppgtt->vm);
return ppgtt;
}
@@ -2227,16 +2227,16 @@ void i915_ppgtt_release(struct kref *kref)
struct i915_hw_ppgtt *ppgtt =
container_of(kref, struct i915_hw_ppgtt, ref);
- trace_i915_ppgtt_release(&ppgtt->base);
+ trace_i915_ppgtt_release(&ppgtt->vm);
- ppgtt_destroy_vma(&ppgtt->base);
+ ppgtt_destroy_vma(&ppgtt->vm);
- GEM_BUG_ON(!list_empty(&ppgtt->base.active_list));
- GEM_BUG_ON(!list_empty(&ppgtt->base.inactive_list));
- GEM_BUG_ON(!list_empty(&ppgtt->base.unbound_list));
+ GEM_BUG_ON(!list_empty(&ppgtt->vm.active_list));
+ GEM_BUG_ON(!list_empty(&ppgtt->vm.inactive_list));
+ GEM_BUG_ON(!list_empty(&ppgtt->vm.unbound_list));
- ppgtt->base.cleanup(&ppgtt->base);
- i915_address_space_fini(&ppgtt->base);
+ ppgtt->vm.cleanup(&ppgtt->vm);
+ i915_address_space_fini(&ppgtt->vm);
kfree(ppgtt);
}
@@ -2332,7 +2332,7 @@ void i915_gem_suspend_gtt_mappings(struct drm_i915_private *dev_priv)
i915_check_and_clear_faults(dev_priv);
- ggtt->base.clear_range(&ggtt->base, 0, ggtt->base.total);
+ ggtt->vm.clear_range(&ggtt->vm, 0, ggtt->vm.total);
i915_ggtt_invalidate(dev_priv);
}
@@ -2675,16 +2675,16 @@ static int aliasing_gtt_bind_vma(struct i915_vma *vma,
struct i915_hw_ppgtt *appgtt = i915->mm.aliasing_ppgtt;
if (!(vma->flags & I915_VMA_LOCAL_BIND) &&
- appgtt->base.allocate_va_range) {
- ret = appgtt->base.allocate_va_range(&appgtt->base,
- vma->node.start,
- vma->size);
+ appgtt->vm.allocate_va_range) {
+ ret = appgtt->vm.allocate_va_range(&appgtt->vm,
+ vma->node.start,
+ vma->size);
if (ret)
return ret;
}
- appgtt->base.insert_entries(&appgtt->base, vma, cache_level,
- pte_flags);
+ appgtt->vm.insert_entries(&appgtt->vm, vma, cache_level,
+ pte_flags);
}
if (flags & I915_VMA_GLOBAL_BIND) {
@@ -2707,7 +2707,7 @@ static void aliasing_gtt_unbind_vma(struct i915_vma *vma)
}
if (vma->flags & I915_VMA_LOCAL_BIND) {
- struct i915_address_space *vm = &i915->mm.aliasing_ppgtt->base;
+ struct i915_address_space *vm = &i915->mm.aliasing_ppgtt->vm;
vm->clear_range(vm, vma->node.start, vma->size);
}
@@ -2774,30 +2774,30 @@ int i915_gem_init_aliasing_ppgtt(struct drm_i915_private *i915)
if (IS_ERR(ppgtt))
return PTR_ERR(ppgtt);
- if (WARN_ON(ppgtt->base.total < ggtt->base.total)) {
+ if (WARN_ON(ppgtt->vm.total < ggtt->vm.total)) {
err = -ENODEV;
goto err_ppgtt;
}
- if (ppgtt->base.allocate_va_range) {
+ if (ppgtt->vm.allocate_va_range) {
/* Note we only pre-allocate as far as the end of the global
* GTT. On 48b / 4-level page-tables, the difference is very,
* very significant! We have to preallocate as GVT/vgpu does
* not like the page directory disappearing.
*/
- err = ppgtt->base.allocate_va_range(&ppgtt->base,
- 0, ggtt->base.total);
+ err = ppgtt->vm.allocate_va_range(&ppgtt->vm,
+ 0, ggtt->vm.total);
if (err)
goto err_ppgtt;
}
i915->mm.aliasing_ppgtt = ppgtt;
- GEM_BUG_ON(ggtt->base.bind_vma != ggtt_bind_vma);
- ggtt->base.bind_vma = aliasing_gtt_bind_vma;
+ GEM_BUG_ON(ggtt->vm.bind_vma != ggtt_bind_vma);
+ ggtt->vm.bind_vma = aliasing_gtt_bind_vma;
- GEM_BUG_ON(ggtt->base.unbind_vma != ggtt_unbind_vma);
- ggtt->base.unbind_vma = aliasing_gtt_unbind_vma;
+ GEM_BUG_ON(ggtt->vm.unbind_vma != ggtt_unbind_vma);
+ ggtt->vm.unbind_vma = aliasing_gtt_unbind_vma;
return 0;
@@ -2817,8 +2817,8 @@ void i915_gem_fini_aliasing_ppgtt(struct drm_i915_private *i915)
i915_ppgtt_put(ppgtt);
- ggtt->base.bind_vma = ggtt_bind_vma;
- ggtt->base.unbind_vma = ggtt_unbind_vma;
+ ggtt->vm.bind_vma = ggtt_bind_vma;
+ ggtt->vm.unbind_vma = ggtt_unbind_vma;
}
int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
@@ -2842,7 +2842,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
return ret;
/* Reserve a mappable slot for our lockless error capture */
- ret = drm_mm_insert_node_in_range(&ggtt->base.mm, &ggtt->error_capture,
+ ret = drm_mm_insert_node_in_range(&ggtt->vm.mm, &ggtt->error_capture,
PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
0, ggtt->mappable_end,
DRM_MM_INSERT_LOW);
@@ -2850,16 +2850,15 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
return ret;
/* Clear any non-preallocated blocks */
- drm_mm_for_each_hole(entry, &ggtt->base.mm, hole_start, hole_end) {
+ drm_mm_for_each_hole(entry, &ggtt->vm.mm, hole_start, hole_end) {
DRM_DEBUG_KMS("clearing unused GTT space: [%lx, %lx]\n",
hole_start, hole_end);
- ggtt->base.clear_range(&ggtt->base, hole_start,
- hole_end - hole_start);
+ ggtt->vm.clear_range(&ggtt->vm, hole_start,
+ hole_end - hole_start);
}
/* And finally clear the reserved guard page */
- ggtt->base.clear_range(&ggtt->base,
- ggtt->base.total - PAGE_SIZE, PAGE_SIZE);
+ ggtt->vm.clear_range(&ggtt->vm, ggtt->vm.total - PAGE_SIZE, PAGE_SIZE);
if (USES_PPGTT(dev_priv) && !USES_FULL_PPGTT(dev_priv)) {
ret = i915_gem_init_aliasing_ppgtt(dev_priv);
@@ -2884,11 +2883,11 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv)
struct i915_vma *vma, *vn;
struct pagevec *pvec;
- ggtt->base.closed = true;
+ ggtt->vm.closed = true;
mutex_lock(&dev_priv->drm.struct_mutex);
- GEM_BUG_ON(!list_empty(&ggtt->base.active_list));
- list_for_each_entry_safe(vma, vn, &ggtt->base.inactive_list, vm_link)
+ GEM_BUG_ON(!list_empty(&ggtt->vm.active_list));
+ list_for_each_entry_safe(vma, vn, &ggtt->vm.inactive_list, vm_link)
WARN_ON(i915_vma_unbind(vma));
mutex_unlock(&dev_priv->drm.struct_mutex);
@@ -2900,12 +2899,12 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv)
if (drm_mm_node_allocated(&ggtt->error_capture))
drm_mm_remove_node(&ggtt->error_capture);
- if (drm_mm_initialized(&ggtt->base.mm)) {
+ if (drm_mm_initialized(&ggtt->vm.mm)) {
intel_vgt_deballoon(dev_priv);
- i915_address_space_fini(&ggtt->base);
+ i915_address_space_fini(&ggtt->vm);
}
- ggtt->base.cleanup(&ggtt->base);
+ ggtt->vm.cleanup(&ggtt->vm);
pvec = &dev_priv->mm.wc_stash;
if (pvec->nr) {
@@ -2955,7 +2954,7 @@ static unsigned int chv_get_total_gtt_size(u16 gmch_ctrl)
static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
{
- struct drm_i915_private *dev_priv = ggtt->base.i915;
+ struct drm_i915_private *dev_priv = ggtt->vm.i915;
struct pci_dev *pdev = dev_priv->drm.pdev;
phys_addr_t phys_addr;
int ret;
@@ -2979,7 +2978,7 @@ static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
return -ENOMEM;
}
- ret = setup_scratch_page(&ggtt->base, GFP_DMA32);
+ ret = setup_scratch_page(&ggtt->vm, GFP_DMA32);
if (ret) {
DRM_ERROR("Scratch setup failed\n");
/* iounmap will also get called at remove, but meh */
@@ -3285,7 +3284,7 @@ static void setup_private_pat(struct drm_i915_private *dev_priv)
static int gen8_gmch_probe(struct i915_ggtt *ggtt)
{
- struct drm_i915_private *dev_priv = ggtt->base.i915;
+ struct drm_i915_private *dev_priv = ggtt->vm.i915;
struct pci_dev *pdev = dev_priv->drm.pdev;
unsigned int size;
u16 snb_gmch_ctl;
@@ -3309,25 +3308,25 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
else
size = gen8_get_total_gtt_size(snb_gmch_ctl);
- ggtt->base.total = (size / sizeof(gen8_pte_t)) << PAGE_SHIFT;
- ggtt->base.cleanup = gen6_gmch_remove;
- ggtt->base.bind_vma = ggtt_bind_vma;
- ggtt->base.unbind_vma = ggtt_unbind_vma;
- ggtt->base.set_pages = ggtt_set_pages;
- ggtt->base.clear_pages = clear_pages;
- ggtt->base.insert_page = gen8_ggtt_insert_page;
- ggtt->base.clear_range = nop_clear_range;
+ ggtt->vm.total = (size / sizeof(gen8_pte_t)) << PAGE_SHIFT;
+ ggtt->vm.cleanup = gen6_gmch_remove;
+ ggtt->vm.bind_vma = ggtt_bind_vma;
+ ggtt->vm.unbind_vma = ggtt_unbind_vma;
+ ggtt->vm.set_pages = ggtt_set_pages;
+ ggtt->vm.clear_pages = clear_pages;
+ ggtt->vm.insert_page = gen8_ggtt_insert_page;
+ ggtt->vm.clear_range = nop_clear_range;
if (!USES_FULL_PPGTT(dev_priv) || intel_scanout_needs_vtd_wa(dev_priv))
- ggtt->base.clear_range = gen8_ggtt_clear_range;
+ ggtt->vm.clear_range = gen8_ggtt_clear_range;
- ggtt->base.insert_entries = gen8_ggtt_insert_entries;
+ ggtt->vm.insert_entries = gen8_ggtt_insert_entries;
/* Serialize GTT updates with aperture access on BXT if VT-d is on. */
if (intel_ggtt_update_needs_vtd_wa(dev_priv)) {
- ggtt->base.insert_entries = bxt_vtd_ggtt_insert_entries__BKL;
- ggtt->base.insert_page = bxt_vtd_ggtt_insert_page__BKL;
- if (ggtt->base.clear_range != nop_clear_range)
- ggtt->base.clear_range = bxt_vtd_ggtt_clear_range__BKL;
+ ggtt->vm.insert_entries = bxt_vtd_ggtt_insert_entries__BKL;
+ ggtt->vm.insert_page = bxt_vtd_ggtt_insert_page__BKL;
+ if (ggtt->vm.clear_range != nop_clear_range)
+ ggtt->vm.clear_range = bxt_vtd_ggtt_clear_range__BKL;
}
ggtt->invalidate = gen6_ggtt_invalidate;
@@ -3339,7 +3338,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
static int gen6_gmch_probe(struct i915_ggtt *ggtt)
{
- struct drm_i915_private *dev_priv = ggtt->base.i915;
+ struct drm_i915_private *dev_priv = ggtt->vm.i915;
struct pci_dev *pdev = dev_priv->drm.pdev;
unsigned int size;
u16 snb_gmch_ctl;
@@ -3366,29 +3365,29 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
pci_read_config_word(pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
size = gen6_get_total_gtt_size(snb_gmch_ctl);
- ggtt->base.total = (size / sizeof(gen6_pte_t)) << PAGE_SHIFT;
+ ggtt->vm.total = (size / sizeof(gen6_pte_t)) << PAGE_SHIFT;
- ggtt->base.clear_range = gen6_ggtt_clear_range;
- ggtt->base.insert_page = gen6_ggtt_insert_page;
- ggtt->base.insert_entries = gen6_ggtt_insert_entries;
- ggtt->base.bind_vma = ggtt_bind_vma;
- ggtt->base.unbind_vma = ggtt_unbind_vma;
- ggtt->base.set_pages = ggtt_set_pages;
- ggtt->base.clear_pages = clear_pages;
- ggtt->base.cleanup = gen6_gmch_remove;
+ ggtt->vm.clear_range = gen6_ggtt_clear_range;
+ ggtt->vm.insert_page = gen6_ggtt_insert_page;
+ ggtt->vm.insert_entries = gen6_ggtt_insert_entries;
+ ggtt->vm.bind_vma = ggtt_bind_vma;
+ ggtt->vm.unbind_vma = ggtt_unbind_vma;
+ ggtt->vm.set_pages = ggtt_set_pages;
+ ggtt->vm.clear_pages = clear_pages;
+ ggtt->vm.cleanup = gen6_gmch_remove;
ggtt->invalidate = gen6_ggtt_invalidate;
if (HAS_EDRAM(dev_priv))
- ggtt->base.pte_encode = iris_pte_encode;
+ ggtt->vm.pte_encode = iris_pte_encode;
else if (IS_HASWELL(dev_priv))
- ggtt->base.pte_encode = hsw_pte_encode;
+ ggtt->vm.pte_encode = hsw_pte_encode;
else if (IS_VALLEYVIEW(dev_priv))
- ggtt->base.pte_encode = byt_pte_encode;
+ ggtt->vm.pte_encode = byt_pte_encode;
else if (INTEL_GEN(dev_priv) >= 7)
- ggtt->base.pte_encode = ivb_pte_encode;
+ ggtt->vm.pte_encode = ivb_pte_encode;
else
- ggtt->base.pte_encode = snb_pte_encode;
+ ggtt->vm.pte_encode = snb_pte_encode;
return ggtt_probe_common(ggtt, size);
}
@@ -3400,7 +3399,7 @@ static void i915_gmch_remove(struct i915_address_space *vm)
static int i915_gmch_probe(struct i915_ggtt *ggtt)
{
- struct drm_i915_private *dev_priv = ggtt->base.i915;
+ struct drm_i915_private *dev_priv = ggtt->vm.i915;
phys_addr_t gmadr_base;
int ret;
@@ -3410,23 +3409,21 @@ static int i915_gmch_probe(struct i915_ggtt *ggtt)
return -EIO;
}
- intel_gtt_get(&ggtt->base.total,
- &gmadr_base,
- &ggtt->mappable_end);
+ intel_gtt_get(&ggtt->vm.total, &gmadr_base, &ggtt->mappable_end);
ggtt->gmadr =
(struct resource) DEFINE_RES_MEM(gmadr_base,
ggtt->mappable_end);
ggtt->do_idle_maps = needs_idle_maps(dev_priv);
- ggtt->base.insert_page = i915_ggtt_insert_page;
- ggtt->base.insert_entries = i915_ggtt_insert_entries;
- ggtt->base.clear_range = i915_ggtt_clear_range;
- ggtt->base.bind_vma = ggtt_bind_vma;
- ggtt->base.unbind_vma = ggtt_unbind_vma;
- ggtt->base.set_pages = ggtt_set_pages;
- ggtt->base.clear_pages = clear_pages;
- ggtt->base.cleanup = i915_gmch_remove;
+ ggtt->vm.insert_page = i915_ggtt_insert_page;
+ ggtt->vm.insert_entries = i915_ggtt_insert_entries;
+ ggtt->vm.clear_range = i915_ggtt_clear_range;
+ ggtt->vm.bind_vma = ggtt_bind_vma;
+ ggtt->vm.unbind_vma = ggtt_unbind_vma;
+ ggtt->vm.set_pages = ggtt_set_pages;
+ ggtt->vm.clear_pages = clear_pages;
+ ggtt->vm.cleanup = i915_gmch_remove;
ggtt->invalidate = gmch_ggtt_invalidate;
@@ -3445,8 +3442,8 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
struct i915_ggtt *ggtt = &dev_priv->ggtt;
int ret;
- ggtt->base.i915 = dev_priv;
- ggtt->base.dma = &dev_priv->drm.pdev->dev;
+ ggtt->vm.i915 = dev_priv;
+ ggtt->vm.dma = &dev_priv->drm.pdev->dev;
if (INTEL_GEN(dev_priv) <= 5)
ret = i915_gmch_probe(ggtt);
@@ -3463,27 +3460,29 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
* restriction!
*/
if (USES_GUC(dev_priv)) {
- ggtt->base.total = min_t(u64, ggtt->base.total, GUC_GGTT_TOP);
- ggtt->mappable_end = min_t(u64, ggtt->mappable_end, ggtt->base.total);
+ ggtt->vm.total = min_t(u64, ggtt->vm.total, GUC_GGTT_TOP);
+ ggtt->mappable_end =
+ min_t(u64, ggtt->mappable_end, ggtt->vm.total);
}
- if ((ggtt->base.total - 1) >> 32) {
+ if ((ggtt->vm.total - 1) >> 32) {
DRM_ERROR("We never expected a Global GTT with more than 32bits"
" of address space! Found %lldM!\n",
- ggtt->base.total >> 20);
- ggtt->base.total = 1ULL << 32;
- ggtt->mappable_end = min_t(u64, ggtt->mappable_end, ggtt->base.total);
+ ggtt->vm.total >> 20);
+ ggtt->vm.total = 1ULL << 32;
+ ggtt->mappable_end =
+ min_t(u64, ggtt->mappable_end, ggtt->vm.total);
}
- if (ggtt->mappable_end > ggtt->base.total) {
+ if (ggtt->mappable_end > ggtt->vm.total) {
DRM_ERROR("mappable aperture extends past end of GGTT,"
" aperture=%pa, total=%llx\n",
- &ggtt->mappable_end, ggtt->base.total);
- ggtt->mappable_end = ggtt->base.total;
+ &ggtt->mappable_end, ggtt->vm.total);
+ ggtt->mappable_end = ggtt->vm.total;
}
/* GMADR is the PCI mmio aperture into the global GTT. */
- DRM_DEBUG_DRIVER("GGTT size = %lluM\n", ggtt->base.total >> 20);
+ DRM_DEBUG_DRIVER("GGTT size = %lluM\n", ggtt->vm.total >> 20);
DRM_DEBUG_DRIVER("GMADR size = %lluM\n", (u64)ggtt->mappable_end >> 20);
DRM_DEBUG_DRIVER("DSM size = %lluM\n",
(u64)resource_size(&intel_graphics_stolen_res) >> 20);
@@ -3510,9 +3509,9 @@ int i915_ggtt_init_hw(struct drm_i915_private *dev_priv)
* and beyond the end of the GTT if we do not provide a guard.
*/
mutex_lock(&dev_priv->drm.struct_mutex);
- i915_address_space_init(&ggtt->base, dev_priv, "[global]");
+ i915_address_space_init(&ggtt->vm, dev_priv, "[global]");
if (!HAS_LLC(dev_priv) && !USES_PPGTT(dev_priv))
- ggtt->base.mm.color_adjust = i915_gtt_color_adjust;
+ ggtt->vm.mm.color_adjust = i915_gtt_color_adjust;
mutex_unlock(&dev_priv->drm.struct_mutex);
if (!io_mapping_init_wc(&dev_priv->ggtt.iomap,
@@ -3535,7 +3534,7 @@ int i915_ggtt_init_hw(struct drm_i915_private *dev_priv)
return 0;
out_gtt_cleanup:
- ggtt->base.cleanup(&ggtt->base);
+ ggtt->vm.cleanup(&ggtt->vm);
return ret;
}
@@ -3574,9 +3573,9 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
i915_check_and_clear_faults(dev_priv);
/* First fill our portion of the GTT with scratch pages */
- ggtt->base.clear_range(&ggtt->base, 0, ggtt->base.total);
+ ggtt->vm.clear_range(&ggtt->vm, 0, ggtt->vm.total);
- ggtt->base.closed = true; /* skip rewriting PTE on VMA unbind */
+ ggtt->vm.closed = true; /* skip rewriting PTE on VMA unbind */
/* clflush objects bound into the GGTT and rebind them. */
list_for_each_entry_safe(obj, on, &dev_priv->mm.bound_list, mm.link) {
@@ -3596,7 +3595,7 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
}
- ggtt->base.closed = false;
+ ggtt->vm.closed = false;
if (INTEL_GEN(dev_priv) >= 8) {
struct intel_ppat *ppat = &dev_priv->ppat;
@@ -3619,7 +3618,7 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
if (!ppgtt)
continue;
- gen6_write_page_range(ppgtt, 0, ppgtt->base.total);
+ gen6_write_page_range(ppgtt, 0, ppgtt->vm.total);
}
}
@@ -3841,7 +3840,7 @@ int i915_gem_gtt_reserve(struct i915_address_space *vm,
GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
GEM_BUG_ON(!IS_ALIGNED(offset, I915_GTT_MIN_ALIGNMENT));
GEM_BUG_ON(range_overflows(offset, size, vm->total));
- GEM_BUG_ON(vm == &vm->i915->mm.aliasing_ppgtt->base);
+ GEM_BUG_ON(vm == &vm->i915->mm.aliasing_ppgtt->vm);
GEM_BUG_ON(drm_mm_node_allocated(node));
node->size = size;
@@ -3938,7 +3937,7 @@ int i915_gem_gtt_insert(struct i915_address_space *vm,
GEM_BUG_ON(start >= end);
GEM_BUG_ON(start > 0 && !IS_ALIGNED(start, I915_GTT_PAGE_SIZE));
GEM_BUG_ON(end < U64_MAX && !IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
- GEM_BUG_ON(vm == &vm->i915->mm.aliasing_ppgtt->base);
+ GEM_BUG_ON(vm == &vm->i915->mm.aliasing_ppgtt->vm);
GEM_BUG_ON(drm_mm_node_allocated(node));
if (unlikely(range_overflows(start, size, end)))
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index aec4f73574f4..197c2c06ecb7 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -65,7 +65,7 @@ typedef u64 gen8_pde_t;
typedef u64 gen8_ppgtt_pdpe_t;
typedef u64 gen8_ppgtt_pml4e_t;
-#define ggtt_total_entries(ggtt) ((ggtt)->base.total >> PAGE_SHIFT)
+#define ggtt_total_entries(ggtt) ((ggtt)->vm.total >> PAGE_SHIFT)
/* gen6-hsw has bit 11-4 for physical addr bit 39-32 */
#define GEN6_GTT_ADDR_ENCODE(addr) ((addr) | (((addr) >> 28) & 0xff0))
@@ -367,7 +367,7 @@ i915_vm_has_scratch_64K(struct i915_address_space *vm)
* the spec.
*/
struct i915_ggtt {
- struct i915_address_space base;
+ struct i915_address_space vm;
struct io_mapping iomap; /* Mapping to our CPU mappable region */
struct resource gmadr; /* GMADR resource */
@@ -385,7 +385,7 @@ struct i915_ggtt {
};
struct i915_hw_ppgtt {
- struct i915_address_space base;
+ struct i915_address_space vm;
struct kref ref;
struct drm_mm_node node;
unsigned long pd_dirty_rings;
@@ -543,7 +543,7 @@ static inline struct i915_ggtt *
i915_vm_to_ggtt(struct i915_address_space *vm)
{
GEM_BUG_ON(!i915_is_ggtt(vm));
- return container_of(vm, struct i915_ggtt, base);
+ return container_of(vm, struct i915_ggtt, vm);
}
#define INTEL_MAX_PPAT_ENTRIES 8
diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
index 1036e8686916..3210cedfa46c 100644
--- a/drivers/gpu/drm/i915/i915_gem_render_state.c
+++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
@@ -194,7 +194,7 @@ int i915_gem_render_state_emit(struct i915_request *rq)
if (IS_ERR(so.obj))
return PTR_ERR(so.obj);
- so.vma = i915_vma_instance(so.obj, &engine->i915->ggtt.base, NULL);
+ so.vma = i915_vma_instance(so.obj, &engine->i915->ggtt.vm, NULL);
if (IS_ERR(so.vma)) {
err = PTR_ERR(so.vma);
goto err_obj;
diff --git a/drivers/gpu/drm/i915/i915_gem_shrinker.c b/drivers/gpu/drm/i915/i915_gem_shrinker.c
index 5757fb7c4b5a..55e84e71f526 100644
--- a/drivers/gpu/drm/i915/i915_gem_shrinker.c
+++ b/drivers/gpu/drm/i915/i915_gem_shrinker.c
@@ -480,7 +480,7 @@ i915_gem_shrinker_vmap(struct notifier_block *nb, unsigned long event, void *ptr
/* We also want to clear any cached iomaps as they wrap vmap */
list_for_each_entry_safe(vma, next,
- &i915->ggtt.base.inactive_list, vm_link) {
+ &i915->ggtt.vm.inactive_list, vm_link) {
unsigned long count = vma->node.size >> PAGE_SHIFT;
if (vma->iomap && i915_vma_unbind(vma) == 0)
freed_pages += count;
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
index ad949cc30928..79a347295e00 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -642,7 +642,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_i915_private *dev_priv
if (ret)
goto err;
- vma = i915_vma_instance(obj, &ggtt->base, NULL);
+ vma = i915_vma_instance(obj, &ggtt->vm, NULL);
if (IS_ERR(vma)) {
ret = PTR_ERR(vma);
goto err_pages;
@@ -653,7 +653,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_i915_private *dev_priv
* setting up the GTT space. The actual reservation will occur
* later.
*/
- ret = i915_gem_gtt_reserve(&ggtt->base, &vma->node,
+ ret = i915_gem_gtt_reserve(&ggtt->vm, &vma->node,
size, gtt_offset, obj->cache_level,
0);
if (ret) {
@@ -666,7 +666,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_i915_private *dev_priv
vma->pages = obj->mm.pages;
vma->flags |= I915_VMA_GLOBAL_BIND;
__i915_vma_set_map_and_fenceable(vma);
- list_move_tail(&vma->vm_link, &ggtt->base.inactive_list);
+ list_move_tail(&vma->vm_link, &ggtt->vm.inactive_list);
spin_lock(&dev_priv->mm.obj_lock);
list_move_tail(&obj->mm.link, &dev_priv->mm.bound_list);
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 47721437a4c5..cd09a1688192 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -973,8 +973,7 @@ i915_error_object_create(struct drm_i915_private *i915,
void __iomem *s;
int ret;
- ggtt->base.insert_page(&ggtt->base, dma, slot,
- I915_CACHE_NONE, 0);
+ ggtt->vm.insert_page(&ggtt->vm, dma, slot, I915_CACHE_NONE, 0);
s = io_mapping_map_atomic_wc(&ggtt->iomap, slot);
ret = compress_page(&compress, (void __force *)s, dst);
@@ -993,7 +992,7 @@ i915_error_object_create(struct drm_i915_private *i915,
out:
compress_fini(&compress, dst);
- ggtt->base.clear_range(&ggtt->base, slot, PAGE_SIZE);
+ ggtt->vm.clear_range(&ggtt->vm, slot, PAGE_SIZE);
return dst;
}
@@ -1466,7 +1465,7 @@ static void gem_record_rings(struct i915_gpu_state *error)
struct i915_gem_context *ctx = request->gem_context;
struct intel_ring *ring;
- ee->vm = ctx->ppgtt ? &ctx->ppgtt->base : &ggtt->base;
+ ee->vm = ctx->ppgtt ? &ctx->ppgtt->vm : &ggtt->vm;
record_context(&ee->context, ctx);
@@ -1564,7 +1563,7 @@ static void capture_active_buffers(struct i915_gpu_state *error)
static void capture_pinned_buffers(struct i915_gpu_state *error)
{
- struct i915_address_space *vm = &error->i915->ggtt.base;
+ struct i915_address_space *vm = &error->i915->ggtt.vm;
struct drm_i915_error_buffer *bo;
struct i915_vma *vma;
int count_inactive, count_active;
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index 5d4f78765083..03299bae45a2 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -936,7 +936,7 @@ DECLARE_EVENT_CLASS(i915_context,
__entry->dev = ctx->i915->drm.primary->index;
__entry->ctx = ctx;
__entry->hw_id = ctx->hw_id;
- __entry->vm = ctx->ppgtt ? &ctx->ppgtt->base : NULL;
+ __entry->vm = ctx->ppgtt ? &ctx->ppgtt->vm : NULL;
),
TP_printk("dev=%u, ctx=%p, ctx_vm=%p, hw_id=%u",
@@ -975,7 +975,7 @@ TRACE_EVENT(switch_mm,
TP_fast_assign(
__entry->ring = engine->id;
__entry->to = to;
- __entry->vm = to->ppgtt? &to->ppgtt->base : NULL;
+ __entry->vm = to->ppgtt? &to->ppgtt->vm : NULL;
__entry->dev = engine->i915->drm.primary->index;
),
diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
index 5fe9f3f39467..869cf4a3b6de 100644
--- a/drivers/gpu/drm/i915/i915_vgpu.c
+++ b/drivers/gpu/drm/i915/i915_vgpu.c
@@ -105,7 +105,7 @@ static void vgt_deballoon_space(struct i915_ggtt *ggtt,
node->start + node->size,
node->size / 1024);
- ggtt->base.reserved -= node->size;
+ ggtt->vm.reserved -= node->size;
drm_mm_remove_node(node);
}
@@ -141,11 +141,11 @@ static int vgt_balloon_space(struct i915_ggtt *ggtt,
DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n",
start, end, size / 1024);
- ret = i915_gem_gtt_reserve(&ggtt->base, node,
+ ret = i915_gem_gtt_reserve(&ggtt->vm, node,
size, start, I915_COLOR_UNEVICTABLE,
0);
if (!ret)
- ggtt->base.reserved += size;
+ ggtt->vm.reserved += size;
return ret;
}
@@ -197,7 +197,7 @@ static int vgt_balloon_space(struct i915_ggtt *ggtt,
int intel_vgt_balloon(struct drm_i915_private *dev_priv)
{
struct i915_ggtt *ggtt = &dev_priv->ggtt;
- unsigned long ggtt_end = ggtt->base.total;
+ unsigned long ggtt_end = ggtt->vm.total;
unsigned long mappable_base, mappable_size, mappable_end;
unsigned long unmappable_base, unmappable_size, unmappable_end;
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 9324d476e0a7..e8f07cdca063 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -85,7 +85,7 @@ vma_create(struct drm_i915_gem_object *obj,
int i;
/* The aliasing_ppgtt should never be used directly! */
- GEM_BUG_ON(vm == &vm->i915->mm.aliasing_ppgtt->base);
+ GEM_BUG_ON(vm == &vm->i915->mm.aliasing_ppgtt->vm);
vma = kmem_cache_zalloc(vm->i915->vmas, GFP_KERNEL);
if (vma == NULL)
diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
index 13448ea76f57..2ec2e60dc670 100644
--- a/drivers/gpu/drm/i915/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/intel_engine_cs.c
@@ -515,7 +515,7 @@ int intel_engine_create_scratch(struct intel_engine_cs *engine, int size)
return PTR_ERR(obj);
}
- vma = i915_vma_instance(obj, &engine->i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &engine->i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
ret = PTR_ERR(vma);
goto err_unref;
@@ -585,7 +585,7 @@ static int init_status_page(struct intel_engine_cs *engine)
if (ret)
goto err;
- vma = i915_vma_instance(obj, &engine->i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &engine->i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
ret = PTR_ERR(vma);
goto err;
diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
index e28a996b9604..29fd95c1306b 100644
--- a/drivers/gpu/drm/i915/intel_guc.c
+++ b/drivers/gpu/drm/i915/intel_guc.c
@@ -570,7 +570,7 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
if (IS_ERR(obj))
return ERR_CAST(obj);
- vma = i915_vma_instance(obj, &dev_priv->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &dev_priv->ggtt.vm, NULL);
if (IS_ERR(vma))
goto err;
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
index 133367a17863..e271e296b9da 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -536,7 +536,7 @@ static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
*/
static void flush_ggtt_writes(struct i915_vma *vma)
{
- struct drm_i915_private *dev_priv = to_i915(vma->obj->base.dev);
+ struct drm_i915_private *dev_priv = vma->vm->i915;
if (i915_vma_is_map_and_fenceable(vma))
POSTING_READ_FW(GUC_STATUS);
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index eb25afa9694f..091e28f0e024 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -431,7 +431,7 @@ static u64 execlists_update_context(struct i915_request *rq)
* PML4 is allocated during ppgtt init, so this is not needed
* in 48-bit mode.
*/
- if (ppgtt && !i915_vm_is_48bit(&ppgtt->base))
+ if (ppgtt && !i915_vm_is_48bit(&ppgtt->vm))
execlists_update_context_pdps(ppgtt, reg_state);
return ce->lrc_desc;
@@ -1671,7 +1671,7 @@ static int lrc_setup_wa_ctx(struct intel_engine_cs *engine)
if (IS_ERR(obj))
return PTR_ERR(obj);
- vma = i915_vma_instance(obj, &engine->i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &engine->i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto err;
@@ -2069,7 +2069,7 @@ static int gen8_emit_bb_start(struct i915_request *rq,
* not needed in 48-bit.*/
if (rq->gem_context->ppgtt &&
(intel_engine_flag(rq->engine) & rq->gem_context->ppgtt->pd_dirty_rings) &&
- !i915_vm_is_48bit(&rq->gem_context->ppgtt->base) &&
+ !i915_vm_is_48bit(&rq->gem_context->ppgtt->vm) &&
!intel_vgpu_active(rq->i915)) {
ret = intel_logical_ring_emit_pdps(rq);
if (ret)
@@ -2667,7 +2667,7 @@ static void execlists_init_reg_state(u32 *regs,
CTX_REG(regs, CTX_PDP0_UDW, GEN8_RING_PDP_UDW(engine, 0), 0);
CTX_REG(regs, CTX_PDP0_LDW, GEN8_RING_PDP_LDW(engine, 0), 0);
- if (ppgtt && i915_vm_is_48bit(&ppgtt->base)) {
+ if (ppgtt && i915_vm_is_48bit(&ppgtt->vm)) {
/* 64b PPGTT (48bit canonical)
* PDP0_DESCRIPTOR contains the base address to PML4 and
* other PDP Descriptors are ignored.
@@ -2773,7 +2773,7 @@ static int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
goto error_deref_obj;
}
- vma = i915_vma_instance(ctx_obj, &ctx->i915->ggtt.base, NULL);
+ vma = i915_vma_instance(ctx_obj, &ctx->i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
ret = PTR_ERR(vma);
goto error_deref_obj;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 97b38bbb7ce2..fa517a3e3c25 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1123,7 +1123,7 @@ intel_ring_create_vma(struct drm_i915_private *dev_priv, int size)
/* mark ring buffers as read-only from GPU side by default */
obj->gt_ro = 1;
- vma = i915_vma_instance(obj, &dev_priv->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &dev_priv->ggtt.vm, NULL);
if (IS_ERR(vma))
goto err;
@@ -1279,7 +1279,7 @@ alloc_context_vma(struct intel_engine_cs *engine)
i915_gem_object_set_cache_level(obj, I915_CACHE_L3_LLC);
}
- vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto err_obj;
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
index 91c72911be3c..01ab60f1a7e8 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -338,7 +338,7 @@ fake_huge_pages_object(struct drm_i915_private *i915, u64 size, bool single)
static int igt_check_page_sizes(struct i915_vma *vma)
{
- struct drm_i915_private *i915 = to_i915(vma->obj->base.dev);
+ struct drm_i915_private *i915 = vma->vm->i915;
unsigned int supported = INTEL_INFO(i915)->page_sizes;
struct drm_i915_gem_object *obj = vma->obj;
int err = 0;
@@ -379,7 +379,7 @@ static int igt_check_page_sizes(struct i915_vma *vma)
static int igt_mock_exhaust_device_supported_pages(void *arg)
{
struct i915_hw_ppgtt *ppgtt = arg;
- struct drm_i915_private *i915 = ppgtt->base.i915;
+ struct drm_i915_private *i915 = ppgtt->vm.i915;
unsigned int saved_mask = INTEL_INFO(i915)->page_sizes;
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
@@ -415,7 +415,7 @@ static int igt_mock_exhaust_device_supported_pages(void *arg)
goto out_put;
}
- vma = i915_vma_instance(obj, &ppgtt->base, NULL);
+ vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto out_put;
@@ -458,7 +458,7 @@ static int igt_mock_exhaust_device_supported_pages(void *arg)
static int igt_mock_ppgtt_misaligned_dma(void *arg)
{
struct i915_hw_ppgtt *ppgtt = arg;
- struct drm_i915_private *i915 = ppgtt->base.i915;
+ struct drm_i915_private *i915 = ppgtt->vm.i915;
unsigned long supported = INTEL_INFO(i915)->page_sizes;
struct drm_i915_gem_object *obj;
int bit;
@@ -500,7 +500,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
/* Force the page size for this object */
obj->mm.page_sizes.sg = page_size;
- vma = i915_vma_instance(obj, &ppgtt->base, NULL);
+ vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto out_unpin;
@@ -591,7 +591,7 @@ static void close_object_list(struct list_head *objects,
list_for_each_entry_safe(obj, on, objects, st_link) {
struct i915_vma *vma;
- vma = i915_vma_instance(obj, &ppgtt->base, NULL);
+ vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
if (!IS_ERR(vma))
i915_vma_close(vma);
@@ -604,8 +604,8 @@ static void close_object_list(struct list_head *objects,
static int igt_mock_ppgtt_huge_fill(void *arg)
{
struct i915_hw_ppgtt *ppgtt = arg;
- struct drm_i915_private *i915 = ppgtt->base.i915;
- unsigned long max_pages = ppgtt->base.total >> PAGE_SHIFT;
+ struct drm_i915_private *i915 = ppgtt->vm.i915;
+ unsigned long max_pages = ppgtt->vm.total >> PAGE_SHIFT;
unsigned long page_num;
bool single = false;
LIST_HEAD(objects);
@@ -641,7 +641,7 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
list_add(&obj->st_link, &objects);
- vma = i915_vma_instance(obj, &ppgtt->base, NULL);
+ vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
break;
@@ -725,7 +725,7 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
static int igt_mock_ppgtt_64K(void *arg)
{
struct i915_hw_ppgtt *ppgtt = arg;
- struct drm_i915_private *i915 = ppgtt->base.i915;
+ struct drm_i915_private *i915 = ppgtt->vm.i915;
struct drm_i915_gem_object *obj;
const struct object_info {
unsigned int size;
@@ -819,7 +819,7 @@ static int igt_mock_ppgtt_64K(void *arg)
*/
obj->mm.page_sizes.sg &= ~I915_GTT_PAGE_SIZE_2M;
- vma = i915_vma_instance(obj, &ppgtt->base, NULL);
+ vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto out_object_unpin;
@@ -887,8 +887,8 @@ static int igt_mock_ppgtt_64K(void *arg)
static struct i915_vma *
gpu_write_dw(struct i915_vma *vma, u64 offset, u32 val)
{
- struct drm_i915_private *i915 = to_i915(vma->obj->base.dev);
- const int gen = INTEL_GEN(vma->vm->i915);
+ struct drm_i915_private *i915 = vma->vm->i915;
+ const int gen = INTEL_GEN(i915);
unsigned int count = vma->size >> PAGE_SHIFT;
struct drm_i915_gem_object *obj;
struct i915_vma *batch;
@@ -1047,7 +1047,8 @@ static int __igt_write_huge(struct i915_gem_context *ctx,
u32 dword, u32 val)
{
struct drm_i915_private *i915 = to_i915(obj->base.dev);
- struct i915_address_space *vm = ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
+ struct i915_address_space *vm =
+ ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
unsigned int flags = PIN_USER | PIN_OFFSET_FIXED;
struct i915_vma *vma;
int err;
@@ -1100,7 +1101,8 @@ static int igt_write_huge(struct i915_gem_context *ctx,
struct drm_i915_gem_object *obj)
{
struct drm_i915_private *i915 = to_i915(obj->base.dev);
- struct i915_address_space *vm = ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
+ struct i915_address_space *vm =
+ ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
static struct intel_engine_cs *engines[I915_NUM_ENGINES];
struct intel_engine_cs *engine;
I915_RND_STATE(prng);
@@ -1439,7 +1441,7 @@ static int igt_ppgtt_pin_update(void *arg)
if (IS_ERR(obj))
return PTR_ERR(obj);
- vma = i915_vma_instance(obj, &ppgtt->base, NULL);
+ vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto out_put;
@@ -1493,7 +1495,7 @@ static int igt_ppgtt_pin_update(void *arg)
if (IS_ERR(obj))
return PTR_ERR(obj);
- vma = i915_vma_instance(obj, &ppgtt->base, NULL);
+ vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto out_put;
@@ -1531,7 +1533,8 @@ static int igt_tmpfs_fallback(void *arg)
struct i915_gem_context *ctx = arg;
struct drm_i915_private *i915 = ctx->i915;
struct vfsmount *gemfs = i915->mm.gemfs;
- struct i915_address_space *vm = ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
+ struct i915_address_space *vm =
+ ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
u32 *vaddr;
@@ -1587,7 +1590,8 @@ static int igt_shrink_thp(void *arg)
{
struct i915_gem_context *ctx = arg;
struct drm_i915_private *i915 = ctx->i915;
- struct i915_address_space *vm = ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
+ struct i915_address_space *vm =
+ ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
struct drm_i915_gem_object *obj;
struct i915_vma *vma;
unsigned int flags = PIN_USER;
@@ -1696,14 +1700,14 @@ int i915_gem_huge_page_mock_selftests(void)
goto out_unlock;
}
- if (!i915_vm_is_48bit(&ppgtt->base)) {
+ if (!i915_vm_is_48bit(&ppgtt->vm)) {
pr_err("failed to create 48b PPGTT\n");
err = -EINVAL;
goto out_close;
}
/* If we were ever hit this then it's time to mock the 64K scratch */
- if (!i915_vm_has_scratch_64K(&ppgtt->base)) {
+ if (!i915_vm_has_scratch_64K(&ppgtt->vm)) {
pr_err("PPGTT missing 64K scratch page\n");
err = -EINVAL;
goto out_close;
@@ -1712,7 +1716,7 @@ int i915_gem_huge_page_mock_selftests(void)
err = i915_subtests(tests, ppgtt);
out_close:
- i915_ppgtt_close(&ppgtt->base);
+ i915_ppgtt_close(&ppgtt->vm);
i915_ppgtt_put(ppgtt);
out_unlock:
@@ -1758,7 +1762,7 @@ int i915_gem_huge_page_live_selftests(struct drm_i915_private *dev_priv)
}
if (ctx->ppgtt)
- ctx->ppgtt->base.scrub_64K = true;
+ ctx->ppgtt->vm.scrub_64K = true;
err = i915_subtests(tests, ctx);
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
index b39392a00a6f..708e8d721448 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
@@ -115,7 +115,7 @@ static int gpu_fill(struct drm_i915_gem_object *obj,
{
struct drm_i915_private *i915 = to_i915(obj->base.dev);
struct i915_address_space *vm =
- ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
+ ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
struct i915_request *rq;
struct i915_vma *vma;
struct i915_vma *batch;
@@ -290,7 +290,7 @@ create_test_object(struct i915_gem_context *ctx,
{
struct drm_i915_gem_object *obj;
struct i915_address_space *vm =
- ctx->ppgtt ? &ctx->ppgtt->base : &ctx->i915->ggtt.base;
+ ctx->ppgtt ? &ctx->ppgtt->vm : &ctx->i915->ggtt.vm;
u64 size;
int err;
@@ -557,7 +557,7 @@ static int fake_aliasing_ppgtt_enable(struct drm_i915_private *i915)
list_for_each_entry(obj, &i915->mm.bound_list, mm.link) {
struct i915_vma *vma;
- vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
if (IS_ERR(vma))
continue;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
index ab9d7bee0aae..2dc72a984d45 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
@@ -35,7 +35,7 @@ static int populate_ggtt(struct drm_i915_private *i915)
u64 size;
for (size = 0;
- size + I915_GTT_PAGE_SIZE <= i915->ggtt.base.total;
+ size + I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
size += I915_GTT_PAGE_SIZE) {
struct i915_vma *vma;
@@ -57,7 +57,7 @@ static int populate_ggtt(struct drm_i915_private *i915)
return -EINVAL;
}
- if (list_empty(&i915->ggtt.base.inactive_list)) {
+ if (list_empty(&i915->ggtt.vm.inactive_list)) {
pr_err("No objects on the GGTT inactive list!\n");
return -EINVAL;
}
@@ -69,7 +69,7 @@ static void unpin_ggtt(struct drm_i915_private *i915)
{
struct i915_vma *vma;
- list_for_each_entry(vma, &i915->ggtt.base.inactive_list, vm_link)
+ list_for_each_entry(vma, &i915->ggtt.vm.inactive_list, vm_link)
i915_vma_unpin(vma);
}
@@ -103,7 +103,7 @@ static int igt_evict_something(void *arg)
goto cleanup;
/* Everything is pinned, nothing should happen */
- err = i915_gem_evict_something(&ggtt->base,
+ err = i915_gem_evict_something(&ggtt->vm,
I915_GTT_PAGE_SIZE, 0, 0,
0, U64_MAX,
0);
@@ -116,7 +116,7 @@ static int igt_evict_something(void *arg)
unpin_ggtt(i915);
/* Everything is unpinned, we should be able to evict something */
- err = i915_gem_evict_something(&ggtt->base,
+ err = i915_gem_evict_something(&ggtt->vm,
I915_GTT_PAGE_SIZE, 0, 0,
0, U64_MAX,
0);
@@ -181,7 +181,7 @@ static int igt_evict_for_vma(void *arg)
goto cleanup;
/* Everything is pinned, nothing should happen */
- err = i915_gem_evict_for_node(&ggtt->base, &target, 0);
+ err = i915_gem_evict_for_node(&ggtt->vm, &target, 0);
if (err != -ENOSPC) {
pr_err("i915_gem_evict_for_node on a full GGTT returned err=%d\n",
err);
@@ -191,7 +191,7 @@ static int igt_evict_for_vma(void *arg)
unpin_ggtt(i915);
/* Everything is unpinned, we should be able to evict the node */
- err = i915_gem_evict_for_node(&ggtt->base, &target, 0);
+ err = i915_gem_evict_for_node(&ggtt->vm, &target, 0);
if (err) {
pr_err("i915_gem_evict_for_node returned err=%d\n",
err);
@@ -229,7 +229,7 @@ static int igt_evict_for_cache_color(void *arg)
* i915_gtt_color_adjust throughout our driver, so using a mock color
* adjust will work just fine for our purposes.
*/
- ggtt->base.mm.color_adjust = mock_color_adjust;
+ ggtt->vm.mm.color_adjust = mock_color_adjust;
obj = i915_gem_object_create_internal(i915, I915_GTT_PAGE_SIZE);
if (IS_ERR(obj)) {
@@ -265,7 +265,7 @@ static int igt_evict_for_cache_color(void *arg)
i915_vma_unpin(vma);
/* Remove just the second vma */
- err = i915_gem_evict_for_node(&ggtt->base, &target, 0);
+ err = i915_gem_evict_for_node(&ggtt->vm, &target, 0);
if (err) {
pr_err("[0]i915_gem_evict_for_node returned err=%d\n", err);
goto cleanup;
@@ -276,7 +276,7 @@ static int igt_evict_for_cache_color(void *arg)
*/
target.color = I915_CACHE_L3_LLC;
- err = i915_gem_evict_for_node(&ggtt->base, &target, 0);
+ err = i915_gem_evict_for_node(&ggtt->vm, &target, 0);
if (!err) {
pr_err("[1]i915_gem_evict_for_node returned err=%d\n", err);
err = -EINVAL;
@@ -288,7 +288,7 @@ static int igt_evict_for_cache_color(void *arg)
cleanup:
unpin_ggtt(i915);
cleanup_objects(i915);
- ggtt->base.mm.color_adjust = NULL;
+ ggtt->vm.mm.color_adjust = NULL;
return err;
}
@@ -305,7 +305,7 @@ static int igt_evict_vm(void *arg)
goto cleanup;
/* Everything is pinned, nothing should happen */
- err = i915_gem_evict_vm(&ggtt->base);
+ err = i915_gem_evict_vm(&ggtt->vm);
if (err) {
pr_err("i915_gem_evict_vm on a full GGTT returned err=%d]\n",
err);
@@ -314,7 +314,7 @@ static int igt_evict_vm(void *arg)
unpin_ggtt(i915);
- err = i915_gem_evict_vm(&ggtt->base);
+ err = i915_gem_evict_vm(&ggtt->vm);
if (err) {
pr_err("i915_gem_evict_vm on a full GGTT returned err=%d]\n",
err);
@@ -359,9 +359,9 @@ static int igt_evict_contexts(void *arg)
/* Reserve a block so that we know we have enough to fit a few rq */
memset(&hole, 0, sizeof(hole));
- err = i915_gem_gtt_insert(&i915->ggtt.base, &hole,
+ err = i915_gem_gtt_insert(&i915->ggtt.vm, &hole,
PRETEND_GGTT_SIZE, 0, I915_COLOR_UNEVICTABLE,
- 0, i915->ggtt.base.total,
+ 0, i915->ggtt.vm.total,
PIN_NOEVICT);
if (err)
goto out_locked;
@@ -377,9 +377,9 @@ static int igt_evict_contexts(void *arg)
goto out_locked;
}
- if (i915_gem_gtt_insert(&i915->ggtt.base, &r->node,
+ if (i915_gem_gtt_insert(&i915->ggtt.vm, &r->node,
1ul << 20, 0, I915_COLOR_UNEVICTABLE,
- 0, i915->ggtt.base.total,
+ 0, i915->ggtt.vm.total,
PIN_NOEVICT)) {
kfree(r);
break;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index f7dc926f4ef1..58ab5e84ceb7 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -151,14 +151,14 @@ static int igt_ppgtt_alloc(void *arg)
if (err)
goto err_ppgtt;
- if (!ppgtt->base.allocate_va_range)
+ if (!ppgtt->vm.allocate_va_range)
goto err_ppgtt_cleanup;
/* Check we can allocate the entire range */
for (size = 4096;
- size <= ppgtt->base.total;
+ size <= ppgtt->vm.total;
size <<= 2) {
- err = ppgtt->base.allocate_va_range(&ppgtt->base, 0, size);
+ err = ppgtt->vm.allocate_va_range(&ppgtt->vm, 0, size);
if (err) {
if (err == -ENOMEM) {
pr_info("[1] Ran out of memory for va_range [0 + %llx] [bit %d]\n",
@@ -168,15 +168,15 @@ static int igt_ppgtt_alloc(void *arg)
goto err_ppgtt_cleanup;
}
- ppgtt->base.clear_range(&ppgtt->base, 0, size);
+ ppgtt->vm.clear_range(&ppgtt->vm, 0, size);
}
/* Check we can incrementally allocate the entire range */
for (last = 0, size = 4096;
- size <= ppgtt->base.total;
+ size <= ppgtt->vm.total;
last = size, size <<= 2) {
- err = ppgtt->base.allocate_va_range(&ppgtt->base,
- last, size - last);
+ err = ppgtt->vm.allocate_va_range(&ppgtt->vm,
+ last, size - last);
if (err) {
if (err == -ENOMEM) {
pr_info("[2] Ran out of memory for va_range [%llx + %llx] [bit %d]\n",
@@ -188,7 +188,7 @@ static int igt_ppgtt_alloc(void *arg)
}
err_ppgtt_cleanup:
- ppgtt->base.cleanup(&ppgtt->base);
+ ppgtt->vm.cleanup(&ppgtt->vm);
err_ppgtt:
mutex_unlock(&dev_priv->drm.struct_mutex);
kfree(ppgtt);
@@ -987,12 +987,12 @@ static int exercise_ppgtt(struct drm_i915_private *dev_priv,
err = PTR_ERR(ppgtt);
goto out_unlock;
}
- GEM_BUG_ON(offset_in_page(ppgtt->base.total));
- GEM_BUG_ON(ppgtt->base.closed);
+ GEM_BUG_ON(offset_in_page(ppgtt->vm.total));
+ GEM_BUG_ON(ppgtt->vm.closed);
- err = func(dev_priv, &ppgtt->base, 0, ppgtt->base.total, end_time);
+ err = func(dev_priv, &ppgtt->vm, 0, ppgtt->vm.total, end_time);
- i915_ppgtt_close(&ppgtt->base);
+ i915_ppgtt_close(&ppgtt->vm);
i915_ppgtt_put(ppgtt);
out_unlock:
mutex_unlock(&dev_priv->drm.struct_mutex);
@@ -1061,18 +1061,18 @@ static int exercise_ggtt(struct drm_i915_private *i915,
mutex_lock(&i915->drm.struct_mutex);
restart:
- list_sort(NULL, &ggtt->base.mm.hole_stack, sort_holes);
- drm_mm_for_each_hole(node, &ggtt->base.mm, hole_start, hole_end) {
+ list_sort(NULL, &ggtt->vm.mm.hole_stack, sort_holes);
+ drm_mm_for_each_hole(node, &ggtt->vm.mm, hole_start, hole_end) {
if (hole_start < last)
continue;
- if (ggtt->base.mm.color_adjust)
- ggtt->base.mm.color_adjust(node, 0,
- &hole_start, &hole_end);
+ if (ggtt->vm.mm.color_adjust)
+ ggtt->vm.mm.color_adjust(node, 0,
+ &hole_start, &hole_end);
if (hole_start >= hole_end)
continue;
- err = func(i915, &ggtt->base, hole_start, hole_end, end_time);
+ err = func(i915, &ggtt->vm, hole_start, hole_end, end_time);
if (err)
break;
@@ -1134,7 +1134,7 @@ static int igt_ggtt_page(void *arg)
goto out_free;
memset(&tmp, 0, sizeof(tmp));
- err = drm_mm_insert_node_in_range(&ggtt->base.mm, &tmp,
+ err = drm_mm_insert_node_in_range(&ggtt->vm.mm, &tmp,
count * PAGE_SIZE, 0,
I915_COLOR_UNEVICTABLE,
0, ggtt->mappable_end,
@@ -1147,9 +1147,9 @@ static int igt_ggtt_page(void *arg)
for (n = 0; n < count; n++) {
u64 offset = tmp.start + n * PAGE_SIZE;
- ggtt->base.insert_page(&ggtt->base,
- i915_gem_object_get_dma_address(obj, 0),
- offset, I915_CACHE_NONE, 0);
+ ggtt->vm.insert_page(&ggtt->vm,
+ i915_gem_object_get_dma_address(obj, 0),
+ offset, I915_CACHE_NONE, 0);
}
order = i915_random_order(count, &prng);
@@ -1188,7 +1188,7 @@ static int igt_ggtt_page(void *arg)
kfree(order);
out_remove:
- ggtt->base.clear_range(&ggtt->base, tmp.start, tmp.size);
+ ggtt->vm.clear_range(&ggtt->vm, tmp.start, tmp.size);
intel_runtime_pm_put(i915);
drm_mm_remove_node(&tmp);
out_unpin:
@@ -1229,7 +1229,7 @@ static int exercise_mock(struct drm_i915_private *i915,
ppgtt = ctx->ppgtt;
GEM_BUG_ON(!ppgtt);
- err = func(i915, &ppgtt->base, 0, ppgtt->base.total, end_time);
+ err = func(i915, &ppgtt->vm, 0, ppgtt->vm.total, end_time);
mock_context_close(ctx);
return err;
@@ -1270,7 +1270,7 @@ static int igt_gtt_reserve(void *arg)
/* Start by filling the GGTT */
for (total = 0;
- total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.base.total;
+ total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
total += 2*I915_GTT_PAGE_SIZE) {
struct i915_vma *vma;
@@ -1288,20 +1288,20 @@ static int igt_gtt_reserve(void *arg)
list_add(&obj->st_link, &objects);
- vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto out;
}
- err = i915_gem_gtt_reserve(&i915->ggtt.base, &vma->node,
+ err = i915_gem_gtt_reserve(&i915->ggtt.vm, &vma->node,
obj->base.size,
total,
obj->cache_level,
0);
if (err) {
pr_err("i915_gem_gtt_reserve (pass 1) failed at %llu/%llu with err=%d\n",
- total, i915->ggtt.base.total, err);
+ total, i915->ggtt.vm.total, err);
goto out;
}
track_vma_bind(vma);
@@ -1319,7 +1319,7 @@ static int igt_gtt_reserve(void *arg)
/* Now we start forcing evictions */
for (total = I915_GTT_PAGE_SIZE;
- total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.base.total;
+ total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
total += 2*I915_GTT_PAGE_SIZE) {
struct i915_vma *vma;
@@ -1337,20 +1337,20 @@ static int igt_gtt_reserve(void *arg)
list_add(&obj->st_link, &objects);
- vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto out;
}
- err = i915_gem_gtt_reserve(&i915->ggtt.base, &vma->node,
+ err = i915_gem_gtt_reserve(&i915->ggtt.vm, &vma->node,
obj->base.size,
total,
obj->cache_level,
0);
if (err) {
pr_err("i915_gem_gtt_reserve (pass 2) failed at %llu/%llu with err=%d\n",
- total, i915->ggtt.base.total, err);
+ total, i915->ggtt.vm.total, err);
goto out;
}
track_vma_bind(vma);
@@ -1371,7 +1371,7 @@ static int igt_gtt_reserve(void *arg)
struct i915_vma *vma;
u64 offset;
- vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto out;
@@ -1383,18 +1383,18 @@ static int igt_gtt_reserve(void *arg)
goto out;
}
- offset = random_offset(0, i915->ggtt.base.total,
+ offset = random_offset(0, i915->ggtt.vm.total,
2*I915_GTT_PAGE_SIZE,
I915_GTT_MIN_ALIGNMENT);
- err = i915_gem_gtt_reserve(&i915->ggtt.base, &vma->node,
+ err = i915_gem_gtt_reserve(&i915->ggtt.vm, &vma->node,
obj->base.size,
offset,
obj->cache_level,
0);
if (err) {
pr_err("i915_gem_gtt_reserve (pass 3) failed at %llu/%llu with err=%d\n",
- total, i915->ggtt.base.total, err);
+ total, i915->ggtt.vm.total, err);
goto out;
}
track_vma_bind(vma);
@@ -1429,8 +1429,8 @@ static int igt_gtt_insert(void *arg)
u64 start, end;
} invalid_insert[] = {
{
- i915->ggtt.base.total + I915_GTT_PAGE_SIZE, 0,
- 0, i915->ggtt.base.total,
+ i915->ggtt.vm.total + I915_GTT_PAGE_SIZE, 0,
+ 0, i915->ggtt.vm.total,
},
{
2*I915_GTT_PAGE_SIZE, 0,
@@ -1460,7 +1460,7 @@ static int igt_gtt_insert(void *arg)
/* Check a couple of obviously invalid requests */
for (ii = invalid_insert; ii->size; ii++) {
- err = i915_gem_gtt_insert(&i915->ggtt.base, &tmp,
+ err = i915_gem_gtt_insert(&i915->ggtt.vm, &tmp,
ii->size, ii->alignment,
I915_COLOR_UNEVICTABLE,
ii->start, ii->end,
@@ -1475,7 +1475,7 @@ static int igt_gtt_insert(void *arg)
/* Start by filling the GGTT */
for (total = 0;
- total + I915_GTT_PAGE_SIZE <= i915->ggtt.base.total;
+ total + I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
total += I915_GTT_PAGE_SIZE) {
struct i915_vma *vma;
@@ -1493,15 +1493,15 @@ static int igt_gtt_insert(void *arg)
list_add(&obj->st_link, &objects);
- vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto out;
}
- err = i915_gem_gtt_insert(&i915->ggtt.base, &vma->node,
+ err = i915_gem_gtt_insert(&i915->ggtt.vm, &vma->node,
obj->base.size, 0, obj->cache_level,
- 0, i915->ggtt.base.total,
+ 0, i915->ggtt.vm.total,
0);
if (err == -ENOSPC) {
/* maxed out the GGTT space */
@@ -1510,7 +1510,7 @@ static int igt_gtt_insert(void *arg)
}
if (err) {
pr_err("i915_gem_gtt_insert (pass 1) failed at %llu/%llu with err=%d\n",
- total, i915->ggtt.base.total, err);
+ total, i915->ggtt.vm.total, err);
goto out;
}
track_vma_bind(vma);
@@ -1522,7 +1522,7 @@ static int igt_gtt_insert(void *arg)
list_for_each_entry(obj, &objects, st_link) {
struct i915_vma *vma;
- vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto out;
@@ -1542,7 +1542,7 @@ static int igt_gtt_insert(void *arg)
struct i915_vma *vma;
u64 offset;
- vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto out;
@@ -1557,13 +1557,13 @@ static int igt_gtt_insert(void *arg)
goto out;
}
- err = i915_gem_gtt_insert(&i915->ggtt.base, &vma->node,
+ err = i915_gem_gtt_insert(&i915->ggtt.vm, &vma->node,
obj->base.size, 0, obj->cache_level,
- 0, i915->ggtt.base.total,
+ 0, i915->ggtt.vm.total,
0);
if (err) {
pr_err("i915_gem_gtt_insert (pass 2) failed at %llu/%llu with err=%d\n",
- total, i915->ggtt.base.total, err);
+ total, i915->ggtt.vm.total, err);
goto out;
}
track_vma_bind(vma);
@@ -1579,7 +1579,7 @@ static int igt_gtt_insert(void *arg)
/* And then force evictions */
for (total = 0;
- total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.base.total;
+ total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
total += 2*I915_GTT_PAGE_SIZE) {
struct i915_vma *vma;
@@ -1597,19 +1597,19 @@ static int igt_gtt_insert(void *arg)
list_add(&obj->st_link, &objects);
- vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto out;
}
- err = i915_gem_gtt_insert(&i915->ggtt.base, &vma->node,
+ err = i915_gem_gtt_insert(&i915->ggtt.vm, &vma->node,
obj->base.size, 0, obj->cache_level,
- 0, i915->ggtt.base.total,
+ 0, i915->ggtt.vm.total,
0);
if (err) {
pr_err("i915_gem_gtt_insert (pass 3) failed at %llu/%llu with err=%d\n",
- total, i915->ggtt.base.total, err);
+ total, i915->ggtt.vm.total, err);
goto out;
}
track_vma_bind(vma);
@@ -1669,7 +1669,7 @@ int i915_gem_gtt_live_selftests(struct drm_i915_private *i915)
SUBTEST(igt_ggtt_page),
};
- GEM_BUG_ON(offset_in_page(i915->ggtt.base.total));
+ GEM_BUG_ON(offset_in_page(i915->ggtt.vm.total));
return i915_subtests(tests, i915);
}
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
index fbdb2419d418..2b2dde94526f 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
@@ -113,7 +113,7 @@ static int igt_gem_huge(void *arg)
obj = huge_gem_object(i915,
nreal * PAGE_SIZE,
- i915->ggtt.base.total + PAGE_SIZE);
+ i915->ggtt.vm.total + PAGE_SIZE);
if (IS_ERR(obj))
return PTR_ERR(obj);
@@ -311,7 +311,7 @@ static int igt_partial_tiling(void *arg)
obj = huge_gem_object(i915,
nreal << PAGE_SHIFT,
- (1 + next_prime_number(i915->ggtt.base.total >> PAGE_SHIFT)) << PAGE_SHIFT);
+ (1 + next_prime_number(i915->ggtt.vm.total >> PAGE_SHIFT)) << PAGE_SHIFT);
if (IS_ERR(obj))
return PTR_ERR(obj);
@@ -440,7 +440,7 @@ static int make_obj_busy(struct drm_i915_gem_object *obj)
struct i915_vma *vma;
int err;
- vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
if (IS_ERR(vma))
return PTR_ERR(vma);
diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
index 94bc2e1898a4..a3a89aadeccb 100644
--- a/drivers/gpu/drm/i915/selftests/i915_request.c
+++ b/drivers/gpu/drm/i915/selftests/i915_request.c
@@ -430,7 +430,7 @@ static struct i915_vma *empty_batch(struct drm_i915_private *i915)
if (err)
goto err;
- vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
+ vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto err;
@@ -555,7 +555,8 @@ static int live_empty_request(void *arg)
static struct i915_vma *recursive_batch(struct drm_i915_private *i915)
{
struct i915_gem_context *ctx = i915->kernel_context;
- struct i915_address_space *vm = ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
+ struct i915_address_space *vm =
+ ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
struct drm_i915_gem_object *obj;
const int gen = INTEL_GEN(i915);
struct i915_vma *vma;
diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
index e90f97236e50..8400a8cc5cf2 100644
--- a/drivers/gpu/drm/i915/selftests/i915_vma.c
+++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
@@ -35,7 +35,7 @@ static bool assert_vma(struct i915_vma *vma,
{
bool ok = true;
- if (vma->vm != &ctx->ppgtt->base) {
+ if (vma->vm != &ctx->ppgtt->vm) {
pr_err("VMA created with wrong VM\n");
ok = false;
}
@@ -110,8 +110,7 @@ static int create_vmas(struct drm_i915_private *i915,
list_for_each_entry(obj, objects, st_link) {
for (pinned = 0; pinned <= 1; pinned++) {
list_for_each_entry(ctx, contexts, link) {
- struct i915_address_space *vm =
- &ctx->ppgtt->base;
+ struct i915_address_space *vm = &ctx->ppgtt->vm;
struct i915_vma *vma;
int err;
@@ -259,12 +258,12 @@ static int igt_vma_pin1(void *arg)
VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | 8192),
VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
- VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.base.total - 4096)),
+ VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.vm.total - 4096)),
VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (i915->ggtt.mappable_end - 4096)),
INVALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | i915->ggtt.mappable_end),
- VALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | (i915->ggtt.base.total - 4096)),
- INVALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | i915->ggtt.base.total),
+ VALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | (i915->ggtt.vm.total - 4096)),
+ INVALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | i915->ggtt.vm.total),
INVALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | round_down(U64_MAX, PAGE_SIZE)),
VALID(4096, PIN_GLOBAL),
@@ -272,12 +271,12 @@ static int igt_vma_pin1(void *arg)
VALID(i915->ggtt.mappable_end - 4096, PIN_GLOBAL | PIN_MAPPABLE),
VALID(i915->ggtt.mappable_end, PIN_GLOBAL | PIN_MAPPABLE),
NOSPACE(i915->ggtt.mappable_end + 4096, PIN_GLOBAL | PIN_MAPPABLE),
- VALID(i915->ggtt.base.total - 4096, PIN_GLOBAL),
- VALID(i915->ggtt.base.total, PIN_GLOBAL),
- NOSPACE(i915->ggtt.base.total + 4096, PIN_GLOBAL),
+ VALID(i915->ggtt.vm.total - 4096, PIN_GLOBAL),
+ VALID(i915->ggtt.vm.total, PIN_GLOBAL),
+ NOSPACE(i915->ggtt.vm.total + 4096, PIN_GLOBAL),
NOSPACE(round_down(U64_MAX, PAGE_SIZE), PIN_GLOBAL),
INVALID(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (i915->ggtt.mappable_end - 4096)),
- INVALID(8192, PIN_GLOBAL | PIN_OFFSET_FIXED | (i915->ggtt.base.total - 4096)),
+ INVALID(8192, PIN_GLOBAL | PIN_OFFSET_FIXED | (i915->ggtt.vm.total - 4096)),
INVALID(8192, PIN_GLOBAL | PIN_OFFSET_FIXED | (round_down(U64_MAX, PAGE_SIZE) - 4096)),
VALID(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
@@ -289,9 +288,9 @@ static int igt_vma_pin1(void *arg)
* variable start, end and size.
*/
NOSPACE(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | i915->ggtt.mappable_end),
- NOSPACE(0, PIN_GLOBAL | PIN_OFFSET_BIAS | i915->ggtt.base.total),
+ NOSPACE(0, PIN_GLOBAL | PIN_OFFSET_BIAS | i915->ggtt.vm.total),
NOSPACE(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
- NOSPACE(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.base.total - 4096)),
+ NOSPACE(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.vm.total - 4096)),
#endif
{ },
#undef NOSPACE
@@ -307,13 +306,13 @@ static int igt_vma_pin1(void *arg)
* focusing on error handling of boundary conditions.
*/
- GEM_BUG_ON(!drm_mm_clean(&i915->ggtt.base.mm));
+ GEM_BUG_ON(!drm_mm_clean(&i915->ggtt.vm.mm));
obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
if (IS_ERR(obj))
return PTR_ERR(obj);
- vma = checked_vma_instance(obj, &i915->ggtt.base, NULL);
+ vma = checked_vma_instance(obj, &i915->ggtt.vm, NULL);
if (IS_ERR(vma))
goto out;
@@ -405,7 +404,7 @@ static unsigned int rotated_size(const struct intel_rotation_plane_info *a,
static int igt_vma_rotate(void *arg)
{
struct drm_i915_private *i915 = arg;
- struct i915_address_space *vm = &i915->ggtt.base;
+ struct i915_address_space *vm = &i915->ggtt.vm;
struct drm_i915_gem_object *obj;
const struct intel_rotation_plane_info planes[] = {
{ .width = 1, .height = 1, .stride = 1 },
@@ -604,7 +603,7 @@ static bool assert_pin(struct i915_vma *vma,
static int igt_vma_partial(void *arg)
{
struct drm_i915_private *i915 = arg;
- struct i915_address_space *vm = &i915->ggtt.base;
+ struct i915_address_space *vm = &i915->ggtt.vm;
const unsigned int npages = 1021; /* prime! */
struct drm_i915_gem_object *obj;
const struct phase {
diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
index 2091e3a6a5be..390a157b37c3 100644
--- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
+++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
@@ -107,8 +107,8 @@ static int emit_recurse_batch(struct hang *h,
struct drm_i915_private *i915 = h->i915;
struct i915_address_space *vm =
rq->gem_context->ppgtt ?
- &rq->gem_context->ppgtt->base :
- &i915->ggtt.base;
+ &rq->gem_context->ppgtt->vm :
+ &i915->ggtt.vm;
struct i915_vma *hws, *vma;
unsigned int flags;
u32 *batch;
diff --git a/drivers/gpu/drm/i915/selftests/intel_lrc.c b/drivers/gpu/drm/i915/selftests/intel_lrc.c
index 68cb9126b3e1..0b6da08c8cae 100644
--- a/drivers/gpu/drm/i915/selftests/intel_lrc.c
+++ b/drivers/gpu/drm/i915/selftests/intel_lrc.c
@@ -83,7 +83,7 @@ static int emit_recurse_batch(struct spinner *spin,
struct i915_request *rq,
u32 arbitration_command)
{
- struct i915_address_space *vm = &rq->gem_context->ppgtt->base;
+ struct i915_address_space *vm = &rq->gem_context->ppgtt->vm;
struct i915_vma *hws, *vma;
u32 *batch;
int err;
diff --git a/drivers/gpu/drm/i915/selftests/intel_workarounds.c b/drivers/gpu/drm/i915/selftests/intel_workarounds.c
index 17444a3abbb9..f1cfb0fb6bea 100644
--- a/drivers/gpu/drm/i915/selftests/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/selftests/intel_workarounds.c
@@ -33,7 +33,7 @@ read_nonprivs(struct i915_gem_context *ctx, struct intel_engine_cs *engine)
memset(cs, 0xc5, PAGE_SIZE);
i915_gem_object_unpin_map(result);
- vma = i915_vma_instance(result, &engine->i915->ggtt.base, NULL);
+ vma = i915_vma_instance(result, &engine->i915->ggtt.vm, NULL);
if (IS_ERR(vma)) {
err = PTR_ERR(vma);
goto err_obj;
diff --git a/drivers/gpu/drm/i915/selftests/mock_gtt.c b/drivers/gpu/drm/i915/selftests/mock_gtt.c
index 36c112088940..556c546f2715 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gtt.c
@@ -66,25 +66,25 @@ mock_ppgtt(struct drm_i915_private *i915,
return NULL;
kref_init(&ppgtt->ref);
- ppgtt->base.i915 = i915;
- ppgtt->base.total = round_down(U64_MAX, PAGE_SIZE);
- ppgtt->base.file = ERR_PTR(-ENODEV);
-
- INIT_LIST_HEAD(&ppgtt->base.active_list);
- INIT_LIST_HEAD(&ppgtt->base.inactive_list);
- INIT_LIST_HEAD(&ppgtt->base.unbound_list);
-
- INIT_LIST_HEAD(&ppgtt->base.global_link);
- drm_mm_init(&ppgtt->base.mm, 0, ppgtt->base.total);
-
- ppgtt->base.clear_range = nop_clear_range;
- ppgtt->base.insert_page = mock_insert_page;
- ppgtt->base.insert_entries = mock_insert_entries;
- ppgtt->base.bind_vma = mock_bind_ppgtt;
- ppgtt->base.unbind_vma = mock_unbind_ppgtt;
- ppgtt->base.set_pages = ppgtt_set_pages;
- ppgtt->base.clear_pages = clear_pages;
- ppgtt->base.cleanup = mock_cleanup;
+ ppgtt->vm.i915 = i915;
+ ppgtt->vm.total = round_down(U64_MAX, PAGE_SIZE);
+ ppgtt->vm.file = ERR_PTR(-ENODEV);
+
+ INIT_LIST_HEAD(&ppgtt->vm.active_list);
+ INIT_LIST_HEAD(&ppgtt->vm.inactive_list);
+ INIT_LIST_HEAD(&ppgtt->vm.unbound_list);
+
+ INIT_LIST_HEAD(&ppgtt->vm.global_link);
+ drm_mm_init(&ppgtt->vm.mm, 0, ppgtt->vm.total);
+
+ ppgtt->vm.clear_range = nop_clear_range;
+ ppgtt->vm.insert_page = mock_insert_page;
+ ppgtt->vm.insert_entries = mock_insert_entries;
+ ppgtt->vm.bind_vma = mock_bind_ppgtt;
+ ppgtt->vm.unbind_vma = mock_unbind_ppgtt;
+ ppgtt->vm.set_pages = ppgtt_set_pages;
+ ppgtt->vm.clear_pages = clear_pages;
+ ppgtt->vm.cleanup = mock_cleanup;
return ppgtt;
}
@@ -107,27 +107,27 @@ void mock_init_ggtt(struct drm_i915_private *i915)
INIT_LIST_HEAD(&i915->vm_list);
- ggtt->base.i915 = i915;
+ ggtt->vm.i915 = i915;
ggtt->gmadr = (struct resource) DEFINE_RES_MEM(0, 2048 * PAGE_SIZE);
ggtt->mappable_end = resource_size(&ggtt->gmadr);
- ggtt->base.total = 4096 * PAGE_SIZE;
-
- ggtt->base.clear_range = nop_clear_range;
- ggtt->base.insert_page = mock_insert_page;
- ggtt->base.insert_entries = mock_insert_entries;
- ggtt->base.bind_vma = mock_bind_ggtt;
- ggtt->base.unbind_vma = mock_unbind_ggtt;
- ggtt->base.set_pages = ggtt_set_pages;
- ggtt->base.clear_pages = clear_pages;
- ggtt->base.cleanup = mock_cleanup;
-
- i915_address_space_init(&ggtt->base, i915, "global");
+ ggtt->vm.total = 4096 * PAGE_SIZE;
+
+ ggtt->vm.clear_range = nop_clear_range;
+ ggtt->vm.insert_page = mock_insert_page;
+ ggtt->vm.insert_entries = mock_insert_entries;
+ ggtt->vm.bind_vma = mock_bind_ggtt;
+ ggtt->vm.unbind_vma = mock_unbind_ggtt;
+ ggtt->vm.set_pages = ggtt_set_pages;
+ ggtt->vm.clear_pages = clear_pages;
+ ggtt->vm.cleanup = mock_cleanup;
+
+ i915_address_space_init(&ggtt->vm, i915, "global");
}
void mock_fini_ggtt(struct drm_i915_private *i915)
{
struct i915_ggtt *ggtt = &i915->ggtt;
- i915_address_space_fini(&ggtt->base);
+ i915_address_space_fini(&ggtt->vm);
}
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 02/11] drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the object list
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
2018-06-05 7:19 ` [PATCH 01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member Chris Wilson
@ 2018-06-05 7:19 ` Chris Wilson
2018-06-05 7:51 ` Joonas Lahtinen
2018-06-05 7:19 ` [PATCH 03/11] drm/i915: Prepare for non-object vma Chris Wilson
` (11 subsequent siblings)
13 siblings, 1 reply; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 7:19 UTC (permalink / raw)
To: intel-gfx
In preparation, for having non-vma objects stored inside the ggtt, to
handle restoration of the GGTT following resume, we need to walk over
the ggtt address space rebinding vma, as opposed to walking over bound
objects looking for ggtt entries.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 22 ++++++++--------------
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 12b1386e47e9..4fb5c79ac24b 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3568,7 +3568,7 @@ void i915_ggtt_disable_guc(struct drm_i915_private *i915)
void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
{
struct i915_ggtt *ggtt = &dev_priv->ggtt;
- struct drm_i915_gem_object *obj, *on;
+ struct i915_vma *vma, *vn;
i915_check_and_clear_faults(dev_priv);
@@ -3578,21 +3578,15 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
ggtt->vm.closed = true; /* skip rewriting PTE on VMA unbind */
/* clflush objects bound into the GGTT and rebind them. */
- list_for_each_entry_safe(obj, on, &dev_priv->mm.bound_list, mm.link) {
- bool ggtt_bound = false;
- struct i915_vma *vma;
-
- for_each_ggtt_vma(vma, obj) {
- if (!i915_vma_unbind(vma))
- continue;
+ GEM_BUG_ON(!list_empty(&ggtt->vm.active_list));
+ list_for_each_entry_safe(vma, vn, &ggtt->vm.inactive_list, vm_link) {
+ struct drm_i915_gem_object *obj = vma->obj;
- WARN_ON(i915_vma_bind(vma, obj->cache_level,
- PIN_UPDATE));
- ggtt_bound = true;
- }
+ if (!i915_vma_unbind(vma))
+ continue;
- if (ggtt_bound)
- WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
+ WARN_ON(i915_vma_bind(vma, obj->cache_level, PIN_UPDATE));
+ WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
}
ggtt->vm.closed = false;
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 03/11] drm/i915: Prepare for non-object vma
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
2018-06-05 7:19 ` [PATCH 01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member Chris Wilson
2018-06-05 7:19 ` [PATCH 02/11] drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the object list Chris Wilson
@ 2018-06-05 7:19 ` Chris Wilson
2018-06-05 9:21 ` Joonas Lahtinen
2018-06-05 7:19 ` [PATCH 04/11] drm/i915: Decouple vma vfuncs from vm Chris Wilson
` (10 subsequent siblings)
13 siblings, 1 reply; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 7:19 UTC (permalink / raw)
To: intel-gfx
In order to allow ourselves to use VMA to wrap other entities other than
GEM objects, we need to allow for the vma->obj backpointer to be NULL.
In most cases, we know we are operating on a GEM object and its vma, but
we need the core code (such as i915_vma_pin/insert/bind/unbind) to work
regardless of the innards.
The remaining eyesore here is vma->obj->cache_level and related (but
less of an issue) vma->obj->gt_ro. With a bit of care we should mirror
those on the vma itself.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 7 +-
drivers/gpu/drm/i915/i915_gpu_error.c | 7 +-
drivers/gpu/drm/i915/i915_vma.c | 96 ++++++++++++++++-----------
drivers/gpu/drm/i915/i915_vma.h | 2 +-
4 files changed, 67 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 4fb5c79ac24b..3f84122ec145 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -3585,8 +3585,11 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
if (!i915_vma_unbind(vma))
continue;
- WARN_ON(i915_vma_bind(vma, obj->cache_level, PIN_UPDATE));
- WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
+ WARN_ON(i915_vma_bind(vma,
+ obj ? obj->cache_level : 0,
+ PIN_UPDATE));
+ if (obj)
+ WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
}
ggtt->vm.closed = false;
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index cd09a1688192..df524c9cad40 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -1050,6 +1050,9 @@ static u32 capture_error_bo(struct drm_i915_error_buffer *err,
int i = 0;
list_for_each_entry(vma, head, vm_link) {
+ if (!vma->obj)
+ continue;
+
if (pinned_only && !i915_vma_is_pinned(vma))
continue;
@@ -1569,11 +1572,11 @@ static void capture_pinned_buffers(struct i915_gpu_state *error)
int count_inactive, count_active;
count_inactive = 0;
- list_for_each_entry(vma, &vm->active_list, vm_link)
+ list_for_each_entry(vma, &vm->inactive_list, vm_link)
count_inactive++;
count_active = 0;
- list_for_each_entry(vma, &vm->inactive_list, vm_link)
+ list_for_each_entry(vma, &vm->active_list, vm_link)
count_active++;
bo = NULL;
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index e8f07cdca063..5c032b12ba8d 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -345,7 +345,7 @@ void i915_vma_flush_writes(struct i915_vma *vma)
void i915_vma_unpin_iomap(struct i915_vma *vma)
{
- lockdep_assert_held(&vma->obj->base.dev->struct_mutex);
+ lockdep_assert_held(&vma->vm->i915->drm.struct_mutex);
GEM_BUG_ON(vma->iomap == NULL);
@@ -365,6 +365,7 @@ void i915_vma_unpin_and_release(struct i915_vma **p_vma)
return;
obj = vma->obj;
+ GEM_BUG_ON(!obj);
i915_vma_unpin(vma);
i915_vma_close(vma);
@@ -477,7 +478,7 @@ static int
i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
{
struct drm_i915_private *dev_priv = vma->vm->i915;
- struct drm_i915_gem_object *obj = vma->obj;
+ unsigned int cache_level;
u64 start, end;
int ret;
@@ -512,16 +513,21 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
* attempt to find space.
*/
if (size > end) {
- DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu [object=%zd] > %s aperture=%llu\n",
- size, obj->base.size,
- flags & PIN_MAPPABLE ? "mappable" : "total",
+ DRM_DEBUG("Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
+ size, flags & PIN_MAPPABLE ? "mappable" : "total",
end);
return -ENOSPC;
}
- ret = i915_gem_object_pin_pages(obj);
- if (ret)
- return ret;
+ if (vma->obj) {
+ ret = i915_gem_object_pin_pages(vma->obj);
+ if (ret)
+ return ret;
+
+ cache_level = vma->obj->cache_level;
+ } else {
+ cache_level = 0;
+ }
GEM_BUG_ON(vma->pages);
@@ -538,7 +544,7 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
}
ret = i915_gem_gtt_reserve(vma->vm, &vma->node,
- size, offset, obj->cache_level,
+ size, offset, cache_level,
flags);
if (ret)
goto err_clear;
@@ -577,7 +583,7 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
}
ret = i915_gem_gtt_insert(vma->vm, &vma->node,
- size, alignment, obj->cache_level,
+ size, alignment, cache_level,
start, end, flags);
if (ret)
goto err_clear;
@@ -586,23 +592,28 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
GEM_BUG_ON(vma->node.start + vma->node.size > end);
}
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
- GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, obj->cache_level));
+ GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, cache_level));
list_move_tail(&vma->vm_link, &vma->vm->inactive_list);
- spin_lock(&dev_priv->mm.obj_lock);
- list_move_tail(&obj->mm.link, &dev_priv->mm.bound_list);
- obj->bind_count++;
- spin_unlock(&dev_priv->mm.obj_lock);
+ if (vma->obj) {
+ struct drm_i915_gem_object *obj = vma->obj;
+
+ spin_lock(&dev_priv->mm.obj_lock);
+ list_move_tail(&obj->mm.link, &dev_priv->mm.bound_list);
+ obj->bind_count++;
+ spin_unlock(&dev_priv->mm.obj_lock);
- GEM_BUG_ON(atomic_read(&obj->mm.pages_pin_count) < obj->bind_count);
+ GEM_BUG_ON(atomic_read(&obj->mm.pages_pin_count) < obj->bind_count);
+ }
return 0;
err_clear:
vma->vm->clear_pages(vma);
err_unpin:
- i915_gem_object_unpin_pages(obj);
+ if (vma->obj)
+ i915_gem_object_unpin_pages(vma->obj);
return ret;
}
@@ -610,7 +621,6 @@ static void
i915_vma_remove(struct i915_vma *vma)
{
struct drm_i915_private *i915 = vma->vm->i915;
- struct drm_i915_gem_object *obj = vma->obj;
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
GEM_BUG_ON(vma->flags & (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND));
@@ -620,20 +630,26 @@ i915_vma_remove(struct i915_vma *vma)
drm_mm_remove_node(&vma->node);
list_move_tail(&vma->vm_link, &vma->vm->unbound_list);
- /* Since the unbound list is global, only move to that list if
+ /*
+ * Since the unbound list is global, only move to that list if
* no more VMAs exist.
*/
- spin_lock(&i915->mm.obj_lock);
- if (--obj->bind_count == 0)
- list_move_tail(&obj->mm.link, &i915->mm.unbound_list);
- spin_unlock(&i915->mm.obj_lock);
-
- /* And finally now the object is completely decoupled from this vma,
- * we can drop its hold on the backing storage and allow it to be
- * reaped by the shrinker.
- */
- i915_gem_object_unpin_pages(obj);
- GEM_BUG_ON(atomic_read(&obj->mm.pages_pin_count) < obj->bind_count);
+ if (vma->obj) {
+ struct drm_i915_gem_object *obj = vma->obj;
+
+ spin_lock(&i915->mm.obj_lock);
+ if (--obj->bind_count == 0)
+ list_move_tail(&obj->mm.link, &i915->mm.unbound_list);
+ spin_unlock(&i915->mm.obj_lock);
+
+ /*
+ * And finally now the object is completely decoupled from this
+ * vma, we can drop its hold on the backing storage and allow
+ * it to be reaped by the shrinker.
+ */
+ i915_gem_object_unpin_pages(obj);
+ GEM_BUG_ON(atomic_read(&obj->mm.pages_pin_count) < obj->bind_count);
+ }
}
int __i915_vma_do_pin(struct i915_vma *vma,
@@ -658,7 +674,7 @@ int __i915_vma_do_pin(struct i915_vma *vma,
}
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
- ret = i915_vma_bind(vma, vma->obj->cache_level, flags);
+ ret = i915_vma_bind(vma, vma->obj ? vma->obj->cache_level : 0, flags);
if (ret)
goto err_remove;
@@ -715,6 +731,7 @@ void i915_vma_reopen(struct i915_vma *vma)
static void __i915_vma_destroy(struct i915_vma *vma)
{
+ struct drm_i915_private *i915 = vma->vm->i915;
int i;
GEM_BUG_ON(vma->node.allocated);
@@ -726,12 +743,13 @@ static void __i915_vma_destroy(struct i915_vma *vma)
list_del(&vma->obj_link);
list_del(&vma->vm_link);
- rb_erase(&vma->obj_node, &vma->obj->vma_tree);
+ if (vma->obj)
+ rb_erase(&vma->obj_node, &vma->obj->vma_tree);
if (!i915_vma_is_ggtt(vma))
i915_ppgtt_put(i915_vm_to_ppgtt(vma->vm));
- kmem_cache_free(to_i915(vma->obj->base.dev)->vmas, vma);
+ kmem_cache_free(i915->vmas, vma);
}
void i915_vma_destroy(struct i915_vma *vma)
@@ -797,13 +815,13 @@ void i915_vma_revoke_mmap(struct i915_vma *vma)
int i915_vma_unbind(struct i915_vma *vma)
{
- struct drm_i915_gem_object *obj = vma->obj;
unsigned long active;
int ret;
- lockdep_assert_held(&obj->base.dev->struct_mutex);
+ lockdep_assert_held(&vma->vm->i915->drm.struct_mutex);
- /* First wait upon any activity as retiring the request may
+ /*
+ * First wait upon any activity as retiring the request may
* have side-effects such as unpinning or even unbinding this vma.
*/
might_sleep();
@@ -811,7 +829,8 @@ int i915_vma_unbind(struct i915_vma *vma)
if (active) {
int idx;
- /* When a closed VMA is retired, it is unbound - eek.
+ /*
+ * When a closed VMA is retired, it is unbound - eek.
* In order to prevent it from being recursively closed,
* take a pin on the vma so that the second unbind is
* aborted.
@@ -849,9 +868,6 @@ int i915_vma_unbind(struct i915_vma *vma)
if (!drm_mm_node_allocated(&vma->node))
return 0;
- GEM_BUG_ON(obj->bind_count == 0);
- GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj));
-
if (i915_vma_is_map_and_fenceable(vma)) {
/*
* Check that we have flushed all writes through the GGTT
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index fc4294cfaa91..f0532f1a4953 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -407,7 +407,7 @@ static inline void __i915_vma_unpin_fence(struct i915_vma *vma)
static inline void
i915_vma_unpin_fence(struct i915_vma *vma)
{
- lockdep_assert_held(&vma->obj->base.dev->struct_mutex);
+ /* lockdep_assert_held(&vma->vm->i915->drm.struct_mutex); */
if (vma->fence)
__i915_vma_unpin_fence(vma);
}
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 04/11] drm/i915: Decouple vma vfuncs from vm
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
` (2 preceding siblings ...)
2018-06-05 7:19 ` [PATCH 03/11] drm/i915: Prepare for non-object vma Chris Wilson
@ 2018-06-05 7:19 ` Chris Wilson
2018-06-05 9:05 ` Joonas Lahtinen
2018-06-05 7:19 ` [PATCH 05/11] drm/i915/gtt: Push allocation to hw ppgtt constructor Chris Wilson
` (9 subsequent siblings)
13 siblings, 1 reply; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 7:19 UTC (permalink / raw)
To: intel-gfx
To allow for future non-object backed vma, we need to be able to
specialise the callbacks for binding, et al, the vma. For example,
instead of calling vma->vm->bind_vma(), we now call
vma->ops->bind_vma(). This gives us the opportunity to later override the
operation for a custom vma.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 57 ++++++++++++-----------
drivers/gpu/drm/i915/i915_gem_gtt.h | 26 +++++++----
drivers/gpu/drm/i915/i915_vma.c | 11 +++--
drivers/gpu/drm/i915/i915_vma.h | 1 +
drivers/gpu/drm/i915/selftests/mock_gtt.c | 18 +++----
5 files changed, 65 insertions(+), 48 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 3f84122ec145..9efbd23b2469 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1616,12 +1616,13 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
gen8_ppgtt_notify_vgt(ppgtt, true);
ppgtt->vm.cleanup = gen8_ppgtt_cleanup;
- ppgtt->vm.bind_vma = gen8_ppgtt_bind_vma;
- ppgtt->vm.unbind_vma = ppgtt_unbind_vma;
- ppgtt->vm.set_pages = ppgtt_set_pages;
- ppgtt->vm.clear_pages = clear_pages;
ppgtt->debug_dump = gen8_dump_ppgtt;
+ ppgtt->vm.vma_ops.bind_vma = gen8_ppgtt_bind_vma;
+ ppgtt->vm.vma_ops.unbind_vma = ppgtt_unbind_vma;
+ ppgtt->vm.vma_ops.set_pages = ppgtt_set_pages;
+ ppgtt->vm.vma_ops.clear_pages = clear_pages;
+
return 0;
free_scratch:
@@ -2059,13 +2060,14 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
ppgtt->vm.clear_range = gen6_ppgtt_clear_range;
ppgtt->vm.insert_entries = gen6_ppgtt_insert_entries;
- ppgtt->vm.bind_vma = gen6_ppgtt_bind_vma;
- ppgtt->vm.unbind_vma = ppgtt_unbind_vma;
- ppgtt->vm.set_pages = ppgtt_set_pages;
- ppgtt->vm.clear_pages = clear_pages;
ppgtt->vm.cleanup = gen6_ppgtt_cleanup;
ppgtt->debug_dump = gen6_dump_ppgtt;
+ ppgtt->vm.vma_ops.bind_vma = gen6_ppgtt_bind_vma;
+ ppgtt->vm.vma_ops.unbind_vma = ppgtt_unbind_vma;
+ ppgtt->vm.vma_ops.set_pages = ppgtt_set_pages;
+ ppgtt->vm.vma_ops.clear_pages = clear_pages;
+
DRM_DEBUG_DRIVER("Allocated pde space (%lldM) at GTT entry: %llx\n",
ppgtt->node.size >> 20,
ppgtt->node.start / PAGE_SIZE);
@@ -2793,11 +2795,11 @@ int i915_gem_init_aliasing_ppgtt(struct drm_i915_private *i915)
i915->mm.aliasing_ppgtt = ppgtt;
- GEM_BUG_ON(ggtt->vm.bind_vma != ggtt_bind_vma);
- ggtt->vm.bind_vma = aliasing_gtt_bind_vma;
+ GEM_BUG_ON(ggtt->vm.vma_ops.bind_vma != ggtt_bind_vma);
+ ggtt->vm.vma_ops.bind_vma = aliasing_gtt_bind_vma;
- GEM_BUG_ON(ggtt->vm.unbind_vma != ggtt_unbind_vma);
- ggtt->vm.unbind_vma = aliasing_gtt_unbind_vma;
+ GEM_BUG_ON(ggtt->vm.vma_ops.unbind_vma != ggtt_unbind_vma);
+ ggtt->vm.vma_ops.unbind_vma = aliasing_gtt_unbind_vma;
return 0;
@@ -2817,8 +2819,8 @@ void i915_gem_fini_aliasing_ppgtt(struct drm_i915_private *i915)
i915_ppgtt_put(ppgtt);
- ggtt->vm.bind_vma = ggtt_bind_vma;
- ggtt->vm.unbind_vma = ggtt_unbind_vma;
+ ggtt->vm.vma_ops.bind_vma = ggtt_bind_vma;
+ ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
}
int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
@@ -3310,10 +3312,6 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
ggtt->vm.total = (size / sizeof(gen8_pte_t)) << PAGE_SHIFT;
ggtt->vm.cleanup = gen6_gmch_remove;
- ggtt->vm.bind_vma = ggtt_bind_vma;
- ggtt->vm.unbind_vma = ggtt_unbind_vma;
- ggtt->vm.set_pages = ggtt_set_pages;
- ggtt->vm.clear_pages = clear_pages;
ggtt->vm.insert_page = gen8_ggtt_insert_page;
ggtt->vm.clear_range = nop_clear_range;
if (!USES_FULL_PPGTT(dev_priv) || intel_scanout_needs_vtd_wa(dev_priv))
@@ -3331,6 +3329,11 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
ggtt->invalidate = gen6_ggtt_invalidate;
+ ggtt->vm.vma_ops.bind_vma = ggtt_bind_vma;
+ ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
+ ggtt->vm.vma_ops.set_pages = ggtt_set_pages;
+ ggtt->vm.vma_ops.clear_pages = clear_pages;
+
setup_private_pat(dev_priv);
return ggtt_probe_common(ggtt, size);
@@ -3370,10 +3373,6 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
ggtt->vm.clear_range = gen6_ggtt_clear_range;
ggtt->vm.insert_page = gen6_ggtt_insert_page;
ggtt->vm.insert_entries = gen6_ggtt_insert_entries;
- ggtt->vm.bind_vma = ggtt_bind_vma;
- ggtt->vm.unbind_vma = ggtt_unbind_vma;
- ggtt->vm.set_pages = ggtt_set_pages;
- ggtt->vm.clear_pages = clear_pages;
ggtt->vm.cleanup = gen6_gmch_remove;
ggtt->invalidate = gen6_ggtt_invalidate;
@@ -3389,6 +3388,11 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
else
ggtt->vm.pte_encode = snb_pte_encode;
+ ggtt->vm.vma_ops.bind_vma = ggtt_bind_vma;
+ ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
+ ggtt->vm.vma_ops.set_pages = ggtt_set_pages;
+ ggtt->vm.vma_ops.clear_pages = clear_pages;
+
return ggtt_probe_common(ggtt, size);
}
@@ -3419,14 +3423,15 @@ static int i915_gmch_probe(struct i915_ggtt *ggtt)
ggtt->vm.insert_page = i915_ggtt_insert_page;
ggtt->vm.insert_entries = i915_ggtt_insert_entries;
ggtt->vm.clear_range = i915_ggtt_clear_range;
- ggtt->vm.bind_vma = ggtt_bind_vma;
- ggtt->vm.unbind_vma = ggtt_unbind_vma;
- ggtt->vm.set_pages = ggtt_set_pages;
- ggtt->vm.clear_pages = clear_pages;
ggtt->vm.cleanup = i915_gmch_remove;
ggtt->invalidate = gmch_ggtt_invalidate;
+ ggtt->vm.vma_ops.bind_vma = ggtt_bind_vma;
+ ggtt->vm.vma_ops.unbind_vma = ggtt_unbind_vma;
+ ggtt->vm.vma_ops.set_pages = ggtt_set_pages;
+ ggtt->vm.vma_ops.clear_pages = clear_pages;
+
if (unlikely(ggtt->do_idle_maps))
DRM_INFO("applying Ironlake quirks for intel_iommu\n");
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 197c2c06ecb7..fb296962de95 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -58,6 +58,7 @@
struct drm_i915_file_private;
struct drm_i915_fence_reg;
+struct i915_vma;
typedef u32 gen6_pte_t;
typedef u64 gen8_pte_t;
@@ -254,6 +255,20 @@ struct i915_pml4 {
struct i915_page_directory_pointer *pdps[GEN8_PML4ES_PER_PML4];
};
+struct i915_vma_ops {
+ /*
+ * Unmap an object from an address space. This usually consists of
+ * setting the valid PTE entries to a reserved scratch page.
+ */
+ void (*unbind_vma)(struct i915_vma *vma);
+ /* Map an object into an address space with the given cache flags. */
+ int (*bind_vma)(struct i915_vma *vma,
+ enum i915_cache_level cache_level,
+ u32 flags);
+ int (*set_pages)(struct i915_vma *vma);
+ void (*clear_pages)(struct i915_vma *vma);
+};
+
struct i915_address_space {
struct drm_mm mm;
struct drm_i915_private *i915;
@@ -331,15 +346,8 @@ struct i915_address_space {
enum i915_cache_level cache_level,
u32 flags);
void (*cleanup)(struct i915_address_space *vm);
- /** Unmap an object from an address space. This usually consists of
- * setting the valid PTE entries to a reserved scratch page. */
- void (*unbind_vma)(struct i915_vma *vma);
- /* Map an object into an address space with the given cache flags. */
- int (*bind_vma)(struct i915_vma *vma,
- enum i915_cache_level cache_level,
- u32 flags);
- int (*set_pages)(struct i915_vma *vma);
- void (*clear_pages)(struct i915_vma *vma);
+
+ struct i915_vma_ops vma_ops;
I915_SELFTEST_DECLARE(struct fault_attr fault_attr);
I915_SELFTEST_DECLARE(bool scrub_64K);
diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 5c032b12ba8d..6bb23f3961b0 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -95,6 +95,7 @@ vma_create(struct drm_i915_gem_object *obj,
init_request_active(&vma->last_read[i], i915_vma_retire);
init_request_active(&vma->last_fence, NULL);
vma->vm = vm;
+ vma->ops = &vm->vma_ops;
vma->obj = obj;
vma->resv = obj->resv;
vma->size = obj->base.size;
@@ -280,7 +281,7 @@ int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level,
GEM_BUG_ON(!vma->pages);
trace_i915_vma_bind(vma, bind_flags);
- ret = vma->vm->bind_vma(vma, cache_level, bind_flags);
+ ret = vma->ops->bind_vma(vma, cache_level, bind_flags);
if (ret)
return ret;
@@ -531,7 +532,7 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
GEM_BUG_ON(vma->pages);
- ret = vma->vm->set_pages(vma);
+ ret = vma->ops->set_pages(vma);
if (ret)
goto err_unpin;
@@ -610,7 +611,7 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
return 0;
err_clear:
- vma->vm->clear_pages(vma);
+ vma->ops->clear_pages(vma);
err_unpin:
if (vma->obj)
i915_gem_object_unpin_pages(vma->obj);
@@ -625,7 +626,7 @@ i915_vma_remove(struct i915_vma *vma)
GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
GEM_BUG_ON(vma->flags & (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND));
- vma->vm->clear_pages(vma);
+ vma->ops->clear_pages(vma);
drm_mm_remove_node(&vma->node);
list_move_tail(&vma->vm_link, &vma->vm->unbound_list);
@@ -894,7 +895,7 @@ int i915_vma_unbind(struct i915_vma *vma)
if (likely(!vma->vm->closed)) {
trace_i915_vma_unbind(vma);
- vma->vm->unbind_vma(vma);
+ vma->ops->unbind_vma(vma);
}
vma->flags &= ~(I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND);
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index f0532f1a4953..4321476a6a32 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -49,6 +49,7 @@ struct i915_vma {
struct drm_mm_node node;
struct drm_i915_gem_object *obj;
struct i915_address_space *vm;
+ const struct i915_vma_ops *ops;
struct drm_i915_fence_reg *fence;
struct reservation_object *resv; /** Alias of obj->resv */
struct sg_table *pages;
diff --git a/drivers/gpu/drm/i915/selftests/mock_gtt.c b/drivers/gpu/drm/i915/selftests/mock_gtt.c
index 556c546f2715..6a7f4da7b523 100644
--- a/drivers/gpu/drm/i915/selftests/mock_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/mock_gtt.c
@@ -80,12 +80,13 @@ mock_ppgtt(struct drm_i915_private *i915,
ppgtt->vm.clear_range = nop_clear_range;
ppgtt->vm.insert_page = mock_insert_page;
ppgtt->vm.insert_entries = mock_insert_entries;
- ppgtt->vm.bind_vma = mock_bind_ppgtt;
- ppgtt->vm.unbind_vma = mock_unbind_ppgtt;
- ppgtt->vm.set_pages = ppgtt_set_pages;
- ppgtt->vm.clear_pages = clear_pages;
ppgtt->vm.cleanup = mock_cleanup;
+ ppgtt->vm.vma_ops.bind_vma = mock_bind_ppgtt;
+ ppgtt->vm.vma_ops.unbind_vma = mock_unbind_ppgtt;
+ ppgtt->vm.vma_ops.set_pages = ppgtt_set_pages;
+ ppgtt->vm.vma_ops.clear_pages = clear_pages;
+
return ppgtt;
}
@@ -116,12 +117,13 @@ void mock_init_ggtt(struct drm_i915_private *i915)
ggtt->vm.clear_range = nop_clear_range;
ggtt->vm.insert_page = mock_insert_page;
ggtt->vm.insert_entries = mock_insert_entries;
- ggtt->vm.bind_vma = mock_bind_ggtt;
- ggtt->vm.unbind_vma = mock_unbind_ggtt;
- ggtt->vm.set_pages = ggtt_set_pages;
- ggtt->vm.clear_pages = clear_pages;
ggtt->vm.cleanup = mock_cleanup;
+ ggtt->vm.vma_ops.bind_vma = mock_bind_ggtt;
+ ggtt->vm.vma_ops.unbind_vma = mock_unbind_ggtt;
+ ggtt->vm.vma_ops.set_pages = ggtt_set_pages;
+ ggtt->vm.vma_ops.clear_pages = clear_pages;
+
i915_address_space_init(&ggtt->vm, i915, "global");
}
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 05/11] drm/i915/gtt: Push allocation to hw ppgtt constructor
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
` (3 preceding siblings ...)
2018-06-05 7:19 ` [PATCH 04/11] drm/i915: Decouple vma vfuncs from vm Chris Wilson
@ 2018-06-05 7:19 ` Chris Wilson
2018-06-05 9:32 ` Joonas Lahtinen
2018-06-05 7:19 ` [PATCH 06/11] drm/i915/gtt: Subclass gen6_hw_ppgtt Chris Wilson
` (8 subsequent siblings)
13 siblings, 1 reply; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 7:19 UTC (permalink / raw)
To: intel-gfx
In the next patch, we will subclass the gen6 hw_ppgtt. In order, for the
two different generations of hw ppgtt stucts to be of different size,
push the allocation down to the constructor.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 140 +++++++++---------
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 16 +-
2 files changed, 83 insertions(+), 73 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 9efbd23b2469..db43962397de 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1562,32 +1562,36 @@ static int gen8_preallocate_top_level_pdp(struct i915_hw_ppgtt *ppgtt)
* space.
*
*/
-static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
+static struct i915_hw_ppgtt *gen8_ppgtt_create(struct drm_i915_private *i915)
{
- struct i915_address_space *vm = &ppgtt->vm;
- struct drm_i915_private *dev_priv = vm->i915;
- int ret;
+ struct i915_hw_ppgtt *ppgtt;
+ int err;
+
+ ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
+ if (!ppgtt)
+ return ERR_PTR(-ENOMEM);
+
+ ppgtt->vm.i915 = i915;
+ ppgtt->vm.dma = &i915->drm.pdev->dev;
- ppgtt->vm.total = USES_FULL_48BIT_PPGTT(dev_priv) ?
+ ppgtt->vm.total = USES_FULL_48BIT_PPGTT(i915) ?
1ULL << 48 :
1ULL << 32;
/* There are only few exceptions for gen >=6. chv and bxt.
* And we are not sure about the latter so play safe for now.
*/
- if (IS_CHERRYVIEW(dev_priv) || IS_BROXTON(dev_priv))
+ if (IS_CHERRYVIEW(i915) || IS_BROXTON(i915))
ppgtt->vm.pt_kmap_wc = true;
- ret = gen8_init_scratch(&ppgtt->vm);
- if (ret) {
- ppgtt->vm.total = 0;
- return ret;
- }
+ err = gen8_init_scratch(&ppgtt->vm);
+ if (err)
+ goto err_free;
- if (use_4lvl(vm)) {
- ret = setup_px(&ppgtt->vm, &ppgtt->pml4);
- if (ret)
- goto free_scratch;
+ if (use_4lvl(&ppgtt->vm)) {
+ err = setup_px(&ppgtt->vm, &ppgtt->pml4);
+ if (err)
+ goto err_scratch;
gen8_initialize_pml4(&ppgtt->vm, &ppgtt->pml4);
@@ -1595,15 +1599,15 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
ppgtt->vm.insert_entries = gen8_ppgtt_insert_4lvl;
ppgtt->vm.clear_range = gen8_ppgtt_clear_4lvl;
} else {
- ret = __pdp_init(&ppgtt->vm, &ppgtt->pdp);
- if (ret)
- goto free_scratch;
+ err = __pdp_init(&ppgtt->vm, &ppgtt->pdp);
+ if (err)
+ goto err_scratch;
- if (intel_vgpu_active(dev_priv)) {
- ret = gen8_preallocate_top_level_pdp(ppgtt);
- if (ret) {
+ if (intel_vgpu_active(i915)) {
+ err = gen8_preallocate_top_level_pdp(ppgtt);
+ if (err) {
__pdp_fini(&ppgtt->pdp);
- goto free_scratch;
+ goto err_scratch;
}
}
@@ -1612,7 +1616,7 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
ppgtt->vm.clear_range = gen8_ppgtt_clear_3lvl;
}
- if (intel_vgpu_active(dev_priv))
+ if (intel_vgpu_active(i915))
gen8_ppgtt_notify_vgt(ppgtt, true);
ppgtt->vm.cleanup = gen8_ppgtt_cleanup;
@@ -1623,11 +1627,13 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
ppgtt->vm.vma_ops.set_pages = ppgtt_set_pages;
ppgtt->vm.vma_ops.clear_pages = clear_pages;
- return 0;
+ return ppgtt;
-free_scratch:
+err_scratch:
gen8_free_scratch(&ppgtt->vm);
- return ret;
+err_free:
+ kfree(ppgtt);
+ return ERR_PTR(err);
}
static void gen6_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
@@ -1638,8 +1644,7 @@ static void gen6_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
u32 pd_entry, pte, pde;
u32 start = 0, length = ppgtt->vm.total;
- scratch_pte = vm->pte_encode(vm->scratch_page.daddr,
- I915_CACHE_LLC, 0);
+ scratch_pte = vm->pte_encode(vm->scratch_page.daddr, I915_CACHE_LLC, 0);
gen6_for_each_pde(unused, &ppgtt->pd, start, length, pde) {
u32 expected;
@@ -2027,36 +2032,41 @@ static void gen6_scratch_va_range(struct i915_hw_ppgtt *ppgtt,
ppgtt->pd.page_table[pde] = ppgtt->vm.scratch_pt;
}
-static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
+static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
{
- struct drm_i915_private *dev_priv = ppgtt->vm.i915;
- struct i915_ggtt *ggtt = &dev_priv->ggtt;
- int ret;
+ struct i915_ggtt * const ggtt = &i915->ggtt;
+ struct i915_hw_ppgtt *ppgtt;
+ int err;
+
+ ppgtt = kmalloc(sizeof(*ppgtt), GFP_KERNEL);
+ if (!ppgtt)
+ return ERR_PTR(-ENOMEM);
+
+ ppgtt->vm.i915 = i915;
+ ppgtt->vm.dma = &i915->drm.pdev->dev;
ppgtt->vm.pte_encode = ggtt->vm.pte_encode;
- if (intel_vgpu_active(dev_priv) || IS_GEN6(dev_priv))
+ if (intel_vgpu_active(i915) || IS_GEN6(i915))
ppgtt->switch_mm = gen6_mm_switch;
- else if (IS_HASWELL(dev_priv))
+ else if (IS_HASWELL(i915))
ppgtt->switch_mm = hsw_mm_switch;
- else if (IS_GEN7(dev_priv))
+ else if (IS_GEN7(i915))
ppgtt->switch_mm = gen7_mm_switch;
else
BUG();
- ret = gen6_ppgtt_alloc(ppgtt);
- if (ret)
- return ret;
+ err = gen6_ppgtt_alloc(ppgtt);
+ if (err)
+ goto err_free;
ppgtt->vm.total = I915_PDES * GEN6_PTES * PAGE_SIZE;
gen6_scratch_va_range(ppgtt, 0, ppgtt->vm.total);
gen6_write_page_range(ppgtt, 0, ppgtt->vm.total);
- ret = gen6_alloc_va_range(&ppgtt->vm, 0, ppgtt->vm.total);
- if (ret) {
- gen6_ppgtt_cleanup(&ppgtt->vm);
- return ret;
- }
+ err = gen6_alloc_va_range(&ppgtt->vm, 0, ppgtt->vm.total);
+ if (err)
+ goto err_cleanup;
ppgtt->vm.clear_range = gen6_ppgtt_clear_range;
ppgtt->vm.insert_entries = gen6_ppgtt_insert_entries;
@@ -2075,19 +2085,13 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
DRM_DEBUG_DRIVER("Adding PPGTT at offset %x\n",
ppgtt->pd.base.ggtt_offset << 10);
- return 0;
-}
-
-static int __hw_ppgtt_init(struct i915_hw_ppgtt *ppgtt,
- struct drm_i915_private *dev_priv)
-{
- ppgtt->vm.i915 = dev_priv;
- ppgtt->vm.dma = &dev_priv->drm.pdev->dev;
+ return ppgtt;
- if (INTEL_GEN(dev_priv) < 8)
- return gen6_ppgtt_init(ppgtt);
- else
- return gen8_ppgtt_init(ppgtt);
+err_cleanup:
+ gen6_ppgtt_cleanup(&ppgtt->vm);
+err_free:
+ kfree(ppgtt);
+ return ERR_PTR(err);
}
static void i915_address_space_init(struct i915_address_space *vm,
@@ -2173,26 +2177,28 @@ int i915_ppgtt_init_hw(struct drm_i915_private *dev_priv)
return 0;
}
+static struct i915_hw_ppgtt *
+__hw_ppgtt_create(struct drm_i915_private *i915)
+{
+ if (INTEL_GEN(i915) < 8)
+ return gen6_ppgtt_create(i915);
+ else
+ return gen8_ppgtt_create(i915);
+}
+
struct i915_hw_ppgtt *
-i915_ppgtt_create(struct drm_i915_private *dev_priv,
+i915_ppgtt_create(struct drm_i915_private *i915,
struct drm_i915_file_private *fpriv,
const char *name)
{
struct i915_hw_ppgtt *ppgtt;
- int ret;
- ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
- if (!ppgtt)
- return ERR_PTR(-ENOMEM);
-
- ret = __hw_ppgtt_init(ppgtt, dev_priv);
- if (ret) {
- kfree(ppgtt);
- return ERR_PTR(ret);
- }
+ ppgtt = __hw_ppgtt_create(i915);
+ if (IS_ERR(ppgtt))
+ return ppgtt;
kref_init(&ppgtt->ref);
- i915_address_space_init(&ppgtt->vm, dev_priv, name);
+ i915_address_space_init(&ppgtt->vm, i915, name);
ppgtt->vm.file = fpriv;
trace_i915_ppgtt_create(&ppgtt->vm);
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index 58ab5e84ceb7..f80cf7ce3fa9 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -147,12 +147,16 @@ static int igt_ppgtt_alloc(void *arg)
return -ENOMEM;
mutex_lock(&dev_priv->drm.struct_mutex);
- err = __hw_ppgtt_init(ppgtt, dev_priv);
- if (err)
- goto err_ppgtt;
+ ppgtt = __hw_ppgtt_create(dev_priv);
+ if (IS_ERR(ppgtt)) {
+ err = PTR_ERR(ppgtt);
+ goto err_unlock;
+ }
- if (!ppgtt->vm.allocate_va_range)
+ if (!ppgtt->vm.allocate_va_range) {
+ err = 0;
goto err_ppgtt_cleanup;
+ }
/* Check we can allocate the entire range */
for (size = 4096;
@@ -189,9 +193,9 @@ static int igt_ppgtt_alloc(void *arg)
err_ppgtt_cleanup:
ppgtt->vm.cleanup(&ppgtt->vm);
-err_ppgtt:
- mutex_unlock(&dev_priv->drm.struct_mutex);
kfree(ppgtt);
+err_unlock:
+ mutex_unlock(&dev_priv->drm.struct_mutex);
return err;
}
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 06/11] drm/i915/gtt: Subclass gen6_hw_ppgtt
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
` (4 preceding siblings ...)
2018-06-05 7:19 ` [PATCH 05/11] drm/i915/gtt: Push allocation to hw ppgtt constructor Chris Wilson
@ 2018-06-05 7:19 ` Chris Wilson
2018-06-05 9:43 ` Joonas Lahtinen
2018-06-05 7:19 ` [PATCH 07/11] drm/i915/gtt Onionify error handling for gen6_ppgtt_create Chris Wilson
` (7 subsequent siblings)
13 siblings, 1 reply; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 7:19 UTC (permalink / raw)
To: intel-gfx
The legacy gen6 ppgtt needs a little more hand holding than gen8+, and
so requires a larger structure. As I intend to make this slightly more
complicated in the future, separate the gen6 from the core gen8 hw
struct by subclassing. This patch moves the gen6 only features out to
gen6_hw_ppgtt and pipes the new type everywhere that needs it.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 104 +++++++++---------
drivers/gpu/drm/i915/i915_gem_gtt.h | 21 +++-
drivers/gpu/drm/i915/intel_ringbuffer.c | 10 +-
drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 4 -
5 files changed, 75 insertions(+), 66 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index db43962397de..79547b81e28b 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1636,20 +1636,20 @@ static struct i915_hw_ppgtt *gen8_ppgtt_create(struct drm_i915_private *i915)
return ERR_PTR(err);
}
-static void gen6_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
+static void gen6_dump_ppgtt(struct i915_hw_ppgtt *base, struct seq_file *m)
{
- struct i915_address_space *vm = &ppgtt->vm;
+ struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
+ struct i915_address_space *vm = &base->vm;
struct i915_page_table *unused;
gen6_pte_t scratch_pte;
u32 pd_entry, pte, pde;
- u32 start = 0, length = ppgtt->vm.total;
scratch_pte = vm->pte_encode(vm->scratch_page.daddr, I915_CACHE_LLC, 0);
- gen6_for_each_pde(unused, &ppgtt->pd, start, length, pde) {
+ gen6_for_all_pdes(unused, &base->pd, pde) {
u32 expected;
gen6_pte_t *pt_vaddr;
- const dma_addr_t pt_addr = px_dma(ppgtt->pd.page_table[pde]);
+ const dma_addr_t pt_addr = px_dma(base->pd.page_table[pde]);
pd_entry = readl(ppgtt->pd_addr + pde);
expected = (GEN6_PDE_ADDR_ENCODE(pt_addr) | GEN6_PDE_VALID);
@@ -1660,7 +1660,7 @@ static void gen6_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
expected);
seq_printf(m, "\tPDE: %x\n", pd_entry);
- pt_vaddr = kmap_atomic_px(ppgtt->pd.page_table[pde]);
+ pt_vaddr = kmap_atomic_px(base->pd.page_table[pde]);
for (pte = 0; pte < GEN6_PTES; pte+=4) {
unsigned long va =
@@ -1688,7 +1688,7 @@ static void gen6_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
}
/* Write pde (index) from the page directory @pd to the page table @pt */
-static inline void gen6_write_pde(const struct i915_hw_ppgtt *ppgtt,
+static inline void gen6_write_pde(const struct gen6_hw_ppgtt *ppgtt,
const unsigned int pde,
const struct i915_page_table *pt)
{
@@ -1699,26 +1699,27 @@ static inline void gen6_write_pde(const struct i915_hw_ppgtt *ppgtt,
/* Write all the page tables found in the ppgtt structure to incrementing page
* directories. */
-static void gen6_write_page_range(struct i915_hw_ppgtt *ppgtt,
+static void gen6_write_page_range(struct i915_hw_ppgtt *base,
u32 start, u32 length)
{
+ struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
struct i915_page_table *pt;
unsigned int pde;
- gen6_for_each_pde(pt, &ppgtt->pd, start, length, pde)
+ gen6_for_each_pde(pt, &base->pd, start, length, pde)
gen6_write_pde(ppgtt, pde, pt);
- mark_tlbs_dirty(ppgtt);
+ mark_tlbs_dirty(base);
wmb();
}
-static inline u32 get_pd_offset(struct i915_hw_ppgtt *ppgtt)
+static inline u32 get_pd_offset(struct gen6_hw_ppgtt *ppgtt)
{
- GEM_BUG_ON(ppgtt->pd.base.ggtt_offset & 0x3f);
- return ppgtt->pd.base.ggtt_offset << 10;
+ GEM_BUG_ON(ppgtt->base.pd.base.ggtt_offset & 0x3f);
+ return ppgtt->base.pd.base.ggtt_offset << 10;
}
-static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
+static int hsw_mm_switch(struct gen6_hw_ppgtt *ppgtt,
struct i915_request *rq)
{
struct intel_engine_cs *engine = rq->engine;
@@ -1740,7 +1741,7 @@ static int hsw_mm_switch(struct i915_hw_ppgtt *ppgtt,
return 0;
}
-static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
+static int gen7_mm_switch(struct gen6_hw_ppgtt *ppgtt,
struct i915_request *rq)
{
struct intel_engine_cs *engine = rq->engine;
@@ -1762,7 +1763,7 @@ static int gen7_mm_switch(struct i915_hw_ppgtt *ppgtt,
return 0;
}
-static int gen6_mm_switch(struct i915_hw_ppgtt *ppgtt,
+static int gen6_mm_switch(struct gen6_hw_ppgtt *ppgtt,
struct i915_request *rq)
{
struct intel_engine_cs *engine = rq->engine;
@@ -1904,27 +1905,27 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm,
static int gen6_alloc_va_range(struct i915_address_space *vm,
u64 start, u64 length)
{
- struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
+ struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(i915_vm_to_ppgtt(vm));
struct i915_page_table *pt;
u64 from = start;
unsigned int pde;
bool flush = false;
- gen6_for_each_pde(pt, &ppgtt->pd, start, length, pde) {
+ gen6_for_each_pde(pt, &ppgtt->base.pd, start, length, pde) {
if (pt == vm->scratch_pt) {
pt = alloc_pt(vm);
if (IS_ERR(pt))
goto unwind_out;
gen6_initialize_pt(vm, pt);
- ppgtt->pd.page_table[pde] = pt;
+ ppgtt->base.pd.page_table[pde] = pt;
gen6_write_pde(ppgtt, pde, pt);
flush = true;
}
}
if (flush) {
- mark_tlbs_dirty(ppgtt);
+ mark_tlbs_dirty(&ppgtt->base);
wmb();
}
@@ -1962,24 +1963,23 @@ static void gen6_free_scratch(struct i915_address_space *vm)
static void gen6_ppgtt_cleanup(struct i915_address_space *vm)
{
- struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vm);
- struct i915_page_directory *pd = &ppgtt->pd;
+ struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(i915_vm_to_ppgtt(vm));
struct i915_page_table *pt;
u32 pde;
drm_mm_remove_node(&ppgtt->node);
- gen6_for_all_pdes(pt, pd, pde)
+ gen6_for_all_pdes(pt, &ppgtt->base.pd, pde)
if (pt != vm->scratch_pt)
free_pt(vm, pt);
gen6_free_scratch(vm);
}
-static int gen6_ppgtt_allocate_page_directories(struct i915_hw_ppgtt *ppgtt)
+static int gen6_ppgtt_allocate_page_directories(struct gen6_hw_ppgtt *ppgtt)
{
- struct i915_address_space *vm = &ppgtt->vm;
- struct drm_i915_private *dev_priv = ppgtt->vm.i915;
+ struct i915_address_space *vm = &ppgtt->base.vm;
+ struct drm_i915_private *dev_priv = ppgtt->base.vm.i915;
struct i915_ggtt *ggtt = &dev_priv->ggtt;
int ret;
@@ -2004,11 +2004,11 @@ static int gen6_ppgtt_allocate_page_directories(struct i915_hw_ppgtt *ppgtt)
if (ppgtt->node.start < ggtt->mappable_end)
DRM_DEBUG("Forced to use aperture for PDEs\n");
- ppgtt->pd.base.ggtt_offset =
+ ppgtt->base.pd.base.ggtt_offset =
ppgtt->node.start / PAGE_SIZE * sizeof(gen6_pte_t);
ppgtt->pd_addr = (gen6_pte_t __iomem *)ggtt->gsm +
- ppgtt->pd.base.ggtt_offset / sizeof(gen6_pte_t);
+ ppgtt->base.pd.base.ggtt_offset / sizeof(gen6_pte_t);
return 0;
@@ -2017,35 +2017,35 @@ static int gen6_ppgtt_allocate_page_directories(struct i915_hw_ppgtt *ppgtt)
return ret;
}
-static int gen6_ppgtt_alloc(struct i915_hw_ppgtt *ppgtt)
+static int gen6_ppgtt_alloc(struct gen6_hw_ppgtt *ppgtt)
{
return gen6_ppgtt_allocate_page_directories(ppgtt);
}
-static void gen6_scratch_va_range(struct i915_hw_ppgtt *ppgtt,
+static void gen6_scratch_va_range(struct gen6_hw_ppgtt *ppgtt,
u64 start, u64 length)
{
struct i915_page_table *unused;
u32 pde;
- gen6_for_each_pde(unused, &ppgtt->pd, start, length, pde)
- ppgtt->pd.page_table[pde] = ppgtt->vm.scratch_pt;
+ gen6_for_each_pde(unused, &ppgtt->base.pd, start, length, pde)
+ ppgtt->base.pd.page_table[pde] = ppgtt->base.vm.scratch_pt;
}
static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
{
struct i915_ggtt * const ggtt = &i915->ggtt;
- struct i915_hw_ppgtt *ppgtt;
+ struct gen6_hw_ppgtt *ppgtt;
int err;
- ppgtt = kmalloc(sizeof(*ppgtt), GFP_KERNEL);
+ ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
if (!ppgtt)
return ERR_PTR(-ENOMEM);
- ppgtt->vm.i915 = i915;
- ppgtt->vm.dma = &i915->drm.pdev->dev;
+ ppgtt->base.vm.i915 = i915;
+ ppgtt->base.vm.dma = &i915->drm.pdev->dev;
- ppgtt->vm.pte_encode = ggtt->vm.pte_encode;
+ ppgtt->base.vm.pte_encode = ggtt->vm.pte_encode;
if (intel_vgpu_active(i915) || IS_GEN6(i915))
ppgtt->switch_mm = gen6_mm_switch;
else if (IS_HASWELL(i915))
@@ -2059,36 +2059,36 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
if (err)
goto err_free;
- ppgtt->vm.total = I915_PDES * GEN6_PTES * PAGE_SIZE;
+ ppgtt->base.vm.total = I915_PDES * GEN6_PTES * PAGE_SIZE;
- gen6_scratch_va_range(ppgtt, 0, ppgtt->vm.total);
- gen6_write_page_range(ppgtt, 0, ppgtt->vm.total);
+ gen6_scratch_va_range(ppgtt, 0, ppgtt->base.vm.total);
+ gen6_write_page_range(&ppgtt->base, 0, ppgtt->base.vm.total);
- err = gen6_alloc_va_range(&ppgtt->vm, 0, ppgtt->vm.total);
+ err = gen6_alloc_va_range(&ppgtt->base.vm, 0, ppgtt->base.vm.total);
if (err)
goto err_cleanup;
- ppgtt->vm.clear_range = gen6_ppgtt_clear_range;
- ppgtt->vm.insert_entries = gen6_ppgtt_insert_entries;
- ppgtt->vm.cleanup = gen6_ppgtt_cleanup;
- ppgtt->debug_dump = gen6_dump_ppgtt;
+ ppgtt->base.vm.clear_range = gen6_ppgtt_clear_range;
+ ppgtt->base.vm.insert_entries = gen6_ppgtt_insert_entries;
+ ppgtt->base.vm.cleanup = gen6_ppgtt_cleanup;
+ ppgtt->base.debug_dump = gen6_dump_ppgtt;
- ppgtt->vm.vma_ops.bind_vma = gen6_ppgtt_bind_vma;
- ppgtt->vm.vma_ops.unbind_vma = ppgtt_unbind_vma;
- ppgtt->vm.vma_ops.set_pages = ppgtt_set_pages;
- ppgtt->vm.vma_ops.clear_pages = clear_pages;
+ ppgtt->base.vm.vma_ops.bind_vma = gen6_ppgtt_bind_vma;
+ ppgtt->base.vm.vma_ops.unbind_vma = ppgtt_unbind_vma;
+ ppgtt->base.vm.vma_ops.set_pages = ppgtt_set_pages;
+ ppgtt->base.vm.vma_ops.clear_pages = clear_pages;
DRM_DEBUG_DRIVER("Allocated pde space (%lldM) at GTT entry: %llx\n",
ppgtt->node.size >> 20,
ppgtt->node.start / PAGE_SIZE);
DRM_DEBUG_DRIVER("Adding PPGTT at offset %x\n",
- ppgtt->pd.base.ggtt_offset << 10);
+ ppgtt->base.pd.base.ggtt_offset << 10);
- return ppgtt;
+ return &ppgtt->base;
err_cleanup:
- gen6_ppgtt_cleanup(&ppgtt->vm);
+ gen6_ppgtt_cleanup(&ppgtt->base.vm);
err_free:
kfree(ppgtt);
return ERR_PTR(err);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index fb296962de95..c0eb60484eb4 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -395,7 +395,7 @@ struct i915_ggtt {
struct i915_hw_ppgtt {
struct i915_address_space vm;
struct kref ref;
- struct drm_mm_node node;
+
unsigned long pd_dirty_rings;
union {
struct i915_pml4 pml4; /* GEN8+ & 48b PPGTT */
@@ -403,13 +403,26 @@ struct i915_hw_ppgtt {
struct i915_page_directory pd; /* GEN6-7 */
};
+ void (*debug_dump)(struct i915_hw_ppgtt *ppgtt, struct seq_file *m);
+};
+
+struct gen6_hw_ppgtt {
+ struct i915_hw_ppgtt base;
+
+ struct drm_mm_node node;
gen6_pte_t __iomem *pd_addr;
- int (*switch_mm)(struct i915_hw_ppgtt *ppgtt,
- struct i915_request *rq);
- void (*debug_dump)(struct i915_hw_ppgtt *ppgtt, struct seq_file *m);
+ int (*switch_mm)(struct gen6_hw_ppgtt *ppgtt, struct i915_request *rq);
};
+#define __to_gen6_ppgtt(base) container_of(base, struct gen6_hw_ppgtt, base)
+
+static inline struct gen6_hw_ppgtt *to_gen6_ppgtt(struct i915_hw_ppgtt *base)
+{
+ BUILD_BUG_ON(offsetof(struct gen6_hw_ppgtt, base));
+ return __to_gen6_ppgtt(base);
+}
+
/*
* gen6_for_each_pde() iterates over every pde from start until start+length.
* If start and start+length are not perfectly divisible, the macro will round
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index fa517a3e3c25..082e18a251b5 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1547,10 +1547,10 @@ static int switch_context(struct i915_request *rq)
{
struct intel_engine_cs *engine = rq->engine;
struct i915_gem_context *to_ctx = rq->gem_context;
- struct i915_hw_ppgtt *to_mm =
- to_ctx->ppgtt ?: rq->i915->mm.aliasing_ppgtt;
+ struct gen6_hw_ppgtt *to_mm =
+ to_gen6_ppgtt(to_ctx->ppgtt ?: rq->i915->mm.aliasing_ppgtt);
struct i915_gem_context *from_ctx = engine->legacy_active_context;
- struct i915_hw_ppgtt *from_mm = engine->legacy_active_ppgtt;
+ struct gen6_hw_ppgtt *from_mm = engine->legacy_active_ppgtt;
u32 hw_flags = 0;
int ret, i;
@@ -1558,13 +1558,13 @@ static int switch_context(struct i915_request *rq)
GEM_BUG_ON(HAS_EXECLISTS(rq->i915));
if (to_mm != from_mm ||
- (to_mm && intel_engine_flag(engine) & to_mm->pd_dirty_rings)) {
+ (to_mm && intel_engine_flag(engine) & to_mm->base.pd_dirty_rings)) {
trace_switch_mm(engine, to_ctx);
ret = to_mm->switch_mm(to_mm, rq);
if (ret)
goto err;
- to_mm->pd_dirty_rings &= ~intel_engine_flag(engine);
+ to_mm->base.pd_dirty_rings &= ~intel_engine_flag(engine);
engine->legacy_active_ppgtt = to_mm;
hw_flags = MI_FORCE_RESTORE;
}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index acef385c4c80..83cf55e44c08 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -564,7 +564,7 @@ struct intel_engine_cs {
* stream (ring).
*/
struct i915_gem_context *legacy_active_context;
- struct i915_hw_ppgtt *legacy_active_ppgtt;
+ struct gen6_hw_ppgtt *legacy_active_ppgtt;
/* status_notifier: list of callbacks for context-switch changes */
struct atomic_notifier_head context_status_notifier;
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index f80cf7ce3fa9..538e658252f7 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -142,10 +142,6 @@ static int igt_ppgtt_alloc(void *arg)
if (!USES_PPGTT(dev_priv))
return 0;
- ppgtt = kzalloc(sizeof(*ppgtt), GFP_KERNEL);
- if (!ppgtt)
- return -ENOMEM;
-
mutex_lock(&dev_priv->drm.struct_mutex);
ppgtt = __hw_ppgtt_create(dev_priv);
if (IS_ERR(ppgtt)) {
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 07/11] drm/i915/gtt Onionify error handling for gen6_ppgtt_create
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
` (5 preceding siblings ...)
2018-06-05 7:19 ` [PATCH 06/11] drm/i915/gtt: Subclass gen6_hw_ppgtt Chris Wilson
@ 2018-06-05 7:19 ` Chris Wilson
2018-06-05 7:19 ` [PATCH 08/11] drm/i915/gtt: Reorder aliasing_ppgtt fini Chris Wilson
` (6 subsequent siblings)
13 siblings, 0 replies; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 7:19 UTC (permalink / raw)
To: intel-gfx
Pull the empty stubs together into the top level gen6_ppgtt_create, and
tear each one down on error in proper onion order (rather than use
Joonas' pet hate of calling the cleanup function in indeterminable
state).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 81 ++++++++++++++---------------
1 file changed, 39 insertions(+), 42 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 79547b81e28b..0767ec61dc0e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1936,7 +1936,7 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
return -ENOMEM;
}
-static int gen6_init_scratch(struct i915_address_space *vm)
+static int gen6_ppgtt_init_scratch(struct i915_address_space *vm)
{
int ret;
@@ -1955,33 +1955,37 @@ static int gen6_init_scratch(struct i915_address_space *vm)
return 0;
}
-static void gen6_free_scratch(struct i915_address_space *vm)
+static void gen6_ppgtt_free_scratch(struct i915_address_space *vm)
{
free_pt(vm, vm->scratch_pt);
cleanup_scratch_page(vm);
}
-static void gen6_ppgtt_cleanup(struct i915_address_space *vm)
+static void gen6_ppgtt_free_pd(struct gen6_hw_ppgtt *ppgtt)
{
- struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(i915_vm_to_ppgtt(vm));
struct i915_page_table *pt;
u32 pde;
- drm_mm_remove_node(&ppgtt->node);
-
gen6_for_all_pdes(pt, &ppgtt->base.pd, pde)
- if (pt != vm->scratch_pt)
- free_pt(vm, pt);
+ if (pt != ppgtt->base.vm.scratch_pt)
+ free_pt(&ppgtt->base.vm, pt);
+}
- gen6_free_scratch(vm);
+static void gen6_ppgtt_cleanup(struct i915_address_space *vm)
+{
+ struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(i915_vm_to_ppgtt(vm));
+
+ drm_mm_remove_node(&ppgtt->node);
+
+ gen6_ppgtt_free_pd(ppgtt);
+ gen6_ppgtt_free_scratch(vm);
}
static int gen6_ppgtt_allocate_page_directories(struct gen6_hw_ppgtt *ppgtt)
{
- struct i915_address_space *vm = &ppgtt->base.vm;
struct drm_i915_private *dev_priv = ppgtt->base.vm.i915;
struct i915_ggtt *ggtt = &dev_priv->ggtt;
- int ret;
+ int err;
/* PPGTT PDEs reside in the GGTT and consists of 512 entries. The
* allocator works in address space sizes, so it's multiplied by page
@@ -1989,17 +1993,13 @@ static int gen6_ppgtt_allocate_page_directories(struct gen6_hw_ppgtt *ppgtt)
*/
BUG_ON(!drm_mm_initialized(&ggtt->vm.mm));
- ret = gen6_init_scratch(vm);
- if (ret)
- return ret;
-
- ret = i915_gem_gtt_insert(&ggtt->vm, &ppgtt->node,
+ err = i915_gem_gtt_insert(&ggtt->vm, &ppgtt->node,
GEN6_PD_SIZE, GEN6_PD_ALIGN,
I915_COLOR_UNEVICTABLE,
0, ggtt->vm.total,
PIN_HIGH);
- if (ret)
- goto err_out;
+ if (err)
+ return err;
if (ppgtt->node.start < ggtt->mappable_end)
DRM_DEBUG("Forced to use aperture for PDEs\n");
@@ -2011,15 +2011,6 @@ static int gen6_ppgtt_allocate_page_directories(struct gen6_hw_ppgtt *ppgtt)
ppgtt->base.pd.base.ggtt_offset / sizeof(gen6_pte_t);
return 0;
-
-err_out:
- gen6_free_scratch(vm);
- return ret;
-}
-
-static int gen6_ppgtt_alloc(struct gen6_hw_ppgtt *ppgtt)
-{
- return gen6_ppgtt_allocate_page_directories(ppgtt);
}
static void gen6_scratch_va_range(struct gen6_hw_ppgtt *ppgtt,
@@ -2045,6 +2036,18 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
ppgtt->base.vm.i915 = i915;
ppgtt->base.vm.dma = &i915->drm.pdev->dev;
+ ppgtt->base.vm.total = I915_PDES * GEN6_PTES * PAGE_SIZE;
+
+ ppgtt->base.vm.clear_range = gen6_ppgtt_clear_range;
+ ppgtt->base.vm.insert_entries = gen6_ppgtt_insert_entries;
+ ppgtt->base.vm.cleanup = gen6_ppgtt_cleanup;
+ ppgtt->base.debug_dump = gen6_dump_ppgtt;
+
+ ppgtt->base.vm.vma_ops.bind_vma = gen6_ppgtt_bind_vma;
+ ppgtt->base.vm.vma_ops.unbind_vma = ppgtt_unbind_vma;
+ ppgtt->base.vm.vma_ops.set_pages = ppgtt_set_pages;
+ ppgtt->base.vm.vma_ops.clear_pages = clear_pages;
+
ppgtt->base.vm.pte_encode = ggtt->vm.pte_encode;
if (intel_vgpu_active(i915) || IS_GEN6(i915))
ppgtt->switch_mm = gen6_mm_switch;
@@ -2055,28 +2058,20 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
else
BUG();
- err = gen6_ppgtt_alloc(ppgtt);
+ err = gen6_ppgtt_init_scratch(&ppgtt->base.vm);
if (err)
goto err_free;
- ppgtt->base.vm.total = I915_PDES * GEN6_PTES * PAGE_SIZE;
+ err = gen6_ppgtt_allocate_page_directories(ppgtt);
+ if (err)
+ goto err_scratch;
gen6_scratch_va_range(ppgtt, 0, ppgtt->base.vm.total);
gen6_write_page_range(&ppgtt->base, 0, ppgtt->base.vm.total);
err = gen6_alloc_va_range(&ppgtt->base.vm, 0, ppgtt->base.vm.total);
if (err)
- goto err_cleanup;
-
- ppgtt->base.vm.clear_range = gen6_ppgtt_clear_range;
- ppgtt->base.vm.insert_entries = gen6_ppgtt_insert_entries;
- ppgtt->base.vm.cleanup = gen6_ppgtt_cleanup;
- ppgtt->base.debug_dump = gen6_dump_ppgtt;
-
- ppgtt->base.vm.vma_ops.bind_vma = gen6_ppgtt_bind_vma;
- ppgtt->base.vm.vma_ops.unbind_vma = ppgtt_unbind_vma;
- ppgtt->base.vm.vma_ops.set_pages = ppgtt_set_pages;
- ppgtt->base.vm.vma_ops.clear_pages = clear_pages;
+ goto err_pd;
DRM_DEBUG_DRIVER("Allocated pde space (%lldM) at GTT entry: %llx\n",
ppgtt->node.size >> 20,
@@ -2087,8 +2082,10 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
return &ppgtt->base;
-err_cleanup:
- gen6_ppgtt_cleanup(&ppgtt->base.vm);
+err_pd:
+ gen6_ppgtt_free_pd(ppgtt);
+err_scratch:
+ gen6_ppgtt_free_scratch(&ppgtt->base.vm);
err_free:
kfree(ppgtt);
return ERR_PTR(err);
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 08/11] drm/i915/gtt: Reorder aliasing_ppgtt fini
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
` (6 preceding siblings ...)
2018-06-05 7:19 ` [PATCH 07/11] drm/i915/gtt Onionify error handling for gen6_ppgtt_create Chris Wilson
@ 2018-06-05 7:19 ` Chris Wilson
2018-06-05 7:19 ` [PATCH 09/11] drm/i915/gtt: Make gen6 page directories evictable Chris Wilson
` (5 subsequent siblings)
13 siblings, 0 replies; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 7:19 UTC (permalink / raw)
To: intel-gfx
To allow ourselves to use a first class vma for the aliasing_ppgtt page
directory, we have to reorder the shutdown on module unload to remove
and unpin the aliasing_ppgtt before complaining about any objects left
in the GGTT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 0767ec61dc0e..c756c5110d2e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2891,15 +2891,11 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv)
ggtt->vm.closed = true;
mutex_lock(&dev_priv->drm.struct_mutex);
+ i915_gem_fini_aliasing_ppgtt(dev_priv);
+
GEM_BUG_ON(!list_empty(&ggtt->vm.active_list));
list_for_each_entry_safe(vma, vn, &ggtt->vm.inactive_list, vm_link)
WARN_ON(i915_vma_unbind(vma));
- mutex_unlock(&dev_priv->drm.struct_mutex);
-
- i915_gem_cleanup_stolen(&dev_priv->drm);
-
- mutex_lock(&dev_priv->drm.struct_mutex);
- i915_gem_fini_aliasing_ppgtt(dev_priv);
if (drm_mm_node_allocated(&ggtt->error_capture))
drm_mm_remove_node(&ggtt->error_capture);
@@ -2921,6 +2917,8 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv)
arch_phys_wc_del(ggtt->mtrr);
io_mapping_fini(&ggtt->iomap);
+
+ i915_gem_cleanup_stolen(&dev_priv->drm);
}
static unsigned int gen6_get_total_gtt_size(u16 snb_gmch_ctl)
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 09/11] drm/i915/gtt: Make gen6 page directories evictable
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
` (7 preceding siblings ...)
2018-06-05 7:19 ` [PATCH 08/11] drm/i915/gtt: Reorder aliasing_ppgtt fini Chris Wilson
@ 2018-06-05 7:19 ` Chris Wilson
2018-06-05 7:19 ` [PATCH 10/11] drm/i915/gtt: Only keep gen6 page directories pinned while active Chris Wilson
` (4 subsequent siblings)
13 siblings, 0 replies; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 7:19 UTC (permalink / raw)
To: intel-gfx
Currently all page directories are bound at creation using an
unevictable node in the GGTT. This severely limits us as we cannot
remove any inactive ppgtt for new contexts, or under aperture pressure.
To fix this we need to make the page directory into a first class and
unbindable vma. Hence, the creation of a custom vma to wrap the page
directory as opposed to a GEM object.
In this patch, we leave the page directories pinned upon creation.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 261 ++++++++++++++++------------
drivers/gpu/drm/i915/i915_gem_gtt.h | 2 +-
drivers/gpu/drm/i915/i915_vma.h | 1 +
3 files changed, 148 insertions(+), 116 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index c756c5110d2e..fa09413c9adf 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1640,79 +1640,55 @@ static void gen6_dump_ppgtt(struct i915_hw_ppgtt *base, struct seq_file *m)
{
struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
struct i915_address_space *vm = &base->vm;
- struct i915_page_table *unused;
- gen6_pte_t scratch_pte;
- u32 pd_entry, pte, pde;
-
- scratch_pte = vm->pte_encode(vm->scratch_page.daddr, I915_CACHE_LLC, 0);
-
- gen6_for_all_pdes(unused, &base->pd, pde) {
- u32 expected;
- gen6_pte_t *pt_vaddr;
- const dma_addr_t pt_addr = px_dma(base->pd.page_table[pde]);
- pd_entry = readl(ppgtt->pd_addr + pde);
- expected = (GEN6_PDE_ADDR_ENCODE(pt_addr) | GEN6_PDE_VALID);
-
- if (pd_entry != expected)
- seq_printf(m, "\tPDE #%d mismatch: Actual PDE: %x Expected PDE: %x\n",
- pde,
- pd_entry,
- expected);
- seq_printf(m, "\tPDE: %x\n", pd_entry);
-
- pt_vaddr = kmap_atomic_px(base->pd.page_table[pde]);
-
- for (pte = 0; pte < GEN6_PTES; pte+=4) {
- unsigned long va =
- (pde * PAGE_SIZE * GEN6_PTES) +
- (pte * PAGE_SIZE);
+ const gen6_pte_t scratch_pte =
+ vm->pte_encode(vm->scratch_page.daddr, I915_CACHE_LLC, 0);
+ struct i915_page_table *pt;
+ u32 pte, pde;
+
+ gen6_for_all_pdes(pt, &base->pd, pde) {
+ gen6_pte_t *vaddr;
+
+ if (i915_vma_is_pinned(ppgtt->vma)) {
+ u32 expected =
+ GEN6_PDE_ADDR_ENCODE(px_dma(pt)) |
+ GEN6_PDE_VALID;
+ u32 pd_entry = readl(ppgtt->pd_addr + pde);
+
+ if (pd_entry != expected)
+ seq_printf(m,
+ "\tPDE #%d mismatch: Actual PDE: %x Expected PDE: %x\n",
+ pde,
+ pd_entry,
+ expected);
+
+ seq_printf(m, "\tPDE: %x\n", pd_entry);
+ }
+
+ vaddr = kmap_atomic_px(base->pd.page_table[pde]);
+ for (pte = 0; pte < GEN6_PTES; pte += 4) {
int i;
- bool found = false;
+
for (i = 0; i < 4; i++)
- if (pt_vaddr[pte + i] != scratch_pte)
- found = true;
- if (!found)
+ if (vaddr[pte + i] != scratch_pte)
+ break;
+ if (i == 4)
continue;
- seq_printf(m, "\t\t0x%lx [%03d,%04d]: =", va, pde, pte);
+ seq_printf(m, "\t\t0x%lx [%03d,%04d]: =",
+ (pde * GEN6_PTES + pte) * PAGE_SIZE,
+ pde, pte);
for (i = 0; i < 4; i++) {
- if (pt_vaddr[pte + i] != scratch_pte)
- seq_printf(m, " %08x", pt_vaddr[pte + i]);
+ if (vaddr[pte + i] != scratch_pte)
+ seq_printf(m, " %08x", vaddr[pte + i]);
else
seq_puts(m, " SCRATCH ");
}
seq_puts(m, "\n");
}
- kunmap_atomic(pt_vaddr);
+ kunmap_atomic(vaddr);
}
}
-/* Write pde (index) from the page directory @pd to the page table @pt */
-static inline void gen6_write_pde(const struct gen6_hw_ppgtt *ppgtt,
- const unsigned int pde,
- const struct i915_page_table *pt)
-{
- /* Caller needs to make sure the write completes if necessary */
- writel_relaxed(GEN6_PDE_ADDR_ENCODE(px_dma(pt)) | GEN6_PDE_VALID,
- ppgtt->pd_addr + pde);
-}
-
-/* Write all the page tables found in the ppgtt structure to incrementing page
- * directories. */
-static void gen6_write_page_range(struct i915_hw_ppgtt *base,
- u32 start, u32 length)
-{
- struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
- struct i915_page_table *pt;
- unsigned int pde;
-
- gen6_for_each_pde(pt, &base->pd, start, length, pde)
- gen6_write_pde(ppgtt, pde, pt);
-
- mark_tlbs_dirty(base);
- wmb();
-}
-
static inline u32 get_pd_offset(struct gen6_hw_ppgtt *ppgtt)
{
GEM_BUG_ON(ppgtt->base.pd.base.ggtt_offset & 0x3f);
@@ -1909,7 +1885,6 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
struct i915_page_table *pt;
u64 from = start;
unsigned int pde;
- bool flush = false;
gen6_for_each_pde(pt, &ppgtt->base.pd, start, length, pde) {
if (pt == vm->scratch_pt) {
@@ -1919,14 +1894,13 @@ static int gen6_alloc_va_range(struct i915_address_space *vm,
gen6_initialize_pt(vm, pt);
ppgtt->base.pd.page_table[pde] = pt;
- gen6_write_pde(ppgtt, pde, pt);
- flush = true;
- }
- }
+ if (i915_vma_is_pinned(ppgtt->vma)) {
+ u32 addr = GEN6_PDE_ADDR_ENCODE(px_dma(pt));
- if (flush) {
- mark_tlbs_dirty(&ppgtt->base);
- wmb();
+ writel_relaxed(addr | GEN6_PDE_VALID,
+ ppgtt->pd_addr + pde);
+ }
+ }
}
return 0;
@@ -1975,44 +1949,114 @@ static void gen6_ppgtt_cleanup(struct i915_address_space *vm)
{
struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(i915_vm_to_ppgtt(vm));
- drm_mm_remove_node(&ppgtt->node);
+ i915_vma_unpin(ppgtt->vma);
+ i915_vma_destroy(ppgtt->vma);
gen6_ppgtt_free_pd(ppgtt);
gen6_ppgtt_free_scratch(vm);
}
-static int gen6_ppgtt_allocate_page_directories(struct gen6_hw_ppgtt *ppgtt)
+static int pd_vma_set_pages(struct i915_vma *vma)
{
- struct drm_i915_private *dev_priv = ppgtt->base.vm.i915;
- struct i915_ggtt *ggtt = &dev_priv->ggtt;
- int err;
+ vma->pages = ERR_PTR(-ENODEV);
+ return 0;
+}
- /* PPGTT PDEs reside in the GGTT and consists of 512 entries. The
- * allocator works in address space sizes, so it's multiplied by page
- * size. We allocate at the top of the GTT to avoid fragmentation.
- */
- BUG_ON(!drm_mm_initialized(&ggtt->vm.mm));
+static void pd_vma_clear_pages(struct i915_vma *vma)
+{
+ GEM_BUG_ON(!vma->pages);
- err = i915_gem_gtt_insert(&ggtt->vm, &ppgtt->node,
- GEN6_PD_SIZE, GEN6_PD_ALIGN,
- I915_COLOR_UNEVICTABLE,
- 0, ggtt->vm.total,
- PIN_HIGH);
- if (err)
- return err;
+ vma->pages = NULL;
+}
- if (ppgtt->node.start < ggtt->mappable_end)
- DRM_DEBUG("Forced to use aperture for PDEs\n");
+static int pd_vma_bind(struct i915_vma *vma,
+ enum i915_cache_level cache_level,
+ u32 unused)
+{
+ struct i915_ggtt *ggtt = i915_vm_to_ggtt(vma->vm);
+ struct gen6_hw_ppgtt *ppgtt = vma->private;
+ u32 ggtt_offset = i915_ggtt_offset(vma) / PAGE_SIZE;
+ struct i915_page_table *pt;
+ unsigned int pde;
- ppgtt->base.pd.base.ggtt_offset =
- ppgtt->node.start / PAGE_SIZE * sizeof(gen6_pte_t);
+ ppgtt->base.pd.base.ggtt_offset = ggtt_offset * sizeof(gen6_pte_t);
- ppgtt->pd_addr = (gen6_pte_t __iomem *)ggtt->gsm +
- ppgtt->base.pd.base.ggtt_offset / sizeof(gen6_pte_t);
+ ppgtt->pd_addr = (gen6_pte_t __iomem *)ggtt->gsm + ggtt_offset;
+
+ gen6_for_all_pdes(pt, &ppgtt->base.pd, pde) {
+ u32 val = GEN6_PDE_ADDR_ENCODE(px_dma(pt)) | GEN6_PDE_VALID;
+
+ writel_relaxed(val, ppgtt->pd_addr + pde);
+ }
+ wmb();
return 0;
}
+static void pd_vma_unbind(struct i915_vma *vma)
+{
+}
+
+static const struct i915_vma_ops pd_vma_ops = {
+ .set_pages = pd_vma_set_pages,
+ .clear_pages = pd_vma_clear_pages,
+ .bind_vma = pd_vma_bind,
+ .unbind_vma = pd_vma_unbind,
+};
+
+static struct i915_vma *pd_vma_create(struct gen6_hw_ppgtt *ppgtt, int size)
+{
+ struct drm_i915_private *i915 = ppgtt->base.vm.i915;
+ struct i915_ggtt *ggtt = &i915->ggtt;
+ struct i915_vma *vma;
+ int i;
+
+ GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
+ GEM_BUG_ON(size > ggtt->vm.total);
+
+ vma = kmem_cache_zalloc(i915->vmas, GFP_KERNEL);
+ if (vma == NULL)
+ return ERR_PTR(-ENOMEM);
+
+ for (i = 0; i < ARRAY_SIZE(vma->last_read); i++)
+ init_request_active(&vma->last_read[i], NULL);
+ init_request_active(&vma->last_fence, NULL);
+
+ vma->vm = &ggtt->vm;
+ vma->ops = &pd_vma_ops;
+ vma->private = ppgtt;
+
+ vma->obj = NULL;
+ vma->resv = NULL;
+ vma->size = size;
+ vma->display_alignment = I915_GTT_MIN_ALIGNMENT;
+
+ vma->fence_size = size;
+ vma->fence_alignment = I915_GTT_MIN_ALIGNMENT;
+
+ vma->flags |= I915_VMA_GGTT;
+ vma->ggtt_view.type = I915_GGTT_VIEW_ROTATED; /* prevent fencing */
+
+ INIT_LIST_HEAD(&vma->obj_link);
+ list_add(&vma->vm_link, &vma->vm->unbound_list);
+
+ return vma;
+}
+
+static int gen6_ppgtt_pin(struct i915_hw_ppgtt *base)
+{
+ struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
+
+ /*
+ * PPGTT PDEs reside in the GGTT and consists of 512 entries. The
+ * allocator works in address space sizes, so it's multiplied by page
+ * size. We allocate at the top of the GTT to avoid fragmentation.
+ */
+ return i915_vma_pin(ppgtt->vma,
+ 0, GEN6_PD_ALIGN,
+ PIN_GLOBAL | PIN_HIGH);
+}
+
static void gen6_scratch_va_range(struct gen6_hw_ppgtt *ppgtt,
u64 start, u64 length)
{
@@ -2062,20 +2106,23 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
if (err)
goto err_free;
- err = gen6_ppgtt_allocate_page_directories(ppgtt);
- if (err)
+ ppgtt->vma = pd_vma_create(ppgtt, GEN6_PD_SIZE);
+ if (IS_ERR(ppgtt->vma))
goto err_scratch;
gen6_scratch_va_range(ppgtt, 0, ppgtt->base.vm.total);
- gen6_write_page_range(&ppgtt->base, 0, ppgtt->base.vm.total);
err = gen6_alloc_va_range(&ppgtt->base.vm, 0, ppgtt->base.vm.total);
+ if (err)
+ goto err_vma;
+
+ err = gen6_ppgtt_pin(&ppgtt->base);
if (err)
goto err_pd;
DRM_DEBUG_DRIVER("Allocated pde space (%lldM) at GTT entry: %llx\n",
- ppgtt->node.size >> 20,
- ppgtt->node.start / PAGE_SIZE);
+ ppgtt->vma->node.size >> 20,
+ ppgtt->vma->node.start / PAGE_SIZE);
DRM_DEBUG_DRIVER("Adding PPGTT at offset %x\n",
ppgtt->base.pd.base.ggtt_offset << 10);
@@ -2084,6 +2131,8 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
err_pd:
gen6_ppgtt_free_pd(ppgtt);
+err_vma:
+ i915_vma_destroy(ppgtt->vma);
err_scratch:
gen6_ppgtt_free_scratch(&ppgtt->base.vm);
err_free:
@@ -3599,6 +3648,7 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
}
ggtt->vm.closed = false;
+ i915_ggtt_invalidate(dev_priv);
if (INTEL_GEN(dev_priv) >= 8) {
struct intel_ppat *ppat = &dev_priv->ppat;
@@ -3607,25 +3657,6 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
dev_priv->ppat.update_hw(dev_priv);
return;
}
-
- if (USES_PPGTT(dev_priv)) {
- struct i915_address_space *vm;
-
- list_for_each_entry(vm, &dev_priv->vm_list, global_link) {
- struct i915_hw_ppgtt *ppgtt;
-
- if (i915_is_ggtt(vm))
- ppgtt = dev_priv->mm.aliasing_ppgtt;
- else
- ppgtt = i915_vm_to_ppgtt(vm);
- if (!ppgtt)
- continue;
-
- gen6_write_page_range(ppgtt, 0, ppgtt->vm.total);
- }
- }
-
- i915_ggtt_invalidate(dev_priv);
}
static struct scatterlist *
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index c0eb60484eb4..f4cfe0ed8fac 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -409,7 +409,7 @@ struct i915_hw_ppgtt {
struct gen6_hw_ppgtt {
struct i915_hw_ppgtt base;
- struct drm_mm_node node;
+ struct i915_vma *vma;
gen6_pte_t __iomem *pd_addr;
int (*switch_mm)(struct gen6_hw_ppgtt *ppgtt, struct i915_request *rq);
diff --git a/drivers/gpu/drm/i915/i915_vma.h b/drivers/gpu/drm/i915/i915_vma.h
index 4321476a6a32..de02482c0659 100644
--- a/drivers/gpu/drm/i915/i915_vma.h
+++ b/drivers/gpu/drm/i915/i915_vma.h
@@ -54,6 +54,7 @@ struct i915_vma {
struct reservation_object *resv; /** Alias of obj->resv */
struct sg_table *pages;
void __iomem *iomap;
+ void *private; /* owned by creator */
u64 size;
u64 display_alignment;
struct i915_page_sizes page_sizes;
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 10/11] drm/i915/gtt: Only keep gen6 page directories pinned while active
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
` (8 preceding siblings ...)
2018-06-05 7:19 ` [PATCH 09/11] drm/i915/gtt: Make gen6 page directories evictable Chris Wilson
@ 2018-06-05 7:19 ` Chris Wilson
2018-06-05 8:42 ` Joonas Lahtinen
2018-06-05 7:19 ` [PATCH 11/11] RFT drm/i915/gtt: Enable full-ppgtt by default everywhere Chris Wilson
` (3 subsequent siblings)
13 siblings, 1 reply; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 7:19 UTC (permalink / raw)
To: intel-gfx
In order to be able to evict the gen6 ppgtt, we have to unpin it at some
point. We can simply use our context activity tracking to know when the
ppgtt is no longer in use by hardware, and so only keep it pinned while
being used a request.
For the kernel_context (and thus aliasing_ppgtt), it remains pinned at
all times, as the kernel_context itself is pinned at all times.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 35 ++++++++++++++-----------
drivers/gpu/drm/i915/i915_gem_gtt.h | 5 ++++
drivers/gpu/drm/i915/intel_ringbuffer.c | 30 +++++++++++++++++++++
3 files changed, 55 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index fa09413c9adf..5d5b11903f9b 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1949,7 +1949,6 @@ static void gen6_ppgtt_cleanup(struct i915_address_space *vm)
{
struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(i915_vm_to_ppgtt(vm));
- i915_vma_unpin(ppgtt->vma);
i915_vma_destroy(ppgtt->vma);
gen6_ppgtt_free_pd(ppgtt);
@@ -2043,10 +2042,19 @@ static struct i915_vma *pd_vma_create(struct gen6_hw_ppgtt *ppgtt, int size)
return vma;
}
-static int gen6_ppgtt_pin(struct i915_hw_ppgtt *base)
+int gen6_ppgtt_pin(struct i915_hw_ppgtt *base)
{
struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
+ /*
+ * Workaround the limited maximum vma->pin_count and the aliasing_ppgtt
+ * which will be pinned into every active context.
+ * (When vma->pin_count becomes atomic, I expect we will naturally
+ * need a larger, unpacked, type and kill this redundancy.)
+ */
+ if (ppgtt->pin_count++)
+ return 0;
+
/*
* PPGTT PDEs reside in the GGTT and consists of 512 entries. The
* allocator works in address space sizes, so it's multiplied by page
@@ -2057,6 +2065,16 @@ static int gen6_ppgtt_pin(struct i915_hw_ppgtt *base)
PIN_GLOBAL | PIN_HIGH);
}
+void gen6_ppgtt_unpin(struct i915_hw_ppgtt *base)
+{
+ struct gen6_hw_ppgtt *ppgtt = to_gen6_ppgtt(base);
+
+ if (--ppgtt->pin_count)
+ return;
+
+ i915_vma_unpin(ppgtt->vma);
+}
+
static void gen6_scratch_va_range(struct gen6_hw_ppgtt *ppgtt,
u64 start, u64 length)
{
@@ -2116,21 +2134,8 @@ static struct i915_hw_ppgtt *gen6_ppgtt_create(struct drm_i915_private *i915)
if (err)
goto err_vma;
- err = gen6_ppgtt_pin(&ppgtt->base);
- if (err)
- goto err_pd;
-
- DRM_DEBUG_DRIVER("Allocated pde space (%lldM) at GTT entry: %llx\n",
- ppgtt->vma->node.size >> 20,
- ppgtt->vma->node.start / PAGE_SIZE);
-
- DRM_DEBUG_DRIVER("Adding PPGTT at offset %x\n",
- ppgtt->base.pd.base.ggtt_offset << 10);
-
return &ppgtt->base;
-err_pd:
- gen6_ppgtt_free_pd(ppgtt);
err_vma:
i915_vma_destroy(ppgtt->vma);
err_scratch:
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index f4cfe0ed8fac..32fa2db02ccd 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -412,6 +412,8 @@ struct gen6_hw_ppgtt {
struct i915_vma *vma;
gen6_pte_t __iomem *pd_addr;
+ unsigned int pin_count;
+
int (*switch_mm)(struct gen6_hw_ppgtt *ppgtt, struct i915_request *rq);
};
@@ -626,6 +628,9 @@ static inline void i915_ppgtt_put(struct i915_hw_ppgtt *ppgtt)
kref_put(&ppgtt->ref, i915_ppgtt_release);
}
+int gen6_ppgtt_pin(struct i915_hw_ppgtt *base);
+void gen6_ppgtt_unpin(struct i915_hw_ppgtt *base);
+
void i915_check_and_clear_faults(struct drm_i915_private *dev_priv);
void i915_gem_suspend_gtt_mappings(struct drm_i915_private *dev_priv);
void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 082e18a251b5..7858e9231d60 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1195,8 +1195,31 @@ static void intel_ring_context_destroy(struct intel_context *ce)
__i915_gem_object_release_unless_active(ce->state->obj);
}
+static int __context_pin_ppgtt(struct i915_gem_context *ctx)
+{
+ struct i915_hw_ppgtt *ppgtt;
+ int err = 0;
+
+ ppgtt = ctx->ppgtt ?: ctx->i915->mm.aliasing_ppgtt;
+ if (ppgtt)
+ err = gen6_ppgtt_pin(ppgtt);
+
+ return err;
+}
+
+static void __context_unpin_ppgtt(struct i915_gem_context *ctx)
+{
+ struct i915_hw_ppgtt *ppgtt;
+
+ ppgtt = ctx->ppgtt ?: ctx->i915->mm.aliasing_ppgtt;
+ if (ppgtt)
+ gen6_ppgtt_unpin(ppgtt);
+}
+
static void intel_ring_context_unpin(struct intel_context *ce)
{
+ __context_unpin_ppgtt(ce->gem_context);
+
if (ce->state) {
ce->state->obj->pin_global--;
i915_vma_unpin(ce->state);
@@ -1321,6 +1344,10 @@ __ring_context_pin(struct intel_engine_cs *engine,
ce->state->obj->pin_global++;
}
+ err = __context_pin_ppgtt(ce->gem_context);
+ if (err)
+ goto err_unpin;
+
i915_gem_context_get(ctx);
/* One ringbuffer to rule them all */
@@ -1329,6 +1356,9 @@ __ring_context_pin(struct intel_engine_cs *engine,
return ce;
+err_unpin:
+ if (ce->state)
+ i915_vma_unpin(ce->state);
err:
ce->pin_count = 0;
return ERR_PTR(err);
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [PATCH 11/11] RFT drm/i915/gtt: Enable full-ppgtt by default everywhere
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
` (9 preceding siblings ...)
2018-06-05 7:19 ` [PATCH 10/11] drm/i915/gtt: Only keep gen6 page directories pinned while active Chris Wilson
@ 2018-06-05 7:19 ` Chris Wilson
2018-06-05 7:30 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member Patchwork
` (2 subsequent siblings)
13 siblings, 0 replies; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 7:19 UTC (permalink / raw)
To: intel-gfx
Let's see if we have all the kinks worked out and full-ppgtt now works
reliably on gen7 (Ivybridge, Valleyview/Baytrail and Haswell). If we can
let userspace have full control over their own ppgtt, it makes softpinning
far more effective, in turn making GPU dispatch far more efficient and
more secure (due to better mm segregation).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 10 ++++------
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5d5b11903f9b..9edd523fbc01 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -179,13 +179,11 @@ int intel_sanitize_enable_ppgtt(struct drm_i915_private *dev_priv,
return 0;
}
- if (HAS_LOGICAL_RING_CONTEXTS(dev_priv)) {
- if (has_full_48bit_ppgtt)
- return 3;
+ if (has_full_48bit_ppgtt)
+ return 3;
- if (has_full_ppgtt)
- return 2;
- }
+ if (has_full_ppgtt)
+ return 2;
return 1;
}
--
2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 28+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
` (10 preceding siblings ...)
2018-06-05 7:19 ` [PATCH 11/11] RFT drm/i915/gtt: Enable full-ppgtt by default everywhere Chris Wilson
@ 2018-06-05 7:30 ` Patchwork
2018-06-05 7:33 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-06-05 7:46 ` ✗ Fi.CI.BAT: failure " Patchwork
13 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2018-06-05 7:30 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member
URL : https://patchwork.freedesktop.org/series/44244/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f1e88b978f6f drm/i915/gtt: Rename i915_hw_ppgtt base member
-:39: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'gvt' may be better as '(gvt)' to avoid precedence issues
#39: FILE: drivers/gpu/drm/i915/gvt/gvt.h:364:
+#define gvt_ggtt_gm_sz(gvt) (gvt->dev_priv->ggtt.vm.total)
-:124: WARNING:LONG_LINE: line over 100 characters
#124: FILE: drivers/gpu/drm/i915/i915_gem.c:1227:
+ i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
-:147: WARNING:LONG_LINE: line over 100 characters
#147: FILE: drivers/gpu/drm/i915/i915_gem.c:1429:
+ i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
-:497: WARNING:AVOID_BUG: Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON()
#497: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1984:
+ BUG_ON(!drm_mm_initialized(&ggtt->vm.mm));
-:1208: ERROR:SPACING: spaces required around that '?' (ctx:VxW)
#1208: FILE: drivers/gpu/drm/i915/i915_trace.h:978:
+ __entry->vm = to->ppgtt? &to->ppgtt->vm : NULL;
^
-:1541: ERROR:CODE_INDENT: code indent should use tabs where possible
#1541: FILE: drivers/gpu/drm/i915/selftests/huge_pages.c:1594:
+^I ^Ictx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;$
-:1541: WARNING:SPACE_BEFORE_TAB: please, no space before tabs
#1541: FILE: drivers/gpu/drm/i915/selftests/huge_pages.c:1594:
+^I ^Ictx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;$
-:1894: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#1894: FILE: drivers/gpu/drm/i915/selftests/i915_gem_gtt.c:1273:
+ total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
^
-:1927: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#1927: FILE: drivers/gpu/drm/i915/selftests/i915_gem_gtt.c:1322:
+ total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
^
-:2083: CHECK:SPACING: spaces preferred around that '*' (ctx:VxV)
#2083: FILE: drivers/gpu/drm/i915/selftests/i915_gem_gtt.c:1582:
+ total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
^
-:2138: WARNING:LONG_LINE: line over 100 characters
#2138: FILE: drivers/gpu/drm/i915/selftests/i915_gem_object.c:314:
+ (1 + next_prime_number(i915->ggtt.vm.total >> PAGE_SHIFT)) << PAGE_SHIFT);
total: 2 errors, 5 warnings, 4 checks, 2084 lines checked
7a2d47cc358a drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the object list
cc39095ecd03 drm/i915: Prepare for non-object vma
10c5a34b2e15 drm/i915: Decouple vma vfuncs from vm
4bfb5a70abf2 drm/i915/gtt: Push allocation to hw ppgtt constructor
456ff6928b6b drm/i915/gtt: Subclass gen6_hw_ppgtt
-:323: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'base' - possible side-effects?
#323: FILE: drivers/gpu/drm/i915/i915_gem_gtt.h:418:
+#define __to_gen6_ppgtt(base) container_of(base, struct gen6_hw_ppgtt, base)
total: 0 errors, 0 warnings, 1 checks, 342 lines checked
8c7849ff7796 drm/i915/gtt Onionify error handling for gen6_ppgtt_create
15aa72fb3e6f drm/i915/gtt: Reorder aliasing_ppgtt fini
1ac4a9a25c0b drm/i915/gtt: Make gen6 page directories evictable
-:235: WARNING:MEMORY_BARRIER: memory barrier without comment
#235: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:1991:
+ wmb();
-:262: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "!vma"
#262: FILE: drivers/gpu/drm/i915/i915_gem_gtt.c:2018:
+ if (vma == NULL)
total: 0 errors, 1 warnings, 1 checks, 362 lines checked
a1d36edef4b0 drm/i915/gtt: Only keep gen6 page directories pinned while active
6da02c7420cb RFT drm/i915/gtt: Enable full-ppgtt by default everywhere
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* ✗ Fi.CI.SPARSE: warning for series starting with [01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
` (11 preceding siblings ...)
2018-06-05 7:30 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member Patchwork
@ 2018-06-05 7:33 ` Patchwork
2018-06-05 7:46 ` ✗ Fi.CI.BAT: failure " Patchwork
13 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2018-06-05 7:33 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member
URL : https://patchwork.freedesktop.org/series/44244/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915/gtt: Rename i915_hw_ppgtt base member
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1514:17: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1514:17: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1514:17: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1514:17: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:2025:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:2025:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:3466:36: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:3467:38: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:3467:38: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:3475:38: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:3475:38: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:2025:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:2025:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:3463:34: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:3465:25: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:3465:25: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:3474:25: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:3474:25: warning: expression using sizeof(void)
Commit: drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the object list
Okay!
Commit: drm/i915: Prepare for non-object vma
Okay!
Commit: drm/i915: Decouple vma vfuncs from vm
Okay!
Commit: drm/i915/gtt: Push allocation to hw ppgtt constructor
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1644:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1644:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1649:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1649:9: warning: expression using sizeof(void)
Commit: drm/i915/gtt: Subclass gen6_hw_ppgtt
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1649:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1649:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1708:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1708:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1709:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1709:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1913:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1913:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:2031:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:2031:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1914:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1914:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:2031:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:2031:9: warning: expression using sizeof(void)
Commit: drm/i915/gtt Onionify error handling for gen6_ppgtt_create
Okay!
Commit: drm/i915/gtt: Reorder aliasing_ppgtt fini
Okay!
Commit: drm/i915/gtt: Make gen6 page directories evictable
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1709:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1709:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1914:9: warning: expression using sizeof(void)
-O:drivers/gpu/drm/i915/i915_gem_gtt.c:1914:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1889:9: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/i915_gem_gtt.c:1889:9: warning: expression using sizeof(void)
Commit: drm/i915/gtt: Only keep gen6 page directories pinned while active
Okay!
Commit: RFT drm/i915/gtt: Enable full-ppgtt by default everywhere
Okay!
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* ✗ Fi.CI.BAT: failure for series starting with [01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
` (12 preceding siblings ...)
2018-06-05 7:33 ` ✗ Fi.CI.SPARSE: " Patchwork
@ 2018-06-05 7:46 ` Patchwork
13 siblings, 0 replies; 28+ messages in thread
From: Patchwork @ 2018-06-05 7:46 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: series starting with [01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member
URL : https://patchwork.freedesktop.org/series/44244/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4278 -> Patchwork_9191 =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9191 absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9191, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/44244/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9191:
=== IGT changes ===
==== Possible regressions ====
igt@gem_ctx_create@basic-files:
fi-ivb-3520m: PASS -> FAIL
fi-ivb-3770: PASS -> DMESG-FAIL
fi-hsw-peppy: PASS -> FAIL
igt@gem_exec_suspend@basic-s4-devices:
fi-hsw-4770r: PASS -> FAIL
fi-snb-2600: PASS -> INCOMPLETE
== Known issues ==
Here are the changes found in Patchwork_9191 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@debugfs_test@read_all_entries:
fi-snb-2520m: PASS -> INCOMPLETE (fdo#103713)
igt@drv_module_reload@basic-no-display:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#106725)
igt@kms_flip@basic-flip-vs-modeset:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000)
igt@kms_pipe_crc_basic@suspend-read-crc-pipe-c:
fi-cnl-psr: PASS -> DMESG-WARN (fdo#104951)
==== Possible fixes ====
igt@kms_flip@basic-flip-vs-wf_vblank:
fi-glk-j4005: FAIL (fdo#100368) -> PASS
fi-cfl-s3: FAIL (fdo#100368) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-b-frame-sequence:
fi-glk-j4005: FAIL (fdo#103481) -> PASS
igt@kms_pipe_crc_basic@read-crc-pipe-c:
fi-glk-j4005: DMESG-WARN (fdo#106000) -> PASS
igt@prime_vgem@basic-fence-flip:
fi-ilk-650: FAIL (fdo#104008) -> PASS
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#103481 https://bugs.freedesktop.org/show_bug.cgi?id=103481
fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713
fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008
fdo#104951 https://bugs.freedesktop.org/show_bug.cgi?id=104951
fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
fdo#106725 https://bugs.freedesktop.org/show_bug.cgi?id=106725
== Participating hosts (40 -> 37) ==
Additional (1): fi-bxt-dsi
Missing (4): fi-ctg-p8600 fi-ilk-m540 fi-byt-squawks fi-skl-6700hq
== Build changes ==
* Linux: CI_DRM_4278 -> Patchwork_9191
CI_DRM_4278: 6832f9f1d1d74ea696ae703d6ce9aa195be663f2 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4506: 6c9d04797b7ef972b1b3746df6985071d1d2de26 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9191: 6da02c7420cb5116c6cecb6bc4763bc9b8206aef @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
6da02c7420cb RFT drm/i915/gtt: Enable full-ppgtt by default everywhere
a1d36edef4b0 drm/i915/gtt: Only keep gen6 page directories pinned while active
1ac4a9a25c0b drm/i915/gtt: Make gen6 page directories evictable
15aa72fb3e6f drm/i915/gtt: Reorder aliasing_ppgtt fini
8c7849ff7796 drm/i915/gtt Onionify error handling for gen6_ppgtt_create
456ff6928b6b drm/i915/gtt: Subclass gen6_hw_ppgtt
4bfb5a70abf2 drm/i915/gtt: Push allocation to hw ppgtt constructor
10c5a34b2e15 drm/i915: Decouple vma vfuncs from vm
cc39095ecd03 drm/i915: Prepare for non-object vma
7a2d47cc358a drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the object list
f1e88b978f6f drm/i915/gtt: Rename i915_hw_ppgtt base member
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9191/issues.html
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 02/11] drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the object list
2018-06-05 7:19 ` [PATCH 02/11] drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the object list Chris Wilson
@ 2018-06-05 7:51 ` Joonas Lahtinen
2018-06-05 8:03 ` Chris Wilson
2018-06-05 8:19 ` Chris Wilson
0 siblings, 2 replies; 28+ messages in thread
From: Joonas Lahtinen @ 2018-06-05 7:51 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Quoting Chris Wilson (2018-06-05 10:19:40)
> In preparation, for having non-vma objects stored inside the ggtt, to
> handle restoration of the GGTT following resume, we need to walk over
> the ggtt address space rebinding vma, as opposed to walking over bound
> objects looking for ggtt entries.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Matthew Auld <matthew.william.auld@gmail.com>
Comment below.
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> @@ -3578,21 +3578,15 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
> ggtt->vm.closed = true; /* skip rewriting PTE on VMA unbind */
>
> /* clflush objects bound into the GGTT and rebind them. */
> - list_for_each_entry_safe(obj, on, &dev_priv->mm.bound_list, mm.link) {
> - bool ggtt_bound = false;
> - struct i915_vma *vma;
> -
> - for_each_ggtt_vma(vma, obj) {
> - if (!i915_vma_unbind(vma))
> - continue;
> + GEM_BUG_ON(!list_empty(&ggtt->vm.active_list));
> + list_for_each_entry_safe(vma, vn, &ggtt->vm.inactive_list, vm_link) {
> + struct drm_i915_gem_object *obj = vma->obj;
>
> - WARN_ON(i915_vma_bind(vma, obj->cache_level,
> - PIN_UPDATE));
> - ggtt_bound = true;
> - }
> + if (!i915_vma_unbind(vma))
> + continue;
>
> - if (ggtt_bound)
> - WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
> + WARN_ON(i915_vma_bind(vma, obj->cache_level, PIN_UPDATE));
> + WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
This gets called multiple times per an object for partial and rotated
views, but that should not be our performance bottleneck.
Regards, Joonas
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 02/11] drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the object list
2018-06-05 7:51 ` Joonas Lahtinen
@ 2018-06-05 8:03 ` Chris Wilson
2018-06-05 8:19 ` Chris Wilson
1 sibling, 0 replies; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 8:03 UTC (permalink / raw)
To: Joonas Lahtinen, intel-gfx
Quoting Joonas Lahtinen (2018-06-05 08:51:39)
> Quoting Chris Wilson (2018-06-05 10:19:40)
> > In preparation, for having non-vma objects stored inside the ggtt, to
> > handle restoration of the GGTT following resume, we need to walk over
> > the ggtt address space rebinding vma, as opposed to walking over bound
> > objects looking for ggtt entries.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> > Cc: Matthew Auld <matthew.william.auld@gmail.com>
>
> Comment below.
>
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>
> > @@ -3578,21 +3578,15 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
> > ggtt->vm.closed = true; /* skip rewriting PTE on VMA unbind */
> >
> > /* clflush objects bound into the GGTT and rebind them. */
> > - list_for_each_entry_safe(obj, on, &dev_priv->mm.bound_list, mm.link) {
> > - bool ggtt_bound = false;
> > - struct i915_vma *vma;
> > -
> > - for_each_ggtt_vma(vma, obj) {
> > - if (!i915_vma_unbind(vma))
> > - continue;
> > + GEM_BUG_ON(!list_empty(&ggtt->vm.active_list));
> > + list_for_each_entry_safe(vma, vn, &ggtt->vm.inactive_list, vm_link) {
> > + struct drm_i915_gem_object *obj = vma->obj;
> >
> > - WARN_ON(i915_vma_bind(vma, obj->cache_level,
> > - PIN_UPDATE));
> > - ggtt_bound = true;
> > - }
> > + if (!i915_vma_unbind(vma))
> > + continue;
> >
> > - if (ggtt_bound)
> > - WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
> > + WARN_ON(i915_vma_bind(vma, obj->cache_level, PIN_UPDATE));
> > + WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
>
> This gets called multiple times per an object for partial and rotated
> views, but that should not be our performance bottleneck.
Correct. I thought I had mentioned the drawback, but it appears I just
thought about it. It should be the case that for the majority of those,
we will be able to unbind them anyway. It's only the few objects pinned
for use that we have to flush, and they are the scanout and context
objects.
Furthermore, repeated calls to gtt_domain should come in the wash as
being no-ops, just many checks to determine we have nothing to do.
Improving the whole domain management is on the permanent wishlist
(killing struct_mutex is of immediate priority).
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 02/11] drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the object list
2018-06-05 7:51 ` Joonas Lahtinen
2018-06-05 8:03 ` Chris Wilson
@ 2018-06-05 8:19 ` Chris Wilson
2018-06-05 8:24 ` Chris Wilson
1 sibling, 1 reply; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 8:19 UTC (permalink / raw)
To: Joonas Lahtinen, intel-gfx
Quoting Joonas Lahtinen (2018-06-05 08:51:39)
> Quoting Chris Wilson (2018-06-05 10:19:40)
> > In preparation, for having non-vma objects stored inside the ggtt, to
> > handle restoration of the GGTT following resume, we need to walk over
> > the ggtt address space rebinding vma, as opposed to walking over bound
> > objects looking for ggtt entries.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> > Cc: Matthew Auld <matthew.william.auld@gmail.com>
>
> Comment below.
>
> Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
>
> > @@ -3578,21 +3578,15 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
> > ggtt->vm.closed = true; /* skip rewriting PTE on VMA unbind */
> >
> > /* clflush objects bound into the GGTT and rebind them. */
> > - list_for_each_entry_safe(obj, on, &dev_priv->mm.bound_list, mm.link) {
> > - bool ggtt_bound = false;
> > - struct i915_vma *vma;
> > -
> > - for_each_ggtt_vma(vma, obj) {
> > - if (!i915_vma_unbind(vma))
> > - continue;
> > + GEM_BUG_ON(!list_empty(&ggtt->vm.active_list));
> > + list_for_each_entry_safe(vma, vn, &ggtt->vm.inactive_list, vm_link) {
> > + struct drm_i915_gem_object *obj = vma->obj;
> >
> > - WARN_ON(i915_vma_bind(vma, obj->cache_level,
> > - PIN_UPDATE));
> > - ggtt_bound = true;
> > - }
> > + if (!i915_vma_unbind(vma))
> > + continue;
> >
> > - if (ggtt_bound)
> > - WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
> > + WARN_ON(i915_vma_bind(vma, obj->cache_level, PIN_UPDATE));
> > + WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
>
> This gets called multiple times per an object for partial and rotated
> views, but that should not be our performance bottleneck.
It is however worth mentioning that rewriting the GTT is one of the pain
points for resume. A few GiB of WC writes is not free, so we have tried
hard not to rewrite it multiple times and to defer setup until use.
(With ppGTT, the GGTT is emptier so full-ppgtt should be a net win.)
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 02/11] drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the object list
2018-06-05 8:19 ` Chris Wilson
@ 2018-06-05 8:24 ` Chris Wilson
0 siblings, 0 replies; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 8:24 UTC (permalink / raw)
To: Joonas Lahtinen, intel-gfx
Quoting Chris Wilson (2018-06-05 09:19:07)
> Quoting Joonas Lahtinen (2018-06-05 08:51:39)
> > Quoting Chris Wilson (2018-06-05 10:19:40)
> > > In preparation, for having non-vma objects stored inside the ggtt, to
> > > handle restoration of the GGTT following resume, we need to walk over
> > > the ggtt address space rebinding vma, as opposed to walking over bound
> > > objects looking for ggtt entries.
> > >
> > > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> > > Cc: Matthew Auld <matthew.william.auld@gmail.com>
> >
> > Comment below.
> >
> > Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> >
> > > @@ -3578,21 +3578,15 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
> > > ggtt->vm.closed = true; /* skip rewriting PTE on VMA unbind */
> > >
> > > /* clflush objects bound into the GGTT and rebind them. */
> > > - list_for_each_entry_safe(obj, on, &dev_priv->mm.bound_list, mm.link) {
> > > - bool ggtt_bound = false;
> > > - struct i915_vma *vma;
> > > -
> > > - for_each_ggtt_vma(vma, obj) {
> > > - if (!i915_vma_unbind(vma))
> > > - continue;
> > > + GEM_BUG_ON(!list_empty(&ggtt->vm.active_list));
> > > + list_for_each_entry_safe(vma, vn, &ggtt->vm.inactive_list, vm_link) {
> > > + struct drm_i915_gem_object *obj = vma->obj;
> > >
> > > - WARN_ON(i915_vma_bind(vma, obj->cache_level,
> > > - PIN_UPDATE));
> > > - ggtt_bound = true;
> > > - }
> > > + if (!i915_vma_unbind(vma))
> > > + continue;
> > >
> > > - if (ggtt_bound)
> > > - WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
> > > + WARN_ON(i915_vma_bind(vma, obj->cache_level, PIN_UPDATE));
> > > + WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
> >
> > This gets called multiple times per an object for partial and rotated
> > views, but that should not be our performance bottleneck.
>
> It is however worth mentioning that rewriting the GTT is one of the pain
> points for resume. A few GiB of WC writes is not free, so we have tried
> hard not to rewrite it multiple times and to defer setup until use.
> (With ppGTT, the GGTT is emptier so full-ppgtt should be a net win.)
Hmm, we can filter on vma->flags & PIN_GLOBAL so that we don't touch
aliasing_ppgtt only vma...
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 10/11] drm/i915/gtt: Only keep gen6 page directories pinned while active
2018-06-05 7:19 ` [PATCH 10/11] drm/i915/gtt: Only keep gen6 page directories pinned while active Chris Wilson
@ 2018-06-05 8:42 ` Joonas Lahtinen
0 siblings, 0 replies; 28+ messages in thread
From: Joonas Lahtinen @ 2018-06-05 8:42 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Quoting Chris Wilson (2018-06-05 10:19:48)
> In order to be able to evict the gen6 ppgtt, we have to unpin it at some
> point. We can simply use our context activity tracking to know when the
> ppgtt is no longer in use by hardware, and so only keep it pinned while
> being used a request.
>
> For the kernel_context (and thus aliasing_ppgtt), it remains pinned at
> all times, as the kernel_context itself is pinned at all times.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Matthew Auld <matthew.william.auld@gmail.com>
<SNIP>
> @@ -1321,6 +1344,10 @@ __ring_context_pin(struct intel_engine_cs *engine,
> ce->state->obj->pin_global++;
> }
>
> + err = __context_pin_ppgtt(ce->gem_context);
> + if (err)
> + goto err_unpin;
> +
> i915_gem_context_get(ctx);
>
> /* One ringbuffer to rule them all */
> @@ -1329,6 +1356,9 @@ __ring_context_pin(struct intel_engine_cs *engine,
>
> return ce;
>
> +err_unpin:
> + if (ce->state)
> + i915_vma_unpin(ce->state);
Adding __context_unpin and calling it here might cause less confusion.
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
> err:
> ce->pin_count = 0;
> return ERR_PTR(err);
> --
> 2.17.1
>
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 04/11] drm/i915: Decouple vma vfuncs from vm
2018-06-05 7:19 ` [PATCH 04/11] drm/i915: Decouple vma vfuncs from vm Chris Wilson
@ 2018-06-05 9:05 ` Joonas Lahtinen
0 siblings, 0 replies; 28+ messages in thread
From: Joonas Lahtinen @ 2018-06-05 9:05 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Quoting Chris Wilson (2018-06-05 10:19:42)
> To allow for future non-object backed vma, we need to be able to
> specialise the callbacks for binding, et al, the vma. For example,
> instead of calling vma->vm->bind_vma(), we now call
> vma->ops->bind_vma(). This gives us the opportunity to later override the
> operation for a custom vma.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Matthew Auld <matthew.william.auld@gmail.com>
<SNIP>
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -58,6 +58,7 @@
>
> struct drm_i915_file_private;
> struct drm_i915_fence_reg;
> +struct i915_vma;
>
> typedef u32 gen6_pte_t;
> typedef u64 gen8_pte_t;
> @@ -254,6 +255,20 @@ struct i915_pml4 {
> struct i915_page_directory_pointer *pdps[GEN8_PML4ES_PER_PML4];
> };
>
> +struct i915_vma_ops {
> + /*
> + * Unmap an object from an address space. This usually consists of
> + * setting the valid PTE entries to a reserved scratch page.
> + */
> + void (*unbind_vma)(struct i915_vma *vma);
> + /* Map an object into an address space with the given cache flags. */
> + int (*bind_vma)(struct i915_vma *vma,
> + enum i915_cache_level cache_level,
> + u32 flags);
While here, you could swap the bind/unbind to be in the logical order
which they are also initialized in.
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
> + int (*set_pages)(struct i915_vma *vma);
> + void (*clear_pages)(struct i915_vma *vma);
> +};
> +
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 03/11] drm/i915: Prepare for non-object vma
2018-06-05 7:19 ` [PATCH 03/11] drm/i915: Prepare for non-object vma Chris Wilson
@ 2018-06-05 9:21 ` Joonas Lahtinen
2018-06-05 9:25 ` Chris Wilson
0 siblings, 1 reply; 28+ messages in thread
From: Joonas Lahtinen @ 2018-06-05 9:21 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Quoting Chris Wilson (2018-06-05 10:19:41)
> In order to allow ourselves to use VMA to wrap other entities other than
> GEM objects, we need to allow for the vma->obj backpointer to be NULL.
> In most cases, we know we are operating on a GEM object and its vma, but
> we need the core code (such as i915_vma_pin/insert/bind/unbind) to work
> regardless of the innards.
>
> The remaining eyesore here is vma->obj->cache_level and related (but
> less of an issue) vma->obj->gt_ro. With a bit of care we should mirror
> those on the vma itself.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Matthew Auld <matthew.william.auld@gmail.com>
> @@ -1569,11 +1572,11 @@ static void capture_pinned_buffers(struct i915_gpu_state *error)
> int count_inactive, count_active;
>
> count_inactive = 0;
> - list_for_each_entry(vma, &vm->active_list, vm_link)
> + list_for_each_entry(vma, &vm->inactive_list, vm_link)
> count_inactive++;
>
> count_active = 0;
> - list_for_each_entry(vma, &vm->inactive_list, vm_link)
> + list_for_each_entry(vma, &vm->active_list, vm_link)
> count_active++;
Pretty sure this should go as a separate bugfix...
> @@ -586,23 +592,28 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
> GEM_BUG_ON(vma->node.start + vma->node.size > end);
> }
> GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
> - GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, obj->cache_level));
> + GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, cache_level));
>
> list_move_tail(&vma->vm_link, &vma->vm->inactive_list);
>
> - spin_lock(&dev_priv->mm.obj_lock);
> - list_move_tail(&obj->mm.link, &dev_priv->mm.bound_list);
> - obj->bind_count++;
> - spin_unlock(&dev_priv->mm.obj_lock);
> + if (vma->obj) {
> + struct drm_i915_gem_object *obj = vma->obj;
> +
> + spin_lock(&dev_priv->mm.obj_lock);
> + list_move_tail(&obj->mm.link, &dev_priv->mm.bound_list);
> + obj->bind_count++;
> + spin_unlock(&dev_priv->mm.obj_lock);
>
> - GEM_BUG_ON(atomic_read(&obj->mm.pages_pin_count) < obj->bind_count);
> + GEM_BUG_ON(atomic_read(&obj->mm.pages_pin_count) < obj->bind_count);
checkpatch will yell for long line. Block could even warrant a __ func.
> + }
>
> return 0;
>
> err_clear:
> vma->vm->clear_pages(vma);
> err_unpin:
> - i915_gem_object_unpin_pages(obj);
> + if (vma->obj)
> + i915_gem_object_unpin_pages(vma->obj);
> return ret;
> }
>
> @@ -610,7 +621,6 @@ static void
> i915_vma_remove(struct i915_vma *vma)
> {
> struct drm_i915_private *i915 = vma->vm->i915;
> - struct drm_i915_gem_object *obj = vma->obj;
>
> GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
> GEM_BUG_ON(vma->flags & (I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND));
> @@ -620,20 +630,26 @@ i915_vma_remove(struct i915_vma *vma)
> drm_mm_remove_node(&vma->node);
> list_move_tail(&vma->vm_link, &vma->vm->unbound_list);
>
> - /* Since the unbound list is global, only move to that list if
> + /*
> + * Since the unbound list is global, only move to that list if
> * no more VMAs exist.
> */
> - spin_lock(&i915->mm.obj_lock);
> - if (--obj->bind_count == 0)
> - list_move_tail(&obj->mm.link, &i915->mm.unbound_list);
> - spin_unlock(&i915->mm.obj_lock);
> -
> - /* And finally now the object is completely decoupled from this vma,
> - * we can drop its hold on the backing storage and allow it to be
> - * reaped by the shrinker.
> - */
> - i915_gem_object_unpin_pages(obj);
> - GEM_BUG_ON(atomic_read(&obj->mm.pages_pin_count) < obj->bind_count);
> + if (vma->obj) {
> + struct drm_i915_gem_object *obj = vma->obj;
> +
> + spin_lock(&i915->mm.obj_lock);
> + if (--obj->bind_count == 0)
> + list_move_tail(&obj->mm.link, &i915->mm.unbound_list);
> + spin_unlock(&i915->mm.obj_lock);
> +
> + /*
> + * And finally now the object is completely decoupled from this
> + * vma, we can drop its hold on the backing storage and allow
> + * it to be reaped by the shrinker.
> + */
> + i915_gem_object_unpin_pages(obj);
> + GEM_BUG_ON(atomic_read(&obj->mm.pages_pin_count) < obj->bind_count);
Right, two helpers it is.
> +++ b/drivers/gpu/drm/i915/i915_vma.h
> @@ -407,7 +407,7 @@ static inline void __i915_vma_unpin_fence(struct i915_vma *vma)
> static inline void
> i915_vma_unpin_fence(struct i915_vma *vma)
> {
> - lockdep_assert_held(&vma->obj->base.dev->struct_mutex);
> + /* lockdep_assert_held(&vma->vm->i915->drm.struct_mutex); */
Umm?
Regards, Joonas
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 03/11] drm/i915: Prepare for non-object vma
2018-06-05 9:21 ` Joonas Lahtinen
@ 2018-06-05 9:25 ` Chris Wilson
0 siblings, 0 replies; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 9:25 UTC (permalink / raw)
To: Joonas Lahtinen, intel-gfx
Quoting Joonas Lahtinen (2018-06-05 10:21:29)
> Quoting Chris Wilson (2018-06-05 10:19:41)
> > +++ b/drivers/gpu/drm/i915/i915_vma.h
> > @@ -407,7 +407,7 @@ static inline void __i915_vma_unpin_fence(struct i915_vma *vma)
> > static inline void
> > i915_vma_unpin_fence(struct i915_vma *vma)
> > {
> > - lockdep_assert_held(&vma->obj->base.dev->struct_mutex);
> > + /* lockdep_assert_held(&vma->vm->i915->drm.struct_mutex); */
>
> Umm?
Header inclusion pain. drm_i915_private isn't defined at this point.
So I left a placeholder just in case.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 05/11] drm/i915/gtt: Push allocation to hw ppgtt constructor
2018-06-05 7:19 ` [PATCH 05/11] drm/i915/gtt: Push allocation to hw ppgtt constructor Chris Wilson
@ 2018-06-05 9:32 ` Joonas Lahtinen
0 siblings, 0 replies; 28+ messages in thread
From: Joonas Lahtinen @ 2018-06-05 9:32 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Quoting Chris Wilson (2018-06-05 10:19:43)
> In the next patch, we will subclass the gen6 hw_ppgtt. In order, for the
> two different generations of hw ppgtt stucts to be of different size,
> push the allocation down to the constructor.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 06/11] drm/i915/gtt: Subclass gen6_hw_ppgtt
2018-06-05 7:19 ` [PATCH 06/11] drm/i915/gtt: Subclass gen6_hw_ppgtt Chris Wilson
@ 2018-06-05 9:43 ` Joonas Lahtinen
2018-06-05 9:58 ` Chris Wilson
0 siblings, 1 reply; 28+ messages in thread
From: Joonas Lahtinen @ 2018-06-05 9:43 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Quoting Chris Wilson (2018-06-05 10:19:44)
> The legacy gen6 ppgtt needs a little more hand holding than gen8+, and
> so requires a larger structure. As I intend to make this slightly more
> complicated in the future, separate the gen6 from the core gen8 hw
> struct by subclassing. This patch moves the gen6 only features out to
> gen6_hw_ppgtt and pipes the new type everywhere that needs it.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Matthew Auld <matthew.william.auld@gmail.com>
It's at times confusing when gen6_foo takes either the ppgtt or
ppgtt->base, but at least compiler will protect from that.
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Regards, Joonas
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 06/11] drm/i915/gtt: Subclass gen6_hw_ppgtt
2018-06-05 9:43 ` Joonas Lahtinen
@ 2018-06-05 9:58 ` Chris Wilson
0 siblings, 0 replies; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 9:58 UTC (permalink / raw)
To: Joonas Lahtinen, intel-gfx
Quoting Joonas Lahtinen (2018-06-05 10:43:14)
> Quoting Chris Wilson (2018-06-05 10:19:44)
> > The legacy gen6 ppgtt needs a little more hand holding than gen8+, and
> > so requires a larger structure. As I intend to make this slightly more
> > complicated in the future, separate the gen6 from the core gen8 hw
> > struct by subclassing. This patch moves the gen6 only features out to
> > gen6_hw_ppgtt and pipes the new type everywhere that needs it.
> >
> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> > Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> > Cc: Matthew Auld <matthew.william.auld@gmail.com>
>
> It's at times confusing when gen6_foo takes either the ppgtt or
> ppgtt->base, but at least compiler will protect from that.
The only consolation is that the number of gen6/i915 switches are reduced
over time. I was trying to keep it as strongly typed as possible with
the minimal of fuss. Hopefully, I struck the right balance (for the
present time, at this point in the series).
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member
2018-06-05 7:19 ` [PATCH 01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member Chris Wilson
@ 2018-06-05 14:38 ` Mika Kuoppala
2018-06-05 14:41 ` Chris Wilson
0 siblings, 1 reply; 28+ messages in thread
From: Mika Kuoppala @ 2018-06-05 14:38 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> In the near future, I want to subclass gen6_hw_ppgtt as it contains a
> few specialised members and I wish to add more. To avoid the ugliness of
> using ppgtt->base.base, rename the i915_hw_ppgtt base member
> (i915_address_space) as vm, which is our common shorthand for an
> i915_address_space local.
>
Strolled it through. Couple of formatting fixes and
getting dev_priv through vm. Didn't notice anything
out of ordinary.
For me it reads better now, and we should have done this
prior to doing 32bit ppgtts :P
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> Cc: Matthew Auld <matthew.william.auld@gmail.com>
> ---
> drivers/gpu/drm/i915/gvt/aperture_gm.c | 2 +-
> drivers/gpu/drm/i915/gvt/gvt.h | 4 +-
> drivers/gpu/drm/i915/i915_debugfs.c | 4 +-
> drivers/gpu/drm/i915/i915_drv.h | 2 +-
> drivers/gpu/drm/i915/i915_gem.c | 30 +-
> drivers/gpu/drm/i915/i915_gem_context.c | 10 +-
> drivers/gpu/drm/i915/i915_gem_execbuffer.c | 16 +-
> drivers/gpu/drm/i915/i915_gem_gtt.c | 329 +++++++++---------
> drivers/gpu/drm/i915/i915_gem_gtt.h | 8 +-
> drivers/gpu/drm/i915/i915_gem_render_state.c | 2 +-
> drivers/gpu/drm/i915/i915_gem_shrinker.c | 2 +-
> drivers/gpu/drm/i915/i915_gem_stolen.c | 6 +-
> drivers/gpu/drm/i915/i915_gpu_error.c | 9 +-
> drivers/gpu/drm/i915/i915_trace.h | 4 +-
> drivers/gpu/drm/i915/i915_vgpu.c | 8 +-
> drivers/gpu/drm/i915/i915_vma.c | 2 +-
> drivers/gpu/drm/i915/intel_engine_cs.c | 4 +-
> drivers/gpu/drm/i915/intel_guc.c | 2 +-
> drivers/gpu/drm/i915/intel_guc_submission.c | 2 +-
> drivers/gpu/drm/i915/intel_lrc.c | 10 +-
> drivers/gpu/drm/i915/intel_ringbuffer.c | 4 +-
> drivers/gpu/drm/i915/selftests/huge_pages.c | 50 +--
> .../gpu/drm/i915/selftests/i915_gem_context.c | 6 +-
> .../gpu/drm/i915/selftests/i915_gem_evict.c | 34 +-
> drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 110 +++---
> .../gpu/drm/i915/selftests/i915_gem_object.c | 6 +-
> drivers/gpu/drm/i915/selftests/i915_request.c | 5 +-
> drivers/gpu/drm/i915/selftests/i915_vma.c | 31 +-
> .../gpu/drm/i915/selftests/intel_hangcheck.c | 4 +-
> drivers/gpu/drm/i915/selftests/intel_lrc.c | 2 +-
> .../drm/i915/selftests/intel_workarounds.c | 2 +-
> drivers/gpu/drm/i915/selftests/mock_gtt.c | 66 ++--
> 32 files changed, 388 insertions(+), 388 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gvt/aperture_gm.c b/drivers/gpu/drm/i915/gvt/aperture_gm.c
> index 7c9ec4f4f36c..380eeb2a0e83 100644
> --- a/drivers/gpu/drm/i915/gvt/aperture_gm.c
> +++ b/drivers/gpu/drm/i915/gvt/aperture_gm.c
> @@ -61,7 +61,7 @@ static int alloc_gm(struct intel_vgpu *vgpu, bool high_gm)
> }
>
> mutex_lock(&dev_priv->drm.struct_mutex);
> - ret = i915_gem_gtt_insert(&dev_priv->ggtt.base, node,
> + ret = i915_gem_gtt_insert(&dev_priv->ggtt.vm, node,
> size, I915_GTT_PAGE_SIZE,
> I915_COLOR_UNEVICTABLE,
> start, end, flags);
> diff --git a/drivers/gpu/drm/i915/gvt/gvt.h b/drivers/gpu/drm/i915/gvt/gvt.h
> index 05d15a095310..2ff0d40281a9 100644
> --- a/drivers/gpu/drm/i915/gvt/gvt.h
> +++ b/drivers/gpu/drm/i915/gvt/gvt.h
> @@ -361,9 +361,9 @@ int intel_gvt_load_firmware(struct intel_gvt *gvt);
> #define gvt_aperture_sz(gvt) (gvt->dev_priv->ggtt.mappable_end)
> #define gvt_aperture_pa_base(gvt) (gvt->dev_priv->ggtt.gmadr.start)
>
> -#define gvt_ggtt_gm_sz(gvt) (gvt->dev_priv->ggtt.base.total)
> +#define gvt_ggtt_gm_sz(gvt) (gvt->dev_priv->ggtt.vm.total)
> #define gvt_ggtt_sz(gvt) \
> - ((gvt->dev_priv->ggtt.base.total >> PAGE_SHIFT) << 3)
> + ((gvt->dev_priv->ggtt.vm.total >> PAGE_SHIFT) << 3)
> #define gvt_hidden_sz(gvt) (gvt_ggtt_gm_sz(gvt) - gvt_aperture_sz(gvt))
>
> #define gvt_aperture_gmadr_base(gvt) (0)
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 15e86d34a81c..698af45e229c 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -328,7 +328,7 @@ static int per_file_stats(int id, void *ptr, void *data)
> } else {
> struct i915_hw_ppgtt *ppgtt = i915_vm_to_ppgtt(vma->vm);
>
> - if (ppgtt->base.file != stats->file_priv)
> + if (ppgtt->vm.file != stats->file_priv)
> continue;
> }
>
> @@ -508,7 +508,7 @@ static int i915_gem_object_info(struct seq_file *m, void *data)
> dpy_count, dpy_size);
>
> seq_printf(m, "%llu [%pa] gtt total\n",
> - ggtt->base.total, &ggtt->mappable_end);
> + ggtt->vm.total, &ggtt->mappable_end);
> seq_printf(m, "Supported page sizes: %s\n",
> stringify_page_sizes(INTEL_INFO(dev_priv)->page_sizes,
> buf, sizeof(buf)));
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 06ecac4c3253..a4bb30c32a52 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -3213,7 +3213,7 @@ struct dma_buf *i915_gem_prime_export(struct drm_device *dev,
> static inline struct i915_hw_ppgtt *
> i915_vm_to_ppgtt(struct i915_address_space *vm)
> {
> - return container_of(vm, struct i915_hw_ppgtt, base);
> + return container_of(vm, struct i915_hw_ppgtt, vm);
> }
>
> /* i915_gem_fence_reg.c */
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index cb680ddafa0c..6ce29d1c20be 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -65,7 +65,7 @@ insert_mappable_node(struct i915_ggtt *ggtt,
> struct drm_mm_node *node, u32 size)
> {
> memset(node, 0, sizeof(*node));
> - return drm_mm_insert_node_in_range(&ggtt->base.mm, node,
> + return drm_mm_insert_node_in_range(&ggtt->vm.mm, node,
> size, 0, I915_COLOR_UNEVICTABLE,
> 0, ggtt->mappable_end,
> DRM_MM_INSERT_LOW);
> @@ -249,17 +249,17 @@ i915_gem_get_aperture_ioctl(struct drm_device *dev, void *data,
> struct i915_vma *vma;
> u64 pinned;
>
> - pinned = ggtt->base.reserved;
> + pinned = ggtt->vm.reserved;
> mutex_lock(&dev->struct_mutex);
> - list_for_each_entry(vma, &ggtt->base.active_list, vm_link)
> + list_for_each_entry(vma, &ggtt->vm.active_list, vm_link)
> if (i915_vma_is_pinned(vma))
> pinned += vma->node.size;
> - list_for_each_entry(vma, &ggtt->base.inactive_list, vm_link)
> + list_for_each_entry(vma, &ggtt->vm.inactive_list, vm_link)
> if (i915_vma_is_pinned(vma))
> pinned += vma->node.size;
> mutex_unlock(&dev->struct_mutex);
>
> - args->aper_size = ggtt->base.total;
> + args->aper_size = ggtt->vm.total;
> args->aper_available_size = args->aper_size - pinned;
>
> return 0;
> @@ -1223,9 +1223,9 @@ i915_gem_gtt_pread(struct drm_i915_gem_object *obj,
> page_length = remain < page_length ? remain : page_length;
> if (node.allocated) {
> wmb();
> - ggtt->base.insert_page(&ggtt->base,
> - i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
> - node.start, I915_CACHE_NONE, 0);
> + ggtt->vm.insert_page(&ggtt->vm,
> + i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
> + node.start, I915_CACHE_NONE, 0);
> wmb();
> } else {
> page_base += offset & PAGE_MASK;
> @@ -1246,8 +1246,7 @@ i915_gem_gtt_pread(struct drm_i915_gem_object *obj,
> out_unpin:
> if (node.allocated) {
> wmb();
> - ggtt->base.clear_range(&ggtt->base,
> - node.start, node.size);
> + ggtt->vm.clear_range(&ggtt->vm, node.start, node.size);
> remove_mappable_node(&node);
> } else {
> i915_vma_unpin(vma);
> @@ -1426,9 +1425,9 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
> page_length = remain < page_length ? remain : page_length;
> if (node.allocated) {
> wmb(); /* flush the write before we modify the GGTT */
> - ggtt->base.insert_page(&ggtt->base,
> - i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
> - node.start, I915_CACHE_NONE, 0);
> + ggtt->vm.insert_page(&ggtt->vm,
> + i915_gem_object_get_dma_address(obj, offset >> PAGE_SHIFT),
> + node.start, I915_CACHE_NONE, 0);
> wmb(); /* flush modifications to the GGTT (insert_page) */
> } else {
> page_base += offset & PAGE_MASK;
> @@ -1455,8 +1454,7 @@ i915_gem_gtt_pwrite_fast(struct drm_i915_gem_object *obj,
> out_unpin:
> if (node.allocated) {
> wmb();
> - ggtt->base.clear_range(&ggtt->base,
> - node.start, node.size);
> + ggtt->vm.clear_range(&ggtt->vm, node.start, node.size);
> remove_mappable_node(&node);
> } else {
> i915_vma_unpin(vma);
> @@ -4374,7 +4372,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object *obj,
> u64 flags)
> {
> struct drm_i915_private *dev_priv = to_i915(obj->base.dev);
> - struct i915_address_space *vm = &dev_priv->ggtt.base;
> + struct i915_address_space *vm = &dev_priv->ggtt.vm;
> struct i915_vma *vma;
> int ret;
>
> diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
> index 38c6e9e4e91b..b2c7ac1b074d 100644
> --- a/drivers/gpu/drm/i915/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/i915_gem_context.c
> @@ -197,7 +197,7 @@ static void context_close(struct i915_gem_context *ctx)
> */
> lut_close(ctx);
> if (ctx->ppgtt)
> - i915_ppgtt_close(&ctx->ppgtt->base);
> + i915_ppgtt_close(&ctx->ppgtt->vm);
>
> ctx->file_priv = ERR_PTR(-EBADF);
> i915_gem_context_put(ctx);
> @@ -249,7 +249,7 @@ static u32 default_desc_template(const struct drm_i915_private *i915,
> desc = GEN8_CTX_VALID | GEN8_CTX_PRIVILEGE;
>
> address_mode = INTEL_LEGACY_32B_CONTEXT;
> - if (ppgtt && i915_vm_is_48bit(&ppgtt->base))
> + if (ppgtt && i915_vm_is_48bit(&ppgtt->vm))
> address_mode = INTEL_LEGACY_64B_CONTEXT;
> desc |= address_mode << GEN8_CTX_ADDRESSING_MODE_SHIFT;
>
> @@ -810,11 +810,11 @@ int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
> break;
> case I915_CONTEXT_PARAM_GTT_SIZE:
> if (ctx->ppgtt)
> - args->value = ctx->ppgtt->base.total;
> + args->value = ctx->ppgtt->vm.total;
> else if (to_i915(dev)->mm.aliasing_ppgtt)
> - args->value = to_i915(dev)->mm.aliasing_ppgtt->base.total;
> + args->value = to_i915(dev)->mm.aliasing_ppgtt->vm.total;
> else
> - args->value = to_i915(dev)->ggtt.base.total;
> + args->value = to_i915(dev)->ggtt.vm.total;
> break;
> case I915_CONTEXT_PARAM_NO_ERROR_CAPTURE:
> args->value = i915_gem_context_no_error_capture(ctx);
> diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> index f627a8c47c58..eefd449502e2 100644
> --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
> @@ -703,7 +703,7 @@ static int eb_select_context(struct i915_execbuffer *eb)
> return -ENOENT;
>
> eb->ctx = ctx;
> - eb->vm = ctx->ppgtt ? &ctx->ppgtt->base : &eb->i915->ggtt.base;
> + eb->vm = ctx->ppgtt ? &ctx->ppgtt->vm : &eb->i915->ggtt.vm;
>
> eb->context_flags = 0;
> if (ctx->flags & CONTEXT_NO_ZEROMAP)
> @@ -943,9 +943,9 @@ static void reloc_cache_reset(struct reloc_cache *cache)
> if (cache->node.allocated) {
> struct i915_ggtt *ggtt = cache_to_ggtt(cache);
>
> - ggtt->base.clear_range(&ggtt->base,
> - cache->node.start,
> - cache->node.size);
> + ggtt->vm.clear_range(&ggtt->vm,
> + cache->node.start,
> + cache->node.size);
> drm_mm_remove_node(&cache->node);
> } else {
> i915_vma_unpin((struct i915_vma *)cache->node.mm);
> @@ -1016,7 +1016,7 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj,
> if (IS_ERR(vma)) {
> memset(&cache->node, 0, sizeof(cache->node));
> err = drm_mm_insert_node_in_range
> - (&ggtt->base.mm, &cache->node,
> + (&ggtt->vm.mm, &cache->node,
> PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
> 0, ggtt->mappable_end,
> DRM_MM_INSERT_LOW);
> @@ -1037,9 +1037,9 @@ static void *reloc_iomap(struct drm_i915_gem_object *obj,
> offset = cache->node.start;
> if (cache->node.allocated) {
> wmb();
> - ggtt->base.insert_page(&ggtt->base,
> - i915_gem_object_get_dma_address(obj, page),
> - offset, I915_CACHE_NONE, 0);
> + ggtt->vm.insert_page(&ggtt->vm,
> + i915_gem_object_get_dma_address(obj, page),
> + offset, I915_CACHE_NONE, 0);
> } else {
> offset += page << PAGE_SHIFT;
> }
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index de9180516308..12b1386e47e9 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -780,7 +780,7 @@ static void gen8_initialize_pml4(struct i915_address_space *vm,
> */
> static void mark_tlbs_dirty(struct i915_hw_ppgtt *ppgtt)
> {
> - ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->base.i915)->ring_mask;
> + ppgtt->pd_dirty_rings = INTEL_INFO(ppgtt->vm.i915)->ring_mask;
> }
>
> /* Removes entries from a single page table, releasing it if it's empty.
> @@ -973,7 +973,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
> gen8_pte_t *vaddr;
> bool ret;
>
> - GEM_BUG_ON(idx->pdpe >= i915_pdpes_per_pdp(&ppgtt->base));
> + GEM_BUG_ON(idx->pdpe >= i915_pdpes_per_pdp(&ppgtt->vm));
> pd = pdp->page_directory[idx->pdpe];
> vaddr = kmap_atomic_px(pd->page_table[idx->pde]);
> do {
> @@ -1004,7 +1004,7 @@ gen8_ppgtt_insert_pte_entries(struct i915_hw_ppgtt *ppgtt,
> break;
> }
>
> - GEM_BUG_ON(idx->pdpe >= i915_pdpes_per_pdp(&ppgtt->base));
> + GEM_BUG_ON(idx->pdpe >= i915_pdpes_per_pdp(&ppgtt->vm));
> pd = pdp->page_directory[idx->pdpe];
> }
>
> @@ -1233,7 +1233,7 @@ static int gen8_init_scratch(struct i915_address_space *vm)
>
> static int gen8_ppgtt_notify_vgt(struct i915_hw_ppgtt *ppgtt, bool create)
> {
> - struct i915_address_space *vm = &ppgtt->base;
> + struct i915_address_space *vm = &ppgtt->vm;
> struct drm_i915_private *dev_priv = vm->i915;
> enum vgt_g2v_type msg;
> int i;
> @@ -1294,13 +1294,13 @@ static void gen8_ppgtt_cleanup_4lvl(struct i915_hw_ppgtt *ppgtt)
> int i;
>
> for (i = 0; i < GEN8_PML4ES_PER_PML4; i++) {
> - if (ppgtt->pml4.pdps[i] == ppgtt->base.scratch_pdp)
> + if (ppgtt->pml4.pdps[i] == ppgtt->vm.scratch_pdp)
> continue;
>
> - gen8_ppgtt_cleanup_3lvl(&ppgtt->base, ppgtt->pml4.pdps[i]);
> + gen8_ppgtt_cleanup_3lvl(&ppgtt->vm, ppgtt->pml4.pdps[i]);
> }
>
> - cleanup_px(&ppgtt->base, &ppgtt->pml4);
> + cleanup_px(&ppgtt->vm, &ppgtt->pml4);
> }
>
> static void gen8_ppgtt_cleanup(struct i915_address_space *vm)
> @@ -1314,7 +1314,7 @@ static void gen8_ppgtt_cleanup(struct i915_address_space *vm)
> if (use_4lvl(vm))
> gen8_ppgtt_cleanup_4lvl(ppgtt);
> else
> - gen8_ppgtt_cleanup_3lvl(&ppgtt->base, &ppgtt->pdp);
> + gen8_ppgtt_cleanup_3lvl(&ppgtt->vm, &ppgtt->pdp);
>
> gen8_free_scratch(vm);
> }
> @@ -1450,7 +1450,7 @@ static void gen8_dump_pdp(struct i915_hw_ppgtt *ppgtt,
> gen8_pte_t scratch_pte,
> struct seq_file *m)
> {
> - struct i915_address_space *vm = &ppgtt->base;
> + struct i915_address_space *vm = &ppgtt->vm;
> struct i915_page_directory *pd;
> u32 pdpe;
>
> @@ -1460,7 +1460,7 @@ static void gen8_dump_pdp(struct i915_hw_ppgtt *ppgtt,
> u64 pd_start = start;
> u32 pde;
>
> - if (pdp->page_directory[pdpe] == ppgtt->base.scratch_pd)
> + if (pdp->page_directory[pdpe] == ppgtt->vm.scratch_pd)
> continue;
>
> seq_printf(m, "\tPDPE #%d\n", pdpe);
> @@ -1468,7 +1468,7 @@ static void gen8_dump_pdp(struct i915_hw_ppgtt *ppgtt,
> u32 pte;
> gen8_pte_t *pt_vaddr;
>
> - if (pd->page_table[pde] == ppgtt->base.scratch_pt)
> + if (pd->page_table[pde] == ppgtt->vm.scratch_pt)
> continue;
>
> pt_vaddr = kmap_atomic_px(pt);
> @@ -1501,10 +1501,10 @@ static void gen8_dump_pdp(struct i915_hw_ppgtt *ppgtt,
>
> static void gen8_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
> {
> - struct i915_address_space *vm = &ppgtt->base;
> + struct i915_address_space *vm = &ppgtt->vm;
> const gen8_pte_t scratch_pte =
> gen8_pte_encode(vm->scratch_page.daddr, I915_CACHE_LLC);
> - u64 start = 0, length = ppgtt->base.total;
> + u64 start = 0, length = ppgtt->vm.total;
>
> if (use_4lvl(vm)) {
> u64 pml4e;
> @@ -1512,7 +1512,7 @@ static void gen8_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
> struct i915_page_directory_pointer *pdp;
>
> gen8_for_each_pml4e(pdp, pml4, start, length, pml4e) {
> - if (pml4->pdps[pml4e] == ppgtt->base.scratch_pdp)
> + if (pml4->pdps[pml4e] == ppgtt->vm.scratch_pdp)
> continue;
>
> seq_printf(m, " PML4E #%llu\n", pml4e);
> @@ -1525,10 +1525,10 @@ static void gen8_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
>
> static int gen8_preallocate_top_level_pdp(struct i915_hw_ppgtt *ppgtt)
> {
> - struct i915_address_space *vm = &ppgtt->base;
> + struct i915_address_space *vm = &ppgtt->vm;
> struct i915_page_directory_pointer *pdp = &ppgtt->pdp;
> struct i915_page_directory *pd;
> - u64 start = 0, length = ppgtt->base.total;
> + u64 start = 0, length = ppgtt->vm.total;
> u64 from = start;
> unsigned int pdpe;
>
> @@ -1564,11 +1564,11 @@ static int gen8_preallocate_top_level_pdp(struct i915_hw_ppgtt *ppgtt)
> */
> static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
> {
> - struct i915_address_space *vm = &ppgtt->base;
> + struct i915_address_space *vm = &ppgtt->vm;
> struct drm_i915_private *dev_priv = vm->i915;
> int ret;
>
> - ppgtt->base.total = USES_FULL_48BIT_PPGTT(dev_priv) ?
> + ppgtt->vm.total = USES_FULL_48BIT_PPGTT(dev_priv) ?
> 1ULL << 48 :
> 1ULL << 32;
>
> @@ -1576,26 +1576,26 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
> * And we are not sure about the latter so play safe for now.
> */
> if (IS_CHERRYVIEW(dev_priv) || IS_BROXTON(dev_priv))
> - ppgtt->base.pt_kmap_wc = true;
> + ppgtt->vm.pt_kmap_wc = true;
>
> - ret = gen8_init_scratch(&ppgtt->base);
> + ret = gen8_init_scratch(&ppgtt->vm);
> if (ret) {
> - ppgtt->base.total = 0;
> + ppgtt->vm.total = 0;
> return ret;
> }
>
> if (use_4lvl(vm)) {
> - ret = setup_px(&ppgtt->base, &ppgtt->pml4);
> + ret = setup_px(&ppgtt->vm, &ppgtt->pml4);
> if (ret)
> goto free_scratch;
>
> - gen8_initialize_pml4(&ppgtt->base, &ppgtt->pml4);
> + gen8_initialize_pml4(&ppgtt->vm, &ppgtt->pml4);
>
> - ppgtt->base.allocate_va_range = gen8_ppgtt_alloc_4lvl;
> - ppgtt->base.insert_entries = gen8_ppgtt_insert_4lvl;
> - ppgtt->base.clear_range = gen8_ppgtt_clear_4lvl;
> + ppgtt->vm.allocate_va_range = gen8_ppgtt_alloc_4lvl;
> + ppgtt->vm.insert_entries = gen8_ppgtt_insert_4lvl;
> + ppgtt->vm.clear_range = gen8_ppgtt_clear_4lvl;
> } else {
> - ret = __pdp_init(&ppgtt->base, &ppgtt->pdp);
> + ret = __pdp_init(&ppgtt->vm, &ppgtt->pdp);
> if (ret)
> goto free_scratch;
>
> @@ -1607,35 +1607,35 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
> }
> }
>
> - ppgtt->base.allocate_va_range = gen8_ppgtt_alloc_3lvl;
> - ppgtt->base.insert_entries = gen8_ppgtt_insert_3lvl;
> - ppgtt->base.clear_range = gen8_ppgtt_clear_3lvl;
> + ppgtt->vm.allocate_va_range = gen8_ppgtt_alloc_3lvl;
> + ppgtt->vm.insert_entries = gen8_ppgtt_insert_3lvl;
> + ppgtt->vm.clear_range = gen8_ppgtt_clear_3lvl;
> }
>
> if (intel_vgpu_active(dev_priv))
> gen8_ppgtt_notify_vgt(ppgtt, true);
>
> - ppgtt->base.cleanup = gen8_ppgtt_cleanup;
> - ppgtt->base.bind_vma = gen8_ppgtt_bind_vma;
> - ppgtt->base.unbind_vma = ppgtt_unbind_vma;
> - ppgtt->base.set_pages = ppgtt_set_pages;
> - ppgtt->base.clear_pages = clear_pages;
> + ppgtt->vm.cleanup = gen8_ppgtt_cleanup;
> + ppgtt->vm.bind_vma = gen8_ppgtt_bind_vma;
> + ppgtt->vm.unbind_vma = ppgtt_unbind_vma;
> + ppgtt->vm.set_pages = ppgtt_set_pages;
> + ppgtt->vm.clear_pages = clear_pages;
> ppgtt->debug_dump = gen8_dump_ppgtt;
>
> return 0;
>
> free_scratch:
> - gen8_free_scratch(&ppgtt->base);
> + gen8_free_scratch(&ppgtt->vm);
> return ret;
> }
>
> static void gen6_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
> {
> - struct i915_address_space *vm = &ppgtt->base;
> + struct i915_address_space *vm = &ppgtt->vm;
> struct i915_page_table *unused;
> gen6_pte_t scratch_pte;
> u32 pd_entry, pte, pde;
> - u32 start = 0, length = ppgtt->base.total;
> + u32 start = 0, length = ppgtt->vm.total;
>
> scratch_pte = vm->pte_encode(vm->scratch_page.daddr,
> I915_CACHE_LLC, 0);
> @@ -1972,8 +1972,8 @@ static void gen6_ppgtt_cleanup(struct i915_address_space *vm)
>
> static int gen6_ppgtt_allocate_page_directories(struct i915_hw_ppgtt *ppgtt)
> {
> - struct i915_address_space *vm = &ppgtt->base;
> - struct drm_i915_private *dev_priv = ppgtt->base.i915;
> + struct i915_address_space *vm = &ppgtt->vm;
> + struct drm_i915_private *dev_priv = ppgtt->vm.i915;
> struct i915_ggtt *ggtt = &dev_priv->ggtt;
> int ret;
>
> @@ -1981,16 +1981,16 @@ static int gen6_ppgtt_allocate_page_directories(struct i915_hw_ppgtt *ppgtt)
> * allocator works in address space sizes, so it's multiplied by page
> * size. We allocate at the top of the GTT to avoid fragmentation.
> */
> - BUG_ON(!drm_mm_initialized(&ggtt->base.mm));
> + BUG_ON(!drm_mm_initialized(&ggtt->vm.mm));
>
> ret = gen6_init_scratch(vm);
> if (ret)
> return ret;
>
> - ret = i915_gem_gtt_insert(&ggtt->base, &ppgtt->node,
> + ret = i915_gem_gtt_insert(&ggtt->vm, &ppgtt->node,
> GEN6_PD_SIZE, GEN6_PD_ALIGN,
> I915_COLOR_UNEVICTABLE,
> - 0, ggtt->base.total,
> + 0, ggtt->vm.total,
> PIN_HIGH);
> if (ret)
> goto err_out;
> @@ -2023,16 +2023,16 @@ static void gen6_scratch_va_range(struct i915_hw_ppgtt *ppgtt,
> u32 pde;
>
> gen6_for_each_pde(unused, &ppgtt->pd, start, length, pde)
> - ppgtt->pd.page_table[pde] = ppgtt->base.scratch_pt;
> + ppgtt->pd.page_table[pde] = ppgtt->vm.scratch_pt;
> }
>
> static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
> {
> - struct drm_i915_private *dev_priv = ppgtt->base.i915;
> + struct drm_i915_private *dev_priv = ppgtt->vm.i915;
> struct i915_ggtt *ggtt = &dev_priv->ggtt;
> int ret;
>
> - ppgtt->base.pte_encode = ggtt->base.pte_encode;
> + ppgtt->vm.pte_encode = ggtt->vm.pte_encode;
> if (intel_vgpu_active(dev_priv) || IS_GEN6(dev_priv))
> ppgtt->switch_mm = gen6_mm_switch;
> else if (IS_HASWELL(dev_priv))
> @@ -2046,24 +2046,24 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
> if (ret)
> return ret;
>
> - ppgtt->base.total = I915_PDES * GEN6_PTES * PAGE_SIZE;
> + ppgtt->vm.total = I915_PDES * GEN6_PTES * PAGE_SIZE;
>
> - gen6_scratch_va_range(ppgtt, 0, ppgtt->base.total);
> - gen6_write_page_range(ppgtt, 0, ppgtt->base.total);
> + gen6_scratch_va_range(ppgtt, 0, ppgtt->vm.total);
> + gen6_write_page_range(ppgtt, 0, ppgtt->vm.total);
>
> - ret = gen6_alloc_va_range(&ppgtt->base, 0, ppgtt->base.total);
> + ret = gen6_alloc_va_range(&ppgtt->vm, 0, ppgtt->vm.total);
> if (ret) {
> - gen6_ppgtt_cleanup(&ppgtt->base);
> + gen6_ppgtt_cleanup(&ppgtt->vm);
> return ret;
> }
>
> - ppgtt->base.clear_range = gen6_ppgtt_clear_range;
> - ppgtt->base.insert_entries = gen6_ppgtt_insert_entries;
> - ppgtt->base.bind_vma = gen6_ppgtt_bind_vma;
> - ppgtt->base.unbind_vma = ppgtt_unbind_vma;
> - ppgtt->base.set_pages = ppgtt_set_pages;
> - ppgtt->base.clear_pages = clear_pages;
> - ppgtt->base.cleanup = gen6_ppgtt_cleanup;
> + ppgtt->vm.clear_range = gen6_ppgtt_clear_range;
> + ppgtt->vm.insert_entries = gen6_ppgtt_insert_entries;
> + ppgtt->vm.bind_vma = gen6_ppgtt_bind_vma;
> + ppgtt->vm.unbind_vma = ppgtt_unbind_vma;
> + ppgtt->vm.set_pages = ppgtt_set_pages;
> + ppgtt->vm.clear_pages = clear_pages;
> + ppgtt->vm.cleanup = gen6_ppgtt_cleanup;
> ppgtt->debug_dump = gen6_dump_ppgtt;
>
> DRM_DEBUG_DRIVER("Allocated pde space (%lldM) at GTT entry: %llx\n",
> @@ -2079,8 +2079,8 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
> static int __hw_ppgtt_init(struct i915_hw_ppgtt *ppgtt,
> struct drm_i915_private *dev_priv)
> {
> - ppgtt->base.i915 = dev_priv;
> - ppgtt->base.dma = &dev_priv->drm.pdev->dev;
> + ppgtt->vm.i915 = dev_priv;
> + ppgtt->vm.dma = &dev_priv->drm.pdev->dev;
>
> if (INTEL_GEN(dev_priv) < 8)
> return gen6_ppgtt_init(ppgtt);
> @@ -2190,10 +2190,10 @@ i915_ppgtt_create(struct drm_i915_private *dev_priv,
> }
>
> kref_init(&ppgtt->ref);
> - i915_address_space_init(&ppgtt->base, dev_priv, name);
> - ppgtt->base.file = fpriv;
> + i915_address_space_init(&ppgtt->vm, dev_priv, name);
> + ppgtt->vm.file = fpriv;
>
> - trace_i915_ppgtt_create(&ppgtt->base);
> + trace_i915_ppgtt_create(&ppgtt->vm);
>
> return ppgtt;
> }
> @@ -2227,16 +2227,16 @@ void i915_ppgtt_release(struct kref *kref)
> struct i915_hw_ppgtt *ppgtt =
> container_of(kref, struct i915_hw_ppgtt, ref);
>
> - trace_i915_ppgtt_release(&ppgtt->base);
> + trace_i915_ppgtt_release(&ppgtt->vm);
>
> - ppgtt_destroy_vma(&ppgtt->base);
> + ppgtt_destroy_vma(&ppgtt->vm);
>
> - GEM_BUG_ON(!list_empty(&ppgtt->base.active_list));
> - GEM_BUG_ON(!list_empty(&ppgtt->base.inactive_list));
> - GEM_BUG_ON(!list_empty(&ppgtt->base.unbound_list));
> + GEM_BUG_ON(!list_empty(&ppgtt->vm.active_list));
> + GEM_BUG_ON(!list_empty(&ppgtt->vm.inactive_list));
> + GEM_BUG_ON(!list_empty(&ppgtt->vm.unbound_list));
>
> - ppgtt->base.cleanup(&ppgtt->base);
> - i915_address_space_fini(&ppgtt->base);
> + ppgtt->vm.cleanup(&ppgtt->vm);
> + i915_address_space_fini(&ppgtt->vm);
> kfree(ppgtt);
> }
>
> @@ -2332,7 +2332,7 @@ void i915_gem_suspend_gtt_mappings(struct drm_i915_private *dev_priv)
>
> i915_check_and_clear_faults(dev_priv);
>
> - ggtt->base.clear_range(&ggtt->base, 0, ggtt->base.total);
> + ggtt->vm.clear_range(&ggtt->vm, 0, ggtt->vm.total);
>
> i915_ggtt_invalidate(dev_priv);
> }
> @@ -2675,16 +2675,16 @@ static int aliasing_gtt_bind_vma(struct i915_vma *vma,
> struct i915_hw_ppgtt *appgtt = i915->mm.aliasing_ppgtt;
>
> if (!(vma->flags & I915_VMA_LOCAL_BIND) &&
> - appgtt->base.allocate_va_range) {
> - ret = appgtt->base.allocate_va_range(&appgtt->base,
> - vma->node.start,
> - vma->size);
> + appgtt->vm.allocate_va_range) {
> + ret = appgtt->vm.allocate_va_range(&appgtt->vm,
> + vma->node.start,
> + vma->size);
> if (ret)
> return ret;
> }
>
> - appgtt->base.insert_entries(&appgtt->base, vma, cache_level,
> - pte_flags);
> + appgtt->vm.insert_entries(&appgtt->vm, vma, cache_level,
> + pte_flags);
> }
>
> if (flags & I915_VMA_GLOBAL_BIND) {
> @@ -2707,7 +2707,7 @@ static void aliasing_gtt_unbind_vma(struct i915_vma *vma)
> }
>
> if (vma->flags & I915_VMA_LOCAL_BIND) {
> - struct i915_address_space *vm = &i915->mm.aliasing_ppgtt->base;
> + struct i915_address_space *vm = &i915->mm.aliasing_ppgtt->vm;
>
> vm->clear_range(vm, vma->node.start, vma->size);
> }
> @@ -2774,30 +2774,30 @@ int i915_gem_init_aliasing_ppgtt(struct drm_i915_private *i915)
> if (IS_ERR(ppgtt))
> return PTR_ERR(ppgtt);
>
> - if (WARN_ON(ppgtt->base.total < ggtt->base.total)) {
> + if (WARN_ON(ppgtt->vm.total < ggtt->vm.total)) {
> err = -ENODEV;
> goto err_ppgtt;
> }
>
> - if (ppgtt->base.allocate_va_range) {
> + if (ppgtt->vm.allocate_va_range) {
> /* Note we only pre-allocate as far as the end of the global
> * GTT. On 48b / 4-level page-tables, the difference is very,
> * very significant! We have to preallocate as GVT/vgpu does
> * not like the page directory disappearing.
> */
> - err = ppgtt->base.allocate_va_range(&ppgtt->base,
> - 0, ggtt->base.total);
> + err = ppgtt->vm.allocate_va_range(&ppgtt->vm,
> + 0, ggtt->vm.total);
> if (err)
> goto err_ppgtt;
> }
>
> i915->mm.aliasing_ppgtt = ppgtt;
>
> - GEM_BUG_ON(ggtt->base.bind_vma != ggtt_bind_vma);
> - ggtt->base.bind_vma = aliasing_gtt_bind_vma;
> + GEM_BUG_ON(ggtt->vm.bind_vma != ggtt_bind_vma);
> + ggtt->vm.bind_vma = aliasing_gtt_bind_vma;
>
> - GEM_BUG_ON(ggtt->base.unbind_vma != ggtt_unbind_vma);
> - ggtt->base.unbind_vma = aliasing_gtt_unbind_vma;
> + GEM_BUG_ON(ggtt->vm.unbind_vma != ggtt_unbind_vma);
> + ggtt->vm.unbind_vma = aliasing_gtt_unbind_vma;
>
> return 0;
>
> @@ -2817,8 +2817,8 @@ void i915_gem_fini_aliasing_ppgtt(struct drm_i915_private *i915)
>
> i915_ppgtt_put(ppgtt);
>
> - ggtt->base.bind_vma = ggtt_bind_vma;
> - ggtt->base.unbind_vma = ggtt_unbind_vma;
> + ggtt->vm.bind_vma = ggtt_bind_vma;
> + ggtt->vm.unbind_vma = ggtt_unbind_vma;
> }
>
> int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
> @@ -2842,7 +2842,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
> return ret;
>
> /* Reserve a mappable slot for our lockless error capture */
> - ret = drm_mm_insert_node_in_range(&ggtt->base.mm, &ggtt->error_capture,
> + ret = drm_mm_insert_node_in_range(&ggtt->vm.mm, &ggtt->error_capture,
> PAGE_SIZE, 0, I915_COLOR_UNEVICTABLE,
> 0, ggtt->mappable_end,
> DRM_MM_INSERT_LOW);
> @@ -2850,16 +2850,15 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
> return ret;
>
> /* Clear any non-preallocated blocks */
> - drm_mm_for_each_hole(entry, &ggtt->base.mm, hole_start, hole_end) {
> + drm_mm_for_each_hole(entry, &ggtt->vm.mm, hole_start, hole_end) {
> DRM_DEBUG_KMS("clearing unused GTT space: [%lx, %lx]\n",
> hole_start, hole_end);
> - ggtt->base.clear_range(&ggtt->base, hole_start,
> - hole_end - hole_start);
> + ggtt->vm.clear_range(&ggtt->vm, hole_start,
> + hole_end - hole_start);
> }
>
> /* And finally clear the reserved guard page */
> - ggtt->base.clear_range(&ggtt->base,
> - ggtt->base.total - PAGE_SIZE, PAGE_SIZE);
> + ggtt->vm.clear_range(&ggtt->vm, ggtt->vm.total - PAGE_SIZE, PAGE_SIZE);
>
> if (USES_PPGTT(dev_priv) && !USES_FULL_PPGTT(dev_priv)) {
> ret = i915_gem_init_aliasing_ppgtt(dev_priv);
> @@ -2884,11 +2883,11 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv)
> struct i915_vma *vma, *vn;
> struct pagevec *pvec;
>
> - ggtt->base.closed = true;
> + ggtt->vm.closed = true;
>
> mutex_lock(&dev_priv->drm.struct_mutex);
> - GEM_BUG_ON(!list_empty(&ggtt->base.active_list));
> - list_for_each_entry_safe(vma, vn, &ggtt->base.inactive_list, vm_link)
> + GEM_BUG_ON(!list_empty(&ggtt->vm.active_list));
> + list_for_each_entry_safe(vma, vn, &ggtt->vm.inactive_list, vm_link)
> WARN_ON(i915_vma_unbind(vma));
> mutex_unlock(&dev_priv->drm.struct_mutex);
>
> @@ -2900,12 +2899,12 @@ void i915_ggtt_cleanup_hw(struct drm_i915_private *dev_priv)
> if (drm_mm_node_allocated(&ggtt->error_capture))
> drm_mm_remove_node(&ggtt->error_capture);
>
> - if (drm_mm_initialized(&ggtt->base.mm)) {
> + if (drm_mm_initialized(&ggtt->vm.mm)) {
> intel_vgt_deballoon(dev_priv);
> - i915_address_space_fini(&ggtt->base);
> + i915_address_space_fini(&ggtt->vm);
> }
>
> - ggtt->base.cleanup(&ggtt->base);
> + ggtt->vm.cleanup(&ggtt->vm);
>
> pvec = &dev_priv->mm.wc_stash;
> if (pvec->nr) {
> @@ -2955,7 +2954,7 @@ static unsigned int chv_get_total_gtt_size(u16 gmch_ctrl)
>
> static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
> {
> - struct drm_i915_private *dev_priv = ggtt->base.i915;
> + struct drm_i915_private *dev_priv = ggtt->vm.i915;
> struct pci_dev *pdev = dev_priv->drm.pdev;
> phys_addr_t phys_addr;
> int ret;
> @@ -2979,7 +2978,7 @@ static int ggtt_probe_common(struct i915_ggtt *ggtt, u64 size)
> return -ENOMEM;
> }
>
> - ret = setup_scratch_page(&ggtt->base, GFP_DMA32);
> + ret = setup_scratch_page(&ggtt->vm, GFP_DMA32);
> if (ret) {
> DRM_ERROR("Scratch setup failed\n");
> /* iounmap will also get called at remove, but meh */
> @@ -3285,7 +3284,7 @@ static void setup_private_pat(struct drm_i915_private *dev_priv)
>
> static int gen8_gmch_probe(struct i915_ggtt *ggtt)
> {
> - struct drm_i915_private *dev_priv = ggtt->base.i915;
> + struct drm_i915_private *dev_priv = ggtt->vm.i915;
> struct pci_dev *pdev = dev_priv->drm.pdev;
> unsigned int size;
> u16 snb_gmch_ctl;
> @@ -3309,25 +3308,25 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
> else
> size = gen8_get_total_gtt_size(snb_gmch_ctl);
>
> - ggtt->base.total = (size / sizeof(gen8_pte_t)) << PAGE_SHIFT;
> - ggtt->base.cleanup = gen6_gmch_remove;
> - ggtt->base.bind_vma = ggtt_bind_vma;
> - ggtt->base.unbind_vma = ggtt_unbind_vma;
> - ggtt->base.set_pages = ggtt_set_pages;
> - ggtt->base.clear_pages = clear_pages;
> - ggtt->base.insert_page = gen8_ggtt_insert_page;
> - ggtt->base.clear_range = nop_clear_range;
> + ggtt->vm.total = (size / sizeof(gen8_pte_t)) << PAGE_SHIFT;
> + ggtt->vm.cleanup = gen6_gmch_remove;
> + ggtt->vm.bind_vma = ggtt_bind_vma;
> + ggtt->vm.unbind_vma = ggtt_unbind_vma;
> + ggtt->vm.set_pages = ggtt_set_pages;
> + ggtt->vm.clear_pages = clear_pages;
> + ggtt->vm.insert_page = gen8_ggtt_insert_page;
> + ggtt->vm.clear_range = nop_clear_range;
> if (!USES_FULL_PPGTT(dev_priv) || intel_scanout_needs_vtd_wa(dev_priv))
> - ggtt->base.clear_range = gen8_ggtt_clear_range;
> + ggtt->vm.clear_range = gen8_ggtt_clear_range;
>
> - ggtt->base.insert_entries = gen8_ggtt_insert_entries;
> + ggtt->vm.insert_entries = gen8_ggtt_insert_entries;
>
> /* Serialize GTT updates with aperture access on BXT if VT-d is on. */
> if (intel_ggtt_update_needs_vtd_wa(dev_priv)) {
> - ggtt->base.insert_entries = bxt_vtd_ggtt_insert_entries__BKL;
> - ggtt->base.insert_page = bxt_vtd_ggtt_insert_page__BKL;
> - if (ggtt->base.clear_range != nop_clear_range)
> - ggtt->base.clear_range = bxt_vtd_ggtt_clear_range__BKL;
> + ggtt->vm.insert_entries = bxt_vtd_ggtt_insert_entries__BKL;
> + ggtt->vm.insert_page = bxt_vtd_ggtt_insert_page__BKL;
> + if (ggtt->vm.clear_range != nop_clear_range)
> + ggtt->vm.clear_range = bxt_vtd_ggtt_clear_range__BKL;
> }
>
> ggtt->invalidate = gen6_ggtt_invalidate;
> @@ -3339,7 +3338,7 @@ static int gen8_gmch_probe(struct i915_ggtt *ggtt)
>
> static int gen6_gmch_probe(struct i915_ggtt *ggtt)
> {
> - struct drm_i915_private *dev_priv = ggtt->base.i915;
> + struct drm_i915_private *dev_priv = ggtt->vm.i915;
> struct pci_dev *pdev = dev_priv->drm.pdev;
> unsigned int size;
> u16 snb_gmch_ctl;
> @@ -3366,29 +3365,29 @@ static int gen6_gmch_probe(struct i915_ggtt *ggtt)
> pci_read_config_word(pdev, SNB_GMCH_CTRL, &snb_gmch_ctl);
>
> size = gen6_get_total_gtt_size(snb_gmch_ctl);
> - ggtt->base.total = (size / sizeof(gen6_pte_t)) << PAGE_SHIFT;
> + ggtt->vm.total = (size / sizeof(gen6_pte_t)) << PAGE_SHIFT;
>
> - ggtt->base.clear_range = gen6_ggtt_clear_range;
> - ggtt->base.insert_page = gen6_ggtt_insert_page;
> - ggtt->base.insert_entries = gen6_ggtt_insert_entries;
> - ggtt->base.bind_vma = ggtt_bind_vma;
> - ggtt->base.unbind_vma = ggtt_unbind_vma;
> - ggtt->base.set_pages = ggtt_set_pages;
> - ggtt->base.clear_pages = clear_pages;
> - ggtt->base.cleanup = gen6_gmch_remove;
> + ggtt->vm.clear_range = gen6_ggtt_clear_range;
> + ggtt->vm.insert_page = gen6_ggtt_insert_page;
> + ggtt->vm.insert_entries = gen6_ggtt_insert_entries;
> + ggtt->vm.bind_vma = ggtt_bind_vma;
> + ggtt->vm.unbind_vma = ggtt_unbind_vma;
> + ggtt->vm.set_pages = ggtt_set_pages;
> + ggtt->vm.clear_pages = clear_pages;
> + ggtt->vm.cleanup = gen6_gmch_remove;
>
> ggtt->invalidate = gen6_ggtt_invalidate;
>
> if (HAS_EDRAM(dev_priv))
> - ggtt->base.pte_encode = iris_pte_encode;
> + ggtt->vm.pte_encode = iris_pte_encode;
> else if (IS_HASWELL(dev_priv))
> - ggtt->base.pte_encode = hsw_pte_encode;
> + ggtt->vm.pte_encode = hsw_pte_encode;
> else if (IS_VALLEYVIEW(dev_priv))
> - ggtt->base.pte_encode = byt_pte_encode;
> + ggtt->vm.pte_encode = byt_pte_encode;
> else if (INTEL_GEN(dev_priv) >= 7)
> - ggtt->base.pte_encode = ivb_pte_encode;
> + ggtt->vm.pte_encode = ivb_pte_encode;
> else
> - ggtt->base.pte_encode = snb_pte_encode;
> + ggtt->vm.pte_encode = snb_pte_encode;
>
> return ggtt_probe_common(ggtt, size);
> }
> @@ -3400,7 +3399,7 @@ static void i915_gmch_remove(struct i915_address_space *vm)
>
> static int i915_gmch_probe(struct i915_ggtt *ggtt)
> {
> - struct drm_i915_private *dev_priv = ggtt->base.i915;
> + struct drm_i915_private *dev_priv = ggtt->vm.i915;
> phys_addr_t gmadr_base;
> int ret;
>
> @@ -3410,23 +3409,21 @@ static int i915_gmch_probe(struct i915_ggtt *ggtt)
> return -EIO;
> }
>
> - intel_gtt_get(&ggtt->base.total,
> - &gmadr_base,
> - &ggtt->mappable_end);
> + intel_gtt_get(&ggtt->vm.total, &gmadr_base, &ggtt->mappable_end);
>
> ggtt->gmadr =
> (struct resource) DEFINE_RES_MEM(gmadr_base,
> ggtt->mappable_end);
>
> ggtt->do_idle_maps = needs_idle_maps(dev_priv);
> - ggtt->base.insert_page = i915_ggtt_insert_page;
> - ggtt->base.insert_entries = i915_ggtt_insert_entries;
> - ggtt->base.clear_range = i915_ggtt_clear_range;
> - ggtt->base.bind_vma = ggtt_bind_vma;
> - ggtt->base.unbind_vma = ggtt_unbind_vma;
> - ggtt->base.set_pages = ggtt_set_pages;
> - ggtt->base.clear_pages = clear_pages;
> - ggtt->base.cleanup = i915_gmch_remove;
> + ggtt->vm.insert_page = i915_ggtt_insert_page;
> + ggtt->vm.insert_entries = i915_ggtt_insert_entries;
> + ggtt->vm.clear_range = i915_ggtt_clear_range;
> + ggtt->vm.bind_vma = ggtt_bind_vma;
> + ggtt->vm.unbind_vma = ggtt_unbind_vma;
> + ggtt->vm.set_pages = ggtt_set_pages;
> + ggtt->vm.clear_pages = clear_pages;
> + ggtt->vm.cleanup = i915_gmch_remove;
>
> ggtt->invalidate = gmch_ggtt_invalidate;
>
> @@ -3445,8 +3442,8 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
> struct i915_ggtt *ggtt = &dev_priv->ggtt;
> int ret;
>
> - ggtt->base.i915 = dev_priv;
> - ggtt->base.dma = &dev_priv->drm.pdev->dev;
> + ggtt->vm.i915 = dev_priv;
> + ggtt->vm.dma = &dev_priv->drm.pdev->dev;
>
> if (INTEL_GEN(dev_priv) <= 5)
> ret = i915_gmch_probe(ggtt);
> @@ -3463,27 +3460,29 @@ int i915_ggtt_probe_hw(struct drm_i915_private *dev_priv)
> * restriction!
> */
> if (USES_GUC(dev_priv)) {
> - ggtt->base.total = min_t(u64, ggtt->base.total, GUC_GGTT_TOP);
> - ggtt->mappable_end = min_t(u64, ggtt->mappable_end, ggtt->base.total);
> + ggtt->vm.total = min_t(u64, ggtt->vm.total, GUC_GGTT_TOP);
> + ggtt->mappable_end =
> + min_t(u64, ggtt->mappable_end, ggtt->vm.total);
> }
>
> - if ((ggtt->base.total - 1) >> 32) {
> + if ((ggtt->vm.total - 1) >> 32) {
> DRM_ERROR("We never expected a Global GTT with more than 32bits"
> " of address space! Found %lldM!\n",
> - ggtt->base.total >> 20);
> - ggtt->base.total = 1ULL << 32;
> - ggtt->mappable_end = min_t(u64, ggtt->mappable_end, ggtt->base.total);
> + ggtt->vm.total >> 20);
> + ggtt->vm.total = 1ULL << 32;
> + ggtt->mappable_end =
> + min_t(u64, ggtt->mappable_end, ggtt->vm.total);
> }
>
> - if (ggtt->mappable_end > ggtt->base.total) {
> + if (ggtt->mappable_end > ggtt->vm.total) {
> DRM_ERROR("mappable aperture extends past end of GGTT,"
> " aperture=%pa, total=%llx\n",
> - &ggtt->mappable_end, ggtt->base.total);
> - ggtt->mappable_end = ggtt->base.total;
> + &ggtt->mappable_end, ggtt->vm.total);
> + ggtt->mappable_end = ggtt->vm.total;
> }
>
> /* GMADR is the PCI mmio aperture into the global GTT. */
> - DRM_DEBUG_DRIVER("GGTT size = %lluM\n", ggtt->base.total >> 20);
> + DRM_DEBUG_DRIVER("GGTT size = %lluM\n", ggtt->vm.total >> 20);
> DRM_DEBUG_DRIVER("GMADR size = %lluM\n", (u64)ggtt->mappable_end >> 20);
> DRM_DEBUG_DRIVER("DSM size = %lluM\n",
> (u64)resource_size(&intel_graphics_stolen_res) >> 20);
> @@ -3510,9 +3509,9 @@ int i915_ggtt_init_hw(struct drm_i915_private *dev_priv)
> * and beyond the end of the GTT if we do not provide a guard.
> */
> mutex_lock(&dev_priv->drm.struct_mutex);
> - i915_address_space_init(&ggtt->base, dev_priv, "[global]");
> + i915_address_space_init(&ggtt->vm, dev_priv, "[global]");
> if (!HAS_LLC(dev_priv) && !USES_PPGTT(dev_priv))
> - ggtt->base.mm.color_adjust = i915_gtt_color_adjust;
> + ggtt->vm.mm.color_adjust = i915_gtt_color_adjust;
> mutex_unlock(&dev_priv->drm.struct_mutex);
>
> if (!io_mapping_init_wc(&dev_priv->ggtt.iomap,
> @@ -3535,7 +3534,7 @@ int i915_ggtt_init_hw(struct drm_i915_private *dev_priv)
> return 0;
>
> out_gtt_cleanup:
> - ggtt->base.cleanup(&ggtt->base);
> + ggtt->vm.cleanup(&ggtt->vm);
> return ret;
> }
>
> @@ -3574,9 +3573,9 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
> i915_check_and_clear_faults(dev_priv);
>
> /* First fill our portion of the GTT with scratch pages */
> - ggtt->base.clear_range(&ggtt->base, 0, ggtt->base.total);
> + ggtt->vm.clear_range(&ggtt->vm, 0, ggtt->vm.total);
>
> - ggtt->base.closed = true; /* skip rewriting PTE on VMA unbind */
> + ggtt->vm.closed = true; /* skip rewriting PTE on VMA unbind */
>
> /* clflush objects bound into the GGTT and rebind them. */
> list_for_each_entry_safe(obj, on, &dev_priv->mm.bound_list, mm.link) {
> @@ -3596,7 +3595,7 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
> WARN_ON(i915_gem_object_set_to_gtt_domain(obj, false));
> }
>
> - ggtt->base.closed = false;
> + ggtt->vm.closed = false;
>
> if (INTEL_GEN(dev_priv) >= 8) {
> struct intel_ppat *ppat = &dev_priv->ppat;
> @@ -3619,7 +3618,7 @@ void i915_gem_restore_gtt_mappings(struct drm_i915_private *dev_priv)
> if (!ppgtt)
> continue;
>
> - gen6_write_page_range(ppgtt, 0, ppgtt->base.total);
> + gen6_write_page_range(ppgtt, 0, ppgtt->vm.total);
> }
> }
>
> @@ -3841,7 +3840,7 @@ int i915_gem_gtt_reserve(struct i915_address_space *vm,
> GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
> GEM_BUG_ON(!IS_ALIGNED(offset, I915_GTT_MIN_ALIGNMENT));
> GEM_BUG_ON(range_overflows(offset, size, vm->total));
> - GEM_BUG_ON(vm == &vm->i915->mm.aliasing_ppgtt->base);
> + GEM_BUG_ON(vm == &vm->i915->mm.aliasing_ppgtt->vm);
> GEM_BUG_ON(drm_mm_node_allocated(node));
>
> node->size = size;
> @@ -3938,7 +3937,7 @@ int i915_gem_gtt_insert(struct i915_address_space *vm,
> GEM_BUG_ON(start >= end);
> GEM_BUG_ON(start > 0 && !IS_ALIGNED(start, I915_GTT_PAGE_SIZE));
> GEM_BUG_ON(end < U64_MAX && !IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
> - GEM_BUG_ON(vm == &vm->i915->mm.aliasing_ppgtt->base);
> + GEM_BUG_ON(vm == &vm->i915->mm.aliasing_ppgtt->vm);
> GEM_BUG_ON(drm_mm_node_allocated(node));
>
> if (unlikely(range_overflows(start, size, end)))
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
> index aec4f73574f4..197c2c06ecb7 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.h
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
> @@ -65,7 +65,7 @@ typedef u64 gen8_pde_t;
> typedef u64 gen8_ppgtt_pdpe_t;
> typedef u64 gen8_ppgtt_pml4e_t;
>
> -#define ggtt_total_entries(ggtt) ((ggtt)->base.total >> PAGE_SHIFT)
> +#define ggtt_total_entries(ggtt) ((ggtt)->vm.total >> PAGE_SHIFT)
>
> /* gen6-hsw has bit 11-4 for physical addr bit 39-32 */
> #define GEN6_GTT_ADDR_ENCODE(addr) ((addr) | (((addr) >> 28) & 0xff0))
> @@ -367,7 +367,7 @@ i915_vm_has_scratch_64K(struct i915_address_space *vm)
> * the spec.
> */
> struct i915_ggtt {
> - struct i915_address_space base;
> + struct i915_address_space vm;
>
> struct io_mapping iomap; /* Mapping to our CPU mappable region */
> struct resource gmadr; /* GMADR resource */
> @@ -385,7 +385,7 @@ struct i915_ggtt {
> };
>
> struct i915_hw_ppgtt {
> - struct i915_address_space base;
> + struct i915_address_space vm;
> struct kref ref;
> struct drm_mm_node node;
> unsigned long pd_dirty_rings;
> @@ -543,7 +543,7 @@ static inline struct i915_ggtt *
> i915_vm_to_ggtt(struct i915_address_space *vm)
> {
> GEM_BUG_ON(!i915_is_ggtt(vm));
> - return container_of(vm, struct i915_ggtt, base);
> + return container_of(vm, struct i915_ggtt, vm);
> }
>
> #define INTEL_MAX_PPAT_ENTRIES 8
> diff --git a/drivers/gpu/drm/i915/i915_gem_render_state.c b/drivers/gpu/drm/i915/i915_gem_render_state.c
> index 1036e8686916..3210cedfa46c 100644
> --- a/drivers/gpu/drm/i915/i915_gem_render_state.c
> +++ b/drivers/gpu/drm/i915/i915_gem_render_state.c
> @@ -194,7 +194,7 @@ int i915_gem_render_state_emit(struct i915_request *rq)
> if (IS_ERR(so.obj))
> return PTR_ERR(so.obj);
>
> - so.vma = i915_vma_instance(so.obj, &engine->i915->ggtt.base, NULL);
> + so.vma = i915_vma_instance(so.obj, &engine->i915->ggtt.vm, NULL);
> if (IS_ERR(so.vma)) {
> err = PTR_ERR(so.vma);
> goto err_obj;
> diff --git a/drivers/gpu/drm/i915/i915_gem_shrinker.c b/drivers/gpu/drm/i915/i915_gem_shrinker.c
> index 5757fb7c4b5a..55e84e71f526 100644
> --- a/drivers/gpu/drm/i915/i915_gem_shrinker.c
> +++ b/drivers/gpu/drm/i915/i915_gem_shrinker.c
> @@ -480,7 +480,7 @@ i915_gem_shrinker_vmap(struct notifier_block *nb, unsigned long event, void *ptr
>
> /* We also want to clear any cached iomaps as they wrap vmap */
> list_for_each_entry_safe(vma, next,
> - &i915->ggtt.base.inactive_list, vm_link) {
> + &i915->ggtt.vm.inactive_list, vm_link) {
> unsigned long count = vma->node.size >> PAGE_SHIFT;
> if (vma->iomap && i915_vma_unbind(vma) == 0)
> freed_pages += count;
> diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
> index ad949cc30928..79a347295e00 100644
> --- a/drivers/gpu/drm/i915/i915_gem_stolen.c
> +++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
> @@ -642,7 +642,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_i915_private *dev_priv
> if (ret)
> goto err;
>
> - vma = i915_vma_instance(obj, &ggtt->base, NULL);
> + vma = i915_vma_instance(obj, &ggtt->vm, NULL);
> if (IS_ERR(vma)) {
> ret = PTR_ERR(vma);
> goto err_pages;
> @@ -653,7 +653,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_i915_private *dev_priv
> * setting up the GTT space. The actual reservation will occur
> * later.
> */
> - ret = i915_gem_gtt_reserve(&ggtt->base, &vma->node,
> + ret = i915_gem_gtt_reserve(&ggtt->vm, &vma->node,
> size, gtt_offset, obj->cache_level,
> 0);
> if (ret) {
> @@ -666,7 +666,7 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_i915_private *dev_priv
> vma->pages = obj->mm.pages;
> vma->flags |= I915_VMA_GLOBAL_BIND;
> __i915_vma_set_map_and_fenceable(vma);
> - list_move_tail(&vma->vm_link, &ggtt->base.inactive_list);
> + list_move_tail(&vma->vm_link, &ggtt->vm.inactive_list);
>
> spin_lock(&dev_priv->mm.obj_lock);
> list_move_tail(&obj->mm.link, &dev_priv->mm.bound_list);
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 47721437a4c5..cd09a1688192 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -973,8 +973,7 @@ i915_error_object_create(struct drm_i915_private *i915,
> void __iomem *s;
> int ret;
>
> - ggtt->base.insert_page(&ggtt->base, dma, slot,
> - I915_CACHE_NONE, 0);
> + ggtt->vm.insert_page(&ggtt->vm, dma, slot, I915_CACHE_NONE, 0);
>
> s = io_mapping_map_atomic_wc(&ggtt->iomap, slot);
> ret = compress_page(&compress, (void __force *)s, dst);
> @@ -993,7 +992,7 @@ i915_error_object_create(struct drm_i915_private *i915,
>
> out:
> compress_fini(&compress, dst);
> - ggtt->base.clear_range(&ggtt->base, slot, PAGE_SIZE);
> + ggtt->vm.clear_range(&ggtt->vm, slot, PAGE_SIZE);
> return dst;
> }
>
> @@ -1466,7 +1465,7 @@ static void gem_record_rings(struct i915_gpu_state *error)
> struct i915_gem_context *ctx = request->gem_context;
> struct intel_ring *ring;
>
> - ee->vm = ctx->ppgtt ? &ctx->ppgtt->base : &ggtt->base;
> + ee->vm = ctx->ppgtt ? &ctx->ppgtt->vm : &ggtt->vm;
>
> record_context(&ee->context, ctx);
>
> @@ -1564,7 +1563,7 @@ static void capture_active_buffers(struct i915_gpu_state *error)
>
> static void capture_pinned_buffers(struct i915_gpu_state *error)
> {
> - struct i915_address_space *vm = &error->i915->ggtt.base;
> + struct i915_address_space *vm = &error->i915->ggtt.vm;
> struct drm_i915_error_buffer *bo;
> struct i915_vma *vma;
> int count_inactive, count_active;
> diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
> index 5d4f78765083..03299bae45a2 100644
> --- a/drivers/gpu/drm/i915/i915_trace.h
> +++ b/drivers/gpu/drm/i915/i915_trace.h
> @@ -936,7 +936,7 @@ DECLARE_EVENT_CLASS(i915_context,
> __entry->dev = ctx->i915->drm.primary->index;
> __entry->ctx = ctx;
> __entry->hw_id = ctx->hw_id;
> - __entry->vm = ctx->ppgtt ? &ctx->ppgtt->base : NULL;
> + __entry->vm = ctx->ppgtt ? &ctx->ppgtt->vm : NULL;
> ),
>
> TP_printk("dev=%u, ctx=%p, ctx_vm=%p, hw_id=%u",
> @@ -975,7 +975,7 @@ TRACE_EVENT(switch_mm,
> TP_fast_assign(
> __entry->ring = engine->id;
> __entry->to = to;
> - __entry->vm = to->ppgtt? &to->ppgtt->base : NULL;
> + __entry->vm = to->ppgtt? &to->ppgtt->vm : NULL;
> __entry->dev = engine->i915->drm.primary->index;
> ),
>
> diff --git a/drivers/gpu/drm/i915/i915_vgpu.c b/drivers/gpu/drm/i915/i915_vgpu.c
> index 5fe9f3f39467..869cf4a3b6de 100644
> --- a/drivers/gpu/drm/i915/i915_vgpu.c
> +++ b/drivers/gpu/drm/i915/i915_vgpu.c
> @@ -105,7 +105,7 @@ static void vgt_deballoon_space(struct i915_ggtt *ggtt,
> node->start + node->size,
> node->size / 1024);
>
> - ggtt->base.reserved -= node->size;
> + ggtt->vm.reserved -= node->size;
> drm_mm_remove_node(node);
> }
>
> @@ -141,11 +141,11 @@ static int vgt_balloon_space(struct i915_ggtt *ggtt,
>
> DRM_INFO("balloon space: range [ 0x%lx - 0x%lx ] %lu KiB.\n",
> start, end, size / 1024);
> - ret = i915_gem_gtt_reserve(&ggtt->base, node,
> + ret = i915_gem_gtt_reserve(&ggtt->vm, node,
> size, start, I915_COLOR_UNEVICTABLE,
> 0);
> if (!ret)
> - ggtt->base.reserved += size;
> + ggtt->vm.reserved += size;
>
> return ret;
> }
> @@ -197,7 +197,7 @@ static int vgt_balloon_space(struct i915_ggtt *ggtt,
> int intel_vgt_balloon(struct drm_i915_private *dev_priv)
> {
> struct i915_ggtt *ggtt = &dev_priv->ggtt;
> - unsigned long ggtt_end = ggtt->base.total;
> + unsigned long ggtt_end = ggtt->vm.total;
>
> unsigned long mappable_base, mappable_size, mappable_end;
> unsigned long unmappable_base, unmappable_size, unmappable_end;
> diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
> index 9324d476e0a7..e8f07cdca063 100644
> --- a/drivers/gpu/drm/i915/i915_vma.c
> +++ b/drivers/gpu/drm/i915/i915_vma.c
> @@ -85,7 +85,7 @@ vma_create(struct drm_i915_gem_object *obj,
> int i;
>
> /* The aliasing_ppgtt should never be used directly! */
> - GEM_BUG_ON(vm == &vm->i915->mm.aliasing_ppgtt->base);
> + GEM_BUG_ON(vm == &vm->i915->mm.aliasing_ppgtt->vm);
>
> vma = kmem_cache_zalloc(vm->i915->vmas, GFP_KERNEL);
> if (vma == NULL)
> diff --git a/drivers/gpu/drm/i915/intel_engine_cs.c b/drivers/gpu/drm/i915/intel_engine_cs.c
> index 13448ea76f57..2ec2e60dc670 100644
> --- a/drivers/gpu/drm/i915/intel_engine_cs.c
> +++ b/drivers/gpu/drm/i915/intel_engine_cs.c
> @@ -515,7 +515,7 @@ int intel_engine_create_scratch(struct intel_engine_cs *engine, int size)
> return PTR_ERR(obj);
> }
>
> - vma = i915_vma_instance(obj, &engine->i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &engine->i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> ret = PTR_ERR(vma);
> goto err_unref;
> @@ -585,7 +585,7 @@ static int init_status_page(struct intel_engine_cs *engine)
> if (ret)
> goto err;
>
> - vma = i915_vma_instance(obj, &engine->i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &engine->i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> ret = PTR_ERR(vma);
> goto err;
> diff --git a/drivers/gpu/drm/i915/intel_guc.c b/drivers/gpu/drm/i915/intel_guc.c
> index e28a996b9604..29fd95c1306b 100644
> --- a/drivers/gpu/drm/i915/intel_guc.c
> +++ b/drivers/gpu/drm/i915/intel_guc.c
> @@ -570,7 +570,7 @@ struct i915_vma *intel_guc_allocate_vma(struct intel_guc *guc, u32 size)
> if (IS_ERR(obj))
> return ERR_CAST(obj);
>
> - vma = i915_vma_instance(obj, &dev_priv->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &dev_priv->ggtt.vm, NULL);
> if (IS_ERR(vma))
> goto err;
>
> diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c
> index 133367a17863..e271e296b9da 100644
> --- a/drivers/gpu/drm/i915/intel_guc_submission.c
> +++ b/drivers/gpu/drm/i915/intel_guc_submission.c
> @@ -536,7 +536,7 @@ static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
> */
> static void flush_ggtt_writes(struct i915_vma *vma)
> {
> - struct drm_i915_private *dev_priv = to_i915(vma->obj->base.dev);
> + struct drm_i915_private *dev_priv = vma->vm->i915;
>
> if (i915_vma_is_map_and_fenceable(vma))
> POSTING_READ_FW(GUC_STATUS);
> diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
> index eb25afa9694f..091e28f0e024 100644
> --- a/drivers/gpu/drm/i915/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/intel_lrc.c
> @@ -431,7 +431,7 @@ static u64 execlists_update_context(struct i915_request *rq)
> * PML4 is allocated during ppgtt init, so this is not needed
> * in 48-bit mode.
> */
> - if (ppgtt && !i915_vm_is_48bit(&ppgtt->base))
> + if (ppgtt && !i915_vm_is_48bit(&ppgtt->vm))
> execlists_update_context_pdps(ppgtt, reg_state);
>
> return ce->lrc_desc;
> @@ -1671,7 +1671,7 @@ static int lrc_setup_wa_ctx(struct intel_engine_cs *engine)
> if (IS_ERR(obj))
> return PTR_ERR(obj);
>
> - vma = i915_vma_instance(obj, &engine->i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &engine->i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto err;
> @@ -2069,7 +2069,7 @@ static int gen8_emit_bb_start(struct i915_request *rq,
> * not needed in 48-bit.*/
> if (rq->gem_context->ppgtt &&
> (intel_engine_flag(rq->engine) & rq->gem_context->ppgtt->pd_dirty_rings) &&
> - !i915_vm_is_48bit(&rq->gem_context->ppgtt->base) &&
> + !i915_vm_is_48bit(&rq->gem_context->ppgtt->vm) &&
> !intel_vgpu_active(rq->i915)) {
> ret = intel_logical_ring_emit_pdps(rq);
> if (ret)
> @@ -2667,7 +2667,7 @@ static void execlists_init_reg_state(u32 *regs,
> CTX_REG(regs, CTX_PDP0_UDW, GEN8_RING_PDP_UDW(engine, 0), 0);
> CTX_REG(regs, CTX_PDP0_LDW, GEN8_RING_PDP_LDW(engine, 0), 0);
>
> - if (ppgtt && i915_vm_is_48bit(&ppgtt->base)) {
> + if (ppgtt && i915_vm_is_48bit(&ppgtt->vm)) {
> /* 64b PPGTT (48bit canonical)
> * PDP0_DESCRIPTOR contains the base address to PML4 and
> * other PDP Descriptors are ignored.
> @@ -2773,7 +2773,7 @@ static int execlists_context_deferred_alloc(struct i915_gem_context *ctx,
> goto error_deref_obj;
> }
>
> - vma = i915_vma_instance(ctx_obj, &ctx->i915->ggtt.base, NULL);
> + vma = i915_vma_instance(ctx_obj, &ctx->i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> ret = PTR_ERR(vma);
> goto error_deref_obj;
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 97b38bbb7ce2..fa517a3e3c25 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -1123,7 +1123,7 @@ intel_ring_create_vma(struct drm_i915_private *dev_priv, int size)
> /* mark ring buffers as read-only from GPU side by default */
> obj->gt_ro = 1;
>
> - vma = i915_vma_instance(obj, &dev_priv->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &dev_priv->ggtt.vm, NULL);
> if (IS_ERR(vma))
> goto err;
>
> @@ -1279,7 +1279,7 @@ alloc_context_vma(struct intel_engine_cs *engine)
> i915_gem_object_set_cache_level(obj, I915_CACHE_L3_LLC);
> }
>
> - vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto err_obj;
> diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c b/drivers/gpu/drm/i915/selftests/huge_pages.c
> index 91c72911be3c..01ab60f1a7e8 100644
> --- a/drivers/gpu/drm/i915/selftests/huge_pages.c
> +++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
> @@ -338,7 +338,7 @@ fake_huge_pages_object(struct drm_i915_private *i915, u64 size, bool single)
>
> static int igt_check_page_sizes(struct i915_vma *vma)
> {
> - struct drm_i915_private *i915 = to_i915(vma->obj->base.dev);
> + struct drm_i915_private *i915 = vma->vm->i915;
> unsigned int supported = INTEL_INFO(i915)->page_sizes;
> struct drm_i915_gem_object *obj = vma->obj;
> int err = 0;
> @@ -379,7 +379,7 @@ static int igt_check_page_sizes(struct i915_vma *vma)
> static int igt_mock_exhaust_device_supported_pages(void *arg)
> {
> struct i915_hw_ppgtt *ppgtt = arg;
> - struct drm_i915_private *i915 = ppgtt->base.i915;
> + struct drm_i915_private *i915 = ppgtt->vm.i915;
> unsigned int saved_mask = INTEL_INFO(i915)->page_sizes;
> struct drm_i915_gem_object *obj;
> struct i915_vma *vma;
> @@ -415,7 +415,7 @@ static int igt_mock_exhaust_device_supported_pages(void *arg)
> goto out_put;
> }
>
> - vma = i915_vma_instance(obj, &ppgtt->base, NULL);
> + vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto out_put;
> @@ -458,7 +458,7 @@ static int igt_mock_exhaust_device_supported_pages(void *arg)
> static int igt_mock_ppgtt_misaligned_dma(void *arg)
> {
> struct i915_hw_ppgtt *ppgtt = arg;
> - struct drm_i915_private *i915 = ppgtt->base.i915;
> + struct drm_i915_private *i915 = ppgtt->vm.i915;
> unsigned long supported = INTEL_INFO(i915)->page_sizes;
> struct drm_i915_gem_object *obj;
> int bit;
> @@ -500,7 +500,7 @@ static int igt_mock_ppgtt_misaligned_dma(void *arg)
> /* Force the page size for this object */
> obj->mm.page_sizes.sg = page_size;
>
> - vma = i915_vma_instance(obj, &ppgtt->base, NULL);
> + vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto out_unpin;
> @@ -591,7 +591,7 @@ static void close_object_list(struct list_head *objects,
> list_for_each_entry_safe(obj, on, objects, st_link) {
> struct i915_vma *vma;
>
> - vma = i915_vma_instance(obj, &ppgtt->base, NULL);
> + vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
> if (!IS_ERR(vma))
> i915_vma_close(vma);
>
> @@ -604,8 +604,8 @@ static void close_object_list(struct list_head *objects,
> static int igt_mock_ppgtt_huge_fill(void *arg)
> {
> struct i915_hw_ppgtt *ppgtt = arg;
> - struct drm_i915_private *i915 = ppgtt->base.i915;
> - unsigned long max_pages = ppgtt->base.total >> PAGE_SHIFT;
> + struct drm_i915_private *i915 = ppgtt->vm.i915;
> + unsigned long max_pages = ppgtt->vm.total >> PAGE_SHIFT;
> unsigned long page_num;
> bool single = false;
> LIST_HEAD(objects);
> @@ -641,7 +641,7 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
>
> list_add(&obj->st_link, &objects);
>
> - vma = i915_vma_instance(obj, &ppgtt->base, NULL);
> + vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> break;
> @@ -725,7 +725,7 @@ static int igt_mock_ppgtt_huge_fill(void *arg)
> static int igt_mock_ppgtt_64K(void *arg)
> {
> struct i915_hw_ppgtt *ppgtt = arg;
> - struct drm_i915_private *i915 = ppgtt->base.i915;
> + struct drm_i915_private *i915 = ppgtt->vm.i915;
> struct drm_i915_gem_object *obj;
> const struct object_info {
> unsigned int size;
> @@ -819,7 +819,7 @@ static int igt_mock_ppgtt_64K(void *arg)
> */
> obj->mm.page_sizes.sg &= ~I915_GTT_PAGE_SIZE_2M;
>
> - vma = i915_vma_instance(obj, &ppgtt->base, NULL);
> + vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto out_object_unpin;
> @@ -887,8 +887,8 @@ static int igt_mock_ppgtt_64K(void *arg)
> static struct i915_vma *
> gpu_write_dw(struct i915_vma *vma, u64 offset, u32 val)
> {
> - struct drm_i915_private *i915 = to_i915(vma->obj->base.dev);
> - const int gen = INTEL_GEN(vma->vm->i915);
> + struct drm_i915_private *i915 = vma->vm->i915;
> + const int gen = INTEL_GEN(i915);
> unsigned int count = vma->size >> PAGE_SHIFT;
> struct drm_i915_gem_object *obj;
> struct i915_vma *batch;
> @@ -1047,7 +1047,8 @@ static int __igt_write_huge(struct i915_gem_context *ctx,
> u32 dword, u32 val)
> {
> struct drm_i915_private *i915 = to_i915(obj->base.dev);
> - struct i915_address_space *vm = ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
> + struct i915_address_space *vm =
> + ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
> unsigned int flags = PIN_USER | PIN_OFFSET_FIXED;
> struct i915_vma *vma;
> int err;
> @@ -1100,7 +1101,8 @@ static int igt_write_huge(struct i915_gem_context *ctx,
> struct drm_i915_gem_object *obj)
> {
> struct drm_i915_private *i915 = to_i915(obj->base.dev);
> - struct i915_address_space *vm = ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
> + struct i915_address_space *vm =
> + ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
> static struct intel_engine_cs *engines[I915_NUM_ENGINES];
> struct intel_engine_cs *engine;
> I915_RND_STATE(prng);
> @@ -1439,7 +1441,7 @@ static int igt_ppgtt_pin_update(void *arg)
> if (IS_ERR(obj))
> return PTR_ERR(obj);
>
> - vma = i915_vma_instance(obj, &ppgtt->base, NULL);
> + vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto out_put;
> @@ -1493,7 +1495,7 @@ static int igt_ppgtt_pin_update(void *arg)
> if (IS_ERR(obj))
> return PTR_ERR(obj);
>
> - vma = i915_vma_instance(obj, &ppgtt->base, NULL);
> + vma = i915_vma_instance(obj, &ppgtt->vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto out_put;
> @@ -1531,7 +1533,8 @@ static int igt_tmpfs_fallback(void *arg)
> struct i915_gem_context *ctx = arg;
> struct drm_i915_private *i915 = ctx->i915;
> struct vfsmount *gemfs = i915->mm.gemfs;
> - struct i915_address_space *vm = ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
> + struct i915_address_space *vm =
> + ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
> struct drm_i915_gem_object *obj;
> struct i915_vma *vma;
> u32 *vaddr;
> @@ -1587,7 +1590,8 @@ static int igt_shrink_thp(void *arg)
> {
> struct i915_gem_context *ctx = arg;
> struct drm_i915_private *i915 = ctx->i915;
> - struct i915_address_space *vm = ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
> + struct i915_address_space *vm =
> + ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
> struct drm_i915_gem_object *obj;
> struct i915_vma *vma;
> unsigned int flags = PIN_USER;
> @@ -1696,14 +1700,14 @@ int i915_gem_huge_page_mock_selftests(void)
> goto out_unlock;
> }
>
> - if (!i915_vm_is_48bit(&ppgtt->base)) {
> + if (!i915_vm_is_48bit(&ppgtt->vm)) {
> pr_err("failed to create 48b PPGTT\n");
> err = -EINVAL;
> goto out_close;
> }
>
> /* If we were ever hit this then it's time to mock the 64K scratch */
> - if (!i915_vm_has_scratch_64K(&ppgtt->base)) {
> + if (!i915_vm_has_scratch_64K(&ppgtt->vm)) {
> pr_err("PPGTT missing 64K scratch page\n");
> err = -EINVAL;
> goto out_close;
> @@ -1712,7 +1716,7 @@ int i915_gem_huge_page_mock_selftests(void)
> err = i915_subtests(tests, ppgtt);
>
> out_close:
> - i915_ppgtt_close(&ppgtt->base);
> + i915_ppgtt_close(&ppgtt->vm);
> i915_ppgtt_put(ppgtt);
>
> out_unlock:
> @@ -1758,7 +1762,7 @@ int i915_gem_huge_page_live_selftests(struct drm_i915_private *dev_priv)
> }
>
> if (ctx->ppgtt)
> - ctx->ppgtt->base.scrub_64K = true;
> + ctx->ppgtt->vm.scrub_64K = true;
>
> err = i915_subtests(tests, ctx);
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_context.c b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
> index b39392a00a6f..708e8d721448 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_context.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_context.c
> @@ -115,7 +115,7 @@ static int gpu_fill(struct drm_i915_gem_object *obj,
> {
> struct drm_i915_private *i915 = to_i915(obj->base.dev);
> struct i915_address_space *vm =
> - ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
> + ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
> struct i915_request *rq;
> struct i915_vma *vma;
> struct i915_vma *batch;
> @@ -290,7 +290,7 @@ create_test_object(struct i915_gem_context *ctx,
> {
> struct drm_i915_gem_object *obj;
> struct i915_address_space *vm =
> - ctx->ppgtt ? &ctx->ppgtt->base : &ctx->i915->ggtt.base;
> + ctx->ppgtt ? &ctx->ppgtt->vm : &ctx->i915->ggtt.vm;
> u64 size;
> int err;
>
> @@ -557,7 +557,7 @@ static int fake_aliasing_ppgtt_enable(struct drm_i915_private *i915)
> list_for_each_entry(obj, &i915->mm.bound_list, mm.link) {
> struct i915_vma *vma;
>
> - vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
> if (IS_ERR(vma))
> continue;
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
> index ab9d7bee0aae..2dc72a984d45 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
> @@ -35,7 +35,7 @@ static int populate_ggtt(struct drm_i915_private *i915)
> u64 size;
>
> for (size = 0;
> - size + I915_GTT_PAGE_SIZE <= i915->ggtt.base.total;
> + size + I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
> size += I915_GTT_PAGE_SIZE) {
> struct i915_vma *vma;
>
> @@ -57,7 +57,7 @@ static int populate_ggtt(struct drm_i915_private *i915)
> return -EINVAL;
> }
>
> - if (list_empty(&i915->ggtt.base.inactive_list)) {
> + if (list_empty(&i915->ggtt.vm.inactive_list)) {
> pr_err("No objects on the GGTT inactive list!\n");
> return -EINVAL;
> }
> @@ -69,7 +69,7 @@ static void unpin_ggtt(struct drm_i915_private *i915)
> {
> struct i915_vma *vma;
>
> - list_for_each_entry(vma, &i915->ggtt.base.inactive_list, vm_link)
> + list_for_each_entry(vma, &i915->ggtt.vm.inactive_list, vm_link)
> i915_vma_unpin(vma);
> }
>
> @@ -103,7 +103,7 @@ static int igt_evict_something(void *arg)
> goto cleanup;
>
> /* Everything is pinned, nothing should happen */
> - err = i915_gem_evict_something(&ggtt->base,
> + err = i915_gem_evict_something(&ggtt->vm,
> I915_GTT_PAGE_SIZE, 0, 0,
> 0, U64_MAX,
> 0);
> @@ -116,7 +116,7 @@ static int igt_evict_something(void *arg)
> unpin_ggtt(i915);
>
> /* Everything is unpinned, we should be able to evict something */
> - err = i915_gem_evict_something(&ggtt->base,
> + err = i915_gem_evict_something(&ggtt->vm,
> I915_GTT_PAGE_SIZE, 0, 0,
> 0, U64_MAX,
> 0);
> @@ -181,7 +181,7 @@ static int igt_evict_for_vma(void *arg)
> goto cleanup;
>
> /* Everything is pinned, nothing should happen */
> - err = i915_gem_evict_for_node(&ggtt->base, &target, 0);
> + err = i915_gem_evict_for_node(&ggtt->vm, &target, 0);
> if (err != -ENOSPC) {
> pr_err("i915_gem_evict_for_node on a full GGTT returned err=%d\n",
> err);
> @@ -191,7 +191,7 @@ static int igt_evict_for_vma(void *arg)
> unpin_ggtt(i915);
>
> /* Everything is unpinned, we should be able to evict the node */
> - err = i915_gem_evict_for_node(&ggtt->base, &target, 0);
> + err = i915_gem_evict_for_node(&ggtt->vm, &target, 0);
> if (err) {
> pr_err("i915_gem_evict_for_node returned err=%d\n",
> err);
> @@ -229,7 +229,7 @@ static int igt_evict_for_cache_color(void *arg)
> * i915_gtt_color_adjust throughout our driver, so using a mock color
> * adjust will work just fine for our purposes.
> */
> - ggtt->base.mm.color_adjust = mock_color_adjust;
> + ggtt->vm.mm.color_adjust = mock_color_adjust;
>
> obj = i915_gem_object_create_internal(i915, I915_GTT_PAGE_SIZE);
> if (IS_ERR(obj)) {
> @@ -265,7 +265,7 @@ static int igt_evict_for_cache_color(void *arg)
> i915_vma_unpin(vma);
>
> /* Remove just the second vma */
> - err = i915_gem_evict_for_node(&ggtt->base, &target, 0);
> + err = i915_gem_evict_for_node(&ggtt->vm, &target, 0);
> if (err) {
> pr_err("[0]i915_gem_evict_for_node returned err=%d\n", err);
> goto cleanup;
> @@ -276,7 +276,7 @@ static int igt_evict_for_cache_color(void *arg)
> */
> target.color = I915_CACHE_L3_LLC;
>
> - err = i915_gem_evict_for_node(&ggtt->base, &target, 0);
> + err = i915_gem_evict_for_node(&ggtt->vm, &target, 0);
> if (!err) {
> pr_err("[1]i915_gem_evict_for_node returned err=%d\n", err);
> err = -EINVAL;
> @@ -288,7 +288,7 @@ static int igt_evict_for_cache_color(void *arg)
> cleanup:
> unpin_ggtt(i915);
> cleanup_objects(i915);
> - ggtt->base.mm.color_adjust = NULL;
> + ggtt->vm.mm.color_adjust = NULL;
> return err;
> }
>
> @@ -305,7 +305,7 @@ static int igt_evict_vm(void *arg)
> goto cleanup;
>
> /* Everything is pinned, nothing should happen */
> - err = i915_gem_evict_vm(&ggtt->base);
> + err = i915_gem_evict_vm(&ggtt->vm);
> if (err) {
> pr_err("i915_gem_evict_vm on a full GGTT returned err=%d]\n",
> err);
> @@ -314,7 +314,7 @@ static int igt_evict_vm(void *arg)
>
> unpin_ggtt(i915);
>
> - err = i915_gem_evict_vm(&ggtt->base);
> + err = i915_gem_evict_vm(&ggtt->vm);
> if (err) {
> pr_err("i915_gem_evict_vm on a full GGTT returned err=%d]\n",
> err);
> @@ -359,9 +359,9 @@ static int igt_evict_contexts(void *arg)
>
> /* Reserve a block so that we know we have enough to fit a few rq */
> memset(&hole, 0, sizeof(hole));
> - err = i915_gem_gtt_insert(&i915->ggtt.base, &hole,
> + err = i915_gem_gtt_insert(&i915->ggtt.vm, &hole,
> PRETEND_GGTT_SIZE, 0, I915_COLOR_UNEVICTABLE,
> - 0, i915->ggtt.base.total,
> + 0, i915->ggtt.vm.total,
> PIN_NOEVICT);
> if (err)
> goto out_locked;
> @@ -377,9 +377,9 @@ static int igt_evict_contexts(void *arg)
> goto out_locked;
> }
>
> - if (i915_gem_gtt_insert(&i915->ggtt.base, &r->node,
> + if (i915_gem_gtt_insert(&i915->ggtt.vm, &r->node,
> 1ul << 20, 0, I915_COLOR_UNEVICTABLE,
> - 0, i915->ggtt.base.total,
> + 0, i915->ggtt.vm.total,
> PIN_NOEVICT)) {
> kfree(r);
> break;
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
> index f7dc926f4ef1..58ab5e84ceb7 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
> @@ -151,14 +151,14 @@ static int igt_ppgtt_alloc(void *arg)
> if (err)
> goto err_ppgtt;
>
> - if (!ppgtt->base.allocate_va_range)
> + if (!ppgtt->vm.allocate_va_range)
> goto err_ppgtt_cleanup;
>
> /* Check we can allocate the entire range */
> for (size = 4096;
> - size <= ppgtt->base.total;
> + size <= ppgtt->vm.total;
> size <<= 2) {
> - err = ppgtt->base.allocate_va_range(&ppgtt->base, 0, size);
> + err = ppgtt->vm.allocate_va_range(&ppgtt->vm, 0, size);
> if (err) {
> if (err == -ENOMEM) {
> pr_info("[1] Ran out of memory for va_range [0 + %llx] [bit %d]\n",
> @@ -168,15 +168,15 @@ static int igt_ppgtt_alloc(void *arg)
> goto err_ppgtt_cleanup;
> }
>
> - ppgtt->base.clear_range(&ppgtt->base, 0, size);
> + ppgtt->vm.clear_range(&ppgtt->vm, 0, size);
> }
>
> /* Check we can incrementally allocate the entire range */
> for (last = 0, size = 4096;
> - size <= ppgtt->base.total;
> + size <= ppgtt->vm.total;
> last = size, size <<= 2) {
> - err = ppgtt->base.allocate_va_range(&ppgtt->base,
> - last, size - last);
> + err = ppgtt->vm.allocate_va_range(&ppgtt->vm,
> + last, size - last);
> if (err) {
> if (err == -ENOMEM) {
> pr_info("[2] Ran out of memory for va_range [%llx + %llx] [bit %d]\n",
> @@ -188,7 +188,7 @@ static int igt_ppgtt_alloc(void *arg)
> }
>
> err_ppgtt_cleanup:
> - ppgtt->base.cleanup(&ppgtt->base);
> + ppgtt->vm.cleanup(&ppgtt->vm);
> err_ppgtt:
> mutex_unlock(&dev_priv->drm.struct_mutex);
> kfree(ppgtt);
> @@ -987,12 +987,12 @@ static int exercise_ppgtt(struct drm_i915_private *dev_priv,
> err = PTR_ERR(ppgtt);
> goto out_unlock;
> }
> - GEM_BUG_ON(offset_in_page(ppgtt->base.total));
> - GEM_BUG_ON(ppgtt->base.closed);
> + GEM_BUG_ON(offset_in_page(ppgtt->vm.total));
> + GEM_BUG_ON(ppgtt->vm.closed);
>
> - err = func(dev_priv, &ppgtt->base, 0, ppgtt->base.total, end_time);
> + err = func(dev_priv, &ppgtt->vm, 0, ppgtt->vm.total, end_time);
>
> - i915_ppgtt_close(&ppgtt->base);
> + i915_ppgtt_close(&ppgtt->vm);
> i915_ppgtt_put(ppgtt);
> out_unlock:
> mutex_unlock(&dev_priv->drm.struct_mutex);
> @@ -1061,18 +1061,18 @@ static int exercise_ggtt(struct drm_i915_private *i915,
>
> mutex_lock(&i915->drm.struct_mutex);
> restart:
> - list_sort(NULL, &ggtt->base.mm.hole_stack, sort_holes);
> - drm_mm_for_each_hole(node, &ggtt->base.mm, hole_start, hole_end) {
> + list_sort(NULL, &ggtt->vm.mm.hole_stack, sort_holes);
> + drm_mm_for_each_hole(node, &ggtt->vm.mm, hole_start, hole_end) {
> if (hole_start < last)
> continue;
>
> - if (ggtt->base.mm.color_adjust)
> - ggtt->base.mm.color_adjust(node, 0,
> - &hole_start, &hole_end);
> + if (ggtt->vm.mm.color_adjust)
> + ggtt->vm.mm.color_adjust(node, 0,
> + &hole_start, &hole_end);
> if (hole_start >= hole_end)
> continue;
>
> - err = func(i915, &ggtt->base, hole_start, hole_end, end_time);
> + err = func(i915, &ggtt->vm, hole_start, hole_end, end_time);
> if (err)
> break;
>
> @@ -1134,7 +1134,7 @@ static int igt_ggtt_page(void *arg)
> goto out_free;
>
> memset(&tmp, 0, sizeof(tmp));
> - err = drm_mm_insert_node_in_range(&ggtt->base.mm, &tmp,
> + err = drm_mm_insert_node_in_range(&ggtt->vm.mm, &tmp,
> count * PAGE_SIZE, 0,
> I915_COLOR_UNEVICTABLE,
> 0, ggtt->mappable_end,
> @@ -1147,9 +1147,9 @@ static int igt_ggtt_page(void *arg)
> for (n = 0; n < count; n++) {
> u64 offset = tmp.start + n * PAGE_SIZE;
>
> - ggtt->base.insert_page(&ggtt->base,
> - i915_gem_object_get_dma_address(obj, 0),
> - offset, I915_CACHE_NONE, 0);
> + ggtt->vm.insert_page(&ggtt->vm,
> + i915_gem_object_get_dma_address(obj, 0),
> + offset, I915_CACHE_NONE, 0);
> }
>
> order = i915_random_order(count, &prng);
> @@ -1188,7 +1188,7 @@ static int igt_ggtt_page(void *arg)
>
> kfree(order);
> out_remove:
> - ggtt->base.clear_range(&ggtt->base, tmp.start, tmp.size);
> + ggtt->vm.clear_range(&ggtt->vm, tmp.start, tmp.size);
> intel_runtime_pm_put(i915);
> drm_mm_remove_node(&tmp);
> out_unpin:
> @@ -1229,7 +1229,7 @@ static int exercise_mock(struct drm_i915_private *i915,
> ppgtt = ctx->ppgtt;
> GEM_BUG_ON(!ppgtt);
>
> - err = func(i915, &ppgtt->base, 0, ppgtt->base.total, end_time);
> + err = func(i915, &ppgtt->vm, 0, ppgtt->vm.total, end_time);
>
> mock_context_close(ctx);
> return err;
> @@ -1270,7 +1270,7 @@ static int igt_gtt_reserve(void *arg)
>
> /* Start by filling the GGTT */
> for (total = 0;
> - total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.base.total;
> + total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
> total += 2*I915_GTT_PAGE_SIZE) {
> struct i915_vma *vma;
>
> @@ -1288,20 +1288,20 @@ static int igt_gtt_reserve(void *arg)
>
> list_add(&obj->st_link, &objects);
>
> - vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto out;
> }
>
> - err = i915_gem_gtt_reserve(&i915->ggtt.base, &vma->node,
> + err = i915_gem_gtt_reserve(&i915->ggtt.vm, &vma->node,
> obj->base.size,
> total,
> obj->cache_level,
> 0);
> if (err) {
> pr_err("i915_gem_gtt_reserve (pass 1) failed at %llu/%llu with err=%d\n",
> - total, i915->ggtt.base.total, err);
> + total, i915->ggtt.vm.total, err);
> goto out;
> }
> track_vma_bind(vma);
> @@ -1319,7 +1319,7 @@ static int igt_gtt_reserve(void *arg)
>
> /* Now we start forcing evictions */
> for (total = I915_GTT_PAGE_SIZE;
> - total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.base.total;
> + total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
> total += 2*I915_GTT_PAGE_SIZE) {
> struct i915_vma *vma;
>
> @@ -1337,20 +1337,20 @@ static int igt_gtt_reserve(void *arg)
>
> list_add(&obj->st_link, &objects);
>
> - vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto out;
> }
>
> - err = i915_gem_gtt_reserve(&i915->ggtt.base, &vma->node,
> + err = i915_gem_gtt_reserve(&i915->ggtt.vm, &vma->node,
> obj->base.size,
> total,
> obj->cache_level,
> 0);
> if (err) {
> pr_err("i915_gem_gtt_reserve (pass 2) failed at %llu/%llu with err=%d\n",
> - total, i915->ggtt.base.total, err);
> + total, i915->ggtt.vm.total, err);
> goto out;
> }
> track_vma_bind(vma);
> @@ -1371,7 +1371,7 @@ static int igt_gtt_reserve(void *arg)
> struct i915_vma *vma;
> u64 offset;
>
> - vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto out;
> @@ -1383,18 +1383,18 @@ static int igt_gtt_reserve(void *arg)
> goto out;
> }
>
> - offset = random_offset(0, i915->ggtt.base.total,
> + offset = random_offset(0, i915->ggtt.vm.total,
> 2*I915_GTT_PAGE_SIZE,
> I915_GTT_MIN_ALIGNMENT);
>
> - err = i915_gem_gtt_reserve(&i915->ggtt.base, &vma->node,
> + err = i915_gem_gtt_reserve(&i915->ggtt.vm, &vma->node,
> obj->base.size,
> offset,
> obj->cache_level,
> 0);
> if (err) {
> pr_err("i915_gem_gtt_reserve (pass 3) failed at %llu/%llu with err=%d\n",
> - total, i915->ggtt.base.total, err);
> + total, i915->ggtt.vm.total, err);
> goto out;
> }
> track_vma_bind(vma);
> @@ -1429,8 +1429,8 @@ static int igt_gtt_insert(void *arg)
> u64 start, end;
> } invalid_insert[] = {
> {
> - i915->ggtt.base.total + I915_GTT_PAGE_SIZE, 0,
> - 0, i915->ggtt.base.total,
> + i915->ggtt.vm.total + I915_GTT_PAGE_SIZE, 0,
> + 0, i915->ggtt.vm.total,
> },
> {
> 2*I915_GTT_PAGE_SIZE, 0,
> @@ -1460,7 +1460,7 @@ static int igt_gtt_insert(void *arg)
>
> /* Check a couple of obviously invalid requests */
> for (ii = invalid_insert; ii->size; ii++) {
> - err = i915_gem_gtt_insert(&i915->ggtt.base, &tmp,
> + err = i915_gem_gtt_insert(&i915->ggtt.vm, &tmp,
> ii->size, ii->alignment,
> I915_COLOR_UNEVICTABLE,
> ii->start, ii->end,
> @@ -1475,7 +1475,7 @@ static int igt_gtt_insert(void *arg)
>
> /* Start by filling the GGTT */
> for (total = 0;
> - total + I915_GTT_PAGE_SIZE <= i915->ggtt.base.total;
> + total + I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
> total += I915_GTT_PAGE_SIZE) {
> struct i915_vma *vma;
>
> @@ -1493,15 +1493,15 @@ static int igt_gtt_insert(void *arg)
>
> list_add(&obj->st_link, &objects);
>
> - vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto out;
> }
>
> - err = i915_gem_gtt_insert(&i915->ggtt.base, &vma->node,
> + err = i915_gem_gtt_insert(&i915->ggtt.vm, &vma->node,
> obj->base.size, 0, obj->cache_level,
> - 0, i915->ggtt.base.total,
> + 0, i915->ggtt.vm.total,
> 0);
> if (err == -ENOSPC) {
> /* maxed out the GGTT space */
> @@ -1510,7 +1510,7 @@ static int igt_gtt_insert(void *arg)
> }
> if (err) {
> pr_err("i915_gem_gtt_insert (pass 1) failed at %llu/%llu with err=%d\n",
> - total, i915->ggtt.base.total, err);
> + total, i915->ggtt.vm.total, err);
> goto out;
> }
> track_vma_bind(vma);
> @@ -1522,7 +1522,7 @@ static int igt_gtt_insert(void *arg)
> list_for_each_entry(obj, &objects, st_link) {
> struct i915_vma *vma;
>
> - vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto out;
> @@ -1542,7 +1542,7 @@ static int igt_gtt_insert(void *arg)
> struct i915_vma *vma;
> u64 offset;
>
> - vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto out;
> @@ -1557,13 +1557,13 @@ static int igt_gtt_insert(void *arg)
> goto out;
> }
>
> - err = i915_gem_gtt_insert(&i915->ggtt.base, &vma->node,
> + err = i915_gem_gtt_insert(&i915->ggtt.vm, &vma->node,
> obj->base.size, 0, obj->cache_level,
> - 0, i915->ggtt.base.total,
> + 0, i915->ggtt.vm.total,
> 0);
> if (err) {
> pr_err("i915_gem_gtt_insert (pass 2) failed at %llu/%llu with err=%d\n",
> - total, i915->ggtt.base.total, err);
> + total, i915->ggtt.vm.total, err);
> goto out;
> }
> track_vma_bind(vma);
> @@ -1579,7 +1579,7 @@ static int igt_gtt_insert(void *arg)
>
> /* And then force evictions */
> for (total = 0;
> - total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.base.total;
> + total + 2*I915_GTT_PAGE_SIZE <= i915->ggtt.vm.total;
> total += 2*I915_GTT_PAGE_SIZE) {
> struct i915_vma *vma;
>
> @@ -1597,19 +1597,19 @@ static int igt_gtt_insert(void *arg)
>
> list_add(&obj->st_link, &objects);
>
> - vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto out;
> }
>
> - err = i915_gem_gtt_insert(&i915->ggtt.base, &vma->node,
> + err = i915_gem_gtt_insert(&i915->ggtt.vm, &vma->node,
> obj->base.size, 0, obj->cache_level,
> - 0, i915->ggtt.base.total,
> + 0, i915->ggtt.vm.total,
> 0);
> if (err) {
> pr_err("i915_gem_gtt_insert (pass 3) failed at %llu/%llu with err=%d\n",
> - total, i915->ggtt.base.total, err);
> + total, i915->ggtt.vm.total, err);
> goto out;
> }
> track_vma_bind(vma);
> @@ -1669,7 +1669,7 @@ int i915_gem_gtt_live_selftests(struct drm_i915_private *i915)
> SUBTEST(igt_ggtt_page),
> };
>
> - GEM_BUG_ON(offset_in_page(i915->ggtt.base.total));
> + GEM_BUG_ON(offset_in_page(i915->ggtt.vm.total));
>
> return i915_subtests(tests, i915);
> }
> diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_object.c b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> index fbdb2419d418..2b2dde94526f 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_gem_object.c
> @@ -113,7 +113,7 @@ static int igt_gem_huge(void *arg)
>
> obj = huge_gem_object(i915,
> nreal * PAGE_SIZE,
> - i915->ggtt.base.total + PAGE_SIZE);
> + i915->ggtt.vm.total + PAGE_SIZE);
> if (IS_ERR(obj))
> return PTR_ERR(obj);
>
> @@ -311,7 +311,7 @@ static int igt_partial_tiling(void *arg)
>
> obj = huge_gem_object(i915,
> nreal << PAGE_SHIFT,
> - (1 + next_prime_number(i915->ggtt.base.total >> PAGE_SHIFT)) << PAGE_SHIFT);
> + (1 + next_prime_number(i915->ggtt.vm.total >> PAGE_SHIFT)) << PAGE_SHIFT);
> if (IS_ERR(obj))
> return PTR_ERR(obj);
>
> @@ -440,7 +440,7 @@ static int make_obj_busy(struct drm_i915_gem_object *obj)
> struct i915_vma *vma;
> int err;
>
> - vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
> if (IS_ERR(vma))
> return PTR_ERR(vma);
>
> diff --git a/drivers/gpu/drm/i915/selftests/i915_request.c b/drivers/gpu/drm/i915/selftests/i915_request.c
> index 94bc2e1898a4..a3a89aadeccb 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_request.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_request.c
> @@ -430,7 +430,7 @@ static struct i915_vma *empty_batch(struct drm_i915_private *i915)
> if (err)
> goto err;
>
> - vma = i915_vma_instance(obj, &i915->ggtt.base, NULL);
> + vma = i915_vma_instance(obj, &i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto err;
> @@ -555,7 +555,8 @@ static int live_empty_request(void *arg)
> static struct i915_vma *recursive_batch(struct drm_i915_private *i915)
> {
> struct i915_gem_context *ctx = i915->kernel_context;
> - struct i915_address_space *vm = ctx->ppgtt ? &ctx->ppgtt->base : &i915->ggtt.base;
> + struct i915_address_space *vm =
> + ctx->ppgtt ? &ctx->ppgtt->vm : &i915->ggtt.vm;
> struct drm_i915_gem_object *obj;
> const int gen = INTEL_GEN(i915);
> struct i915_vma *vma;
> diff --git a/drivers/gpu/drm/i915/selftests/i915_vma.c b/drivers/gpu/drm/i915/selftests/i915_vma.c
> index e90f97236e50..8400a8cc5cf2 100644
> --- a/drivers/gpu/drm/i915/selftests/i915_vma.c
> +++ b/drivers/gpu/drm/i915/selftests/i915_vma.c
> @@ -35,7 +35,7 @@ static bool assert_vma(struct i915_vma *vma,
> {
> bool ok = true;
>
> - if (vma->vm != &ctx->ppgtt->base) {
> + if (vma->vm != &ctx->ppgtt->vm) {
> pr_err("VMA created with wrong VM\n");
> ok = false;
> }
> @@ -110,8 +110,7 @@ static int create_vmas(struct drm_i915_private *i915,
> list_for_each_entry(obj, objects, st_link) {
> for (pinned = 0; pinned <= 1; pinned++) {
> list_for_each_entry(ctx, contexts, link) {
> - struct i915_address_space *vm =
> - &ctx->ppgtt->base;
> + struct i915_address_space *vm = &ctx->ppgtt->vm;
> struct i915_vma *vma;
> int err;
>
> @@ -259,12 +258,12 @@ static int igt_vma_pin1(void *arg)
> VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | 8192),
> VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
> VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
> - VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.base.total - 4096)),
> + VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.vm.total - 4096)),
>
> VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (i915->ggtt.mappable_end - 4096)),
> INVALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | i915->ggtt.mappable_end),
> - VALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | (i915->ggtt.base.total - 4096)),
> - INVALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | i915->ggtt.base.total),
> + VALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | (i915->ggtt.vm.total - 4096)),
> + INVALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | i915->ggtt.vm.total),
> INVALID(0, PIN_GLOBAL | PIN_OFFSET_FIXED | round_down(U64_MAX, PAGE_SIZE)),
>
> VALID(4096, PIN_GLOBAL),
> @@ -272,12 +271,12 @@ static int igt_vma_pin1(void *arg)
> VALID(i915->ggtt.mappable_end - 4096, PIN_GLOBAL | PIN_MAPPABLE),
> VALID(i915->ggtt.mappable_end, PIN_GLOBAL | PIN_MAPPABLE),
> NOSPACE(i915->ggtt.mappable_end + 4096, PIN_GLOBAL | PIN_MAPPABLE),
> - VALID(i915->ggtt.base.total - 4096, PIN_GLOBAL),
> - VALID(i915->ggtt.base.total, PIN_GLOBAL),
> - NOSPACE(i915->ggtt.base.total + 4096, PIN_GLOBAL),
> + VALID(i915->ggtt.vm.total - 4096, PIN_GLOBAL),
> + VALID(i915->ggtt.vm.total, PIN_GLOBAL),
> + NOSPACE(i915->ggtt.vm.total + 4096, PIN_GLOBAL),
> NOSPACE(round_down(U64_MAX, PAGE_SIZE), PIN_GLOBAL),
> INVALID(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (i915->ggtt.mappable_end - 4096)),
> - INVALID(8192, PIN_GLOBAL | PIN_OFFSET_FIXED | (i915->ggtt.base.total - 4096)),
> + INVALID(8192, PIN_GLOBAL | PIN_OFFSET_FIXED | (i915->ggtt.vm.total - 4096)),
> INVALID(8192, PIN_GLOBAL | PIN_OFFSET_FIXED | (round_down(U64_MAX, PAGE_SIZE) - 4096)),
>
> VALID(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
> @@ -289,9 +288,9 @@ static int igt_vma_pin1(void *arg)
> * variable start, end and size.
> */
> NOSPACE(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | i915->ggtt.mappable_end),
> - NOSPACE(0, PIN_GLOBAL | PIN_OFFSET_BIAS | i915->ggtt.base.total),
> + NOSPACE(0, PIN_GLOBAL | PIN_OFFSET_BIAS | i915->ggtt.vm.total),
> NOSPACE(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (i915->ggtt.mappable_end - 4096)),
> - NOSPACE(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.base.total - 4096)),
> + NOSPACE(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (i915->ggtt.vm.total - 4096)),
> #endif
> { },
> #undef NOSPACE
> @@ -307,13 +306,13 @@ static int igt_vma_pin1(void *arg)
> * focusing on error handling of boundary conditions.
> */
>
> - GEM_BUG_ON(!drm_mm_clean(&i915->ggtt.base.mm));
> + GEM_BUG_ON(!drm_mm_clean(&i915->ggtt.vm.mm));
>
> obj = i915_gem_object_create_internal(i915, PAGE_SIZE);
> if (IS_ERR(obj))
> return PTR_ERR(obj);
>
> - vma = checked_vma_instance(obj, &i915->ggtt.base, NULL);
> + vma = checked_vma_instance(obj, &i915->ggtt.vm, NULL);
> if (IS_ERR(vma))
> goto out;
>
> @@ -405,7 +404,7 @@ static unsigned int rotated_size(const struct intel_rotation_plane_info *a,
> static int igt_vma_rotate(void *arg)
> {
> struct drm_i915_private *i915 = arg;
> - struct i915_address_space *vm = &i915->ggtt.base;
> + struct i915_address_space *vm = &i915->ggtt.vm;
> struct drm_i915_gem_object *obj;
> const struct intel_rotation_plane_info planes[] = {
> { .width = 1, .height = 1, .stride = 1 },
> @@ -604,7 +603,7 @@ static bool assert_pin(struct i915_vma *vma,
> static int igt_vma_partial(void *arg)
> {
> struct drm_i915_private *i915 = arg;
> - struct i915_address_space *vm = &i915->ggtt.base;
> + struct i915_address_space *vm = &i915->ggtt.vm;
> const unsigned int npages = 1021; /* prime! */
> struct drm_i915_gem_object *obj;
> const struct phase {
> diff --git a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> index 2091e3a6a5be..390a157b37c3 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_hangcheck.c
> @@ -107,8 +107,8 @@ static int emit_recurse_batch(struct hang *h,
> struct drm_i915_private *i915 = h->i915;
> struct i915_address_space *vm =
> rq->gem_context->ppgtt ?
> - &rq->gem_context->ppgtt->base :
> - &i915->ggtt.base;
> + &rq->gem_context->ppgtt->vm :
> + &i915->ggtt.vm;
> struct i915_vma *hws, *vma;
> unsigned int flags;
> u32 *batch;
> diff --git a/drivers/gpu/drm/i915/selftests/intel_lrc.c b/drivers/gpu/drm/i915/selftests/intel_lrc.c
> index 68cb9126b3e1..0b6da08c8cae 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_lrc.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_lrc.c
> @@ -83,7 +83,7 @@ static int emit_recurse_batch(struct spinner *spin,
> struct i915_request *rq,
> u32 arbitration_command)
> {
> - struct i915_address_space *vm = &rq->gem_context->ppgtt->base;
> + struct i915_address_space *vm = &rq->gem_context->ppgtt->vm;
> struct i915_vma *hws, *vma;
> u32 *batch;
> int err;
> diff --git a/drivers/gpu/drm/i915/selftests/intel_workarounds.c b/drivers/gpu/drm/i915/selftests/intel_workarounds.c
> index 17444a3abbb9..f1cfb0fb6bea 100644
> --- a/drivers/gpu/drm/i915/selftests/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/selftests/intel_workarounds.c
> @@ -33,7 +33,7 @@ read_nonprivs(struct i915_gem_context *ctx, struct intel_engine_cs *engine)
> memset(cs, 0xc5, PAGE_SIZE);
> i915_gem_object_unpin_map(result);
>
> - vma = i915_vma_instance(result, &engine->i915->ggtt.base, NULL);
> + vma = i915_vma_instance(result, &engine->i915->ggtt.vm, NULL);
> if (IS_ERR(vma)) {
> err = PTR_ERR(vma);
> goto err_obj;
> diff --git a/drivers/gpu/drm/i915/selftests/mock_gtt.c b/drivers/gpu/drm/i915/selftests/mock_gtt.c
> index 36c112088940..556c546f2715 100644
> --- a/drivers/gpu/drm/i915/selftests/mock_gtt.c
> +++ b/drivers/gpu/drm/i915/selftests/mock_gtt.c
> @@ -66,25 +66,25 @@ mock_ppgtt(struct drm_i915_private *i915,
> return NULL;
>
> kref_init(&ppgtt->ref);
> - ppgtt->base.i915 = i915;
> - ppgtt->base.total = round_down(U64_MAX, PAGE_SIZE);
> - ppgtt->base.file = ERR_PTR(-ENODEV);
> -
> - INIT_LIST_HEAD(&ppgtt->base.active_list);
> - INIT_LIST_HEAD(&ppgtt->base.inactive_list);
> - INIT_LIST_HEAD(&ppgtt->base.unbound_list);
> -
> - INIT_LIST_HEAD(&ppgtt->base.global_link);
> - drm_mm_init(&ppgtt->base.mm, 0, ppgtt->base.total);
> -
> - ppgtt->base.clear_range = nop_clear_range;
> - ppgtt->base.insert_page = mock_insert_page;
> - ppgtt->base.insert_entries = mock_insert_entries;
> - ppgtt->base.bind_vma = mock_bind_ppgtt;
> - ppgtt->base.unbind_vma = mock_unbind_ppgtt;
> - ppgtt->base.set_pages = ppgtt_set_pages;
> - ppgtt->base.clear_pages = clear_pages;
> - ppgtt->base.cleanup = mock_cleanup;
> + ppgtt->vm.i915 = i915;
> + ppgtt->vm.total = round_down(U64_MAX, PAGE_SIZE);
> + ppgtt->vm.file = ERR_PTR(-ENODEV);
> +
> + INIT_LIST_HEAD(&ppgtt->vm.active_list);
> + INIT_LIST_HEAD(&ppgtt->vm.inactive_list);
> + INIT_LIST_HEAD(&ppgtt->vm.unbound_list);
> +
> + INIT_LIST_HEAD(&ppgtt->vm.global_link);
> + drm_mm_init(&ppgtt->vm.mm, 0, ppgtt->vm.total);
> +
> + ppgtt->vm.clear_range = nop_clear_range;
> + ppgtt->vm.insert_page = mock_insert_page;
> + ppgtt->vm.insert_entries = mock_insert_entries;
> + ppgtt->vm.bind_vma = mock_bind_ppgtt;
> + ppgtt->vm.unbind_vma = mock_unbind_ppgtt;
> + ppgtt->vm.set_pages = ppgtt_set_pages;
> + ppgtt->vm.clear_pages = clear_pages;
> + ppgtt->vm.cleanup = mock_cleanup;
>
> return ppgtt;
> }
> @@ -107,27 +107,27 @@ void mock_init_ggtt(struct drm_i915_private *i915)
>
> INIT_LIST_HEAD(&i915->vm_list);
>
> - ggtt->base.i915 = i915;
> + ggtt->vm.i915 = i915;
>
> ggtt->gmadr = (struct resource) DEFINE_RES_MEM(0, 2048 * PAGE_SIZE);
> ggtt->mappable_end = resource_size(&ggtt->gmadr);
> - ggtt->base.total = 4096 * PAGE_SIZE;
> -
> - ggtt->base.clear_range = nop_clear_range;
> - ggtt->base.insert_page = mock_insert_page;
> - ggtt->base.insert_entries = mock_insert_entries;
> - ggtt->base.bind_vma = mock_bind_ggtt;
> - ggtt->base.unbind_vma = mock_unbind_ggtt;
> - ggtt->base.set_pages = ggtt_set_pages;
> - ggtt->base.clear_pages = clear_pages;
> - ggtt->base.cleanup = mock_cleanup;
> -
> - i915_address_space_init(&ggtt->base, i915, "global");
> + ggtt->vm.total = 4096 * PAGE_SIZE;
> +
> + ggtt->vm.clear_range = nop_clear_range;
> + ggtt->vm.insert_page = mock_insert_page;
> + ggtt->vm.insert_entries = mock_insert_entries;
> + ggtt->vm.bind_vma = mock_bind_ggtt;
> + ggtt->vm.unbind_vma = mock_unbind_ggtt;
> + ggtt->vm.set_pages = ggtt_set_pages;
> + ggtt->vm.clear_pages = clear_pages;
> + ggtt->vm.cleanup = mock_cleanup;
> +
> + i915_address_space_init(&ggtt->vm, i915, "global");
> }
>
> void mock_fini_ggtt(struct drm_i915_private *i915)
> {
> struct i915_ggtt *ggtt = &i915->ggtt;
>
> - i915_address_space_fini(&ggtt->base);
> + i915_address_space_fini(&ggtt->vm);
> }
> --
> 2.17.1
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [PATCH 01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member
2018-06-05 14:38 ` Mika Kuoppala
@ 2018-06-05 14:41 ` Chris Wilson
0 siblings, 0 replies; 28+ messages in thread
From: Chris Wilson @ 2018-06-05 14:41 UTC (permalink / raw)
To: Mika Kuoppala, intel-gfx
Quoting Mika Kuoppala (2018-06-05 15:38:09)
> Chris Wilson <chris@chris-wilson.co.uk> writes:
>
> > In the near future, I want to subclass gen6_hw_ppgtt as it contains a
> > few specialised members and I wish to add more. To avoid the ugliness of
> > using ppgtt->base.base, rename the i915_hw_ppgtt base member
> > (i915_address_space) as vm, which is our common shorthand for an
> > i915_address_space local.
> >
>
> Strolled it through. Couple of formatting fixes and
> getting dev_priv through vm. Didn't notice anything
> out of ordinary.
>
> For me it reads better now, and we should have done this
> prior to doing 32bit ppgtts :P
The nuisance one for me is ggtt->vm.mm, I think we could do with calling
the drm_mm mgr, i.e. ggtt->vm.mgr. We may also want to rename vma as
iova to follow other drivers.
-Chris
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2018-06-05 14:41 UTC | newest]
Thread overview: 28+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-06-05 7:19 Full-ppgtt for Haswell and co, almost there! Chris Wilson
2018-06-05 7:19 ` [PATCH 01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member Chris Wilson
2018-06-05 14:38 ` Mika Kuoppala
2018-06-05 14:41 ` Chris Wilson
2018-06-05 7:19 ` [PATCH 02/11] drm/i915/gtt: Teach restore-gtt to walk the ggtt vma list not the object list Chris Wilson
2018-06-05 7:51 ` Joonas Lahtinen
2018-06-05 8:03 ` Chris Wilson
2018-06-05 8:19 ` Chris Wilson
2018-06-05 8:24 ` Chris Wilson
2018-06-05 7:19 ` [PATCH 03/11] drm/i915: Prepare for non-object vma Chris Wilson
2018-06-05 9:21 ` Joonas Lahtinen
2018-06-05 9:25 ` Chris Wilson
2018-06-05 7:19 ` [PATCH 04/11] drm/i915: Decouple vma vfuncs from vm Chris Wilson
2018-06-05 9:05 ` Joonas Lahtinen
2018-06-05 7:19 ` [PATCH 05/11] drm/i915/gtt: Push allocation to hw ppgtt constructor Chris Wilson
2018-06-05 9:32 ` Joonas Lahtinen
2018-06-05 7:19 ` [PATCH 06/11] drm/i915/gtt: Subclass gen6_hw_ppgtt Chris Wilson
2018-06-05 9:43 ` Joonas Lahtinen
2018-06-05 9:58 ` Chris Wilson
2018-06-05 7:19 ` [PATCH 07/11] drm/i915/gtt Onionify error handling for gen6_ppgtt_create Chris Wilson
2018-06-05 7:19 ` [PATCH 08/11] drm/i915/gtt: Reorder aliasing_ppgtt fini Chris Wilson
2018-06-05 7:19 ` [PATCH 09/11] drm/i915/gtt: Make gen6 page directories evictable Chris Wilson
2018-06-05 7:19 ` [PATCH 10/11] drm/i915/gtt: Only keep gen6 page directories pinned while active Chris Wilson
2018-06-05 8:42 ` Joonas Lahtinen
2018-06-05 7:19 ` [PATCH 11/11] RFT drm/i915/gtt: Enable full-ppgtt by default everywhere Chris Wilson
2018-06-05 7:30 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/11] drm/i915/gtt: Rename i915_hw_ppgtt base member Patchwork
2018-06-05 7:33 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-06-05 7:46 ` ✗ Fi.CI.BAT: failure " Patchwork
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.