From: David Bremner <david@tethera.net>
To: devnull+manivannan.sadhasivam.oss.qualcomm.com@kernel.org
Cc: bhelgaas@google.com, cassel@kernel.org, heiko@sntech.de,
krishna.chundru@oss.qualcomm.com, kwilczynski@kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
linuxppc-dev@lists.ozlabs.org, lpieralisi@kernel.org,
lukas@wunner.de, mahesh@linux.ibm.com, mani@kernel.org,
manivannan.sadhasivam@oss.qualcomm.com, oohall@gmail.com,
p.zabel@pengutronix.de, robh@kernel.org, wilfred.mallawa@wdc.com,
will@kernel.org
Subject: Re: [PATCH v6 0/4] PCI: Add support for resetting the Root Ports in a platform specific way
Date: Tue, 23 Sep 2025 10:06:13 -0300 [thread overview]
Message-ID: <87ldm548u2.fsf@tethera.net> (raw)
In-Reply-To: <20250715-pci-port-reset-v6-0-6f9cce94e7bb@oss.qualcomm.com>
I have been testing this series on the 6.17 pre-releases, lightly
patched by the collabora [1] and mnt-reform [2] teams. I have been testing
on bare hardware, on MNT Research's pocket-reform product. I'm afraid I
can only offer CI level feedback, but in case it helps
1) The series now applies cleanly onto collabora's rockchip-devel branch
2) The resulting kernel boots and runs OK.
3) the resulting kernel still fails the "platform" pm_test [3] with
"rockchip-dw-pcie a40c00000.pcie: Phy link never came up"
Of course there could be other reasons for (3), I don't know that much
about it.
I'm happy to test a newer version of the series if/when it exists.
d
[1]: https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux.git#rockchip-devel
[2]: https://salsa.debian.org/bremner/collabora-rockchip-3588#reform-patches
[3]: https://www.cs.unb.ca/~bremner/blog/posts/hibernate-pocket-12/
WARNING: multiple messages have this Message-ID (diff)
From: David Bremner <david@tethera.net>
To: devnull+manivannan.sadhasivam.oss.qualcomm.com@kernel.org
Cc: bhelgaas@google.com, cassel@kernel.org, heiko@sntech.de,
krishna.chundru@oss.qualcomm.com, kwilczynski@kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-pci@vger.kernel.org, linux-rockchip@lists.infradead.org,
linuxppc-dev@lists.ozlabs.org, lpieralisi@kernel.org,
lukas@wunner.de, mahesh@linux.ibm.com, mani@kernel.org,
manivannan.sadhasivam@oss.qualcomm.com, oohall@gmail.com,
p.zabel@pengutronix.de, robh@kernel.org, wilfred.mallawa@wdc.com,
will@kernel.org
Subject: Re: [PATCH v6 0/4] PCI: Add support for resetting the Root Ports in a platform specific way
Date: Tue, 23 Sep 2025 10:06:13 -0300 [thread overview]
Message-ID: <87ldm548u2.fsf@tethera.net> (raw)
In-Reply-To: <20250715-pci-port-reset-v6-0-6f9cce94e7bb@oss.qualcomm.com>
I have been testing this series on the 6.17 pre-releases, lightly
patched by the collabora [1] and mnt-reform [2] teams. I have been testing
on bare hardware, on MNT Research's pocket-reform product. I'm afraid I
can only offer CI level feedback, but in case it helps
1) The series now applies cleanly onto collabora's rockchip-devel branch
2) The resulting kernel boots and runs OK.
3) the resulting kernel still fails the "platform" pm_test [3] with
"rockchip-dw-pcie a40c00000.pcie: Phy link never came up"
Of course there could be other reasons for (3), I don't know that much
about it.
I'm happy to test a newer version of the series if/when it exists.
d
[1]: https://gitlab.collabora.com/hardware-enablement/rockchip-3588/linux.git#rockchip-devel
[2]: https://salsa.debian.org/bremner/collabora-rockchip-3588#reform-patches
[3]: https://www.cs.unb.ca/~bremner/blog/posts/hibernate-pocket-12/
_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip
next prev parent reply other threads:[~2025-09-23 13:14 UTC|newest]
Thread overview: 54+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-15 14:21 [PATCH v6 0/4] PCI: Add support for resetting the Root Ports in a platform specific way Manivannan Sadhasivam
2025-07-15 14:21 ` Manivannan Sadhasivam via B4 Relay
2025-07-15 14:21 ` Manivannan Sadhasivam via B4 Relay
2025-07-15 14:21 ` [PATCH v6 1/4] PCI/ERR: " Manivannan Sadhasivam
2025-07-15 14:21 ` Manivannan Sadhasivam via B4 Relay
2025-07-15 14:21 ` Manivannan Sadhasivam via B4 Relay
2025-07-17 18:28 ` [PATCH v6 1/4] PCI/ERR: Add support for resetting the Root Ports in a platform specific wayy Frank Li
2025-07-17 18:28 ` Frank Li
2025-07-15 14:21 ` [PATCH v6 2/4] PCI: host-common: Add link down handling for Root Ports Manivannan Sadhasivam
2025-07-15 14:21 ` Manivannan Sadhasivam via B4 Relay
2025-07-15 14:21 ` Manivannan Sadhasivam via B4 Relay
2025-07-17 18:31 ` [PATCH v6 2/4] PCI: host-common: Add link down handling for Root Portsy Frank Li
2025-07-17 18:31 ` Frank Li
2025-08-28 20:25 ` [PATCH v6 2/4] PCI: host-common: Add link down handling for Root Ports Brian Norris
2025-08-28 20:25 ` Brian Norris
2025-08-29 8:35 ` Lukas Wunner
2025-08-29 23:58 ` Brian Norris
2025-08-29 23:58 ` Brian Norris
2025-07-15 14:21 ` [PATCH v6 3/4] PCI: qcom: Add support for resetting the Root Port due to link down event Manivannan Sadhasivam
2025-07-15 14:21 ` Manivannan Sadhasivam via B4 Relay
2025-07-15 14:21 ` Manivannan Sadhasivam via B4 Relay
2025-07-15 14:21 ` [PATCH v6 4/4] PCI: dw-rockchip: Add support to reset Root Port upon " Manivannan Sadhasivam
2025-07-15 14:21 ` Manivannan Sadhasivam via B4 Relay
2025-07-15 14:21 ` Manivannan Sadhasivam via B4 Relay
2025-07-18 3:58 ` [PATCH v6 0/4] PCI: Add support for resetting the Root Ports in a platform specific way Krishna Chaitanya Chundru
2025-07-18 3:58 ` Krishna Chaitanya Chundru
2025-07-18 10:28 ` Niklas Cassel
2025-07-18 10:28 ` Niklas Cassel
2025-07-18 10:39 ` Niklas Cassel
2025-07-18 10:39 ` Niklas Cassel
2025-07-24 5:30 ` Manivannan Sadhasivam
2025-07-24 5:30 ` Manivannan Sadhasivam
2025-08-15 9:07 ` Niklas Cassel
2025-08-15 9:07 ` Niklas Cassel
2025-08-29 16:14 ` Manivannan Sadhasivam
2025-08-29 16:14 ` Manivannan Sadhasivam
2025-09-04 14:03 ` Niklas Cassel
2025-09-04 14:03 ` Niklas Cassel
2026-03-10 13:37 ` Manivannan Sadhasivam
2026-03-10 13:37 ` Manivannan Sadhasivam
2026-03-11 10:59 ` Niklas Cassel
2026-03-11 10:59 ` Niklas Cassel
2026-03-11 14:19 ` Manivannan Sadhasivam
2026-03-11 14:19 ` Manivannan Sadhasivam
2025-07-24 9:28 ` Hongxing Zhu
2025-07-24 9:28 ` Hongxing Zhu
2025-08-28 20:01 ` Brian Norris
2025-08-28 20:01 ` Brian Norris
2025-08-29 13:56 ` Manivannan Sadhasivam
2025-08-29 13:56 ` Manivannan Sadhasivam
2025-09-23 13:06 ` David Bremner [this message]
2025-09-23 13:06 ` David Bremner
2025-09-23 13:46 ` Niklas Cassel
2025-09-23 13:46 ` Niklas Cassel
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