From: Kevin Hilman <khilman@ti.com>
To: "Shilimkar, Santosh" <santosh.shilimkar@ti.com>
Cc: Tero Kristo <t-kristo@ti.com>,
linux-omap@vger.kernel.org, paul@pwsan.com,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCHv5 3/8] ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX gic control register change
Date: Fri, 18 May 2012 07:13:08 -0700 [thread overview]
Message-ID: <87likpo9vv.fsf@ti.com> (raw)
In-Reply-To: <CAMQu2gyqhxVP1M7ftxJ5qqmZ8Bp0ZmHd=7EjJZ7G1Y=Md=vT=g@mail.gmail.com> (Santosh Shilimkar's message of "Fri, 18 May 2012 11:35:36 +0530")
"Shilimkar, Santosh" <santosh.shilimkar@ti.com> writes:
> On Thu, May 17, 2012 at 10:45 PM, Kevin Hilman <khilman@ti.com> wrote:
[...]
>> What's not at all clear is what the ROM code does *after* this. Does it
>> clear both bits? or just bit 0? Since it's r1pX based, I would expect
>> that it doesn't touch anything other than bit 0.
>>
> Actually since the condition of control register == 1 is not satisfied,
> It re-inits entire GIC thinking it's not configured at all. So everything
> will be cleared and including non-secure GIC dist. enable bit.
Aha, that's the missing piece of the puzzle: The ROM code is clearing
bits that are unused on r1pX (but used on r2pX). That is the root of
this bug and needs more description.
Thanks for clarifying.
[...]
>> Santosh, I do understand what is happening here. But I play dumb so
>> that it will be described in great detail in the changelog so that when
>> I forget (and you forget) we can go back to this and get a quick
>> understanding of both the bug and the workaround.
>>
>> Since you are very deeply familiar with this bug, it's understandably
>> hard to write this changelog since most things probably seem obvious to
>> you. A suggestion would be to have a few colleagues that are not
>> familiar with this bug read the changelog and try and describe it back
>> to you.
>>
> I agree with you. This is side effect of knowing some BUGs too much.
> I will work with Tero so that change log captures more details.
Thanks.
Maybe Jon Hunter can help review the changelog too. IMO, he is the
reigning champion of thorough, descriptive and detailed changelogs. :)
Kevin
--
To unsubscribe from this list: send the line "unsubscribe linux-omap" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: khilman@ti.com (Kevin Hilman)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCHv5 3/8] ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX gic control register change
Date: Fri, 18 May 2012 07:13:08 -0700 [thread overview]
Message-ID: <87likpo9vv.fsf@ti.com> (raw)
In-Reply-To: <CAMQu2gyqhxVP1M7ftxJ5qqmZ8Bp0ZmHd=7EjJZ7G1Y=Md=vT=g@mail.gmail.com> (Santosh Shilimkar's message of "Fri, 18 May 2012 11:35:36 +0530")
"Shilimkar, Santosh" <santosh.shilimkar@ti.com> writes:
> On Thu, May 17, 2012 at 10:45 PM, Kevin Hilman <khilman@ti.com> wrote:
[...]
>> What's not at all clear is what the ROM code does *after* this. ?Does it
>> clear both bits? ?or just bit 0? ?Since it's r1pX based, I would expect
>> that it doesn't touch anything other than bit 0.
>>
> Actually since the condition of control register == 1 is not satisfied,
> It re-inits entire GIC thinking it's not configured at all. So everything
> will be cleared and including non-secure GIC dist. enable bit.
Aha, that's the missing piece of the puzzle: The ROM code is clearing
bits that are unused on r1pX (but used on r2pX). That is the root of
this bug and needs more description.
Thanks for clarifying.
[...]
>> Santosh, I do understand what is happening here. ?But I play dumb so
>> that it will be described in great detail in the changelog so that when
>> I forget (and you forget) we can go back to this and get a quick
>> understanding of both the bug and the workaround.
>>
>> Since you are very deeply familiar with this bug, it's understandably
>> hard to write this changelog since most things probably seem obvious to
>> you. ?A suggestion would be to have a few colleagues that are not
>> familiar with this bug read the changelog and try and describe it back
>> to you.
>>
> I agree with you. This is side effect of knowing some BUGs too much.
> I will work with Tero so that change log captures more details.
Thanks.
Maybe Jon Hunter can help review the changelog too. IMO, he is the
reigning champion of thorough, descriptive and detailed changelogs. :)
Kevin
next prev parent reply other threads:[~2012-05-18 14:13 UTC|newest]
Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top
2012-05-14 10:03 [PATCHv5 0/8] ARM: OMAP4: core retention support Tero Kristo
2012-05-14 10:03 ` Tero Kristo
2012-05-14 10:03 ` [PATCHv5 1/8] ARM: OMAP4: suspend: Program all domains to retention Tero Kristo
2012-05-14 10:03 ` Tero Kristo
2012-05-15 19:52 ` Kevin Hilman
2012-05-15 19:52 ` Kevin Hilman
2012-05-16 8:37 ` Tero Kristo
2012-05-16 8:37 ` Tero Kristo
2012-05-14 10:03 ` [PATCHv5 2/8] TEMP: ARM: OMAP4: hwmod_data: Do not get DSP out of reset at boot time Tero Kristo
2012-05-14 10:03 ` Tero Kristo
2012-05-14 10:03 ` [PATCHv5 3/8] ARM: OMAP4460: Workaround for ROM bug because of CA9 r2pX gic control register change Tero Kristo
2012-05-14 10:03 ` Tero Kristo
2012-05-15 21:44 ` Kevin Hilman
2012-05-15 21:44 ` Kevin Hilman
2012-05-16 8:54 ` Tero Kristo
2012-05-16 8:54 ` Tero Kristo
2012-05-16 9:16 ` Santosh Shilimkar
2012-05-16 9:16 ` Santosh Shilimkar
2012-05-16 12:23 ` Santosh Shilimkar
2012-05-16 12:23 ` Santosh Shilimkar
2012-05-16 16:51 ` Kevin Hilman
2012-05-16 16:51 ` Kevin Hilman
2012-05-17 6:46 ` Shilimkar, Santosh
2012-05-17 6:46 ` Shilimkar, Santosh
2012-05-17 17:15 ` Kevin Hilman
2012-05-17 17:15 ` Kevin Hilman
2012-05-18 6:05 ` Shilimkar, Santosh
2012-05-18 6:05 ` Shilimkar, Santosh
2012-05-18 14:13 ` Kevin Hilman [this message]
2012-05-18 14:13 ` Kevin Hilman
2012-05-16 12:31 ` Santosh Shilimkar
2012-05-16 12:31 ` Santosh Shilimkar
2012-05-14 10:03 ` [PATCHv5 4/8] ARM: OMAP4: hwmod: flag hwmods/modules supporting module level context status Tero Kristo
2012-05-14 10:03 ` Tero Kristo
2012-05-14 10:03 ` [PATCHv5 5/8] ARM: OMAP: hwmod: Add support for per hwmod/module context lost count Tero Kristo
2012-05-14 10:03 ` Tero Kristo
2012-05-29 19:32 ` Menon, Nishanth
2012-05-29 19:32 ` Menon, Nishanth
2012-05-30 8:02 ` Tero Kristo
2012-05-30 8:02 ` Tero Kristo
2012-05-14 10:03 ` [PATCHv5 6/8] ARM: OMAP4: pwrdm: add support for reading prev logic and mem states Tero Kristo
2012-05-14 10:03 ` Tero Kristo
2012-05-15 22:36 ` Kevin Hilman
2012-05-15 22:36 ` Kevin Hilman
2012-05-16 8:55 ` Tero Kristo
2012-05-16 8:55 ` Tero Kristo
2012-05-14 10:03 ` [PATCHv5 7/8] ARM: OMAP4: PM: Add next_logic_state param to power_state Tero Kristo
2012-05-14 10:03 ` Tero Kristo
2012-05-14 10:03 ` [PATCHv5 8/8] ARM: OMAP4: PM: Added option for enabling OSWR Tero Kristo
2012-05-14 10:03 ` Tero Kristo
2012-05-15 22:41 ` Kevin Hilman
2012-05-15 22:41 ` Kevin Hilman
2012-05-16 9:10 ` Tero Kristo
2012-05-16 9:10 ` Tero Kristo
2012-05-16 18:03 ` Kevin Hilman
2012-05-16 18:03 ` Kevin Hilman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87likpo9vv.fsf@ti.com \
--to=khilman@ti.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-omap@vger.kernel.org \
--cc=paul@pwsan.com \
--cc=santosh.shilimkar@ti.com \
--cc=t-kristo@ti.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.