* [PATCH v4 0/4] Implement Wa_14022698537
@ 2024-12-11 11:59 Raag Jadav
2024-12-11 11:59 ` [PATCH v4 1/4] drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges Raag Jadav
` (8 more replies)
0 siblings, 9 replies; 15+ messages in thread
From: Raag Jadav @ 2024-12-11 11:59 UTC (permalink / raw)
To: jani.nikula, joonas.lahtinen, rodrigo.vivi, matthew.d.roper,
andi.shyti
Cc: intel-gfx, anshuman.gupta, badal.nilawar, riana.tauro, Raag Jadav
This series implements Wa_14022698537 for DG2 along with its prerequisites
in i915. Detailed description in commit message.
v1: https://patchwork.freedesktop.org/series/139628/
v2: Introduce DG2_WA subplatform for workaround (Jani)
Fix Wa_ID and include it in subject (Badal)
Rephrase commit message (Jani)
Move CPU whitelist to intel_wa_cpu.c
v3: Rework subplatform naming (Jani)
Move CPU file out of gt directory (Riana)
Rephrase CPU file description (Jani)
Add kernel doc, re-order macro (Riana)
Move workaround to i915_pcode_init() (Badal, Anshuman)
v4: Spell fix and nits (Riana)
Update tags and rebase
Raag Jadav (4):
drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges
drm/i915/dg2: Introduce DG2_D subplatform
drm/i915: Introduce intel_cpu_info.c for CPU IDs
drm/i915/dg2: Implement Wa_14022698537
drivers/gpu/drm/i915/Makefile | 1 +
drivers/gpu/drm/i915/i915_driver.c | 15 +++++++
drivers/gpu/drm/i915/i915_drv.h | 2 +
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_cpu_info.c | 44 +++++++++++++++++++
drivers/gpu/drm/i915/intel_cpu_info.h | 13 ++++++
drivers/gpu/drm/i915/intel_device_info.c | 9 ++++
drivers/gpu/drm/i915/intel_device_info.h | 5 ++-
include/drm/intel/pciids.h | 55 ++++++++++++++++++------
9 files changed, 131 insertions(+), 14 deletions(-)
create mode 100644 drivers/gpu/drm/i915/intel_cpu_info.c
create mode 100644 drivers/gpu/drm/i915/intel_cpu_info.h
--
2.34.1
^ permalink raw reply [flat|nested] 15+ messages in thread* [PATCH v4 1/4] drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges 2024-12-11 11:59 [PATCH v4 0/4] Implement Wa_14022698537 Raag Jadav @ 2024-12-11 11:59 ` Raag Jadav 2024-12-11 11:59 ` [PATCH v4 2/4] drm/i915/dg2: Introduce DG2_D subplatform Raag Jadav ` (7 subsequent siblings) 8 siblings, 0 replies; 15+ messages in thread From: Raag Jadav @ 2024-12-11 11:59 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, matthew.d.roper, andi.shyti Cc: intel-gfx, anshuman.gupta, badal.nilawar, riana.tauro, Raag Jadav, Jani Nikula Refactor DG2 PCI IDs into D, E and M ranges which will be useful for segment specific features. v3: Rework subplatform naming (Jani) Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Riana Tauro <riana.tauro@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> --- include/drm/intel/pciids.h | 55 +++++++++++++++++++++++++++++--------- 1 file changed, 42 insertions(+), 13 deletions(-) diff --git a/include/drm/intel/pciids.h b/include/drm/intel/pciids.h index 7883384acd5e..77c826589ec1 100644 --- a/include/drm/intel/pciids.h +++ b/include/drm/intel/pciids.h @@ -717,37 +717,66 @@ MACRO__(0xA7AB, ## __VA_ARGS__) /* DG2 */ -#define INTEL_DG2_G10_IDS(MACRO__, ...) \ - MACRO__(0x5690, ## __VA_ARGS__), \ - MACRO__(0x5691, ## __VA_ARGS__), \ - MACRO__(0x5692, ## __VA_ARGS__), \ +#define INTEL_DG2_G10_D_IDS(MACRO__, ...) \ MACRO__(0x56A0, ## __VA_ARGS__), \ MACRO__(0x56A1, ## __VA_ARGS__), \ - MACRO__(0x56A2, ## __VA_ARGS__), \ + MACRO__(0x56A2, ## __VA_ARGS__) + +#define INTEL_DG2_G10_E_IDS(MACRO__, ...) \ MACRO__(0x56BE, ## __VA_ARGS__), \ MACRO__(0x56BF, ## __VA_ARGS__) -#define INTEL_DG2_G11_IDS(MACRO__, ...) \ - MACRO__(0x5693, ## __VA_ARGS__), \ - MACRO__(0x5694, ## __VA_ARGS__), \ - MACRO__(0x5695, ## __VA_ARGS__), \ +#define INTEL_DG2_G10_M_IDS(MACRO__, ...) \ + MACRO__(0x5690, ## __VA_ARGS__), \ + MACRO__(0x5691, ## __VA_ARGS__), \ + MACRO__(0x5692, ## __VA_ARGS__) + +#define INTEL_DG2_G10_IDS(MACRO__, ...) \ + INTEL_DG2_G10_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G10_E_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G10_M_IDS(MACRO__, ## __VA_ARGS__) + +#define INTEL_DG2_G11_D_IDS(MACRO__, ...) \ MACRO__(0x56A5, ## __VA_ARGS__), \ MACRO__(0x56A6, ## __VA_ARGS__), \ MACRO__(0x56B0, ## __VA_ARGS__), \ - MACRO__(0x56B1, ## __VA_ARGS__), \ + MACRO__(0x56B1, ## __VA_ARGS__) + +#define INTEL_DG2_G11_E_IDS(MACRO__, ...) \ MACRO__(0x56BA, ## __VA_ARGS__), \ MACRO__(0x56BB, ## __VA_ARGS__), \ MACRO__(0x56BC, ## __VA_ARGS__), \ MACRO__(0x56BD, ## __VA_ARGS__) -#define INTEL_DG2_G12_IDS(MACRO__, ...) \ - MACRO__(0x5696, ## __VA_ARGS__), \ - MACRO__(0x5697, ## __VA_ARGS__), \ +#define INTEL_DG2_G11_M_IDS(MACRO__, ...) \ + MACRO__(0x5693, ## __VA_ARGS__), \ + MACRO__(0x5694, ## __VA_ARGS__), \ + MACRO__(0x5695, ## __VA_ARGS__) + +#define INTEL_DG2_G11_IDS(MACRO__, ...) \ + INTEL_DG2_G11_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G11_E_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G11_M_IDS(MACRO__, ## __VA_ARGS__) + +#define INTEL_DG2_G12_D_IDS(MACRO__, ...) \ MACRO__(0x56A3, ## __VA_ARGS__), \ MACRO__(0x56A4, ## __VA_ARGS__), \ MACRO__(0x56B2, ## __VA_ARGS__), \ MACRO__(0x56B3, ## __VA_ARGS__) +#define INTEL_DG2_G12_M_IDS(MACRO__, ...) \ + MACRO__(0x5696, ## __VA_ARGS__), \ + MACRO__(0x5697, ## __VA_ARGS__) + +#define INTEL_DG2_G12_IDS(MACRO__, ...) \ + INTEL_DG2_G12_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G12_M_IDS(MACRO__, ## __VA_ARGS__) + +#define INTEL_DG2_D_IDS(MACRO__, ...) \ + INTEL_DG2_G10_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G11_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G12_D_IDS(MACRO__, ## __VA_ARGS__) + #define INTEL_DG2_IDS(MACRO__, ...) \ INTEL_DG2_G10_IDS(MACRO__, ## __VA_ARGS__), \ INTEL_DG2_G11_IDS(MACRO__, ## __VA_ARGS__), \ -- 2.34.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v4 2/4] drm/i915/dg2: Introduce DG2_D subplatform 2024-12-11 11:59 [PATCH v4 0/4] Implement Wa_14022698537 Raag Jadav 2024-12-11 11:59 ` [PATCH v4 1/4] drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges Raag Jadav @ 2024-12-11 11:59 ` Raag Jadav 2024-12-11 11:59 ` [PATCH v4 3/4] drm/i915: Introduce intel_cpu_info.c for CPU IDs Raag Jadav ` (6 subsequent siblings) 8 siblings, 0 replies; 15+ messages in thread From: Raag Jadav @ 2024-12-11 11:59 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, matthew.d.roper, andi.shyti Cc: intel-gfx, anshuman.gupta, badal.nilawar, riana.tauro, Raag Jadav, Jani Nikula Introduce DG2_D subplatform for the devices that span across multiple DG2 subplatforms but are within same segment and will be useful for segment specific features. v3: Rework subplatform naming (Jani) Split subplatform check into separate case (Jani) Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/intel_device_info.c | 9 +++++++++ drivers/gpu/drm/i915/intel_device_info.h | 5 ++++- 3 files changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index dcf6050e5550..b96b8de12756 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -549,6 +549,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G11) #define IS_DG2_G12(i915) \ IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_G12) +#define IS_DG2_D(i915) \ + IS_SUBPLATFORM(i915, INTEL_DG2, INTEL_SUBPLATFORM_D) #define IS_RAPTORLAKE_S(i915) \ IS_SUBPLATFORM(i915, INTEL_ALDERLAKE_S, INTEL_SUBPLATFORM_RPL) #define IS_ALDERLAKE_P_N(i915) \ diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c index 856b30fa37dc..bbe3a24fe3d9 100644 --- a/drivers/gpu/drm/i915/intel_device_info.c +++ b/drivers/gpu/drm/i915/intel_device_info.c @@ -200,6 +200,10 @@ static const u16 subplatform_g12_ids[] = { INTEL_DG2_G12_IDS(ID), }; +static const u16 subplatform_dg2_d_ids[] = { + INTEL_DG2_D_IDS(ID), +}; + static const u16 subplatform_arl_h_ids[] = { INTEL_ARL_H_IDS(ID), }; @@ -280,6 +284,11 @@ static void intel_device_info_subplatform_init(struct drm_i915_private *i915) mask = BIT(INTEL_SUBPLATFORM_ARL_S); } + /* DG2_D ids span across multiple DG2 subplatforms */ + if (find_devid(devid, subplatform_dg2_d_ids, + ARRAY_SIZE(subplatform_dg2_d_ids))) + mask |= BIT(INTEL_SUBPLATFORM_D); + GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK); RUNTIME_INFO(i915)->platform_mask[pi] |= mask; diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h index ef84eea9ba0b..9387385cb418 100644 --- a/drivers/gpu/drm/i915/intel_device_info.h +++ b/drivers/gpu/drm/i915/intel_device_info.h @@ -95,9 +95,11 @@ enum intel_platform { /* * Subplatform bits share the same namespace per parent platform. In other words * it is fine for the same bit to be used on multiple parent platforms. + * Devices can belong to multiple subplatforms if needed, so it's possible to set + * multiple bits for same device. */ -#define INTEL_SUBPLATFORM_BITS (3) +#define INTEL_SUBPLATFORM_BITS (4) #define INTEL_SUBPLATFORM_MASK (BIT(INTEL_SUBPLATFORM_BITS) - 1) /* HSW/BDW/SKL/KBL/CFL */ @@ -114,6 +116,7 @@ enum intel_platform { #define INTEL_SUBPLATFORM_G10 0 #define INTEL_SUBPLATFORM_G11 1 #define INTEL_SUBPLATFORM_G12 2 +#define INTEL_SUBPLATFORM_D 3 /* ADL */ #define INTEL_SUBPLATFORM_RPL 0 -- 2.34.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v4 3/4] drm/i915: Introduce intel_cpu_info.c for CPU IDs 2024-12-11 11:59 [PATCH v4 0/4] Implement Wa_14022698537 Raag Jadav 2024-12-11 11:59 ` [PATCH v4 1/4] drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges Raag Jadav 2024-12-11 11:59 ` [PATCH v4 2/4] drm/i915/dg2: Introduce DG2_D subplatform Raag Jadav @ 2024-12-11 11:59 ` Raag Jadav 2024-12-11 11:59 ` [PATCH v4 4/4] drm/i915/dg2: Implement Wa_14022698537 Raag Jadav ` (5 subsequent siblings) 8 siblings, 0 replies; 15+ messages in thread From: Raag Jadav @ 2024-12-11 11:59 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, matthew.d.roper, andi.shyti Cc: intel-gfx, anshuman.gupta, badal.nilawar, riana.tauro, Raag Jadav, Jani Nikula Having similar naming convention in intel-family.h and intel_device_info.h results in redefinition of a few platforms. Define CPU IDs in its own file to avoid this. v3: Move file out of gt directory, add kernel doc (Riana) Rephrase file description (Jani) Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Riana Tauro <riana.tauro@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> --- drivers/gpu/drm/i915/Makefile | 1 + drivers/gpu/drm/i915/intel_cpu_info.c | 44 +++++++++++++++++++++++++++ drivers/gpu/drm/i915/intel_cpu_info.h | 13 ++++++++ 3 files changed, 58 insertions(+) create mode 100644 drivers/gpu/drm/i915/intel_cpu_info.c create mode 100644 drivers/gpu/drm/i915/intel_cpu_info.h diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile index e465828d748f..97816c473770 100644 --- a/drivers/gpu/drm/i915/Makefile +++ b/drivers/gpu/drm/i915/Makefile @@ -34,6 +34,7 @@ i915-y += \ i915_sysfs.o \ i915_utils.o \ intel_clock_gating.o \ + intel_cpu_info.o \ intel_device_info.o \ intel_memory_region.o \ intel_pcode.o \ diff --git a/drivers/gpu/drm/i915/intel_cpu_info.c b/drivers/gpu/drm/i915/intel_cpu_info.c new file mode 100644 index 000000000000..e52d0ac713a9 --- /dev/null +++ b/drivers/gpu/drm/i915/intel_cpu_info.c @@ -0,0 +1,44 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright © 2024 Intel Corporation + * + * Avoid INTEL_<PLATFORM> name collisions between asm/intel-family.h and + * intel_device_info.h by having a separate file. + */ + +#include "intel_cpu_info.h" + +#ifdef CONFIG_X86 +#include <asm/cpu_device_id.h> +#include <asm/intel-family.h> + +static const struct x86_cpu_id g8_cpu_ids[] = { + X86_MATCH_VFM(INTEL_ALDERLAKE, NULL), + X86_MATCH_VFM(INTEL_ALDERLAKE_L, NULL), + X86_MATCH_VFM(INTEL_COMETLAKE, NULL), + X86_MATCH_VFM(INTEL_KABYLAKE, NULL), + X86_MATCH_VFM(INTEL_KABYLAKE_L, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE_P, NULL), + X86_MATCH_VFM(INTEL_RAPTORLAKE_S, NULL), + X86_MATCH_VFM(INTEL_ROCKETLAKE, NULL), + {} +}; + +/** + * intel_match_g8_cpu - match current CPU against g8_cpu_ids + * + * This matches current CPU against g8_cpu_ids, which are applicable + * for G8 workaround. + * + * Returns: %true if matches, %false otherwise. + */ +bool intel_match_g8_cpu(void) +{ + return x86_match_cpu(g8_cpu_ids); +} +#else /* CONFIG_X86 */ + +bool intel_match_g8_cpu(void) { return false; } + +#endif /* CONFIG_X86 */ diff --git a/drivers/gpu/drm/i915/intel_cpu_info.h b/drivers/gpu/drm/i915/intel_cpu_info.h new file mode 100644 index 000000000000..d898fb463d31 --- /dev/null +++ b/drivers/gpu/drm/i915/intel_cpu_info.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright © 2024 Intel Corporation + */ + +#ifndef _INTEL_CPU_INFO_H_ +#define _INTEL_CPU_INFO_H_ + +#include <linux/types.h> + +bool intel_match_g8_cpu(void); + +#endif /* _INTEL_CPU_INFO_H_ */ -- 2.34.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v4 4/4] drm/i915/dg2: Implement Wa_14022698537 2024-12-11 11:59 [PATCH v4 0/4] Implement Wa_14022698537 Raag Jadav ` (2 preceding siblings ...) 2024-12-11 11:59 ` [PATCH v4 3/4] drm/i915: Introduce intel_cpu_info.c for CPU IDs Raag Jadav @ 2024-12-11 11:59 ` Raag Jadav 2024-12-11 12:45 ` ✗ Fi.CI.CHECKPATCH: warning for Implement Wa_14022698537 (rev3) Patchwork ` (4 subsequent siblings) 8 siblings, 0 replies; 15+ messages in thread From: Raag Jadav @ 2024-12-11 11:59 UTC (permalink / raw) To: jani.nikula, joonas.lahtinen, rodrigo.vivi, matthew.d.roper, andi.shyti Cc: intel-gfx, anshuman.gupta, badal.nilawar, riana.tauro, Raag Jadav, Jani Nikula G8 power state entry is disabled due to a limitation on DG2, so we enable it from driver with Wa_14022698537. For now we enable it for all DG2 devices with the exception of a few, for which, we enable only when paired with whitelisted CPU models. This works with native ASPM and reduces idle power consumption. $ echo powersave > /sys/module/pcie_aspm/parameters/policy $ lspci -s 0000:03:00.0 -vvv LnkCtl: ASPM L1 Enabled; RCB 64 bytes, Disabled- CommClk- v2: Fix Wa_ID and include it in subject (Badal) Rephrase commit message (Jani) v3: Move workaround to i915_pcode_init() (Badal, Anshuman) Re-order macro (Riana) v4: Spell fix (Riana) Signed-off-by: Raag Jadav <raag.jadav@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Riana Tauro <riana.tauro@intel.com> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com> --- drivers/gpu/drm/i915/i915_driver.c | 15 +++++++++++++++ drivers/gpu/drm/i915/i915_reg.h | 1 + 2 files changed, 16 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_driver.c b/drivers/gpu/drm/i915/i915_driver.c index eb3fcc9e77a5..2251bedf9e3c 100644 --- a/drivers/gpu/drm/i915/i915_driver.c +++ b/drivers/gpu/drm/i915/i915_driver.c @@ -95,11 +95,13 @@ #include "i915_memcpy.h" #include "i915_perf.h" #include "i915_query.h" +#include "i915_reg.h" #include "i915_switcheroo.h" #include "i915_sysfs.h" #include "i915_utils.h" #include "i915_vgpu.h" #include "intel_clock_gating.h" +#include "intel_cpu_info.h" #include "intel_gvt.h" #include "intel_memory_region.h" #include "intel_pci_config.h" @@ -424,6 +426,18 @@ static int i915_set_dma_info(struct drm_i915_private *i915) return ret; } +/* Wa_14022698537:dg2 */ +static void i915_enable_g8(struct drm_i915_private *i915) +{ + if (IS_DG2(i915)) { + if (IS_DG2_D(i915) && !intel_match_g8_cpu()) + return; + + snb_pcode_write_p(&i915->uncore, PCODE_POWER_SETUP, + POWER_SETUP_SUBCOMMAND_G8_ENABLE, 0, 0); + } +} + static int i915_pcode_init(struct drm_i915_private *i915) { struct intel_gt *gt; @@ -437,6 +451,7 @@ static int i915_pcode_init(struct drm_i915_private *i915) } } + i915_enable_g8(i915); return 0; } diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index f48b5c809cec..8dfa1f01500c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -3578,6 +3578,7 @@ #define POWER_SETUP_I1_WATTS REG_BIT(31) #define POWER_SETUP_I1_SHIFT 6 /* 10.6 fixed point format */ #define POWER_SETUP_I1_DATA_MASK REG_GENMASK(15, 0) +#define POWER_SETUP_SUBCOMMAND_G8_ENABLE 0x6 #define GEN12_PCODE_READ_SAGV_BLOCK_TIME_US 0x23 #define XEHP_PCODE_FREQUENCY_CONFIG 0x6e /* pvc */ /* XEHP_PCODE_FREQUENCY_CONFIG sub-commands (param1) */ -- 2.34.1 ^ permalink raw reply related [flat|nested] 15+ messages in thread
* ✗ Fi.CI.CHECKPATCH: warning for Implement Wa_14022698537 (rev3) 2024-12-11 11:59 [PATCH v4 0/4] Implement Wa_14022698537 Raag Jadav ` (3 preceding siblings ...) 2024-12-11 11:59 ` [PATCH v4 4/4] drm/i915/dg2: Implement Wa_14022698537 Raag Jadav @ 2024-12-11 12:45 ` Patchwork 2024-12-11 12:45 ` ✗ Fi.CI.SPARSE: " Patchwork ` (3 subsequent siblings) 8 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2024-12-11 12:45 UTC (permalink / raw) To: Raag Jadav; +Cc: intel-gfx == Series Details == Series: Implement Wa_14022698537 (rev3) URL : https://patchwork.freedesktop.org/series/139883/ State : warning == Summary == Error: dim checkpatch failed ba38e573b559 drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges -:28: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #28: FILE: include/drm/intel/pciids.h:720: +#define INTEL_DG2_G10_D_IDS(MACRO__, ...) \ MACRO__(0x56A0, ## __VA_ARGS__), \ MACRO__(0x56A1, ## __VA_ARGS__), \ + MACRO__(0x56A2, ## __VA_ARGS__) -:28: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #28: FILE: include/drm/intel/pciids.h:720: +#define INTEL_DG2_G10_D_IDS(MACRO__, ...) \ MACRO__(0x56A0, ## __VA_ARGS__), \ MACRO__(0x56A1, ## __VA_ARGS__), \ + MACRO__(0x56A2, ## __VA_ARGS__) -:34: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #34: FILE: include/drm/intel/pciids.h:725: +#define INTEL_DG2_G10_E_IDS(MACRO__, ...) \ MACRO__(0x56BE, ## __VA_ARGS__), \ MACRO__(0x56BF, ## __VA_ARGS__) -:34: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #34: FILE: include/drm/intel/pciids.h:725: +#define INTEL_DG2_G10_E_IDS(MACRO__, ...) \ MACRO__(0x56BE, ## __VA_ARGS__), \ MACRO__(0x56BF, ## __VA_ARGS__) -:42: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #42: FILE: include/drm/intel/pciids.h:729: +#define INTEL_DG2_G10_M_IDS(MACRO__, ...) \ + MACRO__(0x5690, ## __VA_ARGS__), \ + MACRO__(0x5691, ## __VA_ARGS__), \ + MACRO__(0x5692, ## __VA_ARGS__) -:42: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #42: FILE: include/drm/intel/pciids.h:729: +#define INTEL_DG2_G10_M_IDS(MACRO__, ...) \ + MACRO__(0x5690, ## __VA_ARGS__), \ + MACRO__(0x5691, ## __VA_ARGS__), \ + MACRO__(0x5692, ## __VA_ARGS__) -:47: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #47: FILE: include/drm/intel/pciids.h:734: +#define INTEL_DG2_G10_IDS(MACRO__, ...) \ + INTEL_DG2_G10_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G10_E_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G10_M_IDS(MACRO__, ## __VA_ARGS__) -:47: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #47: FILE: include/drm/intel/pciids.h:734: +#define INTEL_DG2_G10_IDS(MACRO__, ...) \ + INTEL_DG2_G10_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G10_E_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G10_M_IDS(MACRO__, ## __VA_ARGS__) -:52: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #52: FILE: include/drm/intel/pciids.h:739: +#define INTEL_DG2_G11_D_IDS(MACRO__, ...) \ MACRO__(0x56A5, ## __VA_ARGS__), \ MACRO__(0x56A6, ## __VA_ARGS__), \ MACRO__(0x56B0, ## __VA_ARGS__), \ + MACRO__(0x56B1, ## __VA_ARGS__) -:52: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #52: FILE: include/drm/intel/pciids.h:739: +#define INTEL_DG2_G11_D_IDS(MACRO__, ...) \ MACRO__(0x56A5, ## __VA_ARGS__), \ MACRO__(0x56A6, ## __VA_ARGS__), \ MACRO__(0x56B0, ## __VA_ARGS__), \ + MACRO__(0x56B1, ## __VA_ARGS__) -:59: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #59: FILE: include/drm/intel/pciids.h:745: +#define INTEL_DG2_G11_E_IDS(MACRO__, ...) \ MACRO__(0x56BA, ## __VA_ARGS__), \ MACRO__(0x56BB, ## __VA_ARGS__), \ MACRO__(0x56BC, ## __VA_ARGS__), \ MACRO__(0x56BD, ## __VA_ARGS__) -:59: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #59: FILE: include/drm/intel/pciids.h:745: +#define INTEL_DG2_G11_E_IDS(MACRO__, ...) \ MACRO__(0x56BA, ## __VA_ARGS__), \ MACRO__(0x56BB, ## __VA_ARGS__), \ MACRO__(0x56BC, ## __VA_ARGS__), \ MACRO__(0x56BD, ## __VA_ARGS__) -:68: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #68: FILE: include/drm/intel/pciids.h:751: +#define INTEL_DG2_G11_M_IDS(MACRO__, ...) \ + MACRO__(0x5693, ## __VA_ARGS__), \ + MACRO__(0x5694, ## __VA_ARGS__), \ + MACRO__(0x5695, ## __VA_ARGS__) -:68: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #68: FILE: include/drm/intel/pciids.h:751: +#define INTEL_DG2_G11_M_IDS(MACRO__, ...) \ + MACRO__(0x5693, ## __VA_ARGS__), \ + MACRO__(0x5694, ## __VA_ARGS__), \ + MACRO__(0x5695, ## __VA_ARGS__) -:73: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #73: FILE: include/drm/intel/pciids.h:756: +#define INTEL_DG2_G11_IDS(MACRO__, ...) \ + INTEL_DG2_G11_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G11_E_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G11_M_IDS(MACRO__, ## __VA_ARGS__) -:73: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #73: FILE: include/drm/intel/pciids.h:756: +#define INTEL_DG2_G11_IDS(MACRO__, ...) \ + INTEL_DG2_G11_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G11_E_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G11_M_IDS(MACRO__, ## __VA_ARGS__) -:78: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #78: FILE: include/drm/intel/pciids.h:761: +#define INTEL_DG2_G12_D_IDS(MACRO__, ...) \ MACRO__(0x56A3, ## __VA_ARGS__), \ MACRO__(0x56A4, ## __VA_ARGS__), \ MACRO__(0x56B2, ## __VA_ARGS__), \ MACRO__(0x56B3, ## __VA_ARGS__) -:78: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #78: FILE: include/drm/intel/pciids.h:761: +#define INTEL_DG2_G12_D_IDS(MACRO__, ...) \ MACRO__(0x56A3, ## __VA_ARGS__), \ MACRO__(0x56A4, ## __VA_ARGS__), \ MACRO__(0x56B2, ## __VA_ARGS__), \ MACRO__(0x56B3, ## __VA_ARGS__) -:84: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #84: FILE: include/drm/intel/pciids.h:767: +#define INTEL_DG2_G12_M_IDS(MACRO__, ...) \ + MACRO__(0x5696, ## __VA_ARGS__), \ + MACRO__(0x5697, ## __VA_ARGS__) -:84: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #84: FILE: include/drm/intel/pciids.h:767: +#define INTEL_DG2_G12_M_IDS(MACRO__, ...) \ + MACRO__(0x5696, ## __VA_ARGS__), \ + MACRO__(0x5697, ## __VA_ARGS__) -:88: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #88: FILE: include/drm/intel/pciids.h:771: +#define INTEL_DG2_G12_IDS(MACRO__, ...) \ + INTEL_DG2_G12_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G12_M_IDS(MACRO__, ## __VA_ARGS__) -:88: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #88: FILE: include/drm/intel/pciids.h:771: +#define INTEL_DG2_G12_IDS(MACRO__, ...) \ + INTEL_DG2_G12_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G12_M_IDS(MACRO__, ## __VA_ARGS__) -:92: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses #92: FILE: include/drm/intel/pciids.h:775: +#define INTEL_DG2_D_IDS(MACRO__, ...) \ + INTEL_DG2_G10_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G11_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G12_D_IDS(MACRO__, ## __VA_ARGS__) -:92: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'MACRO__' - possible side-effects? #92: FILE: include/drm/intel/pciids.h:775: +#define INTEL_DG2_D_IDS(MACRO__, ...) \ + INTEL_DG2_G10_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G11_D_IDS(MACRO__, ## __VA_ARGS__), \ + INTEL_DG2_G12_D_IDS(MACRO__, ## __VA_ARGS__) total: 12 errors, 0 warnings, 12 checks, 79 lines checked 13dba5bc0f11 drm/i915/dg2: Introduce DG2_D subplatform 8ed2cbc28908 drm/i915: Introduce intel_cpu_info.c for CPU IDs -:31: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating? #31: new file mode 100644 total: 0 errors, 1 warnings, 0 checks, 64 lines checked c7f1dca18bef drm/i915/dg2: Implement Wa_14022698537 ^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ Fi.CI.SPARSE: warning for Implement Wa_14022698537 (rev3) 2024-12-11 11:59 [PATCH v4 0/4] Implement Wa_14022698537 Raag Jadav ` (4 preceding siblings ...) 2024-12-11 12:45 ` ✗ Fi.CI.CHECKPATCH: warning for Implement Wa_14022698537 (rev3) Patchwork @ 2024-12-11 12:45 ` Patchwork 2024-12-11 12:59 ` ✓ i915.CI.BAT: success " Patchwork ` (2 subsequent siblings) 8 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2024-12-11 12:45 UTC (permalink / raw) To: Raag Jadav; +Cc: intel-gfx == Series Details == Series: Implement Wa_14022698537 (rev3) URL : https://patchwork.freedesktop.org/series/139883/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. ^ permalink raw reply [flat|nested] 15+ messages in thread
* ✓ i915.CI.BAT: success for Implement Wa_14022698537 (rev3) 2024-12-11 11:59 [PATCH v4 0/4] Implement Wa_14022698537 Raag Jadav ` (5 preceding siblings ...) 2024-12-11 12:45 ` ✗ Fi.CI.SPARSE: " Patchwork @ 2024-12-11 12:59 ` Patchwork 2024-12-11 14:13 ` ✗ i915.CI.Full: failure " Patchwork 2024-12-11 23:40 ` [PATCH v4 0/4] Implement Wa_14022698537 Andi Shyti 8 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2024-12-11 12:59 UTC (permalink / raw) To: Raag Jadav; +Cc: intel-gfx == Series Details == Series: Implement Wa_14022698537 (rev3) URL : https://patchwork.freedesktop.org/series/139883/ State : success == Summary == CI Bug Log - changes from CI_DRM_15819 -> Patchwork_139883v3 ==================================================== Summary ------- **SUCCESS** No regressions found. External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/index.html Participating hosts (46 -> 45) ------------------------------ Missing (1): fi-snb-2520m Known issues ------------ Here are the changes found in Patchwork_139883v3 that come from known issues: ### IGT changes ### #### Issues hit #### * igt@i915_module_load@load: - fi-pnv-d510: [PASS][1] -> [ABORT][2] ([i915#13203]) [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/fi-pnv-d510/igt@i915_module_load@load.html [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/fi-pnv-d510/igt@i915_module_load@load.html * igt@i915_module_load@reload: - fi-cfl-8109u: [PASS][3] -> [DMESG-WARN][4] ([i915#11621] / [i915#1982]) [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/fi-cfl-8109u/igt@i915_module_load@reload.html [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/fi-cfl-8109u/igt@i915_module_load@reload.html * igt@i915_selftest@live@gt_mocs: - bat-twl-2: NOTRUN -> [ABORT][5] ([i915#12919]) +1 other test abort [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/bat-twl-2/igt@i915_selftest@live@gt_mocs.html * igt@kms_addfb_basic@too-high: - fi-cfl-8109u: [PASS][6] -> [DMESG-WARN][7] ([i915#11621]) +51 other tests dmesg-warn [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/fi-cfl-8109u/igt@kms_addfb_basic@too-high.html [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/fi-cfl-8109u/igt@kms_addfb_basic@too-high.html * igt@kms_pipe_crc_basic@read-crc: - bat-dg2-11: [PASS][8] -> [SKIP][9] ([i915#9197]) [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/bat-dg2-11/igt@kms_pipe_crc_basic@read-crc.html [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/bat-dg2-11/igt@kms_pipe_crc_basic@read-crc.html #### Possible fixes #### * igt@core_auth@basic-auth: - fi-cfl-8109u: [DMESG-WARN][10] ([i915#11621]) -> [PASS][11] +1 other test pass [10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/fi-cfl-8109u/igt@core_auth@basic-auth.html [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/fi-cfl-8109u/igt@core_auth@basic-auth.html * igt@i915_pm_rpm@module-reload: - bat-dg2-11: [FAIL][12] ([i915#12903]) -> [PASS][13] [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/bat-dg2-11/igt@i915_pm_rpm@module-reload.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/bat-dg2-11/igt@i915_pm_rpm@module-reload.html * igt@i915_selftest@live@workarounds: - bat-mtlp-6: [ABORT][14] ([i915#12061]) -> [PASS][15] +1 other test pass [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/bat-mtlp-6/igt@i915_selftest@live@workarounds.html [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/bat-mtlp-6/igt@i915_selftest@live@workarounds.html * igt@kms_cursor_legacy@basic-flip-before-cursor-atomic: - fi-kbl-7567u: [DMESG-WARN][16] ([i915#12920]) -> [PASS][17] [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/fi-kbl-7567u/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/fi-kbl-7567u/igt@kms_cursor_legacy@basic-flip-before-cursor-atomic.html [i915#11621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11621 [i915#12061]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12061 [i915#12903]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12903 [i915#12919]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12919 [i915#12920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12920 [i915#13203]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13203 [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982 [i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197 Build changes ------------- * Linux: CI_DRM_15819 -> Patchwork_139883v3 CI-20190529: 20190529 CI_DRM_15819: 03abf2f5f12e0f13a3a28bf70ccf2d88ec2a707b @ git://anongit.freedesktop.org/gfx-ci/linux IGT_8147: df65b61f81a5cc919c10ff9c5ed516b45364135c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_139883v3: 03abf2f5f12e0f13a3a28bf70ccf2d88ec2a707b @ git://anongit.freedesktop.org/gfx-ci/linux == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/index.html ^ permalink raw reply [flat|nested] 15+ messages in thread
* ✗ i915.CI.Full: failure for Implement Wa_14022698537 (rev3) 2024-12-11 11:59 [PATCH v4 0/4] Implement Wa_14022698537 Raag Jadav ` (6 preceding siblings ...) 2024-12-11 12:59 ` ✓ i915.CI.BAT: success " Patchwork @ 2024-12-11 14:13 ` Patchwork 2024-12-11 23:40 ` [PATCH v4 0/4] Implement Wa_14022698537 Andi Shyti 8 siblings, 0 replies; 15+ messages in thread From: Patchwork @ 2024-12-11 14:13 UTC (permalink / raw) To: Raag Jadav; +Cc: intel-gfx [-- Attachment #1: Type: text/plain, Size: 32284 bytes --] == Series Details == Series: Implement Wa_14022698537 (rev3) URL : https://patchwork.freedesktop.org/series/139883/ State : failure == Summary == CI Bug Log - changes from CI_DRM_15819_full -> Patchwork_139883v3_full ==================================================== Summary ------- **FAILURE** Serious unknown changes coming with Patchwork_139883v3_full absolutely need to be verified manually. If you think the reported changes have nothing to do with the changes introduced in Patchwork_139883v3_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them to document this new failure mode, which will reduce false positives in CI. Participating hosts (10 -> 10) ------------------------------ No changes in participating hosts Possible new issues ------------------- Here are the unknown changes that may have been introduced in Patchwork_139883v3_full: ### IGT changes ### #### Possible regressions #### * igt@kms_async_flips@crc-atomic: - shard-tglu: NOTRUN -> [INCOMPLETE][1] +1 other test incomplete [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-10/igt@kms_async_flips@crc-atomic.html * igt@kms_async_flips@crc-atomic@pipe-a-hdmi-a-1: - shard-snb: [PASS][2] -> [INCOMPLETE][3] +1 other test incomplete [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-snb1/igt@kms_async_flips@crc-atomic@pipe-a-hdmi-a-1.html [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-snb4/igt@kms_async_flips@crc-atomic@pipe-a-hdmi-a-1.html * igt@kms_async_flips@crc-atomic@pipe-a-hdmi-a-2: - shard-rkl: NOTRUN -> [INCOMPLETE][4] [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-1/igt@kms_async_flips@crc-atomic@pipe-a-hdmi-a-2.html * igt@kms_async_flips@crc-atomic@pipe-c-hdmi-a-4: - shard-dg1: NOTRUN -> [CRASH][5] +3 other tests crash [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-14/igt@kms_async_flips@crc-atomic@pipe-c-hdmi-a-4.html Known issues ------------ Here are the changes found in Patchwork_139883v3_full that come from known issues: ### IGT changes ### #### Issues hit #### * igt@drm_fdinfo@most-busy-idle-check-all@bcs0: - shard-dg1: NOTRUN -> [SKIP][6] ([i915#8414]) +5 other tests skip [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-17/igt@drm_fdinfo@most-busy-idle-check-all@bcs0.html * igt@gem_ctx_freq@sysfs@gt0: - shard-snb: NOTRUN -> [ABORT][7] ([i915#13218]) +1 other test abort [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-snb5/igt@gem_ctx_freq@sysfs@gt0.html * igt@gem_ctx_persistence@engines-mixed-process: - shard-snb: NOTRUN -> [SKIP][8] ([i915#1099]) +1 other test skip [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-snb5/igt@gem_ctx_persistence@engines-mixed-process.html * igt@gem_eio@unwedge-stress: - shard-snb: NOTRUN -> [FAIL][9] ([i915#8898]) [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-snb5/igt@gem_eio@unwedge-stress.html * igt@gem_exec_balancer@persistence: - shard-tglu: NOTRUN -> [ABORT][10] ([i915#13218]) +1 other test abort [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-10/igt@gem_exec_balancer@persistence.html * igt@gem_exec_fence@concurrent: - shard-dg1: NOTRUN -> [SKIP][11] ([i915#4812]) [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-13/igt@gem_exec_fence@concurrent.html * igt@gem_exec_suspend@basic-s3-devices: - shard-dg1: [PASS][12] -> [DMESG-WARN][13] ([i915#4423]) +2 other tests dmesg-warn [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-dg1-14/igt@gem_exec_suspend@basic-s3-devices.html [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-17/igt@gem_exec_suspend@basic-s3-devices.html * igt@gem_exec_suspend@basic-s4-devices: - shard-rkl: NOTRUN -> [ABORT][14] ([i915#7975] / [i915#8213]) +1 other test abort [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-7/igt@gem_exec_suspend@basic-s4-devices.html * igt@gem_fence_thrash@bo-write-verify-x: - shard-rkl: [PASS][15] -> [DMESG-WARN][16] ([i915#12964]) [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-rkl-4/igt@gem_fence_thrash@bo-write-verify-x.html [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-1/igt@gem_fence_thrash@bo-write-verify-x.html * igt@gem_lmem_swapping@parallel-random-verify-ccs: - shard-tglu: NOTRUN -> [SKIP][17] ([i915#4613]) [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-10/igt@gem_lmem_swapping@parallel-random-verify-ccs.html * igt@gem_pxp@create-protected-buffer: - shard-rkl: NOTRUN -> [TIMEOUT][18] ([i915#12964]) [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-3/igt@gem_pxp@create-protected-buffer.html - shard-dg1: NOTRUN -> [SKIP][19] ([i915#4270]) [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-13/igt@gem_pxp@create-protected-buffer.html * igt@gem_tiled_swapping@non-threaded: - shard-snb: NOTRUN -> [ABORT][20] ([i915#13263]) [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-snb4/igt@gem_tiled_swapping@non-threaded.html * igt@gem_vm_create@invalid-create: - shard-snb: NOTRUN -> [SKIP][21] +174 other tests skip [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-snb5/igt@gem_vm_create@invalid-create.html * igt@gen9_exec_parse@allowed-all: - shard-tglu: NOTRUN -> [SKIP][22] ([i915#2527] / [i915#2856]) [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-9/igt@gen9_exec_parse@allowed-all.html * igt@gen9_exec_parse@bb-start-param: - shard-rkl: NOTRUN -> [SKIP][23] ([i915#2527]) [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-7/igt@gen9_exec_parse@bb-start-param.html * igt@i915_pm_sseu@full-enable: - shard-tglu-1: NOTRUN -> [SKIP][24] ([i915#4387]) [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@i915_pm_sseu@full-enable.html * igt@i915_query@hwconfig_table: - shard-tglu-1: NOTRUN -> [SKIP][25] ([i915#6245]) [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@i915_query@hwconfig_table.html * igt@i915_suspend@fence-restore-untiled: - shard-dg2: NOTRUN -> [SKIP][26] ([i915#4077]) [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg2-3/igt@i915_suspend@fence-restore-untiled.html * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-3-y-rc-ccs: - shard-dg1: NOTRUN -> [SKIP][27] ([i915#8709]) +7 other tests skip [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-12/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-3-y-rc-ccs.html * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels: - shard-snb: NOTRUN -> [SKIP][28] ([i915#1769]) [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-snb7/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html * igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1: - shard-mtlp: [PASS][29] -> [FAIL][30] ([i915#11808] / [i915#5956]) +1 other test fail [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-mtlp-6/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1.html [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-mtlp-7/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels@pipe-a-edp-1.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180: - shard-tglu: NOTRUN -> [SKIP][31] ([i915#5286]) [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-10/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180.html * igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip: - shard-rkl: NOTRUN -> [SKIP][32] ([i915#5286]) [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-7/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-180-hflip.html * igt@kms_big_fb@yf-tiled-32bpp-rotate-0: - shard-tglu: NOTRUN -> [SKIP][33] +6 other tests skip [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-10/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0: - shard-rkl: NOTRUN -> [SKIP][34] +1 other test skip [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html - shard-dg1: NOTRUN -> [SKIP][35] ([i915#4538]) [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-13/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html * igt@kms_ccs@bad-pixel-format-y-tiled-ccs@pipe-a-hdmi-a-3: - shard-dg2: NOTRUN -> [SKIP][36] ([i915#10307] / [i915#6095]) +29 other tests skip [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg2-1/igt@kms_ccs@bad-pixel-format-y-tiled-ccs@pipe-a-hdmi-a-3.html * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs: - shard-tglu: NOTRUN -> [SKIP][37] ([i915#12313]) +1 other test skip [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-9/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-1: - shard-dg2: NOTRUN -> [SKIP][38] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg2-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc@pipe-d-hdmi-a-1.html * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs: - shard-rkl: NOTRUN -> [SKIP][39] ([i915#6095]) +11 other tests skip [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-3/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs.html * igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-hdmi-a-1: - shard-tglu-1: NOTRUN -> [SKIP][40] ([i915#6095]) +9 other tests skip [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@kms_ccs@missing-ccs-buffer-yf-tiled-ccs@pipe-b-hdmi-a-1.html * igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs: - shard-rkl: NOTRUN -> [SKIP][41] ([i915#12313]) [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-7/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-3: - shard-dg1: NOTRUN -> [SKIP][42] ([i915#6095]) +25 other tests skip [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-13/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-a-hdmi-a-3.html * igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3: - shard-dg2: NOTRUN -> [SKIP][43] ([i915#7213]) +3 other tests skip [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg2-1/igt@kms_cdclk@mode-transition@pipe-d-hdmi-a-3.html * igt@kms_chamelium_edid@hdmi-edid-read: - shard-tglu-1: NOTRUN -> [SKIP][44] ([i915#7828]) [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@kms_chamelium_edid@hdmi-edid-read.html * igt@kms_chamelium_frames@dp-frame-dump: - shard-dg2: NOTRUN -> [SKIP][45] ([i915#7828]) [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg2-3/igt@kms_chamelium_frames@dp-frame-dump.html * igt@kms_chamelium_hpd@common-hpd-after-suspend: - shard-tglu: NOTRUN -> [SKIP][46] ([i915#7828]) [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-10/igt@kms_chamelium_hpd@common-hpd-after-suspend.html * igt@kms_content_protection@legacy: - shard-tglu-1: NOTRUN -> [SKIP][47] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424]) [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@kms_content_protection@legacy.html * igt@kms_cursor_crc@cursor-offscreen-512x512: - shard-tglu: NOTRUN -> [SKIP][48] ([i915#13049]) [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-9/igt@kms_cursor_crc@cursor-offscreen-512x512.html * igt@kms_cursor_legacy@forked-bo: - shard-rkl: NOTRUN -> [DMESG-WARN][49] ([i915#12964]) +4 other tests dmesg-warn [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-3/igt@kms_cursor_legacy@forked-bo.html * igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot: - shard-rkl: NOTRUN -> [SKIP][50] ([i915#9067]) [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-7/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html * igt@kms_dsc@dsc-basic: - shard-tglu: NOTRUN -> [SKIP][51] ([i915#3555] / [i915#3840]) [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-9/igt@kms_dsc@dsc-basic.html * igt@kms_dsc@dsc-fractional-bpp-with-bpc: - shard-rkl: NOTRUN -> [SKIP][52] ([i915#3840]) [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-3/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html - shard-dg1: NOTRUN -> [SKIP][53] ([i915#3840]) [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-13/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html * igt@kms_flip@2x-flip-vs-panning-interruptible: - shard-tglu-1: NOTRUN -> [SKIP][54] ([i915#3637]) +1 other test skip [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@kms_flip@2x-flip-vs-panning-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2: - shard-rkl: [PASS][55] -> [ABORT][56] ([i915#13218]) +3 other tests abort [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-rkl-1/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2.html [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-5/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a2.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling: - shard-tglu-1: NOTRUN -> [SKIP][57] ([i915#2672] / [i915#3555]) [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html * igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-valid-mode: - shard-tglu-1: NOTRUN -> [SKIP][58] ([i915#2587] / [i915#2672]) [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling@pipe-a-valid-mode.html * igt@kms_frontbuffer_tracking@fbc-suspend: - shard-tglu: NOTRUN -> [ABORT][59] ([i915#10159] / [i915#13218]) [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-9/igt@kms_frontbuffer_tracking@fbc-suspend.html * igt@kms_frontbuffer_tracking@fbc-tiling-4: - shard-tglu: NOTRUN -> [SKIP][60] ([i915#5439]) [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-9/igt@kms_frontbuffer_tracking@fbc-tiling-4.html * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt: - shard-rkl: NOTRUN -> [SKIP][61] ([i915#1825]) +3 other tests skip [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-indfb-plflip-blt.html * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite: - shard-rkl: NOTRUN -> [SKIP][62] ([i915#3023]) +3 other tests skip [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-3/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite.html - shard-dg1: NOTRUN -> [SKIP][63] ([i915#3458]) +3 other tests skip [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-13/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-pwrite.html * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt: - shard-tglu-1: NOTRUN -> [SKIP][64] +14 other tests skip [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-mmap-gtt.html * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc: - shard-dg1: NOTRUN -> [SKIP][65] ([i915#8708]) +2 other tests skip [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-13/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-mmap-wc.html * igt@kms_hdr@static-swap: - shard-dg1: NOTRUN -> [SKIP][66] ([i915#3555] / [i915#8228]) [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-13/igt@kms_hdr@static-swap.html - shard-rkl: NOTRUN -> [SKIP][67] ([i915#3555] / [i915#8228]) [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-3/igt@kms_hdr@static-swap.html * igt@kms_hdr@static-toggle: - shard-tglu-1: NOTRUN -> [SKIP][68] ([i915#3555] / [i915#8228]) [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@kms_hdr@static-toggle.html * igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes: - shard-dg1: NOTRUN -> [SKIP][69] +2 other tests skip [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-13/igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes.html * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25: - shard-rkl: NOTRUN -> [SKIP][70] ([i915#12247] / [i915#6953]) [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-7/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25.html * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-a: - shard-rkl: NOTRUN -> [SKIP][71] ([i915#12247]) +1 other test skip [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-7/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-a.html * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait: - shard-dg1: NOTRUN -> [SKIP][72] ([i915#9519]) [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-12/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html * igt@kms_pm_rpm@modeset-non-lpsp-stress: - shard-rkl: [PASS][73] -> [SKIP][74] ([i915#9519]) [73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-rkl-5/igt@kms_pm_rpm@modeset-non-lpsp-stress.html [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-4/igt@kms_pm_rpm@modeset-non-lpsp-stress.html * igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf: - shard-tglu-1: NOTRUN -> [SKIP][75] ([i915#11520]) +1 other test skip [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf.html - shard-snb: NOTRUN -> [SKIP][76] ([i915#11520]) +1 other test skip [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-snb4/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-exceed-fully-sf.html * igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area: - shard-rkl: NOTRUN -> [SKIP][77] ([i915#11520]) +1 other test skip [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-3/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html - shard-dg1: NOTRUN -> [SKIP][78] ([i915#11520]) [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-13/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html * igt@kms_psr@fbc-psr2-suspend: - shard-rkl: NOTRUN -> [SKIP][79] ([i915#1072] / [i915#9732]) +2 other tests skip [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-3/igt@kms_psr@fbc-psr2-suspend.html - shard-dg1: NOTRUN -> [SKIP][80] ([i915#1072] / [i915#9732]) +1 other test skip [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-13/igt@kms_psr@fbc-psr2-suspend.html * igt@kms_psr@psr-sprite-mmap-cpu: - shard-tglu-1: NOTRUN -> [SKIP][81] ([i915#9732]) +4 other tests skip [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@kms_psr@psr-sprite-mmap-cpu.html * igt@kms_psr@psr2-sprite-mmap-cpu: - shard-tglu: NOTRUN -> [SKIP][82] ([i915#9732]) +1 other test skip [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-9/igt@kms_psr@psr2-sprite-mmap-cpu.html * igt@kms_vrr@flipline: - shard-tglu-1: NOTRUN -> [SKIP][83] ([i915#3555]) [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@kms_vrr@flipline.html * igt@kms_vrr@seamless-rr-switch-drrs: - shard-tglu: NOTRUN -> [SKIP][84] ([i915#9906]) [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-9/igt@kms_vrr@seamless-rr-switch-drrs.html * igt@perf@stress-open-close: - shard-tglu-1: NOTRUN -> [ABORT][85] ([i915#13218]) +4 other tests abort [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-tglu-1/igt@perf@stress-open-close.html * igt@perf@whitelisted-registers-userspace-config: - shard-dg2: NOTRUN -> [ABORT][86] ([i915#13218]) [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg2-3/igt@perf@whitelisted-registers-userspace-config.html * igt@perf_pmu@semaphore-wait: - shard-rkl: NOTRUN -> [ABORT][87] ([i915#13218]) +1 other test abort [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-3/igt@perf_pmu@semaphore-wait.html - shard-dg1: NOTRUN -> [ABORT][88] ([i915#13218]) +4 other tests abort [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-13/igt@perf_pmu@semaphore-wait.html #### Possible fixes #### * igt@gem_create@create-ext-placement-each: - shard-rkl: [DMESG-WARN][89] ([i915#12964]) -> [PASS][90] [89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-rkl-4/igt@gem_create@create-ext-placement-each.html [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-1/igt@gem_create@create-ext-placement-each.html * igt@i915_pm_rpm@system-suspend-execbuf: - shard-rkl: [ABORT][91] ([i915#13218]) -> [PASS][92] [91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-rkl-5/igt@i915_pm_rpm@system-suspend-execbuf.html [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-rkl-7/igt@i915_pm_rpm@system-suspend-execbuf.html * igt@kms_cursor_legacy@flip-vs-cursor-varying-size: - shard-snb: [FAIL][93] ([i915#2346]) -> [PASS][94] [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-snb1/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-snb5/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt: - shard-snb: [SKIP][95] -> [PASS][96] +4 other tests pass [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-snb1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html [96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-snb4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html #### Warnings #### * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs: - shard-dg1: [SKIP][97] ([i915#6095]) -> [SKIP][98] ([i915#4423] / [i915#6095]) +1 other test skip [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-dg1-14/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs.html [98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-17/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-mc-ccs.html * igt@kms_content_protection@lic-type-0: - shard-dg2: [TIMEOUT][99] ([i915#7173]) -> [SKIP][100] ([i915#9424]) [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-dg2-10/igt@kms_content_protection@lic-type-0.html [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg2-1/igt@kms_content_protection@lic-type-0.html * igt@kms_flip@flip-vs-suspend-interruptible: - shard-glk: [INCOMPLETE][101] ([i915#12745] / [i915#4839]) -> [INCOMPLETE][102] ([i915#12745] / [i915#1982] / [i915#4839]) [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-glk9/igt@kms_flip@flip-vs-suspend-interruptible.html [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-glk9/igt@kms_flip@flip-vs-suspend-interruptible.html * igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1: - shard-glk: [INCOMPLETE][103] ([i915#12745]) -> [INCOMPLETE][104] ([i915#12745] / [i915#1982]) [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-glk9/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-glk9/igt@kms_flip@flip-vs-suspend-interruptible@a-hdmi-a1.html * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc: - shard-dg1: [SKIP][105] ([i915#8708]) -> [SKIP][106] ([i915#4423] / [i915#8708]) [105]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-dg1-13/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc.html [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg1-12/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc.html * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu: - shard-dg2: [SKIP][107] ([i915#10433] / [i915#3458]) -> [SKIP][108] ([i915#3458]) [107]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15819/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu.html [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/shard-dg2-5/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu.html {name}: This element is suppressed. This means it is ignored when computing the status of the difference (SUCCESS, WARNING, or FAILURE). [i915#10159]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10159 [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307 [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433 [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434 [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072 [i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099 [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520 [i915#11808]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11808 [i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247 [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313 [i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745 [i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964 [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049 [i915#13218]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13218 [i915#13263]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13263 [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769 [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825 [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982 [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346 [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527 [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587 [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672 [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856 [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023 [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458 [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555 [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637 [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840 [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077 [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270 [i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387 [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423 [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538 [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613 [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812 [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839 [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286 [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354 [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439 [i915#5956]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5956 [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095 [i915#6245]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6245 [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944 [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953 [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116 [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118 [i915#7173]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7173 [i915#7213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7213 [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828 [i915#7975]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7975 [i915#8213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8213 [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228 [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411 [i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414 [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708 [i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709 [i915#8898]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8898 [i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067 [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424 [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519 [i915#9732]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9732 [i915#9906]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9906 Build changes ------------- * Linux: CI_DRM_15819 -> Patchwork_139883v3 CI-20190529: 20190529 CI_DRM_15819: 03abf2f5f12e0f13a3a28bf70ccf2d88ec2a707b @ git://anongit.freedesktop.org/gfx-ci/linux IGT_8147: df65b61f81a5cc919c10ff9c5ed516b45364135c @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git Patchwork_139883v3: 03abf2f5f12e0f13a3a28bf70ccf2d88ec2a707b @ git://anongit.freedesktop.org/gfx-ci/linux piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_139883v3/index.html [-- Attachment #2: Type: text/html, Size: 38941 bytes --] ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/4] Implement Wa_14022698537 2024-12-11 11:59 [PATCH v4 0/4] Implement Wa_14022698537 Raag Jadav ` (7 preceding siblings ...) 2024-12-11 14:13 ` ✗ i915.CI.Full: failure " Patchwork @ 2024-12-11 23:40 ` Andi Shyti 2024-12-12 3:22 ` Raag Jadav 8 siblings, 1 reply; 15+ messages in thread From: Andi Shyti @ 2024-12-11 23:40 UTC (permalink / raw) To: Raag Jadav Cc: jani.nikula, joonas.lahtinen, rodrigo.vivi, matthew.d.roper, andi.shyti, intel-gfx, anshuman.gupta, badal.nilawar, riana.tauro Hi Raag, > Raag Jadav (4): > drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges > drm/i915/dg2: Introduce DG2_D subplatform > drm/i915: Introduce intel_cpu_info.c for CPU IDs > drm/i915/dg2: Implement Wa_14022698537 merged to drm-intel-next. Thanks, Andi ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/4] Implement Wa_14022698537 2024-12-11 23:40 ` [PATCH v4 0/4] Implement Wa_14022698537 Andi Shyti @ 2024-12-12 3:22 ` Raag Jadav 2024-12-12 8:35 ` Jani Nikula 2024-12-12 8:36 ` Andi Shyti 0 siblings, 2 replies; 15+ messages in thread From: Raag Jadav @ 2024-12-12 3:22 UTC (permalink / raw) To: Andi Shyti Cc: jani.nikula, joonas.lahtinen, rodrigo.vivi, matthew.d.roper, intel-gfx, anshuman.gupta, badal.nilawar, riana.tauro On Thu, Dec 12, 2024 at 12:40:07AM +0100, Andi Shyti wrote: > Hi Raag, > > > Raag Jadav (4): > > drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges > > drm/i915/dg2: Introduce DG2_D subplatform > > drm/i915: Introduce intel_cpu_info.c for CPU IDs > > drm/i915/dg2: Implement Wa_14022698537 > > merged to drm-intel-next. Thanks, appreciate it. Andy usually picks the cover letter as well, we don't do that here? Raag ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/4] Implement Wa_14022698537 2024-12-12 3:22 ` Raag Jadav @ 2024-12-12 8:35 ` Jani Nikula 2024-12-12 8:36 ` Andi Shyti 1 sibling, 0 replies; 15+ messages in thread From: Jani Nikula @ 2024-12-12 8:35 UTC (permalink / raw) To: Raag Jadav, Andi Shyti Cc: joonas.lahtinen, rodrigo.vivi, matthew.d.roper, intel-gfx, anshuman.gupta, badal.nilawar, riana.tauro On Thu, 12 Dec 2024, Raag Jadav <raag.jadav@intel.com> wrote: > On Thu, Dec 12, 2024 at 12:40:07AM +0100, Andi Shyti wrote: >> Hi Raag, >> >> > Raag Jadav (4): >> > drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges >> > drm/i915/dg2: Introduce DG2_D subplatform >> > drm/i915: Introduce intel_cpu_info.c for CPU IDs >> > drm/i915/dg2: Implement Wa_14022698537 >> >> merged to drm-intel-next. > > Thanks, appreciate it. > > Andy usually picks the cover letter as well, we don't do that here? What do you mean by "picking the cover letter?" BR, Jani. -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/4] Implement Wa_14022698537 2024-12-12 3:22 ` Raag Jadav 2024-12-12 8:35 ` Jani Nikula @ 2024-12-12 8:36 ` Andi Shyti 2024-12-12 10:02 ` Raag Jadav 1 sibling, 1 reply; 15+ messages in thread From: Andi Shyti @ 2024-12-12 8:36 UTC (permalink / raw) To: Raag Jadav Cc: Andi Shyti, jani.nikula, joonas.lahtinen, rodrigo.vivi, matthew.d.roper, intel-gfx, anshuman.gupta, badal.nilawar, riana.tauro Hi Raag, On Thu, Dec 12, 2024 at 05:22:32AM +0200, Raag Jadav wrote: > On Thu, Dec 12, 2024 at 12:40:07AM +0100, Andi Shyti wrote: > > > Raag Jadav (4): > > > drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges > > > drm/i915/dg2: Introduce DG2_D subplatform > > > drm/i915: Introduce intel_cpu_info.c for CPU IDs > > > drm/i915/dg2: Implement Wa_14022698537 > > > > merged to drm-intel-next. > > Thanks, appreciate it. > > Andy usually picks the cover letter as well, we don't do that here? what do you mean with taking the cover letter? For pushing the patch I use the dim tool and I feed it with the cover letter's mbox file. Andi ^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v4 0/4] Implement Wa_14022698537 2024-12-12 8:36 ` Andi Shyti @ 2024-12-12 10:02 ` Raag Jadav 2024-12-12 10:48 ` b4 Merge patch series (was: Re: [PATCH v4 0/4] Implement Wa_14022698537) Jani Nikula 0 siblings, 1 reply; 15+ messages in thread From: Raag Jadav @ 2024-12-12 10:02 UTC (permalink / raw) To: Andi Shyti Cc: jani.nikula, joonas.lahtinen, rodrigo.vivi, matthew.d.roper, intel-gfx, anshuman.gupta, badal.nilawar, riana.tauro On Thu, Dec 12, 2024 at 09:36:00AM +0100, Andi Shyti wrote: > Hi Raag, > > On Thu, Dec 12, 2024 at 05:22:32AM +0200, Raag Jadav wrote: > > On Thu, Dec 12, 2024 at 12:40:07AM +0100, Andi Shyti wrote: > > > > Raag Jadav (4): > > > > drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges > > > > drm/i915/dg2: Introduce DG2_D subplatform > > > > drm/i915: Introduce intel_cpu_info.c for CPU IDs > > > > drm/i915/dg2: Implement Wa_14022698537 > > > > > > merged to drm-intel-next. > > > > Thanks, appreciate it. > > > > Andy usually picks the cover letter as well, we don't do that here? > > what do you mean with taking the cover letter? > > For pushing the patch I use the dim tool and I feed it with the > cover letter's mbox file. Ah okay. I think he uses b4 with cover letter as a merge patch. Kind of like treating it as a PR. It's useful when we have a nice summary which adds required context (which I understand is not the case here anyway). Examples, $ git show 563532b49aa0aa00 $ git show e4e17186723570e8 Raag ^ permalink raw reply [flat|nested] 15+ messages in thread
* b4 Merge patch series (was: Re: [PATCH v4 0/4] Implement Wa_14022698537) 2024-12-12 10:02 ` Raag Jadav @ 2024-12-12 10:48 ` Jani Nikula 0 siblings, 0 replies; 15+ messages in thread From: Jani Nikula @ 2024-12-12 10:48 UTC (permalink / raw) To: Raag Jadav, Andi Shyti, Dave Airlie, Simona Vetter, Andy Shevchenko Cc: joonas.lahtinen, rodrigo.vivi, matthew.d.roper, intel-gfx, anshuman.gupta, badal.nilawar, riana.tauro On Thu, 12 Dec 2024, Raag Jadav <raag.jadav@intel.com> wrote: > On Thu, Dec 12, 2024 at 09:36:00AM +0100, Andi Shyti wrote: >> Hi Raag, >> >> On Thu, Dec 12, 2024 at 05:22:32AM +0200, Raag Jadav wrote: >> > On Thu, Dec 12, 2024 at 12:40:07AM +0100, Andi Shyti wrote: >> > > > Raag Jadav (4): >> > > > drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges >> > > > drm/i915/dg2: Introduce DG2_D subplatform >> > > > drm/i915: Introduce intel_cpu_info.c for CPU IDs >> > > > drm/i915/dg2: Implement Wa_14022698537 >> > > >> > > merged to drm-intel-next. >> > >> > Thanks, appreciate it. >> > >> > Andy usually picks the cover letter as well, we don't do that here? >> >> what do you mean with taking the cover letter? >> >> For pushing the patch I use the dim tool and I feed it with the >> cover letter's mbox file. > > Ah okay. I think he uses b4 with cover letter as a merge patch. Kind of > like treating it as a PR. It's useful when we have a nice summary which > adds required context (which I understand is not the case here anyway). > > Examples, > > $ git show 563532b49aa0aa00 > $ git show e4e17186723570e8 I assume this was done using 'b4 shazam --merge'. With 10+k commits merged each release, we'd get an insane amount of placeholder "Merge patch series" merge commits, without an actual merge of branches, if we chose this approach. IMO each patch and thus commit should stand on its own merits, and contain all the information required, without depending on the cover letter having been merged for informational purposes. Also, there doesn't appear to be a single merge like that under drm. BR, Jani. -- Jani Nikula, Intel ^ permalink raw reply [flat|nested] 15+ messages in thread
end of thread, other threads:[~2024-12-12 10:48 UTC | newest] Thread overview: 15+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-12-11 11:59 [PATCH v4 0/4] Implement Wa_14022698537 Raag Jadav 2024-12-11 11:59 ` [PATCH v4 1/4] drm/intel/pciids: Refactor DG2 PCI IDs into segment ranges Raag Jadav 2024-12-11 11:59 ` [PATCH v4 2/4] drm/i915/dg2: Introduce DG2_D subplatform Raag Jadav 2024-12-11 11:59 ` [PATCH v4 3/4] drm/i915: Introduce intel_cpu_info.c for CPU IDs Raag Jadav 2024-12-11 11:59 ` [PATCH v4 4/4] drm/i915/dg2: Implement Wa_14022698537 Raag Jadav 2024-12-11 12:45 ` ✗ Fi.CI.CHECKPATCH: warning for Implement Wa_14022698537 (rev3) Patchwork 2024-12-11 12:45 ` ✗ Fi.CI.SPARSE: " Patchwork 2024-12-11 12:59 ` ✓ i915.CI.BAT: success " Patchwork 2024-12-11 14:13 ` ✗ i915.CI.Full: failure " Patchwork 2024-12-11 23:40 ` [PATCH v4 0/4] Implement Wa_14022698537 Andi Shyti 2024-12-12 3:22 ` Raag Jadav 2024-12-12 8:35 ` Jani Nikula 2024-12-12 8:36 ` Andi Shyti 2024-12-12 10:02 ` Raag Jadav 2024-12-12 10:48 ` b4 Merge patch series (was: Re: [PATCH v4 0/4] Implement Wa_14022698537) Jani Nikula
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