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From: Thomas Gleixner <tglx@linutronix.de>
To: Sunil V L <sunilvl@ventanamicro.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>
Cc: Will Deacon <will@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>, Len Brown <lenb@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Anup Patel <anup@brainfault.org>,
	Samuel Holland <samuel.holland@sifive.com>,
	Robert Moore <robert.moore@intel.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Haibo Xu <haibo1.xu@intel.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	Atish Kumar Patra <atishp@rivosinc.com>,
	Drew Fustini <dfustini@tenstorrent.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
	acpica-devel@lists.linux.dev
Subject: Re: [PATCH v8 00/17] RISC-V: ACPI: Add external interrupt controller support
Date: Mon, 26 Aug 2024 17:25:28 +0200	[thread overview]
Message-ID: <87mskzcnmf.ffs@tglx> (raw)
In-Reply-To: <ZrlgVUXC_dCW9ISM@sunil-laptop>

On Mon, Aug 12 2024 at 06:37, Sunil V. L. wrote:
> On Mon, Aug 12, 2024 at 06:29:12AM +0530, Sunil V L wrote:
>> This series adds support for the below ECR approved by ASWG.
>> 1) MADT - https://drive.google.com/file/d/1oMGPyOD58JaPgMl1pKasT-VKsIKia7zR/view?usp=sharing
>> 
>> The series primarily enables irqchip drivers for RISC-V ACPI based
>> platforms.
>
> This series has spent quite a bit of time now on the list. As you are
> aware, few clarifications like _PIC codes are also done now. There is
> no major change after you had agreed for the design. So, can this be
> considered for the next release please?

Rafael, if you want to take it through the ACPI tree, then for the
irqchip parts please add:

  Acked-by: Thomas Gleixner <tglx@linutronix.de>

Thanks,

        tglx

WARNING: multiple messages have this Message-ID (diff)
From: Thomas Gleixner <tglx@linutronix.de>
To: Sunil V L <sunilvl@ventanamicro.com>,
	"Rafael J . Wysocki" <rafael@kernel.org>
Cc: Will Deacon <will@kernel.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Albert Ou <aou@eecs.berkeley.edu>, Len Brown <lenb@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Anup Patel <anup@brainfault.org>,
	Samuel Holland <samuel.holland@sifive.com>,
	Robert Moore <robert.moore@intel.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Haibo Xu <haibo1.xu@intel.com>,
	Andrew Jones <ajones@ventanamicro.com>,
	Atish Kumar Patra <atishp@rivosinc.com>,
	Drew Fustini <dfustini@tenstorrent.com>,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-riscv@lists.infradead.org, linux-acpi@vger.kernel.org,
	acpica-devel@lists.linux.dev
Subject: Re: [PATCH v8 00/17] RISC-V: ACPI: Add external interrupt controller support
Date: Mon, 26 Aug 2024 17:25:28 +0200	[thread overview]
Message-ID: <87mskzcnmf.ffs@tglx> (raw)
In-Reply-To: <ZrlgVUXC_dCW9ISM@sunil-laptop>

On Mon, Aug 12 2024 at 06:37, Sunil V. L. wrote:
> On Mon, Aug 12, 2024 at 06:29:12AM +0530, Sunil V L wrote:
>> This series adds support for the below ECR approved by ASWG.
>> 1) MADT - https://drive.google.com/file/d/1oMGPyOD58JaPgMl1pKasT-VKsIKia7zR/view?usp=sharing
>> 
>> The series primarily enables irqchip drivers for RISC-V ACPI based
>> platforms.
>
> This series has spent quite a bit of time now on the list. As you are
> aware, few clarifications like _PIC codes are also done now. There is
> no major change after you had agreed for the design. So, can this be
> considered for the next release please?

Rafael, if you want to take it through the ACPI tree, then for the
irqchip parts please add:

  Acked-by: Thomas Gleixner <tglx@linutronix.de>

Thanks,

        tglx

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2024-08-26 15:25 UTC|newest]

Thread overview: 70+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-08-12  0:59 [PATCH v8 00/17] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2024-08-12  0:59 ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 01/17] arm64: PCI: Migrate ACPI related functions to pci-acpi.c Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12 18:09   ` Bjorn Helgaas
2024-08-12 18:09     ` Bjorn Helgaas
2024-08-14  5:32     ` Sunil V L
2024-08-14  5:32       ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 02/17] ACPI: scan: Add a weak arch_sort_irqchip_probe() to order the IRQCHIP probe Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 03/17] ACPI: bus: Add acpi_riscv_init() function Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 04/17] ACPI: scan: Refactor dependency creation Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 05/17] ACPI: scan: Add RISC-V interrupt controllers to honor list Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 06/17] ACPI: scan: Define weak function to populate dependencies Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 07/17] ACPI: bus: Add RINTC IRQ model for RISC-V Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 08/17] ACPI: pci_link: Clear the dependencies after probe Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-22 21:44   ` Bjorn Helgaas
2024-08-22 21:44     ` Bjorn Helgaas
2024-08-23  6:33     ` Sunil V L
2024-08-23  6:33       ` Sunil V L
2024-08-23 17:45       ` Bjorn Helgaas
2024-08-23 17:45         ` Bjorn Helgaas
2024-08-12  0:59 ` [PATCH v8 09/17] ACPI: RISC-V: Implement PCI related functionality Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 10/17] ACPI: RISC-V: Implement function to reorder irqchip probe entries Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 11/17] ACPI: RISC-V: Initialize GSI mapping structures Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 12/17] ACPI: RISC-V: Implement function to add implicit dependencies Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 13/17] irqchip/riscv-intc: Add ACPI support for AIA Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 14/17] irqchip/riscv-imsic-state: Create separate function for DT Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 15/17] irqchip/riscv-imsic: Add ACPI support Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 16/17] irqchip/riscv-aplic: " Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  0:59 ` [PATCH v8 17/17] irqchip/sifive-plic: " Sunil V L
2024-08-12  0:59   ` Sunil V L
2024-08-12  1:07 ` [PATCH v8 00/17] RISC-V: ACPI: Add external interrupt controller support Sunil V L
2024-08-12  1:07   ` Sunil V L
2024-08-26 15:25   ` Thomas Gleixner [this message]
2024-08-26 15:25     ` Thomas Gleixner
2024-08-26 16:15     ` Rafael J. Wysocki
2024-08-26 16:15       ` Rafael J. Wysocki
2024-08-26 17:13       ` Sunil V L
2024-08-26 17:13         ` Sunil V L
2024-08-26 17:27         ` Rafael J. Wysocki
2024-08-26 17:27           ` Rafael J. Wysocki
2024-08-26 21:17           ` Thomas Gleixner
2024-08-26 21:17             ` Thomas Gleixner
2024-08-27 16:20             ` Rafael J. Wysocki
2024-08-27 16:20               ` Rafael J. Wysocki
2024-08-27 17:04               ` Sunil V L
2024-08-27 17:04                 ` Sunil V L
2024-08-27 17:12                 ` Rafael J. Wysocki
2024-08-27 17:12                   ` Rafael J. Wysocki
2024-08-27 17:31                   ` Sunil V L
2024-08-27 17:31                     ` Sunil V L
2024-08-27 17:56                     ` Rafael J. Wysocki
2024-08-27 17:56                       ` Rafael J. Wysocki
2024-08-27 18:12                       ` Sunil V L
2024-08-27 18:12                         ` Sunil V L

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