From: Mattijs Korpershoek <mkorpershoek@baylibre.com>
To: Nishanth Menon <nm@ti.com>, Tom Rini <trini@konsulko.com>
Cc: Dhruva Gole <d-gole@ti.com>, Bryan Brattlof <bb@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>,
Robert Nelson <robertcnelson@gmail.com>,
u-boot@lists.denx.de, Nishanth Menon <nm@ti.com>
Subject: Re: [PATCH 2/3] arm: dts: am625_sk: Switch to OF_UPSTREAM
Date: Fri, 07 Jun 2024 09:18:44 +0200 [thread overview]
Message-ID: <87msnxgqzv.fsf@baylibre.com> (raw)
In-Reply-To: <20240605152752.1711835-3-nm@ti.com>
Hi Nishanth,
Thank you for the patch.
On mer., juin 05, 2024 at 10:27, Nishanth Menon <nm@ti.com> wrote:
> Enable OF_UPSTREAM for am625-sk board. Remove DT files that
> are now available in dts/upstream. Update the appended files based on
> version of latest OF_UPSTREAM sync point (v6.10-rc1).
>
> Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Boot tested to main U-Boot via DFU on AM62X SK EVM.
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
> ---
> arch/arm/dts/Makefile | 3 +-
> arch/arm/dts/k3-am62-main.dtsi | 1058 --------------------------
> arch/arm/dts/k3-am62-mcu.dtsi | 176 -----
> arch/arm/dts/k3-am62-thermal.dtsi | 36 -
> arch/arm/dts/k3-am62-wakeup.dtsi | 96 ---
> arch/arm/dts/k3-am62.dtsi | 122 ---
> arch/arm/dts/k3-am625-sk-binman.dtsi | 2 +-
> arch/arm/dts/k3-am625-sk.dts | 299 --------
> arch/arm/dts/k3-am625.dtsi | 155 ----
> arch/arm/dts/k3-am62x-sk-common.dtsi | 535 -------------
> configs/am62x_evm_a53_defconfig | 3 +-
> 11 files changed, 4 insertions(+), 2481 deletions(-)
> delete mode 100644 arch/arm/dts/k3-am62-main.dtsi
> delete mode 100644 arch/arm/dts/k3-am62-mcu.dtsi
> delete mode 100644 arch/arm/dts/k3-am62-thermal.dtsi
> delete mode 100644 arch/arm/dts/k3-am62-wakeup.dtsi
> delete mode 100644 arch/arm/dts/k3-am62.dtsi
> delete mode 100644 arch/arm/dts/k3-am625-sk.dts
> delete mode 100644 arch/arm/dts/k3-am625.dtsi
> delete mode 100644 arch/arm/dts/k3-am62x-sk-common.dtsi
>
> diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
> index 813426a3e519..5b0bcf336924 100644
> --- a/arch/arm/dts/Makefile
> +++ b/arch/arm/dts/Makefile
> @@ -1198,8 +1198,7 @@ dtb-$(CONFIG_SOC_K3_AM642) += k3-am642-r5-evm.dtb \
> k3-am642-r5-sk.dtb \
> k3-am642-r5-phycore-som-2gb.dtb
>
> -dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-sk.dtb \
> - k3-am625-r5-sk.dtb \
> +dtb-$(CONFIG_SOC_K3_AM625) += k3-am625-r5-sk.dtb \
> k3-am625-r5-beagleplay.dtb \
> k3-am625-verdin-r5.dtb \
> k3-am625-r5-phycore-som-2gb.dtb
> diff --git a/arch/arm/dts/k3-am62-main.dtsi b/arch/arm/dts/k3-am62-main.dtsi
> deleted file mode 100644
> index e9cffca073ef..000000000000
> --- a/arch/arm/dts/k3-am62-main.dtsi
> +++ /dev/null
> @@ -1,1058 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-only OR MIT
> -/*
> - * Device Tree Source for AM625 SoC Family Main Domain peripherals
> - *
> - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
> - */
> -
> -&cbass_main {
> - oc_sram: sram@70000000 {
> - compatible = "mmio-sram";
> - reg = <0x00 0x70000000 0x00 0x10000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0x0 0x00 0x70000000 0x10000>;
> - };
> -
> - gic500: interrupt-controller@1800000 {
> - compatible = "arm,gic-v3";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> - #interrupt-cells = <3>;
> - interrupt-controller;
> - reg = <0x00 0x01800000 0x00 0x10000>, /* GICD */
> - <0x00 0x01880000 0x00 0xc0000>, /* GICR */
> - <0x00 0x01880000 0x00 0xc0000>, /* GICR */
> - <0x01 0x00000000 0x00 0x2000>, /* GICC */
> - <0x01 0x00010000 0x00 0x1000>, /* GICH */
> - <0x01 0x00020000 0x00 0x2000>; /* GICV */
> - /*
> - * vcpumntirq:
> - * virtual CPU interface maintenance interrupt
> - */
> - interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
> -
> - gic_its: msi-controller@1820000 {
> - compatible = "arm,gic-v3-its";
> - reg = <0x00 0x01820000 0x00 0x10000>;
> - socionext,synquacer-pre-its = <0x1000000 0x400000>;
> - msi-controller;
> - #msi-cells = <1>;
> - };
> - };
> -
> - main_conf: bus@100000 {
> - compatible = "simple-bus";
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0x0 0x00 0x00100000 0x20000>;
> -
> - phy_gmii_sel: phy@4044 {
> - compatible = "ti,am654-phy-gmii-sel";
> - reg = <0x4044 0x8>;
> - #phy-cells = <1>;
> - };
> -
> - epwm_tbclk: clock-controller@4130 {
> - compatible = "ti,am62-epwm-tbclk";
> - reg = <0x4130 0x4>;
> - #clock-cells = <1>;
> - };
> -
> - audio_refclk0: clock-controller@82e0 {
> - compatible = "ti,am62-audio-refclk";
> - reg = <0x82e0 0x4>;
> - clocks = <&k3_clks 157 0>;
> - assigned-clocks = <&k3_clks 157 0>;
> - assigned-clock-parents = <&k3_clks 157 8>;
> - #clock-cells = <0>;
> - };
> -
> - audio_refclk1: clock-controller@82e4 {
> - compatible = "ti,am62-audio-refclk";
> - reg = <0x82e4 0x4>;
> - clocks = <&k3_clks 157 10>;
> - assigned-clocks = <&k3_clks 157 10>;
> - assigned-clock-parents = <&k3_clks 157 18>;
> - #clock-cells = <0>;
> - };
> - };
> -
> - dmss: bus@48000000 {
> - bootph-all;
> - compatible = "simple-bus";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - dma-ranges;
> - ranges = <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>;
> -
> - ti,sci-dev-id = <25>;
> -
> - secure_proxy_main: mailbox@4d000000 {
> - bootph-all;
> - compatible = "ti,am654-secure-proxy";
> - #mbox-cells = <1>;
> - reg-names = "target_data", "rt", "scfg";
> - reg = <0x00 0x4d000000 0x00 0x80000>,
> - <0x00 0x4a600000 0x00 0x80000>,
> - <0x00 0x4a400000 0x00 0x80000>;
> - interrupt-names = "rx_012";
> - interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> - };
> -
> - inta_main_dmss: interrupt-controller@48000000 {
> - compatible = "ti,sci-inta";
> - reg = <0x00 0x48000000 0x00 0x100000>;
> - #interrupt-cells = <0>;
> - interrupt-controller;
> - interrupt-parent = <&gic500>;
> - msi-controller;
> - ti,sci = <&dmsc>;
> - ti,sci-dev-id = <28>;
> - ti,interrupt-ranges = <4 68 36>;
> - ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
> - };
> -
> - main_bcdma: dma-controller@485c0100 {
> - compatible = "ti,am64-dmss-bcdma";
> - reg = <0x00 0x485c0100 0x00 0x100>,
> - <0x00 0x4c000000 0x00 0x20000>,
> - <0x00 0x4a820000 0x00 0x20000>,
> - <0x00 0x4aa40000 0x00 0x20000>,
> - <0x00 0x4bc00000 0x00 0x100000>,
> - <0x00 0x48600000 0x00 0x8000>,
> - <0x00 0x484a4000 0x00 0x2000>,
> - <0x00 0x484c2000 0x00 0x2000>,
> - <0x00 0x48420000 0x00 0x2000>;
> - reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt",
> - "ring", "tchan", "rchan", "bchan";
> - msi-parent = <&inta_main_dmss>;
> - #dma-cells = <3>;
> -
> - ti,sci = <&dmsc>;
> - ti,sci-dev-id = <26>;
> - ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
> - ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
> - ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
> - };
> -
> - main_pktdma: dma-controller@485c0000 {
> - compatible = "ti,am64-dmss-pktdma";
> - reg = <0x00 0x485c0000 0x00 0x100>,
> - <0x00 0x4a800000 0x00 0x20000>,
> - <0x00 0x4aa00000 0x00 0x40000>,
> - <0x00 0x4b800000 0x00 0x400000>,
> - <0x00 0x485e0000 0x00 0x10000>,
> - <0x00 0x484a0000 0x00 0x2000>,
> - <0x00 0x484c0000 0x00 0x2000>,
> - <0x00 0x48430000 0x00 0x1000>;
> - reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt",
> - "ring", "tchan", "rchan", "rflow";
> - msi-parent = <&inta_main_dmss>;
> - #dma-cells = <2>;
> -
> - ti,sci = <&dmsc>;
> - ti,sci-dev-id = <30>;
> - ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
> - <0x24>, /* CPSW_TX_CHAN */
> - <0x25>, /* SAUL_TX_0_CHAN */
> - <0x26>; /* SAUL_TX_1_CHAN */
> - ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
> - <0x11>, /* RING_CPSW_TX_CHAN */
> - <0x12>, /* RING_SAUL_TX_0_CHAN */
> - <0x13>; /* RING_SAUL_TX_1_CHAN */
> - ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
> - <0x2b>, /* CPSW_RX_CHAN */
> - <0x2d>, /* SAUL_RX_0_CHAN */
> - <0x2f>, /* SAUL_RX_1_CHAN */
> - <0x31>, /* SAUL_RX_2_CHAN */
> - <0x33>; /* SAUL_RX_3_CHAN */
> - ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
> - <0x2c>, /* FLOW_CPSW_RX_CHAN */
> - <0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
> - <0x32>; /* FLOW_SAUL_RX_2/3_CHAN */
> - };
> - };
> -
> - dmsc: system-controller@44043000 {
> - bootph-all;
> - compatible = "ti,k2g-sci";
> - ti,host-id = <12>;
> - mbox-names = "rx", "tx";
> - mboxes = <&secure_proxy_main 12>,
> - <&secure_proxy_main 13>;
> - reg-names = "debug_messages";
> - reg = <0x00 0x44043000 0x00 0xfe0>;
> -
> - k3_pds: power-controller {
> - bootph-all;
> - compatible = "ti,sci-pm-domain";
> - #power-domain-cells = <2>;
> - };
> -
> - k3_clks: clock-controller {
> - bootph-all;
> - compatible = "ti,k2g-sci-clk";
> - #clock-cells = <2>;
> - };
> -
> - k3_reset: reset-controller {
> - bootph-all;
> - compatible = "ti,sci-reset";
> - #reset-cells = <2>;
> - };
> - };
> -
> - crypto: crypto@40900000 {
> - compatible = "ti,am62-sa3ul";
> - reg = <0x00 0x40900000 0x00 0x1200>;
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges = <0x00 0x40900000 0x00 0x40900000 0x00 0x30000>;
> -
> - dmas = <&main_pktdma 0xf501 0>, <&main_pktdma 0x7506 0>,
> - <&main_pktdma 0x7507 0>;
> - dma-names = "tx", "rx1", "rx2";
> - };
> -
> - secure_proxy_sa3: mailbox@43600000 {
> - bootph-pre-ram;
> - compatible = "ti,am654-secure-proxy";
> - #mbox-cells = <1>;
> - reg-names = "target_data", "rt", "scfg";
> - reg = <0x00 0x43600000 0x00 0x10000>,
> - <0x00 0x44880000 0x00 0x20000>,
> - <0x00 0x44860000 0x00 0x20000>;
> - /*
> - * Marked Disabled:
> - * Node is incomplete as it is meant for bootloaders and
> - * firmware on non-MPU processors
> - */
> - status = "disabled";
> - };
> -
> - main_pmx0: pinctrl@f4000 {
> - bootph-all;
> - compatible = "pinctrl-single";
> - reg = <0x00 0xf4000 0x00 0x2ac>;
> - #pinctrl-cells = <1>;
> - pinctrl-single,register-width = <32>;
> - pinctrl-single,function-mask = <0xffffffff>;
> - };
> -
> - main_esm: esm@420000 {
> - bootph-pre-ram;
> - compatible = "ti,j721e-esm";
> - reg = <0x00 0x420000 0x00 0x1000>;
> - ti,esm-pins = <160>, <161>, <162>, <163>, <177>, <178>;
> - };
> -
> - main_timer0: timer@2400000 {
> - bootph-all;
> - compatible = "ti,am654-timer";
> - reg = <0x00 0x2400000 0x00 0x400>;
> - interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&k3_clks 36 2>;
> - clock-names = "fck";
> - assigned-clocks = <&k3_clks 36 2>;
> - assigned-clock-parents = <&k3_clks 36 3>;
> - power-domains = <&k3_pds 36 TI_SCI_PD_EXCLUSIVE>;
> - ti,timer-pwm;
> - };
> -
> - main_timer1: timer@2410000 {
> - compatible = "ti,am654-timer";
> - reg = <0x00 0x2410000 0x00 0x400>;
> - interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&k3_clks 37 2>;
> - clock-names = "fck";
> - assigned-clocks = <&k3_clks 37 2>;
> - assigned-clock-parents = <&k3_clks 37 3>;
> - power-domains = <&k3_pds 37 TI_SCI_PD_EXCLUSIVE>;
> - ti,timer-pwm;
> - };
> -
> - main_timer2: timer@2420000 {
> - compatible = "ti,am654-timer";
> - reg = <0x00 0x2420000 0x00 0x400>;
> - interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&k3_clks 38 2>;
> - clock-names = "fck";
> - assigned-clocks = <&k3_clks 38 2>;
> - assigned-clock-parents = <&k3_clks 38 3>;
> - power-domains = <&k3_pds 38 TI_SCI_PD_EXCLUSIVE>;
> - ti,timer-pwm;
> - };
> -
> - main_timer3: timer@2430000 {
> - compatible = "ti,am654-timer";
> - reg = <0x00 0x2430000 0x00 0x400>;
> - interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&k3_clks 39 2>;
> - clock-names = "fck";
> - assigned-clocks = <&k3_clks 39 2>;
> - assigned-clock-parents = <&k3_clks 39 3>;
> - power-domains = <&k3_pds 39 TI_SCI_PD_EXCLUSIVE>;
> - ti,timer-pwm;
> - };
> -
> - main_timer4: timer@2440000 {
> - compatible = "ti,am654-timer";
> - reg = <0x00 0x2440000 0x00 0x400>;
> - interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&k3_clks 40 2>;
> - clock-names = "fck";
> - assigned-clocks = <&k3_clks 40 2>;
> - assigned-clock-parents = <&k3_clks 40 3>;
> - power-domains = <&k3_pds 40 TI_SCI_PD_EXCLUSIVE>;
> - ti,timer-pwm;
> - };
> -
> - main_timer5: timer@2450000 {
> - compatible = "ti,am654-timer";
> - reg = <0x00 0x2450000 0x00 0x400>;
> - interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&k3_clks 41 2>;
> - clock-names = "fck";
> - assigned-clocks = <&k3_clks 41 2>;
> - assigned-clock-parents = <&k3_clks 41 3>;
> - power-domains = <&k3_pds 41 TI_SCI_PD_EXCLUSIVE>;
> - ti,timer-pwm;
> - };
> -
> - main_timer6: timer@2460000 {
> - compatible = "ti,am654-timer";
> - reg = <0x00 0x2460000 0x00 0x400>;
> - interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&k3_clks 42 2>;
> - clock-names = "fck";
> - assigned-clocks = <&k3_clks 42 2>;
> - assigned-clock-parents = <&k3_clks 42 3>;
> - power-domains = <&k3_pds 42 TI_SCI_PD_EXCLUSIVE>;
> - ti,timer-pwm;
> - };
> -
> - main_timer7: timer@2470000 {
> - compatible = "ti,am654-timer";
> - reg = <0x00 0x2470000 0x00 0x400>;
> - interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&k3_clks 43 2>;
> - clock-names = "fck";
> - assigned-clocks = <&k3_clks 43 2>;
> - assigned-clock-parents = <&k3_clks 43 3>;
> - power-domains = <&k3_pds 43 TI_SCI_PD_EXCLUSIVE>;
> - ti,timer-pwm;
> - };
> -
> - main_uart0: serial@2800000 {
> - compatible = "ti,am64-uart", "ti,am654-uart";
> - reg = <0x00 0x02800000 0x00 0x100>;
> - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 146 0>;
> - clock-names = "fclk";
> - status = "disabled";
> - };
> -
> - main_uart1: serial@2810000 {
> - compatible = "ti,am64-uart", "ti,am654-uart";
> - reg = <0x00 0x02810000 0x00 0x100>;
> - interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 152 0>;
> - clock-names = "fclk";
> - status = "disabled";
> - };
> -
> - main_uart2: serial@2820000 {
> - compatible = "ti,am64-uart", "ti,am654-uart";
> - reg = <0x00 0x02820000 0x00 0x100>;
> - interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 153 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 153 0>;
> - clock-names = "fclk";
> - status = "disabled";
> - };
> -
> - main_uart3: serial@2830000 {
> - compatible = "ti,am64-uart", "ti,am654-uart";
> - reg = <0x00 0x02830000 0x00 0x100>;
> - interrupts = <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 154 0>;
> - clock-names = "fclk";
> - status = "disabled";
> - };
> -
> - main_uart4: serial@2840000 {
> - compatible = "ti,am64-uart", "ti,am654-uart";
> - reg = <0x00 0x02840000 0x00 0x100>;
> - interrupts = <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 155 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 155 0>;
> - clock-names = "fclk";
> - status = "disabled";
> - };
> -
> - main_uart5: serial@2850000 {
> - compatible = "ti,am64-uart", "ti,am654-uart";
> - reg = <0x00 0x02850000 0x00 0x100>;
> - interrupts = <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 156 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 156 0>;
> - clock-names = "fclk";
> - status = "disabled";
> - };
> -
> - main_uart6: serial@2860000 {
> - compatible = "ti,am64-uart", "ti,am654-uart";
> - reg = <0x00 0x02860000 0x00 0x100>;
> - interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 158 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 158 0>;
> - clock-names = "fclk";
> - status = "disabled";
> - };
> -
> - main_i2c0: i2c@20000000 {
> - compatible = "ti,am64-i2c", "ti,omap4-i2c";
> - reg = <0x00 0x20000000 0x00 0x100>;
> - interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - power-domains = <&k3_pds 102 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 102 2>;
> - clock-names = "fck";
> - status = "disabled";
> - };
> -
> - main_i2c1: i2c@20010000 {
> - compatible = "ti,am64-i2c", "ti,omap4-i2c";
> - reg = <0x00 0x20010000 0x00 0x100>;
> - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 103 2>;
> - clock-names = "fck";
> - status = "disabled";
> - };
> -
> - main_i2c2: i2c@20020000 {
> - compatible = "ti,am64-i2c", "ti,omap4-i2c";
> - reg = <0x00 0x20020000 0x00 0x100>;
> - interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 104 2>;
> - clock-names = "fck";
> - status = "disabled";
> - };
> -
> - main_i2c3: i2c@20030000 {
> - compatible = "ti,am64-i2c", "ti,omap4-i2c";
> - reg = <0x00 0x20030000 0x00 0x100>;
> - interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - power-domains = <&k3_pds 105 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 105 2>;
> - clock-names = "fck";
> - status = "disabled";
> - };
> -
> - main_spi0: spi@20100000 {
> - compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
> - reg = <0x00 0x20100000 0x00 0x400>;
> - interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - power-domains = <&k3_pds 141 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 141 0>;
> - status = "disabled";
> - };
> -
> - main_spi1: spi@20110000 {
> - compatible = "ti,am654-mcspi","ti,omap4-mcspi";
> - reg = <0x00 0x20110000 0x00 0x400>;
> - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - power-domains = <&k3_pds 142 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 142 0>;
> - status = "disabled";
> - };
> -
> - main_spi2: spi@20120000 {
> - compatible = "ti,am654-mcspi","ti,omap4-mcspi";
> - reg = <0x00 0x20120000 0x00 0x400>;
> - interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - power-domains = <&k3_pds 143 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 143 0>;
> - status = "disabled";
> - };
> -
> - main_gpio_intr: interrupt-controller@a00000 {
> - compatible = "ti,sci-intr";
> - reg = <0x00 0x00a00000 0x00 0x800>;
> - ti,intr-trigger-type = <1>;
> - interrupt-controller;
> - interrupt-parent = <&gic500>;
> - #interrupt-cells = <1>;
> - ti,sci = <&dmsc>;
> - ti,sci-dev-id = <3>;
> - ti,interrupt-ranges = <0 32 16>;
> - };
> -
> - main_gpio0: gpio@600000 {
> - compatible = "ti,am64-gpio", "ti,keystone-gpio";
> - reg = <0x0 0x00600000 0x0 0x100>;
> - gpio-ranges = <&main_pmx0 0 0 32>,
> - <&main_pmx0 32 33 38>,
> - <&main_pmx0 70 72 22>;
> - gpio-controller;
> - #gpio-cells = <2>;
> - interrupt-parent = <&main_gpio_intr>;
> - interrupts = <190>, <191>, <192>,
> - <193>, <194>, <195>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - ti,ngpio = <92>;
> - ti,davinci-gpio-unbanked = <0>;
> - power-domains = <&k3_pds 77 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 77 0>;
> - clock-names = "gpio";
> - };
> -
> - main_gpio1: gpio@601000 {
> - compatible = "ti,am64-gpio", "ti,keystone-gpio";
> - reg = <0x0 0x00601000 0x0 0x100>;
> - gpio-controller;
> - gpio-ranges = <&main_pmx0 0 94 41>,
> - <&main_pmx0 41 136 6>,
> - <&main_pmx0 47 143 3>,
> - <&main_pmx0 50 149 2>;
> - #gpio-cells = <2>;
> - interrupt-parent = <&main_gpio_intr>;
> - interrupts = <180>, <181>, <182>,
> - <183>, <184>, <185>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - ti,ngpio = <52>;
> - ti,davinci-gpio-unbanked = <0>;
> - power-domains = <&k3_pds 78 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 78 0>;
> - clock-names = "gpio";
> - };
> -
> - sdhci0: mmc@fa10000 {
> - compatible = "ti,am62-sdhci";
> - reg = <0x00 0x0fa10000 0x00 0x1000>, <0x00 0x0fa18000 0x00 0x400>;
> - interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 57 5>, <&k3_clks 57 6>;
> - clock-names = "clk_ahb", "clk_xin";
> - assigned-clocks = <&k3_clks 57 6>;
> - assigned-clock-parents = <&k3_clks 57 8>;
> - bus-width = <8>;
> - mmc-ddr-1_8v;
> - mmc-hs200-1_8v;
> - ti,clkbuf-sel = <0x7>;
> - ti,otap-del-sel-legacy = <0x0>;
> - ti,otap-del-sel-mmc-hs = <0x0>;
> - ti,otap-del-sel-ddr52 = <0x5>;
> - ti,otap-del-sel-hs200 = <0x5>;
> - ti,itap-del-sel-legacy = <0xa>;
> - ti,itap-del-sel-mmc-hs = <0x1>;
> - status = "disabled";
> - };
> -
> - sdhci1: mmc@fa00000 {
> - compatible = "ti,am62-sdhci";
> - reg = <0x00 0x0fa00000 0x00 0x1000>, <0x00 0x0fa08000 0x00 0x400>;
> - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 58 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 58 5>, <&k3_clks 58 6>;
> - clock-names = "clk_ahb", "clk_xin";
> - bus-width = <4>;
> - ti,clkbuf-sel = <0x7>;
> - ti,otap-del-sel-legacy = <0x8>;
> - ti,otap-del-sel-sd-hs = <0x0>;
> - ti,otap-del-sel-sdr12 = <0x0>;
> - ti,otap-del-sel-sdr25 = <0x0>;
> - ti,otap-del-sel-sdr50 = <0x8>;
> - ti,otap-del-sel-sdr104 = <0x7>;
> - ti,otap-del-sel-ddr50 = <0x4>;
> - ti,itap-del-sel-legacy = <0xa>;
> - ti,itap-del-sel-sd-hs = <0x1>;
> - ti,itap-del-sel-sdr12 = <0xa>;
> - ti,itap-del-sel-sdr25 = <0x1>;
> - status = "disabled";
> - };
> -
> - sdhci2: mmc@fa20000 {
> - compatible = "ti,am62-sdhci";
> - reg = <0x00 0x0fa20000 0x00 0x1000>, <0x00 0x0fa28000 0x00 0x400>;
> - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 184 5>, <&k3_clks 184 6>;
> - clock-names = "clk_ahb", "clk_xin";
> - bus-width = <4>;
> - ti,clkbuf-sel = <0x7>;
> - ti,otap-del-sel-legacy = <0x8>;
> - ti,otap-del-sel-sd-hs = <0x0>;
> - ti,otap-del-sel-sdr12 = <0x0>;
> - ti,otap-del-sel-sdr25 = <0x0>;
> - ti,otap-del-sel-sdr50 = <0x8>;
> - ti,otap-del-sel-sdr104 = <0x7>;
> - ti,otap-del-sel-ddr50 = <0x8>;
> - ti,itap-del-sel-legacy = <0xa>;
> - ti,itap-del-sel-sd-hs = <0xa>;
> - ti,itap-del-sel-sdr12 = <0xa>;
> - ti,itap-del-sel-sdr25 = <0x1>;
> - status = "disabled";
> - };
> -
> - usbss0: dwc3-usb@f900000 {
> - compatible = "ti,am62-usb";
> - reg = <0x00 0x0f900000 0x00 0x800>;
> - clocks = <&k3_clks 161 3>;
> - clock-names = "ref";
> - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4008>;
> - #address-cells = <2>;
> - #size-cells = <2>;
> - power-domains = <&k3_pds 178 TI_SCI_PD_EXCLUSIVE>;
> - ranges;
> - status = "disabled";
> -
> - usb0: usb@31000000 {
> - compatible = "snps,dwc3";
> - reg = <0x00 0x31000000 0x00 0x50000>;
> - interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
> - <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
> - interrupt-names = "host", "peripheral";
> - maximum-speed = "high-speed";
> - dr_mode = "otg";
> - snps,usb2-gadget-lpm-disable;
> - snps,usb2-lpm-disable;
> - };
> - };
> -
> - usbss1: dwc3-usb@f910000 {
> - compatible = "ti,am62-usb";
> - reg = <0x00 0x0f910000 0x00 0x800>;
> - clocks = <&k3_clks 162 3>;
> - clock-names = "ref";
> - ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
> - #address-cells = <2>;
> - #size-cells = <2>;
> - power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
> - ranges;
> - status = "disabled";
> -
> - usb1: usb@31100000 {
> - compatible = "snps,dwc3";
> - reg = <0x00 0x31100000 0x00 0x50000>;
> - interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
> - <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
> - interrupt-names = "host", "peripheral";
> - maximum-speed = "high-speed";
> - dr_mode = "otg";
> - snps,usb2-gadget-lpm-disable;
> - snps,usb2-lpm-disable;
> - };
> - };
> -
> - fss: bus@fc00000 {
> - compatible = "simple-bus";
> - reg = <0x00 0x0fc00000 0x00 0x70000>;
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> -
> - ospi0: spi@fc40000 {
> - compatible = "ti,am654-ospi", "cdns,qspi-nor";
> - reg = <0x00 0x0fc40000 0x00 0x100>,
> - <0x05 0x00000000 0x01 0x00000000>;
> - interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
> - cdns,fifo-depth = <256>;
> - cdns,fifo-width = <4>;
> - cdns,trigger-address = <0x0>;
> - clocks = <&k3_clks 75 7>;
> - assigned-clocks = <&k3_clks 75 7>;
> - assigned-clock-parents = <&k3_clks 75 8>;
> - assigned-clock-rates = <166666666>;
> - power-domains = <&k3_pds 75 TI_SCI_PD_EXCLUSIVE>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - status = "disabled";
> - };
> - };
> -
> - gpu: gpu@fd00000 {
> - compatible = "ti,am62-gpu", "img,img-axe";
> - reg = <0x00 0x0fd00000 0x00 0x20000>;
> - clocks = <&k3_clks 187 0>;
> - clock-names = "core";
> - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
> - };
> -
> - cpsw3g: ethernet@8000000 {
> - compatible = "ti,am642-cpsw-nuss";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - reg = <0x00 0x08000000 0x00 0x200000>;
> - reg-names = "cpsw_nuss";
> - ranges = <0x00 0x00 0x00 0x08000000 0x00 0x200000>;
> - clocks = <&k3_clks 13 0>;
> - assigned-clocks = <&k3_clks 13 3>;
> - assigned-clock-parents = <&k3_clks 13 11>;
> - clock-names = "fck";
> - power-domains = <&k3_pds 13 TI_SCI_PD_EXCLUSIVE>;
> -
> - dmas = <&main_pktdma 0xc600 15>,
> - <&main_pktdma 0xc601 15>,
> - <&main_pktdma 0xc602 15>,
> - <&main_pktdma 0xc603 15>,
> - <&main_pktdma 0xc604 15>,
> - <&main_pktdma 0xc605 15>,
> - <&main_pktdma 0xc606 15>,
> - <&main_pktdma 0xc607 15>,
> - <&main_pktdma 0x4600 15>;
> - dma-names = "tx0", "tx1", "tx2", "tx3", "tx4", "tx5", "tx6",
> - "tx7", "rx";
> -
> - ethernet-ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - cpsw_port1: port@1 {
> - reg = <1>;
> - ti,mac-only;
> - label = "port1";
> - phys = <&phy_gmii_sel 1>;
> - mac-address = [00 00 00 00 00 00];
> - ti,syscon-efuse = <&wkup_conf 0x200>;
> - };
> -
> - cpsw_port2: port@2 {
> - reg = <2>;
> - ti,mac-only;
> - label = "port2";
> - phys = <&phy_gmii_sel 2>;
> - mac-address = [00 00 00 00 00 00];
> - };
> - };
> -
> - cpsw3g_mdio: mdio@f00 {
> - compatible = "ti,cpsw-mdio","ti,davinci_mdio";
> - reg = <0x00 0xf00 0x00 0x100>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - clocks = <&k3_clks 13 0>;
> - clock-names = "fck";
> - bus_freq = <1000000>;
> - status = "disabled";
> - };
> -
> - cpts@3d000 {
> - compatible = "ti,j721e-cpts";
> - reg = <0x00 0x3d000 0x00 0x400>;
> - clocks = <&k3_clks 13 3>;
> - clock-names = "cpts";
> - interrupts-extended = <&gic500 GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "cpts";
> - ti,cpts-ext-ts-inputs = <4>;
> - ti,cpts-periodic-outputs = <2>;
> - };
> - };
> -
> - dss: dss@30200000 {
> - compatible = "ti,am625-dss";
> - reg = <0x00 0x30200000 0x00 0x1000>, /* common */
> - <0x00 0x30202000 0x00 0x1000>, /* vidl1 */
> - <0x00 0x30206000 0x00 0x1000>, /* vid */
> - <0x00 0x30207000 0x00 0x1000>, /* ovr1 */
> - <0x00 0x30208000 0x00 0x1000>, /* ovr2 */
> - <0x00 0x3020a000 0x00 0x1000>, /* vp1: Used for OLDI */
> - <0x00 0x3020b000 0x00 0x1000>, /* vp2: Used as DPI Out */
> - <0x00 0x30201000 0x00 0x1000>; /* common1 */
> - reg-names = "common", "vidl1", "vid",
> - "ovr1", "ovr2", "vp1", "vp2", "common1";
> - power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 186 6>,
> - <&dss_vp1_clk>,
> - <&k3_clks 186 2>;
> - clock-names = "fck", "vp1", "vp2";
> - interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
> - status = "disabled";
> -
> - dss_ports: ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - };
> - };
> -
> - hwspinlock: spinlock@2a000000 {
> - compatible = "ti,am64-hwspinlock";
> - reg = <0x00 0x2a000000 0x00 0x1000>;
> - #hwlock-cells = <1>;
> - };
> -
> - mailbox0_cluster0: mailbox@29000000 {
> - compatible = "ti,am64-mailbox";
> - reg = <0x00 0x29000000 0x00 0x200>;
> - interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
> - #mbox-cells = <1>;
> - ti,mbox-num-users = <4>;
> - ti,mbox-num-fifos = <16>;
> - };
> -
> - ecap0: pwm@23100000 {
> - compatible = "ti,am3352-ecap";
> - #pwm-cells = <3>;
> - reg = <0x00 0x23100000 0x00 0x100>;
> - power-domains = <&k3_pds 51 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 51 0>;
> - clock-names = "fck";
> - status = "disabled";
> - };
> -
> - ecap1: pwm@23110000 {
> - compatible = "ti,am3352-ecap";
> - #pwm-cells = <3>;
> - reg = <0x00 0x23110000 0x00 0x100>;
> - power-domains = <&k3_pds 52 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 52 0>;
> - clock-names = "fck";
> - status = "disabled";
> - };
> -
> - ecap2: pwm@23120000 {
> - compatible = "ti,am3352-ecap";
> - #pwm-cells = <3>;
> - reg = <0x00 0x23120000 0x00 0x100>;
> - power-domains = <&k3_pds 53 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 53 0>;
> - clock-names = "fck";
> - status = "disabled";
> - };
> -
> - main_mcan0: can@20701000 {
> - compatible = "bosch,m_can";
> - reg = <0x00 0x20701000 0x00 0x200>,
> - <0x00 0x20708000 0x00 0x8000>;
> - reg-names = "m_can", "message_ram";
> - power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 98 6>, <&k3_clks 98 1>;
> - clock-names = "hclk", "cclk";
> - interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "int0", "int1";
> - bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> - status = "disabled";
> - };
> -
> - main_rti0: watchdog@e000000 {
> - compatible = "ti,j7-rti-wdt";
> - reg = <0x00 0x0e000000 0x00 0x100>;
> - clocks = <&k3_clks 125 0>;
> - power-domains = <&k3_pds 125 TI_SCI_PD_EXCLUSIVE>;
> - assigned-clocks = <&k3_clks 125 0>;
> - assigned-clock-parents = <&k3_clks 125 2>;
> - };
> -
> - main_rti1: watchdog@e010000 {
> - compatible = "ti,j7-rti-wdt";
> - reg = <0x00 0x0e010000 0x00 0x100>;
> - clocks = <&k3_clks 126 0>;
> - power-domains = <&k3_pds 126 TI_SCI_PD_EXCLUSIVE>;
> - assigned-clocks = <&k3_clks 126 0>;
> - assigned-clock-parents = <&k3_clks 126 2>;
> - };
> -
> - main_rti2: watchdog@e020000 {
> - compatible = "ti,j7-rti-wdt";
> - reg = <0x00 0x0e020000 0x00 0x100>;
> - clocks = <&k3_clks 127 0>;
> - power-domains = <&k3_pds 127 TI_SCI_PD_EXCLUSIVE>;
> - assigned-clocks = <&k3_clks 127 0>;
> - assigned-clock-parents = <&k3_clks 127 2>;
> - };
> -
> - main_rti3: watchdog@e030000 {
> - compatible = "ti,j7-rti-wdt";
> - reg = <0x00 0x0e030000 0x00 0x100>;
> - clocks = <&k3_clks 128 0>;
> - power-domains = <&k3_pds 128 TI_SCI_PD_EXCLUSIVE>;
> - assigned-clocks = <&k3_clks 128 0>;
> - assigned-clock-parents = <&k3_clks 128 2>;
> - };
> -
> - main_rti15: watchdog@e0f0000 {
> - compatible = "ti,j7-rti-wdt";
> - reg = <0x00 0x0e0f0000 0x00 0x100>;
> - clocks = <&k3_clks 130 0>;
> - power-domains = <&k3_pds 130 TI_SCI_PD_EXCLUSIVE>;
> - assigned-clocks = <&k3_clks 130 0>;
> - assigned-clock-parents = <&k3_clks 130 2>;
> - };
> -
> - epwm0: pwm@23000000 {
> - compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
> - #pwm-cells = <3>;
> - reg = <0x00 0x23000000 0x00 0x100>;
> - power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
> - clock-names = "tbclk", "fck";
> - status = "disabled";
> - };
> -
> - epwm1: pwm@23010000 {
> - compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
> - #pwm-cells = <3>;
> - reg = <0x00 0x23010000 0x00 0x100>;
> - power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
> - clock-names = "tbclk", "fck";
> - status = "disabled";
> - };
> -
> - epwm2: pwm@23020000 {
> - compatible = "ti,am64-epwm", "ti,am3352-ehrpwm";
> - #pwm-cells = <3>;
> - reg = <0x00 0x23020000 0x00 0x100>;
> - power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
> - clock-names = "tbclk", "fck";
> - status = "disabled";
> - };
> -
> - mcasp0: audio-controller@2b00000 {
> - compatible = "ti,am33xx-mcasp-audio";
> - reg = <0x00 0x02b00000 0x00 0x2000>,
> - <0x00 0x02b08000 0x00 0x400>;
> - reg-names = "mpu", "dat";
> - interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "tx", "rx";
> -
> - dmas = <&main_bcdma 0 0xc500 0>, <&main_bcdma 0 0x4500 0>;
> - dma-names = "tx", "rx";
> -
> - clocks = <&k3_clks 190 0>;
> - clock-names = "fck";
> - assigned-clocks = <&k3_clks 190 0>;
> - assigned-clock-parents = <&k3_clks 190 2>;
> - power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
> - status = "disabled";
> - };
> -
> - mcasp1: audio-controller@2b10000 {
> - compatible = "ti,am33xx-mcasp-audio";
> - reg = <0x00 0x02b10000 0x00 0x2000>,
> - <0x00 0x02b18000 0x00 0x400>;
> - reg-names = "mpu", "dat";
> - interrupts = <GIC_SPI 238 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "tx", "rx";
> -
> - dmas = <&main_bcdma 0 0xc501 0>, <&main_bcdma 0 0x4501 0>;
> - dma-names = "tx", "rx";
> -
> - clocks = <&k3_clks 191 0>;
> - clock-names = "fck";
> - assigned-clocks = <&k3_clks 191 0>;
> - assigned-clock-parents = <&k3_clks 191 2>;
> - power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
> - status = "disabled";
> - };
> -
> - mcasp2: audio-controller@2b20000 {
> - compatible = "ti,am33xx-mcasp-audio";
> - reg = <0x00 0x02b20000 0x00 0x2000>,
> - <0x00 0x02b28000 0x00 0x400>;
> - reg-names = "mpu", "dat";
> - interrupts = <GIC_SPI 240 IRQ_TYPE_LEVEL_HIGH>,
> - <GIC_SPI 239 IRQ_TYPE_LEVEL_HIGH>;
> - interrupt-names = "tx", "rx";
> -
> - dmas = <&main_bcdma 0 0xc502 0>, <&main_bcdma 0 0x4502 0>;
> - dma-names = "tx", "rx";
> -
> - clocks = <&k3_clks 192 0>;
> - clock-names = "fck";
> - assigned-clocks = <&k3_clks 192 0>;
> - assigned-clock-parents = <&k3_clks 192 2>;
> - power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
> - status = "disabled";
> - };
> -
> - ti_csi2rx0: ticsi2rx@30102000 {
> - compatible = "ti,j721e-csi2rx-shim";
> - dmas = <&main_bcdma 0 0x4700 0>;
> - dma-names = "rx0";
> - reg = <0x00 0x30102000 0x00 0x1000>;
> - power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> - status = "disabled";
> -
> - cdns_csi2rx0: csi-bridge@30101000 {
> - compatible = "ti,j721e-csi2rx", "cdns,csi2rx";
> - reg = <0x00 0x30101000 0x00 0x1000>;
> - clocks = <&k3_clks 182 0>, <&k3_clks 182 3>, <&k3_clks 182 0>,
> - <&k3_clks 182 0>, <&k3_clks 182 4>, <&k3_clks 182 4>;
> - clock-names = "sys_clk", "p_clk", "pixel_if0_clk",
> - "pixel_if1_clk", "pixel_if2_clk", "pixel_if3_clk";
> - phys = <&dphy0>;
> - phy-names = "dphy";
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - csi0_port0: port@0 {
> - reg = <0>;
> - status = "disabled";
> - };
> -
> - csi0_port1: port@1 {
> - reg = <1>;
> - status = "disabled";
> - };
> -
> - csi0_port2: port@2 {
> - reg = <2>;
> - status = "disabled";
> - };
> -
> - csi0_port3: port@3 {
> - reg = <3>;
> - status = "disabled";
> - };
> -
> - csi0_port4: port@4 {
> - reg = <4>;
> - status = "disabled";
> - };
> - };
> - };
> - };
> -
> - dphy0: phy@30110000 {
> - compatible = "cdns,dphy-rx";
> - reg = <0x00 0x30110000 0x00 0x1100>;
> - #phy-cells = <0>;
> - power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
> - status = "disabled";
> - };
> -
> -};
> diff --git a/arch/arm/dts/k3-am62-mcu.dtsi b/arch/arm/dts/k3-am62-mcu.dtsi
> deleted file mode 100644
> index e66d486ef1f2..000000000000
> --- a/arch/arm/dts/k3-am62-mcu.dtsi
> +++ /dev/null
> @@ -1,176 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-only OR MIT
> -/*
> - * Device Tree Source for AM625 SoC Family MCU Domain peripherals
> - *
> - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
> - */
> -
> -&cbass_mcu {
> - mcu_pmx0: pinctrl@4084000 {
> - bootph-all;
> - compatible = "pinctrl-single";
> - reg = <0x00 0x04084000 0x00 0x88>;
> - #pinctrl-cells = <1>;
> - pinctrl-single,register-width = <32>;
> - pinctrl-single,function-mask = <0xffffffff>;
> - };
> -
> - mcu_esm: esm@4100000 {
> - bootph-pre-ram;
> - compatible = "ti,j721e-esm";
> - reg = <0x00 0x4100000 0x00 0x1000>;
> - ti,esm-pins = <0>, <1>, <2>, <85>;
> - };
> -
> - /*
> - * The MCU domain timer interrupts are routed only to the ESM module,
> - * and not currently available for Linux. The MCU domain timers are
> - * of limited use without interrupts, and likely reserved by the ESM.
> - */
> - mcu_timer0: timer@4800000 {
> - compatible = "ti,am654-timer";
> - reg = <0x00 0x4800000 0x00 0x400>;
> - clocks = <&k3_clks 35 2>;
> - clock-names = "fck";
> - power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
> - ti,timer-pwm;
> - status = "reserved";
> - };
> -
> - mcu_timer1: timer@4810000 {
> - compatible = "ti,am654-timer";
> - reg = <0x00 0x4810000 0x00 0x400>;
> - clocks = <&k3_clks 48 2>;
> - clock-names = "fck";
> - power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
> - ti,timer-pwm;
> - status = "reserved";
> - };
> -
> - mcu_timer2: timer@4820000 {
> - compatible = "ti,am654-timer";
> - reg = <0x00 0x4820000 0x00 0x400>;
> - clocks = <&k3_clks 49 2>;
> - clock-names = "fck";
> - power-domains = <&k3_pds 49 TI_SCI_PD_EXCLUSIVE>;
> - ti,timer-pwm;
> - status = "reserved";
> - };
> -
> - mcu_timer3: timer@4830000 {
> - compatible = "ti,am654-timer";
> - reg = <0x00 0x4830000 0x00 0x400>;
> - clocks = <&k3_clks 50 2>;
> - clock-names = "fck";
> - power-domains = <&k3_pds 50 TI_SCI_PD_EXCLUSIVE>;
> - ti,timer-pwm;
> - status = "reserved";
> - };
> -
> - mcu_uart0: serial@4a00000 {
> - compatible = "ti,am64-uart", "ti,am654-uart";
> - reg = <0x00 0x04a00000 0x00 0x100>;
> - interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>;
> - power-domains = <&k3_pds 149 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 149 0>;
> - clock-names = "fclk";
> - status = "disabled";
> - };
> -
> - mcu_i2c0: i2c@4900000 {
> - compatible = "ti,am64-i2c", "ti,omap4-i2c";
> - reg = <0x00 0x04900000 0x00 0x100>;
> - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - power-domains = <&k3_pds 106 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 106 2>;
> - clock-names = "fck";
> - status = "disabled";
> - };
> -
> - mcu_spi0: spi@4b00000 {
> - compatible = "ti,am654-mcspi", "ti,omap4-mcspi";
> - reg = <0x00 0x04b00000 0x00 0x400>;
> - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 147 0>;
> - status = "disabled";
> - };
> -
> - mcu_spi1: spi@4b10000 {
> - compatible = "ti,am654-mcspi","ti,omap4-mcspi";
> - reg = <0x00 0x04b10000 0x00 0x400>;
> - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 148 0>;
> - status = "disabled";
> - };
> -
> - mcu_gpio_intr: interrupt-controller@4210000 {
> - compatible = "ti,sci-intr";
> - reg = <0x00 0x04210000 0x00 0x200>;
> - ti,intr-trigger-type = <1>;
> - interrupt-controller;
> - interrupt-parent = <&gic500>;
> - #interrupt-cells = <1>;
> - ti,sci = <&dmsc>;
> - ti,sci-dev-id = <5>;
> - ti,interrupt-ranges = <0 104 4>;
> - };
> -
> - mcu_gpio0: gpio@4201000 {
> - compatible = "ti,am64-gpio", "ti,keystone-gpio";
> - reg = <0x00 0x4201000 0x00 0x100>;
> - gpio-controller;
> - #gpio-cells = <2>;
> - interrupt-parent = <&mcu_gpio_intr>;
> - interrupts = <30>, <31>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> - ti,ngpio = <24>;
> - ti,davinci-gpio-unbanked = <0>;
> - power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 79 0>;
> - clock-names = "gpio";
> - };
> -
> - mcu_rti0: watchdog@4880000 {
> - compatible = "ti,j7-rti-wdt";
> - reg = <0x00 0x04880000 0x00 0x100>;
> - clocks = <&k3_clks 131 0>;
> - power-domains = <&k3_pds 131 TI_SCI_PD_EXCLUSIVE>;
> - assigned-clocks = <&k3_clks 131 0>;
> - assigned-clock-parents = <&k3_clks 131 2>;
> - /* Tightly coupled to M4F */
> - status = "reserved";
> - };
> -
> - mcu_mcan0: can@4e08000 {
> - compatible = "bosch,m_can";
> - reg = <0x00 0x4e08000 0x00 0x200>,
> - <0x00 0x4e00000 0x00 0x8000>;
> - reg-names = "m_can", "message_ram";
> - power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 188 6>, <&k3_clks 188 1>;
> - clock-names = "hclk", "cclk";
> - bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> - status = "disabled";
> - };
> -
> - mcu_mcan1: can@4e18000 {
> - compatible = "bosch,m_can";
> - reg = <0x00 0x4e18000 0x00 0x200>,
> - <0x00 0x4e10000 0x00 0x8000>;
> - reg-names = "m_can", "message_ram";
> - power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 189 6>, <&k3_clks 189 1>;
> - clock-names = "hclk", "cclk";
> - bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
> - status = "disabled";
> - };
> -};
> diff --git a/arch/arm/dts/k3-am62-thermal.dtsi b/arch/arm/dts/k3-am62-thermal.dtsi
> deleted file mode 100644
> index 12ba833002a1..000000000000
> --- a/arch/arm/dts/k3-am62-thermal.dtsi
> +++ /dev/null
> @@ -1,36 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-only OR MIT
> -/*
> - * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/
> - */
> -
> -#include <dt-bindings/thermal/thermal.h>
> -
> -thermal_zones: thermal-zones {
> - main0_thermal: main0-thermal {
> - polling-delay-passive = <250>; /* milliSeconds */
> - polling-delay = <500>; /* milliSeconds */
> - thermal-sensors = <&wkup_vtm0 0>;
> -
> - trips {
> - main0_crit: main0-crit {
> - temperature = <105000>; /* milliCelsius */
> - hysteresis = <2000>; /* milliCelsius */
> - type = "critical";
> - };
> - };
> - };
> -
> - main1_thermal: main1-thermal {
> - polling-delay-passive = <250>; /* milliSeconds */
> - polling-delay = <500>; /* milliSeconds */
> - thermal-sensors = <&wkup_vtm0 1>;
> -
> - trips {
> - main1_crit: main1-crit {
> - temperature = <105000>; /* milliCelsius */
> - hysteresis = <2000>; /* milliCelsius */
> - type = "critical";
> - };
> - };
> - };
> -};
> diff --git a/arch/arm/dts/k3-am62-wakeup.dtsi b/arch/arm/dts/k3-am62-wakeup.dtsi
> deleted file mode 100644
> index 23ce1bfda8d6..000000000000
> --- a/arch/arm/dts/k3-am62-wakeup.dtsi
> +++ /dev/null
> @@ -1,96 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-only OR MIT
> -/*
> - * Device Tree Source for AM625 SoC Family Wakeup Domain peripherals
> - *
> - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
> - */
> -
> -#include <dt-bindings/bus/ti-sysc.h>
> -
> -&cbass_wakeup {
> - wkup_conf: syscon@43000000 {
> - bootph-all;
> - compatible = "syscon", "simple-mfd";
> - reg = <0x00 0x43000000 0x00 0x20000>;
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0x0 0x00 0x43000000 0x20000>;
> -
> - chipid: chipid@14 {
> - bootph-all;
> - compatible = "ti,am654-chipid";
> - reg = <0x14 0x4>;
> - };
> - };
> -
> - target-module@2b300050 {
> - compatible = "ti,sysc-omap2", "ti,sysc";
> - reg = <0x00 0x2b300050 0x00 0x4>,
> - <0x00 0x2b300054 0x00 0x4>,
> - <0x00 0x2b300058 0x00 0x4>;
> - reg-names = "rev", "sysc", "syss";
> - ti,sysc-mask = <(SYSC_OMAP2_ENAWAKEUP |
> - SYSC_OMAP2_SOFTRESET |
> - SYSC_OMAP2_AUTOIDLE)>;
> - ti,sysc-sidle = <SYSC_IDLE_FORCE>,
> - <SYSC_IDLE_NO>,
> - <SYSC_IDLE_SMART>,
> - <SYSC_IDLE_SMART_WKUP>;
> - ti,syss-mask = <1>;
> - ti,no-reset-on-init;
> - power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 114 0>;
> - clock-names = "fck";
> - #address-cells = <1>;
> - #size-cells = <1>;
> - ranges = <0x0 0x00 0x2b300000 0x100000>;
> -
> - wkup_uart0: serial@0 {
> - compatible = "ti,am64-uart", "ti,am654-uart";
> - reg = <0x0 0x100>;
> - interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> - status = "disabled";
> - };
> - };
> -
> - wkup_i2c0: i2c@2b200000 {
> - compatible = "ti,am64-i2c", "ti,omap4-i2c";
> - reg = <0x00 0x2b200000 0x00 0x100>;
> - interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - power-domains = <&k3_pds 107 TI_SCI_PD_EXCLUSIVE>;
> - clocks = <&k3_clks 107 4>;
> - clock-names = "fck";
> - status = "disabled";
> - };
> -
> - wkup_rtc0: rtc@2b1f0000 {
> - compatible = "ti,am62-rtc";
> - reg = <0x00 0x2b1f0000 0x00 0x100>;
> - interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
> - clocks = <&k3_clks 117 6> , <&k3_clks 117 0>;
> - clock-names = "vbus", "osc32k";
> - power-domains = <&k3_pds 117 TI_SCI_PD_EXCLUSIVE>;
> - wakeup-source;
> - };
> -
> - wkup_rti0: watchdog@2b000000 {
> - compatible = "ti,j7-rti-wdt";
> - reg = <0x00 0x2b000000 0x00 0x100>;
> - clocks = <&k3_clks 132 0>;
> - power-domains = <&k3_pds 132 TI_SCI_PD_EXCLUSIVE>;
> - assigned-clocks = <&k3_clks 132 0>;
> - assigned-clock-parents = <&k3_clks 132 2>;
> - /* Used by DM firmware */
> - status = "reserved";
> - };
> -
> - wkup_vtm0: temperature-sensor@b00000 {
> - compatible = "ti,j7200-vtm";
> - reg = <0x00 0xb00000 0x00 0x400>,
> - <0x00 0xb01000 0x00 0x400>;
> - power-domains = <&k3_pds 95 TI_SCI_PD_EXCLUSIVE>;
> - #thermal-sensor-cells = <1>;
> - };
> -};
> diff --git a/arch/arm/dts/k3-am62.dtsi b/arch/arm/dts/k3-am62.dtsi
> deleted file mode 100644
> index f0781f2bea29..000000000000
> --- a/arch/arm/dts/k3-am62.dtsi
> +++ /dev/null
> @@ -1,122 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-only OR MIT
> -/*
> - * Device Tree Source for AM62 SoC Family
> - *
> - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
> - */
> -
> -#include <dt-bindings/gpio/gpio.h>
> -#include <dt-bindings/interrupt-controller/irq.h>
> -#include <dt-bindings/interrupt-controller/arm-gic.h>
> -#include <dt-bindings/soc/ti,sci_pm_domain.h>
> -
> -#include "k3-pinctrl.h"
> -
> -/ {
> - model = "Texas Instruments K3 AM625 SoC";
> - compatible = "ti,am625";
> - interrupt-parent = <&gic500>;
> - #address-cells = <2>;
> - #size-cells = <2>;
> -
> - chosen { };
> -
> - firmware {
> - optee {
> - compatible = "linaro,optee-tz";
> - method = "smc";
> - };
> -
> - psci: psci {
> - compatible = "arm,psci-1.0";
> - method = "smc";
> - };
> - };
> -
> - a53_timer0: timer-cl0-cpu0 {
> - compatible = "arm,armv8-timer";
> - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, /* cntpsirq */
> - <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, /* cntpnsirq */
> - <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, /* cntvirq */
> - <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; /* cnthpirq */
> - };
> -
> - pmu: pmu {
> - compatible = "arm,cortex-a53-pmu";
> - interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
> - };
> -
> - cbass_main: bus@f0000 {
> - bootph-all;
> - compatible = "simple-bus";
> - #address-cells = <2>;
> - #size-cells = <2>;
> -
> - ranges = <0x00 0x000f0000 0x00 0x000f0000 0x00 0x00030000>, /* Main MMRs */
> - <0x00 0x00420000 0x00 0x00420000 0x00 0x00001000>, /* ESM0 */
> - <0x00 0x00600000 0x00 0x00600000 0x00 0x00001100>, /* GPIO */
> - <0x00 0x00703000 0x00 0x00703000 0x00 0x00000200>, /* USB0 debug trace */
> - <0x00 0x0070c000 0x00 0x0070c000 0x00 0x00000200>, /* USB1 debug trace */
> - <0x00 0x00a40000 0x00 0x00a40000 0x00 0x00000800>, /* Timesync router */
> - <0x00 0x01000000 0x00 0x01000000 0x00 0x01b28400>, /* First peripheral window */
> - <0x00 0x08000000 0x00 0x08000000 0x00 0x00200000>, /* Main CPSW */
> - <0x00 0x0e000000 0x00 0x0e000000 0x00 0x01d20000>, /* Second peripheral window */
> - <0x00 0x0fd00000 0x00 0x0fd00000 0x00 0x00020000>, /* GPU */
> - <0x00 0x20000000 0x00 0x20000000 0x00 0x0a008000>, /* Third peripheral window */
> - <0x00 0x30040000 0x00 0x30040000 0x00 0x00080000>, /* PRUSS-M */
> - <0x00 0x30101000 0x00 0x30101000 0x00 0x00010100>, /* CSI window */
> - <0x00 0x30200000 0x00 0x30200000 0x00 0x00010000>, /* DSS */
> - <0x00 0x31000000 0x00 0x31000000 0x00 0x00050000>, /* USB0 DWC3 Core window */
> - <0x00 0x31100000 0x00 0x31100000 0x00 0x00050000>, /* USB1 DWC3 Core window */
> - <0x00 0x40900000 0x00 0x40900000 0x00 0x00030000>, /* SA3UL */
> - <0x00 0x43600000 0x00 0x43600000 0x00 0x00010000>, /* SA3 sproxy data */
> - <0x00 0x44043000 0x00 0x44043000 0x00 0x00000fe0>, /* TI SCI DEBUG */
> - <0x00 0x44860000 0x00 0x44860000 0x00 0x00040000>, /* SA3 sproxy config */
> - <0x00 0x48000000 0x00 0x48000000 0x00 0x06400000>, /* DMSS */
> - <0x00 0x60000000 0x00 0x60000000 0x00 0x08000000>, /* FSS0 DAT1 */
> - <0x00 0x70000000 0x00 0x70000000 0x00 0x00010000>, /* OCSRAM */
> - <0x01 0x00000000 0x01 0x00000000 0x00 0x00310000>, /* A53 PERIPHBASE */
> - <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, /* FSS0 DAT3 */
> -
> - /* MCU Domain Range */
> - <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>,
> -
> - /* Wakeup Domain Range */
> - <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
> - <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>,
> - <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
> -
> - cbass_mcu: bus@4000000 {
> - bootph-all;
> - compatible = "simple-bus";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges = <0x00 0x04000000 0x00 0x04000000 0x00 0x01ff1400>; /* Peripheral window */
> - };
> -
> - cbass_wakeup: bus@b00000 {
> - bootph-all;
> - compatible = "simple-bus";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges = <0x00 0x00b00000 0x00 0x00b00000 0x00 0x00002400>, /* VTM */
> - <0x00 0x2b000000 0x00 0x2b000000 0x00 0x00300400>, /* Peripheral Window */
> - <0x00 0x43000000 0x00 0x43000000 0x00 0x00020000>;
> - };
> - };
> -
> - dss_vp1_clk: clock-divider-oldi {
> - compatible = "fixed-factor-clock";
> - clocks = <&k3_clks 186 0>;
> - #clock-cells = <0>;
> - clock-div = <7>;
> - clock-mult = <1>;
> - };
> -
> - #include "k3-am62-thermal.dtsi"
> -};
> -
> -/* Now include the peripherals for each bus segments */
> -#include "k3-am62-main.dtsi"
> -#include "k3-am62-mcu.dtsi"
> -#include "k3-am62-wakeup.dtsi"
> diff --git a/arch/arm/dts/k3-am625-sk-binman.dtsi b/arch/arm/dts/k3-am625-sk-binman.dtsi
> index dfd38d64f638..db3a3e91b08f 100644
> --- a/arch/arm/dts/k3-am625-sk-binman.dtsi
> +++ b/arch/arm/dts/k3-am625-sk-binman.dtsi
> @@ -141,7 +141,7 @@
>
> #ifdef CONFIG_TARGET_AM625_A53_EVM
>
> -#define SPL_AM625_SK_DTB "spl/dts/k3-am625-sk.dtb"
> +#define SPL_AM625_SK_DTB "spl/dts/ti/k3-am625-sk.dtb"
> #define AM625_SK_DTB "u-boot.dtb"
>
> &binman {
> diff --git a/arch/arm/dts/k3-am625-sk.dts b/arch/arm/dts/k3-am625-sk.dts
> deleted file mode 100644
> index ae81ebb39d02..000000000000
> --- a/arch/arm/dts/k3-am625-sk.dts
> +++ /dev/null
> @@ -1,299 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-only OR MIT
> -/*
> - * AM625 SK: https://www.ti.com/lit/zip/sprr448
> - *
> - * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
> - */
> -
> -/dts-v1/;
> -
> -#include "k3-am62x-sk-common.dtsi"
> -
> -/ {
> - compatible = "ti,am625-sk", "ti,am625";
> - model = "Texas Instruments AM625 SK";
> -
> - opp-table {
> - /* Add 1.4GHz OPP for am625-sk board. Requires VDD_CORE to be at 0.85V */
> - opp-1400000000 {
> - opp-hz = /bits/ 64 <1400000000>;
> - opp-supported-hw = <0x01 0x0004>;
> - clock-latency-ns = <6000000>;
> - };
> - };
> -
> - memory@80000000 {
> - device_type = "memory";
> - /* 2G RAM */
> - reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
> -
> - };
> -
> - vmain_pd: regulator-0 {
> - /* TPS65988 PD CONTROLLER OUTPUT */
> - bootph-all;
> - compatible = "regulator-fixed";
> - regulator-name = "vmain_pd";
> - regulator-min-microvolt = <5000000>;
> - regulator-max-microvolt = <5000000>;
> - regulator-always-on;
> - regulator-boot-on;
> - };
> -
> - vcc_5v0: regulator-1 {
> - /* Output of LM34936 */
> - bootph-all;
> - compatible = "regulator-fixed";
> - regulator-name = "vcc_5v0";
> - regulator-min-microvolt = <5000000>;
> - regulator-max-microvolt = <5000000>;
> - vin-supply = <&vmain_pd>;
> - regulator-always-on;
> - regulator-boot-on;
> - };
> -
> - vcc_3v3_sys: regulator-2 {
> - /* output of LM61460-Q1 */
> - bootph-all;
> - compatible = "regulator-fixed";
> - regulator-name = "vcc_3v3_sys";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - vin-supply = <&vmain_pd>;
> - regulator-always-on;
> - regulator-boot-on;
> - };
> -
> - vdd_mmc1: regulator-3 {
> - /* TPS22918DBVR */
> - bootph-all;
> - compatible = "regulator-fixed";
> - regulator-name = "vdd_mmc1";
> - regulator-min-microvolt = <3300000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-boot-on;
> - enable-active-high;
> - vin-supply = <&vcc_3v3_sys>;
> - gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
> - };
> -
> - vdd_sd_dv: regulator-4 {
> - /* Output of TLV71033 */
> - bootph-all;
> - compatible = "regulator-gpio";
> - regulator-name = "tlv71033";
> - pinctrl-names = "default";
> - pinctrl-0 = <&vdd_sd_dv_pins_default>;
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <3300000>;
> - regulator-boot-on;
> - vin-supply = <&vcc_5v0>;
> - gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>;
> - states = <1800000 0x0>,
> - <3300000 0x1>;
> - };
> -
> - vcc_1v8: regulator-5 {
> - /* output of TPS6282518DMQ */
> - compatible = "regulator-fixed";
> - regulator-name = "vcc_1v8";
> - regulator-min-microvolt = <1800000>;
> - regulator-max-microvolt = <1800000>;
> - vin-supply = <&vcc_3v3_sys>;
> - regulator-always-on;
> - regulator-boot-on;
> - };
> -};
> -
> -&main_pmx0 {
> - main_rgmii2_pins_default: main-rgmii2-default-pins {
> - bootph-all;
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x184, PIN_INPUT, 0) /* (AE23) RGMII2_RD0 */
> - AM62X_IOPAD(0x188, PIN_INPUT, 0) /* (AB20) RGMII2_RD1 */
> - AM62X_IOPAD(0x18c, PIN_INPUT, 0) /* (AC21) RGMII2_RD2 */
> - AM62X_IOPAD(0x190, PIN_INPUT, 0) /* (AE22) RGMII2_RD3 */
> - AM62X_IOPAD(0x180, PIN_INPUT, 0) /* (AD23) RGMII2_RXC */
> - AM62X_IOPAD(0x17c, PIN_INPUT, 0) /* (AD22) RGMII2_RX_CTL */
> - AM62X_IOPAD(0x16c, PIN_OUTPUT, 0) /* (Y18) RGMII2_TD0 */
> - AM62X_IOPAD(0x170, PIN_OUTPUT, 0) /* (AA18) RGMII2_TD1 */
> - AM62X_IOPAD(0x174, PIN_OUTPUT, 0) /* (AD21) RGMII2_TD2 */
> - AM62X_IOPAD(0x178, PIN_OUTPUT, 0) /* (AC20) RGMII2_TD3 */
> - AM62X_IOPAD(0x168, PIN_OUTPUT, 0) /* (AE21) RGMII2_TXC */
> - AM62X_IOPAD(0x164, PIN_OUTPUT, 0) /* (AA19) RGMII2_TX_CTL */
> - >;
> - };
> -
> - ospi0_pins_default: ospi0-default-pins {
> - bootph-all;
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */
> - AM62X_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */
> - AM62X_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */
> - AM62X_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */
> - AM62X_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */
> - AM62X_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */
> - AM62X_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */
> - AM62X_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */
> - AM62X_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */
> - AM62X_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */
> - AM62X_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */
> - >;
> - };
> -
> - vdd_sd_dv_pins_default: vdd-sd-dv-default-pins {
> - bootph-all;
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x07c, PIN_OUTPUT, 7) /* (P25) GPMC0_CLK.GPIO0_31 */
> - >;
> - };
> -
> - main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
> - bootph-all;
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x01d4, PIN_INPUT, 7) /* (B15) UART0_RTSn.GPIO1_23 */
> - >;
> - };
> -};
> -
> -&main_gpio0 {
> - bootph-all;
> -};
> -
> -&main_gpio1 {
> - bootph-all;
> -};
> -
> -&main_i2c1 {
> - bootph-all;
> - exp1: gpio@22 {
> - bootph-all;
> - compatible = "ti,tca6424";
> - reg = <0x22>;
> - gpio-controller;
> - #gpio-cells = <2>;
> - gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
> - "PRU_DETECT", "MMC1_SD_EN",
> - "VPP_LDO_EN", "EXP_PS_3V3_En",
> - "EXP_PS_5V0_En", "EXP_HAT_DETECT",
> - "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn",
> - "UART1_FET_BUF_EN", "WL_LT_EN",
> - "GPIO_HDMI_RSTn", "CSI_GPIO1",
> - "CSI_GPIO2", "PRU_3V3_EN",
> - "HDMI_INTn", "PD_I2C_IRQ",
> - "MCASP1_FET_EN", "MCASP1_BUF_BT_EN",
> - "MCASP1_FET_SEL", "UART1_FET_SEL",
> - "TSINT#", "IO_EXP_TEST_LED";
> -
> - interrupt-parent = <&main_gpio1>;
> - interrupts = <23 IRQ_TYPE_EDGE_FALLING>;
> - interrupt-controller;
> - #interrupt-cells = <2>;
> -
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
> - };
> -};
> -
> -&sdhci1 {
> - vmmc-supply = <&vdd_mmc1>;
> - vqmmc-supply = <&vdd_sd_dv>;
> -};
> -
> -&cpsw3g {
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_rgmii1_pins_default>, <&main_rgmii2_pins_default>;
> -};
> -
> -&cpsw_port2 {
> - phy-mode = "rgmii-rxid";
> - phy-handle = <&cpsw3g_phy1>;
> -};
> -
> -&cpsw3g_mdio {
> - cpsw3g_phy1: ethernet-phy@1 {
> - reg = <1>;
> - ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
> - ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> - ti,min-output-impedance;
> - };
> -};
> -
> -&mailbox0_cluster0 {
> - mbox_m4_0: mbox-m4-0 {
> - ti,mbox-rx = <0 0 0>;
> - ti,mbox-tx = <1 0 0>;
> - };
> -};
> -
> -&fss {
> - bootph-all;
> -};
> -
> -&ospi0 {
> - bootph-all;
> - status = "okay";
> - pinctrl-names = "default";
> - pinctrl-0 = <&ospi0_pins_default>;
> -
> - flash@0 {
> - bootph-all;
> - compatible = "jedec,spi-nor";
> - reg = <0x0>;
> - spi-tx-bus-width = <8>;
> - spi-rx-bus-width = <8>;
> - spi-max-frequency = <25000000>;
> - cdns,tshsl-ns = <60>;
> - cdns,tsd2d-ns = <60>;
> - cdns,tchsh-ns = <60>;
> - cdns,tslch-ns = <60>;
> - cdns,read-delay = <4>;
> -
> - partitions {
> - bootph-all;
> - compatible = "fixed-partitions";
> - #address-cells = <1>;
> - #size-cells = <1>;
> -
> - partition@0 {
> - label = "ospi.tiboot3";
> - reg = <0x0 0x80000>;
> - };
> -
> - partition@80000 {
> - label = "ospi.tispl";
> - reg = <0x80000 0x200000>;
> - };
> -
> - partition@280000 {
> - label = "ospi.u-boot";
> - reg = <0x280000 0x400000>;
> - };
> -
> - partition@680000 {
> - label = "ospi.env";
> - reg = <0x680000 0x40000>;
> - };
> -
> - partition@6c0000 {
> - label = "ospi.env.backup";
> - reg = <0x6c0000 0x40000>;
> - };
> -
> - partition@800000 {
> - label = "ospi.rootfs";
> - reg = <0x800000 0x37c0000>;
> - };
> -
> - partition@3fc0000 {
> - bootph-pre-ram;
> - label = "ospi.phypattern";
> - reg = <0x3fc0000 0x40000>;
> - };
> - };
> - };
> -};
> -
> -&tlv320aic3106 {
> - DVDD-supply = <&vcc_1v8>;
> -};
> diff --git a/arch/arm/dts/k3-am625.dtsi b/arch/arm/dts/k3-am625.dtsi
> deleted file mode 100644
> index 4014add6320d..000000000000
> --- a/arch/arm/dts/k3-am625.dtsi
> +++ /dev/null
> @@ -1,155 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-only OR MIT
> -/*
> - * Device Tree Source for AM625 SoC family in Quad core configuration
> - *
> - * TRM: https://www.ti.com/lit/pdf/spruiv7
> - *
> - * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
> - */
> -
> -/dts-v1/;
> -
> -#include "k3-am62.dtsi"
> -
> -/ {
> - cpus {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - cpu-map {
> - cluster0: cluster0 {
> - core0 {
> - cpu = <&cpu0>;
> - };
> -
> - core1 {
> - cpu = <&cpu1>;
> - };
> -
> - core2 {
> - cpu = <&cpu2>;
> - };
> -
> - core3 {
> - cpu = <&cpu3>;
> - };
> - };
> - };
> -
> - cpu0: cpu@0 {
> - compatible = "arm,cortex-a53";
> - reg = <0x000>;
> - device_type = "cpu";
> - enable-method = "psci";
> - i-cache-size = <0x8000>;
> - i-cache-line-size = <64>;
> - i-cache-sets = <256>;
> - d-cache-size = <0x8000>;
> - d-cache-line-size = <64>;
> - d-cache-sets = <128>;
> - next-level-cache = <&L2_0>;
> - operating-points-v2 = <&a53_opp_table>;
> - clocks = <&k3_clks 135 0>;
> - };
> -
> - cpu1: cpu@1 {
> - compatible = "arm,cortex-a53";
> - reg = <0x001>;
> - device_type = "cpu";
> - enable-method = "psci";
> - i-cache-size = <0x8000>;
> - i-cache-line-size = <64>;
> - i-cache-sets = <256>;
> - d-cache-size = <0x8000>;
> - d-cache-line-size = <64>;
> - d-cache-sets = <128>;
> - next-level-cache = <&L2_0>;
> - operating-points-v2 = <&a53_opp_table>;
> - clocks = <&k3_clks 136 0>;
> - };
> -
> - cpu2: cpu@2 {
> - compatible = "arm,cortex-a53";
> - reg = <0x002>;
> - device_type = "cpu";
> - enable-method = "psci";
> - i-cache-size = <0x8000>;
> - i-cache-line-size = <64>;
> - i-cache-sets = <256>;
> - d-cache-size = <0x8000>;
> - d-cache-line-size = <64>;
> - d-cache-sets = <128>;
> - next-level-cache = <&L2_0>;
> - operating-points-v2 = <&a53_opp_table>;
> - clocks = <&k3_clks 137 0>;
> - };
> -
> - cpu3: cpu@3 {
> - compatible = "arm,cortex-a53";
> - reg = <0x003>;
> - device_type = "cpu";
> - enable-method = "psci";
> - i-cache-size = <0x8000>;
> - i-cache-line-size = <64>;
> - i-cache-sets = <256>;
> - d-cache-size = <0x8000>;
> - d-cache-line-size = <64>;
> - d-cache-sets = <128>;
> - next-level-cache = <&L2_0>;
> - operating-points-v2 = <&a53_opp_table>;
> - clocks = <&k3_clks 138 0>;
> - };
> - };
> -
> - a53_opp_table: opp-table {
> - compatible = "operating-points-v2-ti-cpu";
> - opp-shared;
> - syscon = <&wkup_conf>;
> -
> - opp-200000000 {
> - opp-hz = /bits/ 64 <200000000>;
> - opp-supported-hw = <0x01 0x0007>;
> - clock-latency-ns = <6000000>;
> - };
> -
> - opp-400000000 {
> - opp-hz = /bits/ 64 <400000000>;
> - opp-supported-hw = <0x01 0x0007>;
> - clock-latency-ns = <6000000>;
> - };
> -
> - opp-600000000 {
> - opp-hz = /bits/ 64 <600000000>;
> - opp-supported-hw = <0x01 0x0007>;
> - clock-latency-ns = <6000000>;
> - };
> -
> - opp-800000000 {
> - opp-hz = /bits/ 64 <800000000>;
> - opp-supported-hw = <0x01 0x0007>;
> - clock-latency-ns = <6000000>;
> - };
> -
> - opp-1000000000 {
> - opp-hz = /bits/ 64 <1000000000>;
> - opp-supported-hw = <0x01 0x0006>;
> - clock-latency-ns = <6000000>;
> - };
> -
> - opp-1250000000 {
> - opp-hz = /bits/ 64 <1250000000>;
> - opp-supported-hw = <0x01 0x0004>;
> - clock-latency-ns = <6000000>;
> - opp-suspend;
> - };
> - };
> -
> - L2_0: l2-cache0 {
> - compatible = "cache";
> - cache-unified;
> - cache-level = <2>;
> - cache-size = <0x80000>;
> - cache-line-size = <64>;
> - cache-sets = <512>;
> - };
> -};
> diff --git a/arch/arm/dts/k3-am62x-sk-common.dtsi b/arch/arm/dts/k3-am62x-sk-common.dtsi
> deleted file mode 100644
> index 3c45782ab2b7..000000000000
> --- a/arch/arm/dts/k3-am62x-sk-common.dtsi
> +++ /dev/null
> @@ -1,535 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0-only OR MIT
> -/*
> - * Common dtsi for AM62x SK and derivatives
> - *
> - * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
> - */
> -
> -#include <dt-bindings/leds/common.h>
> -#include <dt-bindings/gpio/gpio.h>
> -#include <dt-bindings/net/ti-dp83867.h>
> -#include "k3-am625.dtsi"
> -
> -/ {
> - aliases {
> - serial2 = &main_uart0;
> - mmc0 = &sdhci0;
> - mmc1 = &sdhci1;
> - mmc2 = &sdhci2;
> - spi0 = &ospi0;
> - ethernet0 = &cpsw_port1;
> - ethernet1 = &cpsw_port2;
> - usb0 = &usb0;
> - usb1 = &usb1;
> - };
> -
> - chosen {
> - stdout-path = "serial2:115200n8";
> - };
> -
> - memory@80000000 {
> - bootph-pre-ram;
> - device_type = "memory";
> - /* 2G RAM */
> - reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
> - };
> -
> - reserved-memory {
> - #address-cells = <2>;
> - #size-cells = <2>;
> - ranges;
> -
> - ramoops@9ca00000 {
> - compatible = "ramoops";
> - reg = <0x00 0x9ca00000 0x00 0x00100000>;
> - record-size = <0x8000>;
> - console-size = <0x8000>;
> - ftrace-size = <0x00>;
> - pmsg-size = <0x8000>;
> - };
> -
> - secure_tfa_ddr: tfa@9e780000 {
> - reg = <0x00 0x9e780000 0x00 0x80000>;
> - alignment = <0x1000>;
> - no-map;
> - };
> -
> - secure_ddr: optee@9e800000 {
> - reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
> - alignment = <0x1000>;
> - no-map;
> - };
> -
> - wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9db00000 {
> - compatible = "shared-dma-pool";
> - reg = <0x00 0x9db00000 0x00 0xc00000>;
> - no-map;
> - };
> - };
> -
> - leds {
> - compatible = "gpio-leds";
> - pinctrl-names = "default";
> - pinctrl-0 = <&usr_led_pins_default>;
> -
> - led-0 {
> - label = "am62-sk:green:heartbeat";
> - gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>;
> - linux,default-trigger = "heartbeat";
> - function = LED_FUNCTION_HEARTBEAT;
> - default-state = "off";
> - };
> - };
> -
> - tlv320_mclk: clk-0 {
> - #clock-cells = <0>;
> - compatible = "fixed-clock";
> - clock-frequency = <12288000>;
> - };
> -
> - codec_audio: sound {
> - compatible = "simple-audio-card";
> - simple-audio-card,name = "AM62x-SKEVM";
> - simple-audio-card,widgets =
> - "Headphone", "Headphone Jack",
> - "Line", "Line In",
> - "Microphone", "Microphone Jack";
> - simple-audio-card,routing =
> - "Headphone Jack", "HPLOUT",
> - "Headphone Jack", "HPROUT",
> - "LINE1L", "Line In",
> - "LINE1R", "Line In",
> - "MIC3R", "Microphone Jack",
> - "Microphone Jack", "Mic Bias";
> - simple-audio-card,format = "dsp_b";
> - simple-audio-card,bitclock-master = <&sound_master>;
> - simple-audio-card,frame-master = <&sound_master>;
> - simple-audio-card,bitclock-inversion;
> -
> - simple-audio-card,cpu {
> - sound-dai = <&mcasp1>;
> - };
> -
> - sound_master: simple-audio-card,codec {
> - sound-dai = <&tlv320aic3106>;
> - clocks = <&tlv320_mclk>;
> - };
> - };
> -
> - hdmi0: connector-hdmi {
> - compatible = "hdmi-connector";
> - label = "hdmi";
> - type = "a";
> - port {
> - hdmi_connector_in: endpoint {
> - remote-endpoint = <&sii9022_out>;
> - };
> - };
> - };
> -};
> -
> -&main_pmx0 {
> - /* First pad number is ALW package and second is AMC package */
> - main_uart0_pins_default: main-uart0-default-pins {
> - bootph-all;
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x1c8, PIN_INPUT, 0) /* (D14/A13) UART0_RXD */
> - AM62X_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (E14/E11) UART0_TXD */
> - >;
> - };
> -
> - main_uart1_pins_default: main-uart1-default-pins {
> - bootph-pre-ram;
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x194, PIN_INPUT, 2) /* (B19/B18) MCASP0_AXR3.UART1_CTSn */
> - AM62X_IOPAD(0x198, PIN_OUTPUT, 2) /* (A19/B17) MCASP0_AXR2.UART1_RTSn */
> - AM62X_IOPAD(0x1ac, PIN_INPUT, 2) /* (E19/D15) MCASP0_AFSR.UART1_RXD */
> - AM62X_IOPAD(0x1b0, PIN_OUTPUT, 2) /* (A20/D16) MCASP0_ACLKR.UART1_TXD */
> - >;
> - };
> -
> - main_i2c0_pins_default: main-i2c0-default-pins {
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16/E12) I2C0_SCL */
> - AM62X_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16/D14) I2C0_SDA */
> - >;
> - };
> -
> - main_i2c1_pins_default: main-i2c1-default-pins {
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17/A17) I2C1_SCL */
> - AM62X_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17/A16) I2C1_SDA */
> - >;
> - };
> -
> - main_i2c2_pins_default: main-i2c2-default-pins {
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22/H18) GPMC0_CSn2.I2C2_SCL */
> - AM62X_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24/H19) GPMC0_CSn3.I2C2_SDA */
> - >;
> - };
> -
> - main_mmc0_pins_default: main-mmc0-default-pins {
> - bootph-all;
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x220, PIN_INPUT, 0) /* (Y3/V3) MMC0_CMD */
> - AM62X_IOPAD(0x218, PIN_INPUT, 0) /* (AB1/Y1) MMC0_CLK */
> - AM62X_IOPAD(0x214, PIN_INPUT, 0) /* (AA2/V2) MMC0_DAT0 */
> - AM62X_IOPAD(0x210, PIN_INPUT, 0) /* (AA1/V1) MMC0_DAT1 */
> - AM62X_IOPAD(0x20c, PIN_INPUT, 0) /* (AA3/W2) MMC0_DAT2 */
> - AM62X_IOPAD(0x208, PIN_INPUT, 0) /* (Y4/W1) MMC0_DAT3 */
> - AM62X_IOPAD(0x204, PIN_INPUT, 0) /* (AB2/Y2) MMC0_DAT4 */
> - AM62X_IOPAD(0x200, PIN_INPUT, 0) /* (AC1/W3) MMC0_DAT5 */
> - AM62X_IOPAD(0x1fc, PIN_INPUT, 0) /* (AD2/W4) MMC0_DAT6 */
> - AM62X_IOPAD(0x1f8, PIN_INPUT, 0) /* (AC2/V4) MMC0_DAT7 */
> - >;
> - };
> -
> - main_mmc1_pins_default: main-mmc1-default-pins {
> - bootph-all;
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x23c, PIN_INPUT, 0) /* (A21/C18) MMC1_CMD */
> - AM62X_IOPAD(0x234, PIN_INPUT, 0) /* (B22/A20) MMC1_CLK */
> - AM62X_IOPAD(0x230, PIN_INPUT, 0) /* (A22/A19) MMC1_DAT0 */
> - AM62X_IOPAD(0x22c, PIN_INPUT, 0) /* (B21/B19) MMC1_DAT1 */
> - AM62X_IOPAD(0x228, PIN_INPUT, 0) /* (C21/B20) MMC1_DAT2 */
> - AM62X_IOPAD(0x224, PIN_INPUT, 0) /* (D22/C19) MMC1_DAT3 */
> - AM62X_IOPAD(0x240, PIN_INPUT, 0) /* (D17/C15) MMC1_SDCD */
> - >;
> - };
> -
> - usr_led_pins_default: usr-led-default-pins {
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x244, PIN_OUTPUT, 7) /* (C17/B15) MMC1_SDWP.GPIO1_49 */
> - >;
> - };
> -
> - main_mdio1_pins_default: main-mdio1-default-pins {
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x160, PIN_OUTPUT, 0) /* (AD24/V17) MDIO0_MDC */
> - AM62X_IOPAD(0x15c, PIN_INPUT, 0) /* (AB22/U16) MDIO0_MDIO */
> - >;
> - };
> -
> - main_rgmii1_pins_default: main-rgmii1-default-pins {
> - bootph-all;
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x14c, PIN_INPUT, 0) /* (AB17/W15) RGMII1_RD0 */
> - AM62X_IOPAD(0x150, PIN_INPUT, 0) /* (AC17/Y16) RGMII1_RD1 */
> - AM62X_IOPAD(0x154, PIN_INPUT, 0) /* (AB16/AA17) RGMII1_RD2 */
> - AM62X_IOPAD(0x158, PIN_INPUT, 0) /* (AA15/Y15) RGMII1_RD3 */
> - AM62X_IOPAD(0x148, PIN_INPUT, 0) /* (AD17/AA16) RGMII1_RXC */
> - AM62X_IOPAD(0x144, PIN_INPUT, 0) /* (AE17/W14) RGMII1_RX_CTL */
> - AM62X_IOPAD(0x134, PIN_OUTPUT, 0) /* (AE20/U14) RGMII1_TD0 */
> - AM62X_IOPAD(0x138, PIN_OUTPUT, 0) /* (AD20/AA19) RGMII1_TD1 */
> - AM62X_IOPAD(0x13c, PIN_OUTPUT, 0) /* (AE18/Y17) RGMII1_TD2 */
> - AM62X_IOPAD(0x140, PIN_OUTPUT, 0) /* (AD18/AA18) RGMII1_TD3 */
> - AM62X_IOPAD(0x130, PIN_OUTPUT, 0) /* (AE19/W16) RGMII1_TXC */
> - AM62X_IOPAD(0x12c, PIN_OUTPUT, 0) /* (AD19/V15) RGMII1_TX_CTL */
> - >;
> - };
> -
> - main_usb1_pins_default: main-usb1-default-pins {
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18/E16) USB1_DRVVBUS */
> - >;
> - };
> -
> - main_mcasp1_pins_default: main-mcasp1-default-pins {
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x090, PIN_INPUT, 2) /* (M24/K17) GPMC0_BE0N_CLE.MCASP1_ACLKX */
> - AM62X_IOPAD(0x098, PIN_INPUT, 2) /* (U23/P21) GPMC0_WAIT0.MCASP1_AFSX */
> - AM62X_IOPAD(0x08c, PIN_OUTPUT, 2) /* (L25/J17) GPMC0_WEN.MCASP1_AXR0 */
> - AM62X_IOPAD(0x084, PIN_INPUT, 2) /* (L23/K20) GPMC0_ADVN_ALE.MCASP1_AXR2 */
> - >;
> - };
> -
> - main_dss0_pins_default: main-dss0-default-pins {
> - pinctrl-single,pins = <
> - AM62X_IOPAD(0x100, PIN_OUTPUT, 0) /* (AC25) VOUT0_VSYNC */
> - AM62X_IOPAD(0x0f8, PIN_OUTPUT, 0) /* (AB24) VOUT0_HSYNC */
> - AM62X_IOPAD(0x104, PIN_OUTPUT, 0) /* (AC24) VOUT0_PCLK */
> - AM62X_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (Y20) VOUT0_DE */
> - AM62X_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */
> - AM62X_IOPAD(0x0bc, PIN_OUTPUT, 0) /* (V24) VOUT0_DATA1 */
> - AM62X_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (W25) VOUT0_DATA2 */
> - AM62X_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (W24) VOUT0_DATA3 */
> - AM62X_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (Y25) VOUT0_DATA4 */
> - AM62X_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (Y24) VOUT0_DATA5 */
> - AM62X_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (Y23) VOUT0_DATA6 */
> - AM62X_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (AA25) VOUT0_DATA7 */
> - AM62X_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA8 */
> - AM62X_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA9 */
> - AM62X_IOPAD(0x0e0, PIN_OUTPUT, 0) /* (V20) VOUT0_DATA10 */
> - AM62X_IOPAD(0x0e4, PIN_OUTPUT, 0) /* (AA23) VOUT0_DATA11 */
> - AM62X_IOPAD(0x0e8, PIN_OUTPUT, 0) /* (AB25) VOUT0_DATA12 */
> - AM62X_IOPAD(0x0ec, PIN_OUTPUT, 0) /* (AA24) VOUT0_DATA13 */
> - AM62X_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA14 */
> - AM62X_IOPAD(0x0f4, PIN_OUTPUT, 0) /* (AA21) VOUT0_DATA15 */
> - AM62X_IOPAD(0x05c, PIN_OUTPUT, 1) /* (R24) GPMC0_AD8.VOUT0_DATA16 */
> - AM62X_IOPAD(0x060, PIN_OUTPUT, 1) /* (R25) GPMC0_AD9.VOUT0_DATA17 */
> - AM62X_IOPAD(0x064, PIN_OUTPUT, 1) /* (T25) GPMC0_AD10.VOUT0_DATA18 */
> - AM62X_IOPAD(0x068, PIN_OUTPUT, 1) /* (R21) GPMC0_AD11.VOUT0_DATA19 */
> - AM62X_IOPAD(0x06c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */
> - AM62X_IOPAD(0x070, PIN_OUTPUT, 1) /* (T24) GPMC0_AD13.VOUT0_DATA21 */
> - AM62X_IOPAD(0x074, PIN_OUTPUT, 1) /* (U25) GPMC0_AD14.VOUT0_DATA22 */
> - AM62X_IOPAD(0x078, PIN_OUTPUT, 1) /* (U24) GPMC0_AD15.VOUT0_DATA23 */
> - >;
> - };
> -};
> -
> -&mcu_pmx0 {
> - wkup_uart0_pins_default: wkup-uart0-default-pins {
> - bootph-pre-ram;
> - pinctrl-single,pins = <
> - AM62X_MCU_IOPAD(0x02c, PIN_INPUT, 0) /* (C6/A7) WKUP_UART0_CTSn */
> - AM62X_MCU_IOPAD(0x030, PIN_OUTPUT, 0) /* (A4/B4) WKUP_UART0_RTSn */
> - AM62X_MCU_IOPAD(0x024, PIN_INPUT, 0) /* (B4/B5) WKUP_UART0_RXD */
> - AM62X_MCU_IOPAD(0x028, PIN_OUTPUT, 0) /* (C5/C6) WKUP_UART0_TXD */
> - >;
> - };
> -};
> -
> -&wkup_uart0 {
> - /* WKUP UART0 is used by DM firmware */
> - bootph-pre-ram;
> - status = "reserved";
> - pinctrl-names = "default";
> - pinctrl-0 = <&wkup_uart0_pins_default>;
> -};
> -
> -&main_uart0 {
> - bootph-all;
> - status = "okay";
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_uart0_pins_default>;
> -};
> -
> -&main_uart1 {
> - /* Main UART1 is used by TIFS firmware */
> - bootph-pre-ram;
> - status = "reserved";
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_uart1_pins_default>;
> -};
> -
> -&main_i2c0 {
> - status = "okay";
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_i2c0_pins_default>;
> - clock-frequency = <400000>;
> -
> - eeprom@51 {
> - /* AT24C512C-MAHM-T or M24512-DFMC6TG */
> - compatible = "atmel,24c512";
> - reg = <0x51>;
> - };
> -
> - typec_pd0: tps6598x@3f {
> - compatible = "ti,tps6598x";
> - reg = <0x3f>;
> -
> - connector {
> - compatible = "usb-c-connector";
> - label = "USB-C";
> - self-powered;
> - data-role = "dual";
> - power-role = "sink";
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> - usb_con_hs: endpoint {
> - remote-endpoint = <&usb0_hs_ep>;
> - };
> - };
> - };
> - };
> - };
> -};
> -
> -&main_i2c1 {
> - status = "okay";
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_i2c1_pins_default>;
> - clock-frequency = <100000>;
> -
> - tlv320aic3106: audio-codec@1b {
> - #sound-dai-cells = <0>;
> - compatible = "ti,tlv320aic3106";
> - reg = <0x1b>;
> - ai3x-micbias-vg = <1>; /* 2.0V */
> -
> - /* Regulators */
> - AVDD-supply = <&vcc_3v3_sys>;
> - IOVDD-supply = <&vcc_3v3_sys>;
> - DRVDD-supply = <&vcc_3v3_sys>;
> - };
> -
> - sii9022: bridge-hdmi@3b {
> - compatible = "sil,sii9022";
> - reg = <0x3b>;
> - interrupt-parent = <&exp1>;
> - interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
> - #sound-dai-cells = <0>;
> - sil,i2s-data-lanes = < 0 >;
> -
> - ports {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - port@0 {
> - reg = <0>;
> -
> - sii9022_in: endpoint {
> - remote-endpoint = <&dpi1_out>;
> - };
> - };
> -
> - port@1 {
> - reg = <1>;
> -
> - sii9022_out: endpoint {
> - remote-endpoint = <&hdmi_connector_in>;
> - };
> - };
> - };
> - };
> -};
> -
> -&main_i2c2 {
> - status = "okay";
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_i2c2_pins_default>;
> - clock-frequency = <400000>;
> -};
> -
> -&sdhci0 {
> - bootph-all;
> - status = "okay";
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_mmc0_pins_default>;
> - disable-wp;
> -};
> -
> -&sdhci1 {
> - /* SD/MMC */
> - bootph-all;
> - status = "okay";
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_mmc1_pins_default>;
> - disable-wp;
> -};
> -
> -&cpsw3g {
> - bootph-all;
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_rgmii1_pins_default>;
> -};
> -
> -&cpsw_port1 {
> - bootph-all;
> - phy-mode = "rgmii-rxid";
> - phy-handle = <&cpsw3g_phy0>;
> -};
> -
> -&cpsw3g_mdio {
> - bootph-all;
> - status = "okay";
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_mdio1_pins_default>;
> -
> - cpsw3g_phy0: ethernet-phy@0 {
> - bootph-all;
> - reg = <0>;
> - ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
> - ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
> - ti,min-output-impedance;
> - };
> -};
> -
> -&mailbox0_cluster0 {
> - mbox_m4_0: mbox-m4-0 {
> - ti,mbox-rx = <0 0 0>;
> - ti,mbox-tx = <1 0 0>;
> - };
> -};
> -
> -&usbss0 {
> - bootph-all;
> - status = "okay";
> - ti,vbus-divider;
> -};
> -
> -&usbss1 {
> - status = "okay";
> - ti,vbus-divider;
> -};
> -
> -&usb0 {
> - bootph-all;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - usb-role-switch;
> -
> - port@0 {
> - reg = <0>;
> - usb0_hs_ep: endpoint {
> - remote-endpoint = <&usb_con_hs>;
> - };
> - };
> -};
> -
> -&usb1 {
> - dr_mode = "host";
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_usb1_pins_default>;
> -};
> -
> -&mcasp1 {
> - status = "okay";
> - #sound-dai-cells = <0>;
> -
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_mcasp1_pins_default>;
> -
> - op-mode = <0>; /* MCASP_IIS_MODE */
> - tdm-slots = <2>;
> -
> - serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
> - 1 0 2 0
> - 0 0 0 0
> - 0 0 0 0
> - 0 0 0 0
> - >;
> - tx-num-evt = <32>;
> - rx-num-evt = <32>;
> -};
> -
> -&dss {
> - status = "okay";
> - pinctrl-names = "default";
> - pinctrl-0 = <&main_dss0_pins_default>;
> -};
> -
> -&dss_ports {
> - /* VP2: DPI Output */
> - port@1 {
> - reg = <1>;
> -
> - dpi1_out: endpoint {
> - remote-endpoint = <&sii9022_in>;
> - };
> - };
> -};
> -
> -/* mcu_gpio0 and mcu_gpio_intr are reserved for mcu firmware usage */
> -&mcu_gpio0 {
> - status = "reserved";
> -};
> -
> -&mcu_gpio_intr {
> - status = "reserved";
> -};
> diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig
> index 16294a6a7940..9bfe1560275c 100644
> --- a/configs/am62x_evm_a53_defconfig
> +++ b/configs/am62x_evm_a53_defconfig
> @@ -10,7 +10,7 @@ CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y
> CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80b80000
> CONFIG_SF_DEFAULT_SPEED=25000000
> CONFIG_SPL_DM_SPI=y
> -CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk"
> +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am625-sk"
> CONFIG_SPL_TEXT_BASE=0x80080000
> CONFIG_OF_LIBFDT_OVERLAY=y
> CONFIG_DM_RESET=y
> @@ -56,6 +56,7 @@ CONFIG_CMD_EFIDEBUG=y
> CONFIG_MMC_SPEED_MODE_SET=y
> CONFIG_OF_CONTROL=y
> CONFIG_SPL_OF_CONTROL=y
> +CONFIG_OF_UPSTREAM=y
> CONFIG_MULTI_DTB_FIT=y
> CONFIG_SPL_MULTI_DTB_FIT=y
> CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
> --
> 2.43.0
next prev parent reply other threads:[~2024-06-07 7:18 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-05 15:27 [PATCH 0/3] arm: dts: am625/am62a7: Switch over to OF_UPSTREAM Nishanth Menon
2024-06-05 15:27 ` [PATCH 1/3] arm: dts: am625_beagleplay: Switch " Nishanth Menon
2024-06-06 9:24 ` Mattijs Korpershoek
2024-06-05 15:27 ` [PATCH 2/3] arm: dts: am625_sk: " Nishanth Menon
2024-06-07 7:18 ` Mattijs Korpershoek [this message]
2024-06-05 15:27 ` [PATCH 3/3] arm: dts: am62a7_sk: " Nishanth Menon
2024-06-05 18:41 ` [PATCH 0/3] arm: dts: am625/am62a7: Switch over " Dhruva Gole
2024-06-06 18:46 ` Bryan Brattlof
2024-06-18 14:53 ` Tom Rini
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