From: Marc Zyngier <maz@kernel.org>
To: Hector Martin <marcan@marcan.st>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh+dt@kernel.org>, Sven Peter <sven@svenpeter.dev>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 5/6] irqchip/apple-aic: Support multiple dies
Date: Mon, 13 Dec 2021 16:10:14 +0000 [thread overview]
Message-ID: <87mtl4jxjt.wl-maz@kernel.org> (raw)
In-Reply-To: <20211209043249.65474-6-marcan@marcan.st>
On Thu, 09 Dec 2021 04:32:48 +0000,
Hector Martin <marcan@marcan.st> wrote:
>
> Multi-die support in AICv2 uses several sets of IRQ registers. Introduce
> a die count and compute the register group offset based on the die ID
> field of the hwirq number, as reported by the hardware.
>
> Signed-off-by: Hector Martin <marcan@marcan.st>
> ---
> drivers/irqchip/irq-apple-aic.c | 75 +++++++++++++++++++++++----------
> 1 file changed, 53 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c
> index d03caed51d56..46b7750548a0 100644
> --- a/drivers/irqchip/irq-apple-aic.c
> +++ b/drivers/irqchip/irq-apple-aic.c
[...]
> @@ -535,28 +545,41 @@ static int aic_irq_domain_translate(struct irq_domain *id,
> unsigned int *type)
> {
> struct aic_irq_chip *ic = id->host_data;
> + u32 *args;
> + u32 die = 0;
>
> - if (fwspec->param_count != 3 || !is_of_node(fwspec->fwnode))
> + if (fwspec->param_count < 3 || fwspec->param_count > 4 ||
> + !is_of_node(fwspec->fwnode))
> return -EINVAL;
>
> + args = &fwspec->param[1];
> +
> + if (fwspec->param_count == 4) {
> + die = args[0];
> + args++;
> + }
> +
> switch (fwspec->param[0]) {
> case AIC_IRQ:
> - if (fwspec->param[1] >= ic->nr_irq)
> + if (die >= ic->nr_die)
> + return -EINVAL;
> + if (args[0] >= ic->nr_irq)
> return -EINVAL;
> - *hwirq = (FIELD_PREP(AIC_EVENT_TYPE, AIC_EVENT_TYPE_HW) |
> - FIELD_PREP(AIC_EVENT_NUM, fwspec->param[1]));
> + *hwirq = AIC_IRQ_HWIRQ(die, args[0]);
> break;
A side issue with this is that it breaks MSIs, due to the way we
construct the intspec (I did hit that when upgrading the M1 intspec to
4 cells for the PMU). I have the following hack locally:
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c
index b090924b41fe..f7b4a67b13cf 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -218,7 +218,7 @@ static int apple_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
if (hwirq < 0)
return -ENOSPC;
- fwspec.param[1] += hwirq;
+ fwspec.param[1 + (fwspec.param_count == 4)] += hwirq;
ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &fwspec);
if (ret)
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Hector Martin <marcan@marcan.st>
Cc: Thomas Gleixner <tglx@linutronix.de>,
Rob Herring <robh+dt@kernel.org>, Sven Peter <sven@svenpeter.dev>,
Alyssa Rosenzweig <alyssa@rosenzweig.io>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 5/6] irqchip/apple-aic: Support multiple dies
Date: Mon, 13 Dec 2021 16:10:14 +0000 [thread overview]
Message-ID: <87mtl4jxjt.wl-maz@kernel.org> (raw)
In-Reply-To: <20211209043249.65474-6-marcan@marcan.st>
On Thu, 09 Dec 2021 04:32:48 +0000,
Hector Martin <marcan@marcan.st> wrote:
>
> Multi-die support in AICv2 uses several sets of IRQ registers. Introduce
> a die count and compute the register group offset based on the die ID
> field of the hwirq number, as reported by the hardware.
>
> Signed-off-by: Hector Martin <marcan@marcan.st>
> ---
> drivers/irqchip/irq-apple-aic.c | 75 +++++++++++++++++++++++----------
> 1 file changed, 53 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/irqchip/irq-apple-aic.c b/drivers/irqchip/irq-apple-aic.c
> index d03caed51d56..46b7750548a0 100644
> --- a/drivers/irqchip/irq-apple-aic.c
> +++ b/drivers/irqchip/irq-apple-aic.c
[...]
> @@ -535,28 +545,41 @@ static int aic_irq_domain_translate(struct irq_domain *id,
> unsigned int *type)
> {
> struct aic_irq_chip *ic = id->host_data;
> + u32 *args;
> + u32 die = 0;
>
> - if (fwspec->param_count != 3 || !is_of_node(fwspec->fwnode))
> + if (fwspec->param_count < 3 || fwspec->param_count > 4 ||
> + !is_of_node(fwspec->fwnode))
> return -EINVAL;
>
> + args = &fwspec->param[1];
> +
> + if (fwspec->param_count == 4) {
> + die = args[0];
> + args++;
> + }
> +
> switch (fwspec->param[0]) {
> case AIC_IRQ:
> - if (fwspec->param[1] >= ic->nr_irq)
> + if (die >= ic->nr_die)
> + return -EINVAL;
> + if (args[0] >= ic->nr_irq)
> return -EINVAL;
> - *hwirq = (FIELD_PREP(AIC_EVENT_TYPE, AIC_EVENT_TYPE_HW) |
> - FIELD_PREP(AIC_EVENT_NUM, fwspec->param[1]));
> + *hwirq = AIC_IRQ_HWIRQ(die, args[0]);
> break;
A side issue with this is that it breaks MSIs, due to the way we
construct the intspec (I did hit that when upgrading the M1 intspec to
4 cells for the PMU). I have the following hack locally:
diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/pcie-apple.c
index b090924b41fe..f7b4a67b13cf 100644
--- a/drivers/pci/controller/pcie-apple.c
+++ b/drivers/pci/controller/pcie-apple.c
@@ -218,7 +218,7 @@ static int apple_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
if (hwirq < 0)
return -ENOSPC;
- fwspec.param[1] += hwirq;
+ fwspec.param[1 + (fwspec.param_count == 4)] += hwirq;
ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, &fwspec);
if (ret)
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2021-12-13 16:12 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-12-09 4:32 [PATCH 0/6] irqchip/apple-aic: Add support for AICv2 Hector Martin
2021-12-09 4:32 ` Hector Martin
2021-12-09 4:32 ` [PATCH 1/6] dt-bindings: interrupt-controller: apple, aic: Add apple, aic2 support Hector Martin
2021-12-09 4:32 ` [PATCH 1/6] dt-bindings: interrupt-controller: apple,aic: Add apple,aic2 support Hector Martin
2021-12-09 17:28 ` Rob Herring
2021-12-09 17:28 ` Rob Herring
2021-12-11 12:28 ` Hector Martin
2021-12-11 12:28 ` Hector Martin
2021-12-11 12:44 ` [PATCH 1/6] dt-bindings: interrupt-controller: apple, aic: Add apple, aic2 support Marc Zyngier
2021-12-11 12:44 ` [PATCH 1/6] dt-bindings: interrupt-controller: apple,aic: Add apple,aic2 support Marc Zyngier
2021-12-11 12:52 ` Hector Martin
2021-12-11 12:52 ` Hector Martin
2021-12-11 12:49 ` Mark Kettenis
2021-12-11 12:49 ` Mark Kettenis
2021-12-09 4:32 ` [PATCH 2/6] irqchip/apple-aic: Add Fast IPI support Hector Martin
2021-12-09 4:32 ` Hector Martin
2021-12-12 12:21 ` Marc Zyngier
2021-12-12 12:21 ` Marc Zyngier
2021-12-18 5:31 ` Hector Martin
2021-12-18 5:31 ` Hector Martin
2021-12-20 12:43 ` Marc Zyngier
2021-12-20 12:43 ` Marc Zyngier
2021-12-09 4:32 ` [PATCH 3/6] irqchip/apple-aic: Switch to irq_domain_create_tree and sparse hwirqs Hector Martin
2021-12-09 4:32 ` Hector Martin
2021-12-12 14:37 ` Marc Zyngier
2021-12-12 14:37 ` Marc Zyngier
2021-12-18 5:36 ` Hector Martin
2021-12-18 5:36 ` Hector Martin
2021-12-09 4:32 ` [PATCH 4/6] irqchip/apple-aic: Dynamically compute register offsets Hector Martin
2021-12-09 4:32 ` Hector Martin
2021-12-12 18:26 ` Marc Zyngier
2021-12-12 18:26 ` Marc Zyngier
2021-12-18 5:37 ` Hector Martin
2021-12-18 5:37 ` Hector Martin
2021-12-09 4:32 ` [PATCH 5/6] irqchip/apple-aic: Support multiple dies Hector Martin
2021-12-09 4:32 ` Hector Martin
2021-12-13 16:10 ` Marc Zyngier [this message]
2021-12-13 16:10 ` Marc Zyngier
2021-12-18 5:39 ` Hector Martin
2021-12-18 5:39 ` Hector Martin
2021-12-20 13:38 ` Marc Zyngier
2021-12-20 13:38 ` Marc Zyngier
2021-12-09 4:32 ` [PATCH 6/6] irqchip/apple-aic: Add support for AICv2 Hector Martin
2021-12-09 4:32 ` Hector Martin
2021-12-12 18:47 ` Marc Zyngier
2021-12-12 18:47 ` Marc Zyngier
2021-12-18 6:02 ` Hector Martin
2021-12-18 6:02 ` Hector Martin
2021-12-20 13:52 ` Marc Zyngier
2021-12-20 13:52 ` Marc Zyngier
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87mtl4jxjt.wl-maz@kernel.org \
--to=maz@kernel.org \
--cc=alyssa@rosenzweig.io \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=marcan@marcan.st \
--cc=robh+dt@kernel.org \
--cc=sven@svenpeter.dev \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.