From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: kernel-team@android.com, kvm@vger.kernel.org,
Will Deacon <will@kernel.org>,
kvmarm@lists.cs.columbia.edu,
linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH v2 2/5] KVM: arm64: Get rid of host SVE tracking/saving
Date: Tue, 23 Nov 2021 10:11:33 +0000 [thread overview]
Message-ID: <87mtlvchbe.wl-maz@kernel.org> (raw)
In-Reply-To: <YZvhuD7cVU/4AaFC@sirena.org.uk>
On Mon, 22 Nov 2021 18:30:16 +0000,
Mark Brown <broonie@kernel.org> wrote:
>
> On Mon, Nov 22, 2021 at 06:10:25PM +0000, Marc Zyngier wrote:
> > Mark Brown <broonie@kernel.org> wrote:
>
> > > While we're on the subject of potential future work we might in future
> > > want to not disable SVE on every syscall if (as seems likely) it turns
> > > out that that's more performant for small vector lengths
>
> > How are you going to retrofit that into userspace? This would be an
> > ABI change, and I'm not sure how you'd want to deal with that
> > transition...
>
> We don't need to change the ABI, the ABI just says we zero the registers
> that aren't shared with FPSIMD. Instead of doing that on taking a SVE
> access trap to reenable SVE after having disabled TIF_SVE we could do
> that during the syscall, userspace can't tell the difference other than
> via the different formats we use to report the SVE register set via
> ptrace if it single steps over a syscall. Even then I'm struggling to
> think of a scenario where userspace would be relying on that.
That's not the point I'm trying to make.
Userspace expects to have lost SVE information over a syscall (even if
the VL is 128, it expects to have lost P0..P15 and FFR). How do you
plan to tell userspace that this behaviour has changed?
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Zenghui Yu <yuzenghui@huawei.com>,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Quentin Perret <qperret@google.com>,
Will Deacon <will@kernel.org>,
kernel-team@android.com
Subject: Re: [PATCH v2 2/5] KVM: arm64: Get rid of host SVE tracking/saving
Date: Tue, 23 Nov 2021 10:11:33 +0000 [thread overview]
Message-ID: <87mtlvchbe.wl-maz@kernel.org> (raw)
In-Reply-To: <YZvhuD7cVU/4AaFC@sirena.org.uk>
On Mon, 22 Nov 2021 18:30:16 +0000,
Mark Brown <broonie@kernel.org> wrote:
>
> On Mon, Nov 22, 2021 at 06:10:25PM +0000, Marc Zyngier wrote:
> > Mark Brown <broonie@kernel.org> wrote:
>
> > > While we're on the subject of potential future work we might in future
> > > want to not disable SVE on every syscall if (as seems likely) it turns
> > > out that that's more performant for small vector lengths
>
> > How are you going to retrofit that into userspace? This would be an
> > ABI change, and I'm not sure how you'd want to deal with that
> > transition...
>
> We don't need to change the ABI, the ABI just says we zero the registers
> that aren't shared with FPSIMD. Instead of doing that on taking a SVE
> access trap to reenable SVE after having disabled TIF_SVE we could do
> that during the syscall, userspace can't tell the difference other than
> via the different formats we use to report the SVE register set via
> ptrace if it single steps over a syscall. Even then I'm struggling to
> think of a scenario where userspace would be relying on that.
That's not the point I'm trying to make.
Userspace expects to have lost SVE information over a syscall (even if
the VL is 128, it expects to have lost P0..P15 and FFR). How do you
plan to tell userspace that this behaviour has changed?
M.
--
Without deviation from the norm, progress is not possible.
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Zenghui Yu <yuzenghui@huawei.com>,
kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
James Morse <james.morse@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Alexandru Elisei <alexandru.elisei@arm.com>,
Quentin Perret <qperret@google.com>,
Will Deacon <will@kernel.org>,
kernel-team@android.com
Subject: Re: [PATCH v2 2/5] KVM: arm64: Get rid of host SVE tracking/saving
Date: Tue, 23 Nov 2021 10:11:33 +0000 [thread overview]
Message-ID: <87mtlvchbe.wl-maz@kernel.org> (raw)
In-Reply-To: <YZvhuD7cVU/4AaFC@sirena.org.uk>
On Mon, 22 Nov 2021 18:30:16 +0000,
Mark Brown <broonie@kernel.org> wrote:
>
> On Mon, Nov 22, 2021 at 06:10:25PM +0000, Marc Zyngier wrote:
> > Mark Brown <broonie@kernel.org> wrote:
>
> > > While we're on the subject of potential future work we might in future
> > > want to not disable SVE on every syscall if (as seems likely) it turns
> > > out that that's more performant for small vector lengths
>
> > How are you going to retrofit that into userspace? This would be an
> > ABI change, and I'm not sure how you'd want to deal with that
> > transition...
>
> We don't need to change the ABI, the ABI just says we zero the registers
> that aren't shared with FPSIMD. Instead of doing that on taking a SVE
> access trap to reenable SVE after having disabled TIF_SVE we could do
> that during the syscall, userspace can't tell the difference other than
> via the different formats we use to report the SVE register set via
> ptrace if it single steps over a syscall. Even then I'm struggling to
> think of a scenario where userspace would be relying on that.
That's not the point I'm trying to make.
Userspace expects to have lost SVE information over a syscall (even if
the VL is 128, it expects to have lost P0..P15 and FFR). How do you
plan to tell userspace that this behaviour has changed?
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2021-11-23 10:11 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-28 11:16 [PATCH v2 0/5] KVM: arm64: Rework FPSIMD/SVE tracking Marc Zyngier
2021-10-28 11:16 ` Marc Zyngier
2021-10-28 11:16 ` Marc Zyngier
2021-10-28 11:16 ` [PATCH v2 1/5] KVM: arm64: Reorder vcpu flag definitions Marc Zyngier
2021-10-28 11:16 ` Marc Zyngier
2021-10-28 11:16 ` Marc Zyngier
2021-10-28 11:16 ` [PATCH v2 2/5] KVM: arm64: Get rid of host SVE tracking/saving Marc Zyngier
2021-10-28 11:16 ` Marc Zyngier
2021-10-28 11:16 ` Marc Zyngier
2021-10-28 13:02 ` Mark Brown
2021-10-28 13:02 ` Mark Brown
2021-10-28 13:02 ` Mark Brown
2021-11-10 13:19 ` Zenghui Yu
2021-11-10 13:19 ` Zenghui Yu
2021-11-10 13:19 ` Zenghui Yu
2021-11-22 15:57 ` Marc Zyngier
2021-11-22 15:57 ` Marc Zyngier
2021-11-22 15:57 ` Marc Zyngier
2021-11-22 17:58 ` Mark Brown
2021-11-22 17:58 ` Mark Brown
2021-11-22 17:58 ` Mark Brown
2021-11-22 18:10 ` Marc Zyngier
2021-11-22 18:10 ` Marc Zyngier
2021-11-22 18:10 ` Marc Zyngier
2021-11-22 18:30 ` Mark Brown
2021-11-22 18:30 ` Mark Brown
2021-11-22 18:30 ` Mark Brown
2021-11-23 10:11 ` Marc Zyngier [this message]
2021-11-23 10:11 ` Marc Zyngier
2021-11-23 10:11 ` Marc Zyngier
2021-11-23 12:33 ` Mark Brown
2021-11-23 12:33 ` Mark Brown
2021-11-23 12:33 ` Mark Brown
2021-10-28 11:16 ` [PATCH v2 3/5] KVM: arm64: Introduce flag shadowing TIF_FOREIGN_FPSTATE Marc Zyngier
2021-10-28 11:16 ` Marc Zyngier
2021-10-28 11:16 ` Marc Zyngier
2021-10-28 11:16 ` [PATCH v2 4/5] KVM: arm64: Stop mapping current thread_info at EL2 Marc Zyngier
2021-10-28 11:16 ` Marc Zyngier
2021-10-28 11:16 ` Marc Zyngier
2021-10-28 11:16 ` [PATCH v2 5/5] arm64/fpsimd: Document the use of TIF_FOREIGN_FPSTATE by KVM Marc Zyngier
2021-10-28 11:16 ` Marc Zyngier
2021-10-28 11:16 ` Marc Zyngier
2021-10-28 13:14 ` Mark Brown
2021-10-28 13:14 ` Mark Brown
2021-10-28 13:14 ` Mark Brown
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