[PATCH 1/3] drm/i915: Add a wakeref getter for iff the wakeref is already active

[PATCH 1/3] drm/i915: Add a wakeref getter for iff the wakeref is already active

[Chris Wilson]

For use in the next patch, we want to acquire a wakeref without having
to wake the device up -- i.e. only acquire the engine wakeref if the
engine is already active.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_engine_pm.h |  7 ++++++-
 drivers/gpu/drm/i915/intel_wakeref.h      | 15 +++++++++++++++
 2 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.h b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
index f3f5b031b4a1..7d057cdcd919 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
@@ -11,7 +11,6 @@
 #include "intel_wakeref.h"
 
 struct drm_i915_private;
-struct intel_engine_cs;
 
 void intel_engine_pm_get(struct intel_engine_cs *engine);
 void intel_engine_pm_put(struct intel_engine_cs *engine);
@@ -22,6 +21,12 @@ intel_engine_pm_is_awake(const struct intel_engine_cs *engine)
 	return intel_wakeref_is_active(&engine->wakeref);
 }
 
+static inline bool
+intel_engine_pm_get_if_awake(struct intel_engine_cs *engine)
+{
+	return intel_wakeref_get_if_active(&engine->wakeref);
+}
+
 void intel_engine_park(struct intel_engine_cs *engine);
 
 void intel_engine_init__pm(struct intel_engine_cs *engine);
diff --git a/drivers/gpu/drm/i915/intel_wakeref.h b/drivers/gpu/drm/i915/intel_wakeref.h
index f74272770a5c..1d6f5986e4e5 100644
--- a/drivers/gpu/drm/i915/intel_wakeref.h
+++ b/drivers/gpu/drm/i915/intel_wakeref.h
@@ -71,6 +71,21 @@ intel_wakeref_get(struct intel_runtime_pm *rpm,
 	return 0;
 }
 
+/**
+ * intel_wakeref_get_if_in_use: Acquire the wakeref
+ * @wf: the wakeref
+ *
+ * Acquire a hold on the wakeref, but only if the wakeref is already
+ * active.
+ *
+ * Returns: true if the wakeref was acquired, false otherwise.
+ */
+static inline bool
+intel_wakeref_get_if_active(struct intel_wakeref *wf)
+{
+	return atomic_inc_not_zero(&wf->count);
+}
+
 /**
  * intel_wakeref_put: Release the wakeref
  * @i915: the drm_i915_private device
-- 
2.20.1

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[PATCH 2/3] drm/i915: Only recover active engines

[Chris Wilson]

If we issue a reset to a currently idle engine, leave it idle
afterwards. This is useful to excise a linkage between reset and the
shrinker. When waking the engine, we need to pin the default context
image which we use for overwriting a guilty context -- if the engine is
idle we do not need this pinned image! However, this pinning means that
waking the engine acquires the FS_RECLAIM, and so may trigger the
shrinker. The shrinker itself may need to wait upon the GPU to unbind
and object and so may require services of reset; ergo we should avoid
the engine wake up path.

The danger in skipping the recovery for idle engines is that we leave the
engine with no context defined, which may interfere with the operation of
the power context on some older platforms. In practice, we should only
be resetting an active GPU but it something to look out for on Ironlake
(if memory serves).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_reset.c    | 37 ++++++++++++++----------
 drivers/gpu/drm/i915/gt/selftest_reset.c |  6 ++--
 2 files changed, 26 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 8ce92c51564e..e7cbd9cf85c1 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -678,7 +678,6 @@ static void reset_prepare_engine(struct intel_engine_cs *engine)
 	 * written to the powercontext is undefined and so we may lose
 	 * GPU state upon resume, i.e. fail to restart after a reset.
 	 */
-	intel_engine_pm_get(engine);
 	intel_uncore_forcewake_get(engine->uncore, FORCEWAKE_ALL);
 	engine->reset.prepare(engine);
 }
@@ -709,16 +708,21 @@ static void revoke_mmaps(struct drm_i915_private *i915)
 	}
 }
 
-static void reset_prepare(struct drm_i915_private *i915)
+static intel_engine_mask_t reset_prepare(struct drm_i915_private *i915)
 {
 	struct intel_engine_cs *engine;
+	intel_engine_mask_t awake = 0;
 	enum intel_engine_id id;
 
-	intel_gt_pm_get(&i915->gt);
-	for_each_engine(engine, i915, id)
+	for_each_engine(engine, i915, id) {
+		if (intel_engine_pm_get_if_awake(engine))
+			awake |= engine->mask;
 		reset_prepare_engine(engine);
+	}
 
 	intel_uc_reset_prepare(i915);
+
+	return awake;
 }
 
 static void gt_revoke(struct drm_i915_private *i915)
@@ -752,20 +756,22 @@ static int gt_reset(struct drm_i915_private *i915,
 static void reset_finish_engine(struct intel_engine_cs *engine)
 {
 	engine->reset.finish(engine);
-	intel_engine_pm_put(engine);
 	intel_uncore_forcewake_put(engine->uncore, FORCEWAKE_ALL);
+
+	intel_engine_signal_breadcrumbs(engine);
 }
 
-static void reset_finish(struct drm_i915_private *i915)
+static void reset_finish(struct drm_i915_private *i915,
+			 intel_engine_mask_t awake)
 {
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
 
 	for_each_engine(engine, i915, id) {
 		reset_finish_engine(engine);
-		intel_engine_signal_breadcrumbs(engine);
+		if (awake & engine->mask)
+			intel_engine_pm_put(engine);
 	}
-	intel_gt_pm_put(&i915->gt);
 }
 
 static void nop_submit_request(struct i915_request *request)
@@ -789,6 +795,7 @@ static void __i915_gem_set_wedged(struct drm_i915_private *i915)
 {
 	struct i915_gpu_error *error = &i915->gpu_error;
 	struct intel_engine_cs *engine;
+	intel_engine_mask_t awake;
 	enum intel_engine_id id;
 
 	if (test_bit(I915_WEDGED, &error->flags))
@@ -808,7 +815,7 @@ static void __i915_gem_set_wedged(struct drm_i915_private *i915)
 	 * rolling the global seqno forward (since this would complete requests
 	 * for which we haven't set the fence error to EIO yet).
 	 */
-	reset_prepare(i915);
+	awake = reset_prepare(i915);
 
 	/* Even if the GPU reset fails, it should still stop the engines */
 	if (!INTEL_INFO(i915)->gpu_reset_clobbers_display)
@@ -832,7 +839,7 @@ static void __i915_gem_set_wedged(struct drm_i915_private *i915)
 	for_each_engine(engine, i915, id)
 		engine->cancel_requests(engine);
 
-	reset_finish(i915);
+	reset_finish(i915, awake);
 
 	GEM_TRACE("end\n");
 }
@@ -964,6 +971,7 @@ void i915_reset(struct drm_i915_private *i915,
 		const char *reason)
 {
 	struct i915_gpu_error *error = &i915->gpu_error;
+	intel_engine_mask_t awake;
 	int ret;
 
 	GEM_TRACE("flags=%lx\n", error->flags);
@@ -980,7 +988,7 @@ void i915_reset(struct drm_i915_private *i915,
 		dev_notice(i915->drm.dev, "Resetting chip for %s\n", reason);
 	error->reset_count++;
 
-	reset_prepare(i915);
+	awake = reset_prepare(i915);
 
 	if (!intel_has_gpu_reset(i915)) {
 		if (i915_modparams.reset)
@@ -1021,7 +1029,7 @@ void i915_reset(struct drm_i915_private *i915,
 	i915_queue_hangcheck(i915);
 
 finish:
-	reset_finish(i915);
+	reset_finish(i915, awake);
 unlock:
 	mutex_unlock(&error->wedge_mutex);
 	return;
@@ -1072,7 +1080,7 @@ int i915_reset_engine(struct intel_engine_cs *engine, const char *msg)
 	GEM_TRACE("%s flags=%lx\n", engine->name, error->flags);
 	GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &error->flags));
 
-	if (!intel_engine_pm_is_awake(engine))
+	if (!intel_engine_pm_get_if_awake(engine))
 		return 0;
 
 	reset_prepare_engine(engine);
@@ -1107,12 +1115,11 @@ int i915_reset_engine(struct intel_engine_cs *engine, const char *msg)
 	 * process to program RING_MODE, HWSP and re-enable submission.
 	 */
 	ret = engine->resume(engine);
-	if (ret)
-		goto out;
 
 out:
 	intel_engine_cancel_stop_cs(engine);
 	reset_finish_engine(engine);
+	intel_engine_pm_put(engine);
 	return ret;
 }
 
diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c
index 641cf3aee8d5..672e32e1ef95 100644
--- a/drivers/gpu/drm/i915/gt/selftest_reset.c
+++ b/drivers/gpu/drm/i915/gt/selftest_reset.c
@@ -71,15 +71,17 @@ static int igt_atomic_reset(void *arg)
 		goto unlock;
 
 	for (p = igt_atomic_phases; p->name; p++) {
+		intel_engine_mask_t awake;
+
 		GEM_TRACE("intel_gpu_reset under %s\n", p->name);
 
-		reset_prepare(i915);
+		awake = reset_prepare(i915);
 		p->critical_section_begin();
 
 		err = intel_gpu_reset(i915, ALL_ENGINES);
 
 		p->critical_section_end();
-		reset_finish(i915);
+		reset_finish(i915, awake);
 
 		if (err) {
 			pr_err("intel_gpu_reset failed under %s\n", p->name);
-- 
2.20.1

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[PATCH 3/3] drm/i915: Lift intel_engines_resume() to callers

[Chris Wilson]

Since the reset path wants to recover the engines itself, it only wants
to reinitialise the hardware using i915_gem_init_hw(). Pull the call to
intel_engines_resume() to the module init/resume path so we can avoid it
during reset.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gem/i915_gem_pm.c    |  7 ++-
 drivers/gpu/drm/i915/gt/intel_engine_pm.c | 24 --------
 drivers/gpu/drm/i915/gt/intel_engine_pm.h |  2 -
 drivers/gpu/drm/i915/gt/intel_gt_pm.c     | 21 ++++++-
 drivers/gpu/drm/i915/gt/intel_gt_pm.h     |  2 +-
 drivers/gpu/drm/i915/gt/intel_reset.c     | 21 ++++++-
 drivers/gpu/drm/i915/i915_gem.c           | 71 +++++++----------------
 7 files changed, 65 insertions(+), 83 deletions(-)

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
index 6b730bd4d72f..4d774376f5b8 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
@@ -254,14 +254,15 @@ void i915_gem_resume(struct drm_i915_private *i915)
 	i915_gem_restore_gtt_mappings(i915);
 	i915_gem_restore_fences(i915);
 
+	if (i915_gem_init_hw(i915))
+		goto err_wedged;
+
 	/*
 	 * As we didn't flush the kernel context before suspend, we cannot
 	 * guarantee that the context image is complete. So let's just reset
 	 * it and start again.
 	 */
-	intel_gt_resume(&i915->gt);
-
-	if (i915_gem_init_hw(i915))
+	if (intel_gt_resume(&i915->gt))
 		goto err_wedged;
 
 	intel_uc_resume(i915);
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
index 5253c382034d..84e432abe8e0 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
@@ -142,27 +142,3 @@ void intel_engine_init__pm(struct intel_engine_cs *engine)
 {
 	intel_wakeref_init(&engine->wakeref);
 }
-
-int intel_engines_resume(struct drm_i915_private *i915)
-{
-	struct intel_engine_cs *engine;
-	enum intel_engine_id id;
-	int err = 0;
-
-	intel_gt_pm_get(&i915->gt);
-	for_each_engine(engine, i915, id) {
-		intel_engine_pm_get(engine);
-		engine->serial++; /* kernel context lost */
-		err = engine->resume(engine);
-		intel_engine_pm_put(engine);
-		if (err) {
-			dev_err(i915->drm.dev,
-				"Failed to restart %s (%d)\n",
-				engine->name, err);
-			break;
-		}
-	}
-	intel_gt_pm_put(&i915->gt);
-
-	return err;
-}
diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.h b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
index 7d057cdcd919..015ac72d7ad0 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
@@ -31,6 +31,4 @@ void intel_engine_park(struct intel_engine_cs *engine);
 
 void intel_engine_init__pm(struct intel_engine_cs *engine);
 
-int intel_engines_resume(struct drm_i915_private *i915);
-
 #endif /* INTEL_ENGINE_PM_H */
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
index ec6b69d014b6..36ba80e6a0b7 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
@@ -5,6 +5,7 @@
  */
 
 #include "i915_drv.h"
+#include "intel_engine_pm.h"
 #include "intel_gt_pm.h"
 #include "intel_pm.h"
 #include "intel_wakeref.h"
@@ -122,10 +123,11 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force)
 		intel_engine_reset(engine, false);
 }
 
-void intel_gt_resume(struct intel_gt *gt)
+int intel_gt_resume(struct intel_gt *gt)
 {
 	struct intel_engine_cs *engine;
 	enum intel_engine_id id;
+	int err = 0;
 
 	/*
 	 * After resume, we may need to poke into the pinned kernel
@@ -133,9 +135,12 @@ void intel_gt_resume(struct intel_gt *gt)
 	 * Only the kernel contexts should remain pinned over suspend,
 	 * allowing us to fixup the user contexts on their first pin.
 	 */
+	intel_gt_pm_get(gt);
 	for_each_engine(engine, gt->i915, id) {
 		struct intel_context *ce;
 
+		intel_engine_pm_get(engine);
+
 		ce = engine->kernel_context;
 		if (ce)
 			ce->ops->reset(ce);
@@ -143,5 +148,19 @@ void intel_gt_resume(struct intel_gt *gt)
 		ce = engine->preempt_context;
 		if (ce)
 			ce->ops->reset(ce);
+
+		engine->serial++; /* kernel context lost */
+		err = engine->resume(engine);
+
+		intel_engine_pm_put(engine);
+		if (err) {
+			dev_err(gt->i915->drm.dev,
+				"Failed to restart %s (%d)\n",
+				engine->name, err);
+			break;
+		}
 	}
+	intel_gt_pm_put(gt);
+
+	return err;
 }
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
index 4dbb92cf58d7..ba960e1fc209 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
@@ -22,6 +22,6 @@ void intel_gt_pm_put(struct intel_gt *gt);
 void intel_gt_pm_init_early(struct intel_gt *gt);
 
 void intel_gt_sanitize(struct intel_gt *gt, bool force);
-void intel_gt_resume(struct intel_gt *gt);
+int intel_gt_resume(struct intel_gt *gt);
 
 #endif /* INTEL_GT_PM_H */
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index e7cbd9cf85c1..adfdb908587f 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -949,6 +949,21 @@ static int do_reset(struct drm_i915_private *i915,
 	return gt_reset(i915, stalled_mask);
 }
 
+static int resume(struct drm_i915_private *i915)
+{
+	struct intel_engine_cs *engine;
+	enum intel_engine_id id;
+	int ret;
+
+	for_each_engine(engine, i915, id) {
+		ret = engine->resume(engine);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
 /**
  * i915_reset - reset chip after a hang
  * @i915: #drm_i915_private to reset
@@ -1023,9 +1038,13 @@ void i915_reset(struct drm_i915_private *i915,
 	if (ret) {
 		DRM_ERROR("Failed to initialise HW following reset (%d)\n",
 			  ret);
-		goto error;
+		goto taint;
 	}
 
+	ret = resume(i915);
+	if (ret)
+		goto taint;
+
 	i915_queue_hangcheck(i915);
 
 finish:
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index deecbe128e5b..b7f290b77f8f 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -46,7 +46,6 @@
 #include "gem/i915_gem_ioctls.h"
 #include "gem/i915_gem_pm.h"
 #include "gem/i915_gemfs.h"
-#include "gt/intel_engine_pm.h"
 #include "gt/intel_gt.h"
 #include "gt/intel_gt_pm.h"
 #include "gt/intel_mocs.h"
@@ -1192,12 +1191,17 @@ static void init_unused_rings(struct intel_gt *gt)
 	}
 }
 
-static int init_hw(struct intel_gt *gt)
+int i915_gem_init_hw(struct drm_i915_private *i915)
 {
-	struct drm_i915_private *i915 = gt->i915;
-	struct intel_uncore *uncore = gt->uncore;
+	struct intel_uncore *uncore = &i915->uncore;
+	struct intel_gt *gt = &i915->gt;
 	int ret;
 
+	BUG_ON(!i915->kernel_context);
+	ret = i915_terminally_wedged(i915);
+	if (ret)
+		return ret;
+
 	gt->last_init_time = ktime_get();
 
 	/* Double layer security blanket, see i915_gem_init() */
@@ -1248,51 +1252,10 @@ static int init_hw(struct intel_gt *gt)
 
 	intel_mocs_init_l3cc_table(gt);
 
-	intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
-
-	return 0;
-
-out:
-	intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
-
-	return ret;
-}
-
-int i915_gem_init_hw(struct drm_i915_private *i915)
-{
-	struct intel_uncore *uncore = &i915->uncore;
-	int ret;
-
-	BUG_ON(!i915->kernel_context);
-	ret = i915_terminally_wedged(i915);
-	if (ret)
-		return ret;
-
-	/* Double layer security blanket, see i915_gem_init() */
-	intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
-
-	ret = init_hw(&i915->gt);
-	if (ret)
-		goto err_init;
-
-	/* Only when the HW is re-initialised, can we replay the requests */
-	ret = intel_engines_resume(i915);
-	if (ret)
-		goto err_engines;
-
-	intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
-
 	intel_engines_set_scheduler_caps(i915);
 
-	return 0;
-
-err_engines:
-	intel_uc_fini_hw(i915);
-err_init:
+out:
 	intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
-
-	intel_engines_set_scheduler_caps(i915);
-
 	return ret;
 }
 
@@ -1524,6 +1487,11 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 	if (ret)
 		goto err_uc_init;
 
+	/* Only when the HW is re-initialised, can we replay the requests */
+	ret = intel_gt_resume(&dev_priv->gt);
+	if (ret)
+		goto err_init_hw;
+
 	/*
 	 * Despite its name intel_init_clock_gating applies both display
 	 * clock gating workarounds; GT mmio workarounds and the occasional
@@ -1537,20 +1505,20 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 
 	ret = intel_engines_verify_workarounds(dev_priv);
 	if (ret)
-		goto err_init_hw;
+		goto err_gt;
 
 	ret = __intel_engines_record_defaults(dev_priv);
 	if (ret)
-		goto err_init_hw;
+		goto err_gt;
 
 	if (i915_inject_load_failure()) {
 		ret = -ENODEV;
-		goto err_init_hw;
+		goto err_gt;
 	}
 
 	if (i915_inject_load_failure()) {
 		ret = -EIO;
-		goto err_init_hw;
+		goto err_gt;
 	}
 
 	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
@@ -1564,7 +1532,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 	 * HW as irrevisibly wedged, but keep enough state around that the
 	 * driver doesn't explode during runtime.
 	 */
-err_init_hw:
+err_gt:
 	mutex_unlock(&dev_priv->drm.struct_mutex);
 
 	i915_gem_set_wedged(dev_priv);
@@ -1574,6 +1542,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
 	i915_gem_drain_workqueue(dev_priv);
 
 	mutex_lock(&dev_priv->drm.struct_mutex);
+err_init_hw:
 	intel_uc_fini_hw(dev_priv);
 err_uc_init:
 	intel_uc_fini(dev_priv);
-- 
2.20.1

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Re: [PATCH 3/3] drm/i915: Lift intel_engines_resume() to callers

[Mika Kuoppala]

Chris Wilson <chris@chris-wilson.co.uk> writes:

> Since the reset path wants to recover the engines itself, it only wants
> to reinitialise the hardware using i915_gem_init_hw(). Pull the call to
> intel_engines_resume() to the module init/resume path so we can avoid it
> during reset.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>

Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/gem/i915_gem_pm.c    |  7 ++-
>  drivers/gpu/drm/i915/gt/intel_engine_pm.c | 24 --------
>  drivers/gpu/drm/i915/gt/intel_engine_pm.h |  2 -
>  drivers/gpu/drm/i915/gt/intel_gt_pm.c     | 21 ++++++-
>  drivers/gpu/drm/i915/gt/intel_gt_pm.h     |  2 +-
>  drivers/gpu/drm/i915/gt/intel_reset.c     | 21 ++++++-
>  drivers/gpu/drm/i915/i915_gem.c           | 71 +++++++----------------
>  7 files changed, 65 insertions(+), 83 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_pm.c b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> index 6b730bd4d72f..4d774376f5b8 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_pm.c
> @@ -254,14 +254,15 @@ void i915_gem_resume(struct drm_i915_private *i915)
>  	i915_gem_restore_gtt_mappings(i915);
>  	i915_gem_restore_fences(i915);
>  
> +	if (i915_gem_init_hw(i915))
> +		goto err_wedged;
> +
>  	/*
>  	 * As we didn't flush the kernel context before suspend, we cannot
>  	 * guarantee that the context image is complete. So let's just reset
>  	 * it and start again.
>  	 */
> -	intel_gt_resume(&i915->gt);
> -
> -	if (i915_gem_init_hw(i915))
> +	if (intel_gt_resume(&i915->gt))
>  		goto err_wedged;
>  
>  	intel_uc_resume(i915);
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.c b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> index 5253c382034d..84e432abe8e0 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.c
> @@ -142,27 +142,3 @@ void intel_engine_init__pm(struct intel_engine_cs *engine)
>  {
>  	intel_wakeref_init(&engine->wakeref);
>  }
> -
> -int intel_engines_resume(struct drm_i915_private *i915)
> -{
> -	struct intel_engine_cs *engine;
> -	enum intel_engine_id id;
> -	int err = 0;
> -
> -	intel_gt_pm_get(&i915->gt);
> -	for_each_engine(engine, i915, id) {
> -		intel_engine_pm_get(engine);
> -		engine->serial++; /* kernel context lost */
> -		err = engine->resume(engine);
> -		intel_engine_pm_put(engine);
> -		if (err) {
> -			dev_err(i915->drm.dev,
> -				"Failed to restart %s (%d)\n",
> -				engine->name, err);
> -			break;
> -		}
> -	}
> -	intel_gt_pm_put(&i915->gt);
> -
> -	return err;
> -}
> diff --git a/drivers/gpu/drm/i915/gt/intel_engine_pm.h b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
> index 7d057cdcd919..015ac72d7ad0 100644
> --- a/drivers/gpu/drm/i915/gt/intel_engine_pm.h
> +++ b/drivers/gpu/drm/i915/gt/intel_engine_pm.h
> @@ -31,6 +31,4 @@ void intel_engine_park(struct intel_engine_cs *engine);
>  
>  void intel_engine_init__pm(struct intel_engine_cs *engine);
>  
> -int intel_engines_resume(struct drm_i915_private *i915);
> -
>  #endif /* INTEL_ENGINE_PM_H */
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.c b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> index ec6b69d014b6..36ba80e6a0b7 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.c
> @@ -5,6 +5,7 @@
>   */
>  
>  #include "i915_drv.h"
> +#include "intel_engine_pm.h"
>  #include "intel_gt_pm.h"
>  #include "intel_pm.h"
>  #include "intel_wakeref.h"
> @@ -122,10 +123,11 @@ void intel_gt_sanitize(struct intel_gt *gt, bool force)
>  		intel_engine_reset(engine, false);
>  }
>  
> -void intel_gt_resume(struct intel_gt *gt)
> +int intel_gt_resume(struct intel_gt *gt)
>  {
>  	struct intel_engine_cs *engine;
>  	enum intel_engine_id id;
> +	int err = 0;
>  
>  	/*
>  	 * After resume, we may need to poke into the pinned kernel
> @@ -133,9 +135,12 @@ void intel_gt_resume(struct intel_gt *gt)
>  	 * Only the kernel contexts should remain pinned over suspend,
>  	 * allowing us to fixup the user contexts on their first pin.
>  	 */
> +	intel_gt_pm_get(gt);
>  	for_each_engine(engine, gt->i915, id) {
>  		struct intel_context *ce;
>  
> +		intel_engine_pm_get(engine);
> +
>  		ce = engine->kernel_context;
>  		if (ce)
>  			ce->ops->reset(ce);
> @@ -143,5 +148,19 @@ void intel_gt_resume(struct intel_gt *gt)
>  		ce = engine->preempt_context;
>  		if (ce)
>  			ce->ops->reset(ce);
> +
> +		engine->serial++; /* kernel context lost */
> +		err = engine->resume(engine);
> +
> +		intel_engine_pm_put(engine);
> +		if (err) {
> +			dev_err(gt->i915->drm.dev,
> +				"Failed to restart %s (%d)\n",
> +				engine->name, err);
> +			break;
> +		}
>  	}
> +	intel_gt_pm_put(gt);
> +
> +	return err;
>  }
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_pm.h b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> index 4dbb92cf58d7..ba960e1fc209 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_pm.h
> @@ -22,6 +22,6 @@ void intel_gt_pm_put(struct intel_gt *gt);
>  void intel_gt_pm_init_early(struct intel_gt *gt);
>  
>  void intel_gt_sanitize(struct intel_gt *gt, bool force);
> -void intel_gt_resume(struct intel_gt *gt);
> +int intel_gt_resume(struct intel_gt *gt);
>  
>  #endif /* INTEL_GT_PM_H */
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
> index e7cbd9cf85c1..adfdb908587f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -949,6 +949,21 @@ static int do_reset(struct drm_i915_private *i915,
>  	return gt_reset(i915, stalled_mask);
>  }
>  
> +static int resume(struct drm_i915_private *i915)
> +{
> +	struct intel_engine_cs *engine;
> +	enum intel_engine_id id;
> +	int ret;
> +
> +	for_each_engine(engine, i915, id) {
> +		ret = engine->resume(engine);
> +		if (ret)
> +			return ret;
> +	}
> +
> +	return 0;
> +}
> +
>  /**
>   * i915_reset - reset chip after a hang
>   * @i915: #drm_i915_private to reset
> @@ -1023,9 +1038,13 @@ void i915_reset(struct drm_i915_private *i915,
>  	if (ret) {
>  		DRM_ERROR("Failed to initialise HW following reset (%d)\n",
>  			  ret);
> -		goto error;
> +		goto taint;
>  	}
>  
> +	ret = resume(i915);
> +	if (ret)
> +		goto taint;
> +
>  	i915_queue_hangcheck(i915);
>  
>  finish:
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index deecbe128e5b..b7f290b77f8f 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -46,7 +46,6 @@
>  #include "gem/i915_gem_ioctls.h"
>  #include "gem/i915_gem_pm.h"
>  #include "gem/i915_gemfs.h"
> -#include "gt/intel_engine_pm.h"
>  #include "gt/intel_gt.h"
>  #include "gt/intel_gt_pm.h"
>  #include "gt/intel_mocs.h"
> @@ -1192,12 +1191,17 @@ static void init_unused_rings(struct intel_gt *gt)
>  	}
>  }
>  
> -static int init_hw(struct intel_gt *gt)
> +int i915_gem_init_hw(struct drm_i915_private *i915)
>  {
> -	struct drm_i915_private *i915 = gt->i915;
> -	struct intel_uncore *uncore = gt->uncore;
> +	struct intel_uncore *uncore = &i915->uncore;
> +	struct intel_gt *gt = &i915->gt;
>  	int ret;
>  
> +	BUG_ON(!i915->kernel_context);
> +	ret = i915_terminally_wedged(i915);
> +	if (ret)
> +		return ret;
> +
>  	gt->last_init_time = ktime_get();
>  
>  	/* Double layer security blanket, see i915_gem_init() */
> @@ -1248,51 +1252,10 @@ static int init_hw(struct intel_gt *gt)
>  
>  	intel_mocs_init_l3cc_table(gt);
>  
> -	intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
> -
> -	return 0;
> -
> -out:
> -	intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
> -
> -	return ret;
> -}
> -
> -int i915_gem_init_hw(struct drm_i915_private *i915)
> -{
> -	struct intel_uncore *uncore = &i915->uncore;
> -	int ret;
> -
> -	BUG_ON(!i915->kernel_context);
> -	ret = i915_terminally_wedged(i915);
> -	if (ret)
> -		return ret;
> -
> -	/* Double layer security blanket, see i915_gem_init() */
> -	intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL);
> -
> -	ret = init_hw(&i915->gt);
> -	if (ret)
> -		goto err_init;
> -
> -	/* Only when the HW is re-initialised, can we replay the requests */
> -	ret = intel_engines_resume(i915);
> -	if (ret)
> -		goto err_engines;
> -
> -	intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
> -
>  	intel_engines_set_scheduler_caps(i915);
>  
> -	return 0;
> -
> -err_engines:
> -	intel_uc_fini_hw(i915);
> -err_init:
> +out:
>  	intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL);
> -
> -	intel_engines_set_scheduler_caps(i915);
> -
>  	return ret;
>  }
>  
> @@ -1524,6 +1487,11 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>  	if (ret)
>  		goto err_uc_init;
>  
> +	/* Only when the HW is re-initialised, can we replay the requests */
> +	ret = intel_gt_resume(&dev_priv->gt);
> +	if (ret)
> +		goto err_init_hw;
> +
>  	/*
>  	 * Despite its name intel_init_clock_gating applies both display
>  	 * clock gating workarounds; GT mmio workarounds and the occasional
> @@ -1537,20 +1505,20 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>  
>  	ret = intel_engines_verify_workarounds(dev_priv);
>  	if (ret)
> -		goto err_init_hw;
> +		goto err_gt;
>  
>  	ret = __intel_engines_record_defaults(dev_priv);
>  	if (ret)
> -		goto err_init_hw;
> +		goto err_gt;
>  
>  	if (i915_inject_load_failure()) {
>  		ret = -ENODEV;
> -		goto err_init_hw;
> +		goto err_gt;
>  	}
>  
>  	if (i915_inject_load_failure()) {
>  		ret = -EIO;
> -		goto err_init_hw;
> +		goto err_gt;
>  	}
>  
>  	intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL);
> @@ -1564,7 +1532,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>  	 * HW as irrevisibly wedged, but keep enough state around that the
>  	 * driver doesn't explode during runtime.
>  	 */
> -err_init_hw:
> +err_gt:
>  	mutex_unlock(&dev_priv->drm.struct_mutex);
>  
>  	i915_gem_set_wedged(dev_priv);
> @@ -1574,6 +1542,7 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
>  	i915_gem_drain_workqueue(dev_priv);
>  
>  	mutex_lock(&dev_priv->drm.struct_mutex);
> +err_init_hw:
>  	intel_uc_fini_hw(dev_priv);
>  err_uc_init:
>  	intel_uc_fini(dev_priv);
> -- 
> 2.20.1
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✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Add a wakeref getter for iff the wakeref is already active

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Add a wakeref getter for iff the wakeref is already active
URL   : https://patchwork.freedesktop.org/series/62795/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
5ae7c187d1c0 drm/i915: Add a wakeref getter for iff the wakeref is already active
2a760f60b13f drm/i915: Only recover active engines
f6bac10b0362 drm/i915: Lift intel_engines_resume() to callers
-:216: WARNING:AVOID_BUG: Avoid crashing the kernel - try using WARN_ON & recovery code rather than BUG() or BUG_ON()
#216: FILE: drivers/gpu/drm/i915/i915_gem.c:1200:
+	BUG_ON(!i915->kernel_context);

total: 0 errors, 1 warnings, 0 checks, 248 lines checked

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✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Add a wakeref getter for iff the wakeref is already active

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Add a wakeref getter for iff the wakeref is already active
URL   : https://patchwork.freedesktop.org/series/62795/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6362 -> Patchwork_13443
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/

Known issues
------------

  Here are the changes found in Patchwork_13443 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_param@basic-default:
    - fi-icl-guc:         [PASS][1] -> [INCOMPLETE][2] ([fdo#107713])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/fi-icl-guc/igt@gem_ctx_param@basic-default.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/fi-icl-guc/igt@gem_ctx_param@basic-default.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a:
    - fi-kbl-8809g:       [PASS][3] -> [SKIP][4] ([fdo#109271]) +16 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/fi-kbl-8809g/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/fi-kbl-8809g/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-a.html

  
#### Possible fixes ####

  * igt@gem_exec_reloc@basic-gtt-cpu-noreloc:
    - fi-icl-u3:          [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/fi-icl-u3/igt@gem_exec_reloc@basic-gtt-cpu-noreloc.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/fi-icl-u3/igt@gem_exec_reloc@basic-gtt-cpu-noreloc.html

  * igt@gem_exec_suspend@basic-s4-devices:
    - fi-kbl-7500u:       [DMESG-WARN][7] ([fdo#105128] / [fdo#107139]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/fi-kbl-7500u/igt@gem_exec_suspend@basic-s4-devices.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/fi-kbl-7500u/igt@gem_exec_suspend@basic-s4-devices.html

  * igt@kms_addfb_basic@clobberred-modifier:
    - fi-kbl-8809g:       [FAIL][9] -> [PASS][10] +7 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/fi-kbl-8809g/igt@kms_addfb_basic@clobberred-modifier.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/fi-kbl-8809g/igt@kms_addfb_basic@clobberred-modifier.html

  * igt@kms_addfb_basic@size-max:
    - fi-kbl-8809g:       [WARN][11] -> [PASS][12] +15 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/fi-kbl-8809g/igt@kms_addfb_basic@size-max.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/fi-kbl-8809g/igt@kms_addfb_basic@size-max.html

  * igt@kms_addfb_basic@unused-modifier:
    - fi-kbl-8809g:       [SKIP][13] ([fdo#109271]) -> [PASS][14] +12 similar issues
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/fi-kbl-8809g/igt@kms_addfb_basic@unused-modifier.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/fi-kbl-8809g/igt@kms_addfb_basic@unused-modifier.html

  
  [fdo#105128]: https://bugs.freedesktop.org/show_bug.cgi?id=105128
  [fdo#107139]: https://bugs.freedesktop.org/show_bug.cgi?id=107139
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271


Participating hosts (52 -> 44)
------------------------------

  Additional (1): fi-bdw-gvtdvm 
  Missing    (9): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-skl-guc fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * Linux: CI_DRM_6362 -> Patchwork_13443

  CI_DRM_6362: 905e4f2184cb0b685afc77e105c4fa464857a769 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5068: 15ad664534413628f06c0f172aac11598bfdb895 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13443: f6bac10b0362f6767b71783c261d73533434a7d6 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

f6bac10b0362 drm/i915: Lift intel_engines_resume() to callers
2a760f60b13f drm/i915: Only recover active engines
5ae7c187d1c0 drm/i915: Add a wakeref getter for iff the wakeref is already active

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/
_______________________________________________
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✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Add a wakeref getter for iff the wakeref is already active

[Patchwork]

== Series Details ==

Series: series starting with [1/3] drm/i915: Add a wakeref getter for iff the wakeref is already active
URL   : https://patchwork.freedesktop.org/series/62795/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6362_full -> Patchwork_13443_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_13443_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_exec_balancer@smoke:
    - shard-iclb:         [PASS][1] -> [SKIP][2] ([fdo#110854])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-iclb2/igt@gem_exec_balancer@smoke.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-iclb6/igt@gem_exec_balancer@smoke.html

  * igt@gem_fence_thrash@bo-write-verify-threaded-x:
    - shard-hsw:          [PASS][3] -> [INCOMPLETE][4] ([fdo#103540])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-hsw1/igt@gem_fence_thrash@bo-write-verify-threaded-x.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-hsw2/igt@gem_fence_thrash@bo-write-verify-threaded-x.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-apl:          [PASS][5] -> [DMESG-WARN][6] ([fdo#110853])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-apl3/igt@gem_tiled_swapping@non-threaded.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-apl7/igt@gem_tiled_swapping@non-threaded.html
    - shard-snb:          [PASS][7] -> [DMESG-WARN][8] ([fdo#110853])
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-snb1/igt@gem_tiled_swapping@non-threaded.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-snb6/igt@gem_tiled_swapping@non-threaded.html

  * igt@i915_pm_rpm@system-suspend-devices:
    - shard-iclb:         [PASS][9] -> [INCOMPLETE][10] ([fdo#107713] / [fdo#108840])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-iclb8/igt@i915_pm_rpm@system-suspend-devices.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-iclb7/igt@i915_pm_rpm@system-suspend-devices.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-0:
    - shard-glk:          [PASS][11] -> [INCOMPLETE][12] ([fdo#103359] / [k.org#198133])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-glk5/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-glk4/igt@kms_big_fb@y-tiled-16bpp-rotate-0.html

  * igt@kms_cursor_legacy@cursor-vs-flip-legacy:
    - shard-hsw:          [PASS][13] -> [FAIL][14] ([fdo#103355])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-hsw4/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-hsw5/igt@kms_cursor_legacy@cursor-vs-flip-legacy.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-skl:          [PASS][15] -> [INCOMPLETE][16] ([fdo#109507])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-skl7/igt@kms_flip@flip-vs-suspend.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-skl10/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
    - shard-iclb:         [PASS][17] -> [FAIL][18] ([fdo#103167]) +3 similar issues
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-iclb7/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-iclb2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move:
    - shard-hsw:          [PASS][19] -> [SKIP][20] ([fdo#109271]) +30 similar issues
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-hsw4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-hsw1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-move.html

  * igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b:
    - shard-skl:          [PASS][21] -> [INCOMPLETE][22] ([fdo#104108])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-skl2/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-skl9/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-b.html

  * igt@kms_setmode@basic:
    - shard-apl:          [PASS][23] -> [FAIL][24] ([fdo#99912])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-apl6/igt@kms_setmode@basic.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-apl8/igt@kms_setmode@basic.html
    - shard-skl:          [PASS][25] -> [FAIL][26] ([fdo#99912])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-skl9/igt@kms_setmode@basic.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-skl9/igt@kms_setmode@basic.html
    - shard-kbl:          [PASS][27] -> [FAIL][28] ([fdo#99912])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-kbl2/igt@kms_setmode@basic.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-kbl7/igt@kms_setmode@basic.html

  
#### Possible fixes ####

  * igt@gem_ctx_shared@exec-shared-gtt-bsd1:
    - shard-apl:          [FAIL][29] ([fdo#110890]) -> [PASS][30]
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-apl3/igt@gem_ctx_shared@exec-shared-gtt-bsd1.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-apl7/igt@gem_ctx_shared@exec-shared-gtt-bsd1.html

  * igt@gem_eio@banned:
    - shard-skl:          [DMESG-WARN][31] ([fdo#110913 ]) -> [PASS][32] +1 similar issue
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-skl4/igt@gem_eio@banned.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-skl10/igt@gem_eio@banned.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-snoop:
    - shard-iclb:         [DMESG-WARN][33] ([fdo#110913 ]) -> [PASS][34] +9 similar issues
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-iclb3/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-iclb8/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
    - shard-apl:          [DMESG-WARN][35] ([fdo#110913 ]) -> [PASS][36] +6 similar issues
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-apl8/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-apl1/igt@gem_partial_pwrite_pread@writes-after-reads-snoop.html

  * igt@gem_partial_pwrite_pread@writes-after-reads-uncached:
    - shard-kbl:          [DMESG-WARN][37] ([fdo#110913 ]) -> [PASS][38] +5 similar issues
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-kbl4/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-kbl1/igt@gem_partial_pwrite_pread@writes-after-reads-uncached.html

  * igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive:
    - shard-glk:          [DMESG-WARN][39] ([fdo#110913 ]) -> [PASS][40] +8 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-glk5/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-glk2/igt@gem_persistent_relocs@forked-faulting-reloc-thrash-inactive.html

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          [INCOMPLETE][41] ([fdo#104108]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-skl5/igt@gem_softpin@noreloc-s3.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-skl9/igt@gem_softpin@noreloc-s3.html

  * igt@gem_userptr_blits@sync-unmap-cycles:
    - shard-snb:          [DMESG-WARN][43] ([fdo#110913 ]) -> [PASS][44]
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-snb4/igt@gem_userptr_blits@sync-unmap-cycles.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-snb5/igt@gem_userptr_blits@sync-unmap-cycles.html
    - shard-hsw:          [DMESG-WARN][45] ([fdo#110913 ]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-hsw2/igt@gem_userptr_blits@sync-unmap-cycles.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-hsw1/igt@gem_userptr_blits@sync-unmap-cycles.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-kbl:          [SKIP][47] ([fdo#109271]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-kbl7/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-kbl6/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@i915_pm_rpm@gem-execbuf-stress:
    - shard-iclb:         [INCOMPLETE][49] ([fdo#107713] / [fdo#108840]) -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-iclb2/igt@i915_pm_rpm@gem-execbuf-stress.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-iclb5/igt@i915_pm_rpm@gem-execbuf-stress.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic:
    - shard-hsw:          [SKIP][51] ([fdo#109271]) -> [PASS][52] +16 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-hsw1/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-hsw2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible:
    - shard-skl:          [FAIL][53] ([fdo#105363]) -> [PASS][54]
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-skl7/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-skl10/igt@kms_flip@flip-vs-expired-vblank-interruptible.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render:
    - shard-iclb:         [FAIL][55] ([fdo#103167]) -> [PASS][56] +2 similar issues
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-iclb8/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render.html
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-iclb3/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-cpu:
    - shard-skl:          [FAIL][57] ([fdo#103167] / [fdo#110379]) -> [PASS][58]
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-skl9/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-cpu.html
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-skl8/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-suspend:
    - shard-skl:          [INCOMPLETE][59] ([fdo#104108] / [fdo#106978]) -> [PASS][60]
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-skl8/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-skl2/igt@kms_frontbuffer_tracking@fbcpsr-suspend.html

  * igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes:
    - shard-apl:          [DMESG-WARN][61] ([fdo#108566]) -> [PASS][62]
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-apl5/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-apl4/igt@kms_plane@plane-panning-bottom-right-suspend-pipe-a-planes.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][63] ([fdo#108145] / [fdo#110403]) -> [PASS][64] +1 similar issue
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-skl2/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [SKIP][65] ([fdo#109441]) -> [PASS][66] +2 similar issues
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-iclb7/igt@kms_psr@psr2_sprite_plane_move.html
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@kms_vblank@pipe-a-query-idle-hang:
    - shard-snb:          [DMESG-WARN][67] ([fdo#110789] / [fdo#110913 ]) -> [PASS][68] +4 similar issues
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-snb1/igt@kms_vblank@pipe-a-query-idle-hang.html
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-snb1/igt@kms_vblank@pipe-a-query-idle-hang.html
    - shard-hsw:          [DMESG-WARN][69] ([fdo#110789] / [fdo#110913 ]) -> [PASS][70] +2 similar issues
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6362/shard-hsw5/igt@kms_vblank@pipe-a-query-idle-hang.html
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/shard-hsw5/igt@kms_vblank@pipe-a-query-idle-hang.html

  
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103355]: https://bugs.freedesktop.org/show_bug.cgi?id=103355
  [fdo#103359]: https://bugs.freedesktop.org/show_bug.cgi?id=103359
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#105363]: https://bugs.freedesktop.org/show_bug.cgi?id=105363
  [fdo#106978]: https://bugs.freedesktop.org/show_bug.cgi?id=106978
  [fdo#107713]: https://bugs.freedesktop.org/show_bug.cgi?id=107713
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108840]: https://bugs.freedesktop.org/show_bug.cgi?id=108840
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109507]: https://bugs.freedesktop.org/show_bug.cgi?id=109507
  [fdo#110379]: https://bugs.freedesktop.org/show_bug.cgi?id=110379
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110789]: https://bugs.freedesktop.org/show_bug.cgi?id=110789
  [fdo#110853]: https://bugs.freedesktop.org/show_bug.cgi?id=110853
  [fdo#110854]: https://bugs.freedesktop.org/show_bug.cgi?id=110854
  [fdo#110890]: https://bugs.freedesktop.org/show_bug.cgi?id=110890
  [fdo#110913 ]: https://bugs.freedesktop.org/show_bug.cgi?id=110913 
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912
  [k.org#198133]: https://bugzilla.kernel.org/show_bug.cgi?id=198133


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * Linux: CI_DRM_6362 -> Patchwork_13443

  CI_DRM_6362: 905e4f2184cb0b685afc77e105c4fa464857a769 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5068: 15ad664534413628f06c0f172aac11598bfdb895 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_13443: f6bac10b0362f6767b71783c261d73533434a7d6 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_13443/
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