From: Jani Nikula <jani.nikula@intel.com>
To: Dave Airlie <airlied@gmail.com>, Daniel Vetter <daniel.vetter@ffwll.ch>,
Cc: , dim-tools@lists.freedesktop.org,
dri-devel@lists.freedesktop.org,
Maxime Ripard <mripard@kernel.org>,
intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] [PULL] drm-intel-next-queued
Date: Tue, 03 Nov 2020 14:31:16 +0200 [thread overview]
Message-ID: <87o8kehbaj.fsf@intel.com> (raw)
Hi Dave & Daniel -
Here's the first batch of i915 changes for v5.11.
I'm trying out tagging and generating the pull request directly from
drm-intel-next-queued in one step this time, skipping the previous
two-step process. The idea is to ditch drm-intel-next-queued in the
future, and do everything directly to/from drm-intel-next.
BR,
Jani.
drm-intel-next-queued-2020-11-03:
drm/i915 features for v5.11
Highlights:
- More DG1 enabling (Lucas, Matt, Aditya, Anshuman, Clinton, Matt, Stuart, Venkata)
- Integer scaling filter support (Pankaj Bharadiya)
- Asynchronous flip support (Karthik)
Generic:
- Fix gen12 forcewake tables (Matt)
- Haswell PCI ID updates (Alexei Podtelezhnikov)
Display:
- ICL+ DSI command mode enabling (Vandita)
- Shutdown displays grafecully on reboot/shutdown (Ville)
- Don't register display debugfs when there is no display (Lucas)
- Fix RKL CDCLK table (Matt)
- Limit EHL/JSL eDP to HBR2 (José)
- Handle incorrectly set (by BIOS) PLLs and DP link rates at probe (Imre)
- Fix mode valid check wrt bpp for "YCbCr 4:2:0 only" modes (Ville)
- State checker and dump fixes (Ville)
- DP AUX backlight updates (Aaron Ma, Sean Paul)
- Add DP LTTPR non-transparent link training mode (Imre)
- PSR2 selective fetch enabling (José)
- VBT updates (José)
- HDCP updates (Ramalingam)
Cleanups and refactoring:
- HPD pin, AUX channel, and Type-C port identifier cleanup (Ville)
- Hotplug and irq refactoring (Ville)
- Better DDI encoder and AUX channel names (Ville)
- Color LUT code cleanups (Ville)
- Combo PHY code cleanups (Ville)
- LSPCON code cleanups (Ville)
- Documentation fixes (Mauro, Chris)
BR,
Jani.
The following changes since commit 8fea92536e3efff14fa4cde7ed37c595b40a52b5:
drm/i915: Update DRIVER_DATE to 20200917 (2020-09-17 16:43:57 -0400)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-queued-2020-11-03
for you to fetch changes up to 139caf7ca2866cd0a45814ff938cb0c33920a266:
drm/i915: Update DRIVER_DATE to 20201103 (2020-11-03 14:21:25 +0200)
----------------------------------------------------------------
drm/i915 features for v5.11
Highlights:
- More DG1 enabling (Lucas, Matt, Aditya, Anshuman, Clinton, Matt, Stuart, Venkata)
- Integer scaling filter support (Pankaj Bharadiya)
- Asynchronous flip support (Karthik)
Generic:
- Fix gen12 forcewake tables (Matt)
- Haswell PCI ID updates (Alexei Podtelezhnikov)
Display:
- ICL+ DSI command mode enabling (Vandita)
- Shutdown displays grafecully on reboot/shutdown (Ville)
- Don't register display debugfs when there is no display (Lucas)
- Fix RKL CDCLK table (Matt)
- Limit EHL/JSL eDP to HBR2 (José)
- Handle incorrectly set (by BIOS) PLLs and DP link rates at probe (Imre)
- Fix mode valid check wrt bpp for "YCbCr 4:2:0 only" modes (Ville)
- State checker and dump fixes (Ville)
- DP AUX backlight updates (Aaron Ma, Sean Paul)
- Add DP LTTPR non-transparent link training mode (Imre)
- PSR2 selective fetch enabling (José)
- VBT updates (José)
- HDCP updates (Ramalingam)
Cleanups and refactoring:
- HPD pin, AUX channel, and Type-C port identifier cleanup (Ville)
- Hotplug and irq refactoring (Ville)
- Better DDI encoder and AUX channel names (Ville)
- Color LUT code cleanups (Ville)
- Combo PHY code cleanups (Ville)
- LSPCON code cleanups (Ville)
- Documentation fixes (Mauro, Chris)
----------------------------------------------------------------
Aaron Ma (2):
drm/i915/dpcd_bl: uncheck PWM_PIN_CAP when detect eDP backlight capabilities
drm/i915: Force DPCD backlight mode for BOE 2270 panel
Aditya Swarup (3):
drm/i915/display: allow to skip certain power wells
drm/i915/dg1: Add DPLL macros for DG1
drm/i915/dg1: Add and setup DPLLs for DG1
Alexei Podtelezhnikov (4):
drm/i915: Update Haswell PCI IDs
drm/i915: Reclassify SKL 0x192a as GT3
drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT
drm/i915: Add SKL GT1.5 PCI IDs
Anshuman Gupta (2):
drm/i915/dg1: DG1 does not support DC6
drm/i915/dg1: Update DMC_DEBUG register
Chris Wilson (5):
drm/i915: Force VT'd workarounds when running as a guest OS
drm/i915: Drop runtime-pm assert from vgpu io accessors
drm/i915/display: Unkerneldoc cnl_program_nearest_filter_coefs
drm/i915: Reset the interrupt mask on disabling interrupts
drm/i915: Reduce severity for fixing up mistaken VBT tc->legacy_port
Clinton A Taylor (1):
drm/i915/dg1: invert HPD pins
Imre Deak (12):
drm/i915/skl: Work around incorrect BIOS WRPLL PDIV programming
drm/i915: Move the initial fastset commit check to encoder hooks
drm/i915: Check for unsupported DP link rates during initial commit
drm/i915: Add an encoder hook to sanitize its state during init/resume
drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz ref clock
drm/i915: Fix DP link training pattern mask
drm/i915: Simplify the link training functions
drm/i915: Factor out a helper to disable the DPCD training pattern
drm/dp: Add LTTPR helpers
drm/i915: Switch to LTTPR transparent mode link training
drm/i915: Switch to LTTPR non-transparent mode link training
drm/i915: Fix encoder lookup during PSR atomic check
Jani Nikula (1):
drm/i915: Update DRIVER_DATE to 20201103
José Roberto de Souza (10):
drm/i915/display/ehl: Limit eDP to HBR2
drm/i915/vbt: Fix backlight parsing for VBT 234+
drm/i915/vbt: Update the version and expected size of BDB_GENERAL_DEFINITIONS map
drm/i915/vbt: Add VRR VBT toggle
drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
drm/i915/display: Check PSR parameter and flag only in state compute phase
drm/i915/display: Program PSR2 selective fetch registers
drm/i915/display: Program DBUF_CTL tracker state service
drm/i915/display/fbc: Implement WA 22010751166
drm/i915/tgl/psr: Fix glitches when doing frontbuffer modifications
Kai-Heng Feng (1):
drm/i915: Init lspcon after HPD in intel_dp_detect()
Karthik B S (8):
drm/i915: Add enable/disable flip done and flip done handler
drm/i915: Add support for async flips in I915
drm/i915: Add checks specific to async flips
drm/i915: Do not call drm_crtc_arm_vblank_event in async flips
drm/i915: Add dedicated plane hook for async flip case
drm/i915: WA for platforms with double buffered address update enable bit
Documentation/gpu: Add asynchronous flip documentation for i915
drm/i915: Enable async flips in i915
Lucas De Marchi (10):
drm/i915: don't conflate is_dgfx with fake lmem
drm/i915/dg1: add more PCI ids
drm/i915/dg1: Define MOCS table for DG1
drm/i915/dg1: gmbus pin mapping
drm/i915/cnl: skip PW_DDI_F on certain skus
drm/i915/dg1: Add DG1 power wells
drm/i915/dg1: Enable DPLL for DG1
drm/i915/dg1: add hpd interrupt handling
drm/i915: Guard debugfs against invalid access without display
drm/i915/display: remove debug message from error path
Manasi Navare (1):
drm/i915/display: Rename pipe_timings to transcoder_timings
Matt Atwood (1):
drm/i915/dg1: Load DMC
Matt Roper (9):
drm/i915/dg1: Wait for pcode/uncore handshake at startup
drm/i915/dg1: Initialize RAWCLK properly
drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D
drm/i915/dg1: Update comp master/slave relationships for PHYs
drm/i915/dg1: provide port/phy mapping for vbt
drm/i915: Rename FORCEWAKE_BLITTER to FORCEWAKE_GT
drm/i915: Update gen12 forcewake table
drm/i915: Update gen12 multicast register ranges
drm/i915/rkl: Add new cdclk table
Mauro Carvalho Chehab (2):
drm/dp: fix kernel-doc warnings at drm_dp_helper.c
drm/dp: fix a kernel-doc issue at drm_edid.c
Michel Thierry (1):
drm/i915/dgfx: define llc and snooping behaviour
Pankaj Bharadiya (4):
drm: Introduce plane and CRTC scaling filter properties
drm/i915: Introduce scaling filter related registers and bit fields
drm/i915/display: Add Nearest-neighbor based integer scaling support
drm/i915: Enable scaling filter for plane and CRTC
Ramalingam C (2):
drm/i915: terminate reauth at stream management failure
drm/i915: dont retry stream management at seq_num_m roll over
Sean Paul (1):
drm/i915/dp: Tweak initial dpcd backlight.enabled value
Stuart Summers (1):
drm/i915/dg1: Add initial DG1 workarounds
Tejas Upadhyay (1):
drm/i915/jsl: Split EHL/JSL platform info and PCI ids
Vandita Kulkarni (5):
drm/i915/dsi: Add details about TE in get_config
i915/dsi: Configure TE interrupt for cmd mode
drm/i915/dsi: Add TE handler for dsi cmd mode.
drm/i915/dsi: Initiate frame request in cmd mode
drm/i915/dsi: Enable software vblank counter
Venkata Sandeep Dhanalakota (1):
drm/i915/dg1: Increase mmio size to 4MB
Ville Syrjälä (84):
drm/i915: Extract intel_dp_output_format()
drm/i915: Decouple intel_dp_{min,output}_bpp() from crtc_state
drm/i915: Use the correct bpp when validating "4:2:0 only" modes
drm/i915: Make intel_{enable,disable}_sagv() static
drm/i915: Don't hide the intel_crtc_atomic_check() call
drm/i915: Fix state checker hw.active/hw.enable readout
drm/i915: Move MST master transcoder dump earlier
drm/i915: Include the LUT sizes in the state dump
drm/i915: s/glk_read_lut_10/bdw_read_lut_10/
drm/i915: Reset glk degamma index after programming/readout
drm/i915: Shuffle chv_cgm_gamma_pack() around a bit
drm/i915: Relocate CHV CGM gamma masks
drm/i915: Polish bdw_read_lut_10() a bit
drm/i915: Replace some gamma_mode ifs with switches
drm/i915: Read DIMM size in Gb rather than GB
drm/i915: Implement display WA #1142:kbl,cfl,cml
drm/i915: Fix TGL DKL PHY DP vswing handling
drm/i915: s/pre_empemph/preemph/
drm/i915: s/old_crtc_state/crtc_state/
drm/i915: Make intel_dp_process_phy_request() static
drm/i915: Shove the PHY test into the hotplug work
drm/i915: Split ICL combo PHY buf trans per output type
drm/i915: Split ICL MG PHY buf trans per output type
drm/i915: Split EHL combo PHY buf trans per output type
drm/i915: Split TGL combo PHY buf trans per output type
drm/i915: Split TGL DKL PHY buf trans per output type
drm/i915: Plumb crtc_state to link training
drm/i915: Eliminate intel_dp.regs.dp_tp_{ctl,status}
drm/i915: Make lspcon_init() static
drm/i915: Shut down displays gracefully on reboot
drm/i915: Add an encoder .shutdown() hook
drm/i915: Replace the VLV/CHV eDP reboot notifier with the .shutdown() hook
drm/i915: Wait for eDP panel power cycle delay on reboot on all platforms
drm/i915: Wait for LVDS panel power cycle delay on reboot
drm/i915: Wait for VLV/CHV/BXT/GLK DSI panel power cycle delay on reboot
drm/i915: Rename i915_{save,restore}_state()
drm/i915: Set all unused color plane offsets to ~0xfff again
drm/i915: Skip aux plane stuff when there is no aux plane
drm/i915: s/int/u32/ for aux_offset/alignment
drm/i915: Apply WAC6entrylatency to kbl/cfl
drm/i915: Mark initial fb obj as WT on eLLC machines to avoid rcu lockup during fbdev init
drm/i915: Nuke lspcon_downsampling
drm/i915: Nuke lspcon_ycbcr420_config()
drm/i915: Inline intel_dp_ycbcr420_config()
drm/i915: Move the lspcon resume from .reset() to intel_dp_sink_dpms()
drm/i915: s/intel_dp_sink_dpms/intel_dp_set_power/
drm/i915: Reorder hpd init vs. display resume
drm/i915: Refactor .hpd_irq_setup() calls a bit
drm/i915: Sort the mess around ICP TC hotplugs regs
drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments
drm/i915: Ocd the HSW PCI ID hex numbers
drm/i915: Sort HSW PCI IDs
drm/i915: Sort SKL PCI IDs
drm/i915: Sort KBL PCI IDs
drm/i915: Sort CML PCI IDs
drm/i915: Sort CFL PCI IDs
drm/i915: Sort CNL PCI IDs
drm/i915: Sort ICL PCI IDs
drm/i915: Restore ILK-M RPS support
drm/i915: Read actual GPU frequency from MEMSTAT_ILK on ILK
drm/i915: Fix potential overflows in ilk ips calculations
drm/i915: Do gen5_gt_irq_postinstall() before enabling the master interrupt
drm/i915: Clean up the irq enable/disable for ilk rps
drm/i915: Reject 90/270 degree rotated initial fbs
drm/i915: Use _MMIO_PIPE3() for ilk+ WM0_PIPE registers
drm/i915: s/PORT_TC/TC_PORT_/
drm/i915: Add PORT_TCn aliases to enum port
drm/i915: Give DDI encoders even better names
drm/i915: Introduce AUX_CH_USBCn
drm/i915: Pimp AUX CH names
drm/i915: Use AUX_CH_USBCn for the RKL VBT AUX CH setup
drm/i915: Parametrize BXT_DE_PORT_HP_DDI with hpd_pin
drm/i915: Introduce GEN8_DE_PORT_HOTPLUG()
drm/i915: s/port/hpd_pin/ for icp+ ddi hpd bits
drm/i915: s/tc_port/hpd_pin/ in GEN11_{TC,TBT}_HOTPLUG()
drm/i915: s/tc_port/hpd_pin/ in icp+ TC hotplug bits
drm/i915: Relocate intel_hpd_{enabled,hotplug}_irqs()
drm/i915: Split gen11_hpd_detection_setup() into tc vs. tbt variants
drm/i915: Don't enable hpd detection logic from irq_postinstall()
drm/i915: Rename 'tmp_mask'
drm/i915: Remove per-platform IIR HPD masking
drm/i915: Enable hpd logic only for ports that are present
drm/i915: Use GEN3_IRQ_INIT() to init south interrupts in icp+
drm/i915: Get rid of ibx_irq_pre_postinstall()
Zou Wei (1):
drm/i915: Remove unused variable ret
Documentation/gpu/i915.rst | 6 +
drivers/gpu/drm/drm_atomic_uapi.c | 8 +
drivers/gpu/drm/drm_blend.c | 13 +
drivers/gpu/drm/drm_crtc.c | 40 ++
drivers/gpu/drm/drm_crtc_internal.h | 3 +
drivers/gpu/drm/drm_dp_helper.c | 238 ++++++-
drivers/gpu/drm/drm_edid.c | 2 +-
drivers/gpu/drm/drm_plane.c | 73 ++
drivers/gpu/drm/i915/display/icl_dsi.c | 74 +-
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 7 +-
drivers/gpu/drm/i915/display/intel_bios.c | 58 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 52 +-
drivers/gpu/drm/i915/display/intel_color.c | 124 +++-
drivers/gpu/drm/i915/display/intel_combo_phy.c | 13 +-
drivers/gpu/drm/i915/display/intel_csr.c | 12 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 770 ++++++++++++---------
drivers/gpu/drm/i915/display/intel_ddi.h | 11 +-
drivers/gpu/drm/i915/display/intel_display.c | 530 +++++++++++---
drivers/gpu/drm/i915/display/intel_display.h | 34 +-
.../gpu/drm/i915/display/intel_display_debugfs.c | 9 +-
drivers/gpu/drm/i915/display/intel_display_power.c | 77 ++-
drivers/gpu/drm/i915/display/intel_display_power.h | 3 +
drivers/gpu/drm/i915/display/intel_display_types.h | 57 +-
drivers/gpu/drm/i915/display/intel_dp.c | 682 ++++++++++++------
drivers/gpu/drm/i915/display/intel_dp.h | 22 +-
.../gpu/drm/i915/display/intel_dp_aux_backlight.c | 34 +-
.../gpu/drm/i915/display/intel_dp_link_training.c | 554 ++++++++++++---
.../gpu/drm/i915/display/intel_dp_link_training.h | 17 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 38 +-
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 23 +-
drivers/gpu/drm/i915/display/intel_dpio_phy.h | 2 +
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 118 +++-
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 17 +
drivers/gpu/drm/i915/display/intel_dsi.h | 1 +
drivers/gpu/drm/i915/display/intel_fbc.c | 7 +
drivers/gpu/drm/i915/display/intel_gmbus.c | 15 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 89 ++-
drivers/gpu/drm/i915/display/intel_hdmi.c | 18 +-
drivers/gpu/drm/i915/display/intel_hotplug.c | 64 +-
drivers/gpu/drm/i915/display/intel_hotplug.h | 3 +-
drivers/gpu/drm/i915/display/intel_lspcon.c | 97 ++-
drivers/gpu/drm/i915/display/intel_lspcon.h | 5 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 10 +
drivers/gpu/drm/i915/display/intel_opregion.c | 6 +-
drivers/gpu/drm/i915/display/intel_psr.c | 210 ++++--
drivers/gpu/drm/i915/display/intel_psr.h | 10 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 74 +-
drivers/gpu/drm/i915/display/intel_tc.c | 8 +-
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 13 +-
drivers/gpu/drm/i915/display/vlv_dsi.c | 8 +
drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +-
drivers/gpu/drm/i915/gt/intel_mocs.c | 41 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 56 +-
drivers/gpu/drm/i915/gt/intel_sseu.c | 2 +-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 143 +++-
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 6 +-
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 +
drivers/gpu/drm/i915/gvt/display.c | 15 +-
drivers/gpu/drm/i915/gvt/handlers.c | 14 +-
drivers/gpu/drm/i915/gvt/reg.h | 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 3 +-
drivers/gpu/drm/i915/i915_drv.c | 64 +-
drivers/gpu/drm/i915/i915_drv.h | 18 +-
drivers/gpu/drm/i915/i915_irq.c | 770 ++++++++++++++-------
drivers/gpu/drm/i915/i915_irq.h | 3 +
drivers/gpu/drm/i915/i915_pci.c | 22 +
drivers/gpu/drm/i915/i915_reg.h | 430 +++++++-----
drivers/gpu/drm/i915/i915_suspend.c | 80 +--
drivers/gpu/drm/i915/i915_suspend.h | 4 +-
drivers/gpu/drm/i915/intel_device_info.c | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 1 +
drivers/gpu/drm/i915/intel_dram.c | 23 +-
drivers/gpu/drm/i915/intel_pch.c | 6 +-
drivers/gpu/drm/i915/intel_pm.c | 64 +-
drivers/gpu/drm/i915/intel_pm.h | 2 -
drivers/gpu/drm/i915/intel_sideband.c | 15 +
drivers/gpu/drm/i915/intel_sideband.h | 2 +
drivers/gpu/drm/i915/intel_uncore.c | 234 +++++--
drivers/gpu/drm/i915/intel_uncore.h | 4 +-
include/drm/drm_crtc.h | 16 +
include/drm/drm_dp_helper.h | 62 ++
include/drm/drm_plane.h | 21 +
include/drm/i915_pciids.h | 141 ++--
83 files changed, 4730 insertions(+), 1899 deletions(-)
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@intel.com>
To: Dave Airlie <airlied@gmail.com>, Daniel Vetter <daniel.vetter@ffwll.ch>,
Cc: , dim-tools@lists.freedesktop.org,
dri-devel@lists.freedesktop.org,
Rodrigo Vivi <rodrigo.vivi@intel.com>,
Sean Paul <sean@poorly.run>,
intel-gfx@lists.freedesktop.org
Subject: [PULL] drm-intel-next-queued
Date: Tue, 03 Nov 2020 14:31:16 +0200 [thread overview]
Message-ID: <87o8kehbaj.fsf@intel.com> (raw)
Hi Dave & Daniel -
Here's the first batch of i915 changes for v5.11.
I'm trying out tagging and generating the pull request directly from
drm-intel-next-queued in one step this time, skipping the previous
two-step process. The idea is to ditch drm-intel-next-queued in the
future, and do everything directly to/from drm-intel-next.
BR,
Jani.
drm-intel-next-queued-2020-11-03:
drm/i915 features for v5.11
Highlights:
- More DG1 enabling (Lucas, Matt, Aditya, Anshuman, Clinton, Matt, Stuart, Venkata)
- Integer scaling filter support (Pankaj Bharadiya)
- Asynchronous flip support (Karthik)
Generic:
- Fix gen12 forcewake tables (Matt)
- Haswell PCI ID updates (Alexei Podtelezhnikov)
Display:
- ICL+ DSI command mode enabling (Vandita)
- Shutdown displays grafecully on reboot/shutdown (Ville)
- Don't register display debugfs when there is no display (Lucas)
- Fix RKL CDCLK table (Matt)
- Limit EHL/JSL eDP to HBR2 (José)
- Handle incorrectly set (by BIOS) PLLs and DP link rates at probe (Imre)
- Fix mode valid check wrt bpp for "YCbCr 4:2:0 only" modes (Ville)
- State checker and dump fixes (Ville)
- DP AUX backlight updates (Aaron Ma, Sean Paul)
- Add DP LTTPR non-transparent link training mode (Imre)
- PSR2 selective fetch enabling (José)
- VBT updates (José)
- HDCP updates (Ramalingam)
Cleanups and refactoring:
- HPD pin, AUX channel, and Type-C port identifier cleanup (Ville)
- Hotplug and irq refactoring (Ville)
- Better DDI encoder and AUX channel names (Ville)
- Color LUT code cleanups (Ville)
- Combo PHY code cleanups (Ville)
- LSPCON code cleanups (Ville)
- Documentation fixes (Mauro, Chris)
BR,
Jani.
The following changes since commit 8fea92536e3efff14fa4cde7ed37c595b40a52b5:
drm/i915: Update DRIVER_DATE to 20200917 (2020-09-17 16:43:57 -0400)
are available in the Git repository at:
git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-queued-2020-11-03
for you to fetch changes up to 139caf7ca2866cd0a45814ff938cb0c33920a266:
drm/i915: Update DRIVER_DATE to 20201103 (2020-11-03 14:21:25 +0200)
----------------------------------------------------------------
drm/i915 features for v5.11
Highlights:
- More DG1 enabling (Lucas, Matt, Aditya, Anshuman, Clinton, Matt, Stuart, Venkata)
- Integer scaling filter support (Pankaj Bharadiya)
- Asynchronous flip support (Karthik)
Generic:
- Fix gen12 forcewake tables (Matt)
- Haswell PCI ID updates (Alexei Podtelezhnikov)
Display:
- ICL+ DSI command mode enabling (Vandita)
- Shutdown displays grafecully on reboot/shutdown (Ville)
- Don't register display debugfs when there is no display (Lucas)
- Fix RKL CDCLK table (Matt)
- Limit EHL/JSL eDP to HBR2 (José)
- Handle incorrectly set (by BIOS) PLLs and DP link rates at probe (Imre)
- Fix mode valid check wrt bpp for "YCbCr 4:2:0 only" modes (Ville)
- State checker and dump fixes (Ville)
- DP AUX backlight updates (Aaron Ma, Sean Paul)
- Add DP LTTPR non-transparent link training mode (Imre)
- PSR2 selective fetch enabling (José)
- VBT updates (José)
- HDCP updates (Ramalingam)
Cleanups and refactoring:
- HPD pin, AUX channel, and Type-C port identifier cleanup (Ville)
- Hotplug and irq refactoring (Ville)
- Better DDI encoder and AUX channel names (Ville)
- Color LUT code cleanups (Ville)
- Combo PHY code cleanups (Ville)
- LSPCON code cleanups (Ville)
- Documentation fixes (Mauro, Chris)
----------------------------------------------------------------
Aaron Ma (2):
drm/i915/dpcd_bl: uncheck PWM_PIN_CAP when detect eDP backlight capabilities
drm/i915: Force DPCD backlight mode for BOE 2270 panel
Aditya Swarup (3):
drm/i915/display: allow to skip certain power wells
drm/i915/dg1: Add DPLL macros for DG1
drm/i915/dg1: Add and setup DPLLs for DG1
Alexei Podtelezhnikov (4):
drm/i915: Update Haswell PCI IDs
drm/i915: Reclassify SKL 0x192a as GT3
drm/i915: Reclassify SKL 0x1923 and 0x1927 as ULT
drm/i915: Add SKL GT1.5 PCI IDs
Anshuman Gupta (2):
drm/i915/dg1: DG1 does not support DC6
drm/i915/dg1: Update DMC_DEBUG register
Chris Wilson (5):
drm/i915: Force VT'd workarounds when running as a guest OS
drm/i915: Drop runtime-pm assert from vgpu io accessors
drm/i915/display: Unkerneldoc cnl_program_nearest_filter_coefs
drm/i915: Reset the interrupt mask on disabling interrupts
drm/i915: Reduce severity for fixing up mistaken VBT tc->legacy_port
Clinton A Taylor (1):
drm/i915/dg1: invert HPD pins
Imre Deak (12):
drm/i915/skl: Work around incorrect BIOS WRPLL PDIV programming
drm/i915: Move the initial fastset commit check to encoder hooks
drm/i915: Check for unsupported DP link rates during initial commit
drm/i915: Add an encoder hook to sanitize its state during init/resume
drm/i915/tgl: Fix Combo PHY DPLL fractional divider for 38.4MHz ref clock
drm/i915: Fix DP link training pattern mask
drm/i915: Simplify the link training functions
drm/i915: Factor out a helper to disable the DPCD training pattern
drm/dp: Add LTTPR helpers
drm/i915: Switch to LTTPR transparent mode link training
drm/i915: Switch to LTTPR non-transparent mode link training
drm/i915: Fix encoder lookup during PSR atomic check
Jani Nikula (1):
drm/i915: Update DRIVER_DATE to 20201103
José Roberto de Souza (10):
drm/i915/display/ehl: Limit eDP to HBR2
drm/i915/vbt: Fix backlight parsing for VBT 234+
drm/i915/vbt: Update the version and expected size of BDB_GENERAL_DEFINITIONS map
drm/i915/vbt: Add VRR VBT toggle
drm/i915/display: Ignore IGNORE_PSR2_HW_TRACKING for platforms without sel fetch
drm/i915/display: Check PSR parameter and flag only in state compute phase
drm/i915/display: Program PSR2 selective fetch registers
drm/i915/display: Program DBUF_CTL tracker state service
drm/i915/display/fbc: Implement WA 22010751166
drm/i915/tgl/psr: Fix glitches when doing frontbuffer modifications
Kai-Heng Feng (1):
drm/i915: Init lspcon after HPD in intel_dp_detect()
Karthik B S (8):
drm/i915: Add enable/disable flip done and flip done handler
drm/i915: Add support for async flips in I915
drm/i915: Add checks specific to async flips
drm/i915: Do not call drm_crtc_arm_vblank_event in async flips
drm/i915: Add dedicated plane hook for async flip case
drm/i915: WA for platforms with double buffered address update enable bit
Documentation/gpu: Add asynchronous flip documentation for i915
drm/i915: Enable async flips in i915
Lucas De Marchi (10):
drm/i915: don't conflate is_dgfx with fake lmem
drm/i915/dg1: add more PCI ids
drm/i915/dg1: Define MOCS table for DG1
drm/i915/dg1: gmbus pin mapping
drm/i915/cnl: skip PW_DDI_F on certain skus
drm/i915/dg1: Add DG1 power wells
drm/i915/dg1: Enable DPLL for DG1
drm/i915/dg1: add hpd interrupt handling
drm/i915: Guard debugfs against invalid access without display
drm/i915/display: remove debug message from error path
Manasi Navare (1):
drm/i915/display: Rename pipe_timings to transcoder_timings
Matt Atwood (1):
drm/i915/dg1: Load DMC
Matt Roper (9):
drm/i915/dg1: Wait for pcode/uncore handshake at startup
drm/i915/dg1: Initialize RAWCLK properly
drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D
drm/i915/dg1: Update comp master/slave relationships for PHYs
drm/i915/dg1: provide port/phy mapping for vbt
drm/i915: Rename FORCEWAKE_BLITTER to FORCEWAKE_GT
drm/i915: Update gen12 forcewake table
drm/i915: Update gen12 multicast register ranges
drm/i915/rkl: Add new cdclk table
Mauro Carvalho Chehab (2):
drm/dp: fix kernel-doc warnings at drm_dp_helper.c
drm/dp: fix a kernel-doc issue at drm_edid.c
Michel Thierry (1):
drm/i915/dgfx: define llc and snooping behaviour
Pankaj Bharadiya (4):
drm: Introduce plane and CRTC scaling filter properties
drm/i915: Introduce scaling filter related registers and bit fields
drm/i915/display: Add Nearest-neighbor based integer scaling support
drm/i915: Enable scaling filter for plane and CRTC
Ramalingam C (2):
drm/i915: terminate reauth at stream management failure
drm/i915: dont retry stream management at seq_num_m roll over
Sean Paul (1):
drm/i915/dp: Tweak initial dpcd backlight.enabled value
Stuart Summers (1):
drm/i915/dg1: Add initial DG1 workarounds
Tejas Upadhyay (1):
drm/i915/jsl: Split EHL/JSL platform info and PCI ids
Vandita Kulkarni (5):
drm/i915/dsi: Add details about TE in get_config
i915/dsi: Configure TE interrupt for cmd mode
drm/i915/dsi: Add TE handler for dsi cmd mode.
drm/i915/dsi: Initiate frame request in cmd mode
drm/i915/dsi: Enable software vblank counter
Venkata Sandeep Dhanalakota (1):
drm/i915/dg1: Increase mmio size to 4MB
Ville Syrjälä (84):
drm/i915: Extract intel_dp_output_format()
drm/i915: Decouple intel_dp_{min,output}_bpp() from crtc_state
drm/i915: Use the correct bpp when validating "4:2:0 only" modes
drm/i915: Make intel_{enable,disable}_sagv() static
drm/i915: Don't hide the intel_crtc_atomic_check() call
drm/i915: Fix state checker hw.active/hw.enable readout
drm/i915: Move MST master transcoder dump earlier
drm/i915: Include the LUT sizes in the state dump
drm/i915: s/glk_read_lut_10/bdw_read_lut_10/
drm/i915: Reset glk degamma index after programming/readout
drm/i915: Shuffle chv_cgm_gamma_pack() around a bit
drm/i915: Relocate CHV CGM gamma masks
drm/i915: Polish bdw_read_lut_10() a bit
drm/i915: Replace some gamma_mode ifs with switches
drm/i915: Read DIMM size in Gb rather than GB
drm/i915: Implement display WA #1142:kbl,cfl,cml
drm/i915: Fix TGL DKL PHY DP vswing handling
drm/i915: s/pre_empemph/preemph/
drm/i915: s/old_crtc_state/crtc_state/
drm/i915: Make intel_dp_process_phy_request() static
drm/i915: Shove the PHY test into the hotplug work
drm/i915: Split ICL combo PHY buf trans per output type
drm/i915: Split ICL MG PHY buf trans per output type
drm/i915: Split EHL combo PHY buf trans per output type
drm/i915: Split TGL combo PHY buf trans per output type
drm/i915: Split TGL DKL PHY buf trans per output type
drm/i915: Plumb crtc_state to link training
drm/i915: Eliminate intel_dp.regs.dp_tp_{ctl,status}
drm/i915: Make lspcon_init() static
drm/i915: Shut down displays gracefully on reboot
drm/i915: Add an encoder .shutdown() hook
drm/i915: Replace the VLV/CHV eDP reboot notifier with the .shutdown() hook
drm/i915: Wait for eDP panel power cycle delay on reboot on all platforms
drm/i915: Wait for LVDS panel power cycle delay on reboot
drm/i915: Wait for VLV/CHV/BXT/GLK DSI panel power cycle delay on reboot
drm/i915: Rename i915_{save,restore}_state()
drm/i915: Set all unused color plane offsets to ~0xfff again
drm/i915: Skip aux plane stuff when there is no aux plane
drm/i915: s/int/u32/ for aux_offset/alignment
drm/i915: Apply WAC6entrylatency to kbl/cfl
drm/i915: Mark initial fb obj as WT on eLLC machines to avoid rcu lockup during fbdev init
drm/i915: Nuke lspcon_downsampling
drm/i915: Nuke lspcon_ycbcr420_config()
drm/i915: Inline intel_dp_ycbcr420_config()
drm/i915: Move the lspcon resume from .reset() to intel_dp_sink_dpms()
drm/i915: s/intel_dp_sink_dpms/intel_dp_set_power/
drm/i915: Reorder hpd init vs. display resume
drm/i915: Refactor .hpd_irq_setup() calls a bit
drm/i915: Sort the mess around ICP TC hotplugs regs
drm/i915: Try to fix the SKL GT3/4 vs. GT3e/4e comments
drm/i915: Ocd the HSW PCI ID hex numbers
drm/i915: Sort HSW PCI IDs
drm/i915: Sort SKL PCI IDs
drm/i915: Sort KBL PCI IDs
drm/i915: Sort CML PCI IDs
drm/i915: Sort CFL PCI IDs
drm/i915: Sort CNL PCI IDs
drm/i915: Sort ICL PCI IDs
drm/i915: Restore ILK-M RPS support
drm/i915: Read actual GPU frequency from MEMSTAT_ILK on ILK
drm/i915: Fix potential overflows in ilk ips calculations
drm/i915: Do gen5_gt_irq_postinstall() before enabling the master interrupt
drm/i915: Clean up the irq enable/disable for ilk rps
drm/i915: Reject 90/270 degree rotated initial fbs
drm/i915: Use _MMIO_PIPE3() for ilk+ WM0_PIPE registers
drm/i915: s/PORT_TC/TC_PORT_/
drm/i915: Add PORT_TCn aliases to enum port
drm/i915: Give DDI encoders even better names
drm/i915: Introduce AUX_CH_USBCn
drm/i915: Pimp AUX CH names
drm/i915: Use AUX_CH_USBCn for the RKL VBT AUX CH setup
drm/i915: Parametrize BXT_DE_PORT_HP_DDI with hpd_pin
drm/i915: Introduce GEN8_DE_PORT_HOTPLUG()
drm/i915: s/port/hpd_pin/ for icp+ ddi hpd bits
drm/i915: s/tc_port/hpd_pin/ in GEN11_{TC,TBT}_HOTPLUG()
drm/i915: s/tc_port/hpd_pin/ in icp+ TC hotplug bits
drm/i915: Relocate intel_hpd_{enabled,hotplug}_irqs()
drm/i915: Split gen11_hpd_detection_setup() into tc vs. tbt variants
drm/i915: Don't enable hpd detection logic from irq_postinstall()
drm/i915: Rename 'tmp_mask'
drm/i915: Remove per-platform IIR HPD masking
drm/i915: Enable hpd logic only for ports that are present
drm/i915: Use GEN3_IRQ_INIT() to init south interrupts in icp+
drm/i915: Get rid of ibx_irq_pre_postinstall()
Zou Wei (1):
drm/i915: Remove unused variable ret
Documentation/gpu/i915.rst | 6 +
drivers/gpu/drm/drm_atomic_uapi.c | 8 +
drivers/gpu/drm/drm_blend.c | 13 +
drivers/gpu/drm/drm_crtc.c | 40 ++
drivers/gpu/drm/drm_crtc_internal.h | 3 +
drivers/gpu/drm/drm_dp_helper.c | 238 ++++++-
drivers/gpu/drm/drm_edid.c | 2 +-
drivers/gpu/drm/drm_plane.c | 73 ++
drivers/gpu/drm/i915/display/icl_dsi.c | 74 +-
drivers/gpu/drm/i915/display/intel_atomic_plane.c | 7 +-
drivers/gpu/drm/i915/display/intel_bios.c | 58 +-
drivers/gpu/drm/i915/display/intel_cdclk.c | 52 +-
drivers/gpu/drm/i915/display/intel_color.c | 124 +++-
drivers/gpu/drm/i915/display/intel_combo_phy.c | 13 +-
drivers/gpu/drm/i915/display/intel_csr.c | 12 +-
drivers/gpu/drm/i915/display/intel_ddi.c | 770 ++++++++++++---------
drivers/gpu/drm/i915/display/intel_ddi.h | 11 +-
drivers/gpu/drm/i915/display/intel_display.c | 530 +++++++++++---
drivers/gpu/drm/i915/display/intel_display.h | 34 +-
.../gpu/drm/i915/display/intel_display_debugfs.c | 9 +-
drivers/gpu/drm/i915/display/intel_display_power.c | 77 ++-
drivers/gpu/drm/i915/display/intel_display_power.h | 3 +
drivers/gpu/drm/i915/display/intel_display_types.h | 57 +-
drivers/gpu/drm/i915/display/intel_dp.c | 682 ++++++++++++------
drivers/gpu/drm/i915/display/intel_dp.h | 22 +-
.../gpu/drm/i915/display/intel_dp_aux_backlight.c | 34 +-
.../gpu/drm/i915/display/intel_dp_link_training.c | 554 ++++++++++++---
.../gpu/drm/i915/display/intel_dp_link_training.h | 17 +-
drivers/gpu/drm/i915/display/intel_dp_mst.c | 38 +-
drivers/gpu/drm/i915/display/intel_dpio_phy.c | 23 +-
drivers/gpu/drm/i915/display/intel_dpio_phy.h | 2 +
drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 118 +++-
drivers/gpu/drm/i915/display/intel_dpll_mgr.h | 17 +
drivers/gpu/drm/i915/display/intel_dsi.h | 1 +
drivers/gpu/drm/i915/display/intel_fbc.c | 7 +
drivers/gpu/drm/i915/display/intel_gmbus.c | 15 +-
drivers/gpu/drm/i915/display/intel_hdcp.c | 89 ++-
drivers/gpu/drm/i915/display/intel_hdmi.c | 18 +-
drivers/gpu/drm/i915/display/intel_hotplug.c | 64 +-
drivers/gpu/drm/i915/display/intel_hotplug.h | 3 +-
drivers/gpu/drm/i915/display/intel_lspcon.c | 97 ++-
drivers/gpu/drm/i915/display/intel_lspcon.h | 5 +-
drivers/gpu/drm/i915/display/intel_lvds.c | 10 +
drivers/gpu/drm/i915/display/intel_opregion.c | 6 +-
drivers/gpu/drm/i915/display/intel_psr.c | 210 ++++--
drivers/gpu/drm/i915/display/intel_psr.h | 10 +-
drivers/gpu/drm/i915/display/intel_sprite.c | 74 +-
drivers/gpu/drm/i915/display/intel_tc.c | 8 +-
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 13 +-
drivers/gpu/drm/i915/display/vlv_dsi.c | 8 +
drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 +-
drivers/gpu/drm/i915/gt/intel_mocs.c | 41 +-
drivers/gpu/drm/i915/gt/intel_rps.c | 56 +-
drivers/gpu/drm/i915/gt/intel_sseu.c | 2 +-
drivers/gpu/drm/i915/gt/intel_workarounds.c | 143 +++-
drivers/gpu/drm/i915/gt/uc/intel_guc.c | 6 +-
drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 1 +
drivers/gpu/drm/i915/gvt/display.c | 15 +-
drivers/gpu/drm/i915/gvt/handlers.c | 14 +-
drivers/gpu/drm/i915/gvt/reg.h | 4 +-
drivers/gpu/drm/i915/i915_debugfs.c | 3 +-
drivers/gpu/drm/i915/i915_drv.c | 64 +-
drivers/gpu/drm/i915/i915_drv.h | 18 +-
drivers/gpu/drm/i915/i915_irq.c | 770 ++++++++++++++-------
drivers/gpu/drm/i915/i915_irq.h | 3 +
drivers/gpu/drm/i915/i915_pci.c | 22 +
drivers/gpu/drm/i915/i915_reg.h | 430 +++++++-----
drivers/gpu/drm/i915/i915_suspend.c | 80 +--
drivers/gpu/drm/i915/i915_suspend.h | 4 +-
drivers/gpu/drm/i915/intel_device_info.c | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 1 +
drivers/gpu/drm/i915/intel_dram.c | 23 +-
drivers/gpu/drm/i915/intel_pch.c | 6 +-
drivers/gpu/drm/i915/intel_pm.c | 64 +-
drivers/gpu/drm/i915/intel_pm.h | 2 -
drivers/gpu/drm/i915/intel_sideband.c | 15 +
drivers/gpu/drm/i915/intel_sideband.h | 2 +
drivers/gpu/drm/i915/intel_uncore.c | 234 +++++--
drivers/gpu/drm/i915/intel_uncore.h | 4 +-
include/drm/drm_crtc.h | 16 +
include/drm/drm_dp_helper.h | 62 ++
include/drm/drm_plane.h | 21 +
include/drm/i915_pciids.h | 141 ++--
83 files changed, 4730 insertions(+), 1899 deletions(-)
--
Jani Nikula, Intel Open Source Graphics Center
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next reply other threads:[~2020-11-03 12:31 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-11-03 12:31 Jani Nikula [this message]
2020-11-03 12:31 ` [PULL] drm-intel-next-queued Jani Nikula
-- strict thread matches above, loose matches on Subject: below --
2020-11-27 13:26 [Intel-gfx] " Jani Nikula
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