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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Mahesh Kumar <mahesh1.kumar@intel.com>, intel-gfx@lists.freedesktop.org
Cc: paulo.r.zanoni@intel.com, maarten.lankhorst@intel.com
Subject: Re: [PATCH 01/11] drm/i915: take-out common clamping code	of fixed16 wrappers
Date: Fri, 14 Jul 2017 13:24:29 +0300	[thread overview]
Message-ID: <87o9snjoyq.fsf@nikula.org> (raw)
In-Reply-To: <20170705143154.32132-2-mahesh1.kumar@intel.com>

On Wed, 05 Jul 2017, Mahesh Kumar <mahesh1.kumar@intel.com> wrote:
> From: "Kumar, Mahesh" <mahesh1.kumar@intel.com>
>
> This patch creates a new function for clamping u64 to fixed16.
> And make use of this function in other fixed16 wrappers.
>
> Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
> Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h | 28 ++++++++++++----------------
>  1 file changed, 12 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 5e70f5711fc8..1b525051bf5f 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -160,6 +160,14 @@ static inline uint_fixed_16_16_t max_fixed_16_16(uint_fixed_16_16_t max1,
>  	return max;
>  }
>  
> +static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val)
> +{
> +	uint_fixed_16_16_t fp;
> +	WARN_ON(val >> 32);

WARN_ON(val > U32_MAX); makes much more sense. Same all over the place.

> +	fp.val = clamp_t(uint32_t, val, 0, ~0);

The use of clamp_t here is pointless, as fp.val is uint32_t. Assign,
possibly with a cast, and be done with it.

> +	return fp;
> +}
> +
>  static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val,
>  					    uint_fixed_16_16_t d)
>  {
> @@ -170,26 +178,21 @@ static inline uint32_t mul_round_up_u32_fixed16(uint32_t val,
>  						uint_fixed_16_16_t mul)
>  {
>  	uint64_t intermediate_val;
> -	uint32_t result;
>  
>  	intermediate_val = (uint64_t) val * mul.val;
>  	intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16);
>  	WARN_ON(intermediate_val >> 32);
> -	result = clamp_t(uint32_t, intermediate_val, 0, ~0);
> -	return result;
> +	return clamp_t(uint32_t, intermediate_val, 0, ~0);

Same here, the function is uint32_t, just return with a cast.

>  }
>  
>  static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val,
>  					     uint_fixed_16_16_t mul)
>  {
>  	uint64_t intermediate_val;
> -	uint_fixed_16_16_t fp;
>  
>  	intermediate_val = (uint64_t) val.val * mul.val;
>  	intermediate_val = intermediate_val >> 16;
> -	WARN_ON(intermediate_val >> 32);
> -	fp.val = clamp_t(uint32_t, intermediate_val, 0, ~0);
> -	return fp;
> +	return clamp_u64_to_fixed16(intermediate_val);
>  }
>  
>  static inline uint_fixed_16_16_t fixed_16_16_div(uint32_t val, uint32_t d)
> @@ -203,15 +206,11 @@ static inline uint_fixed_16_16_t fixed_16_16_div(uint32_t val, uint32_t d)
>  
>  static inline uint_fixed_16_16_t fixed_16_16_div_u64(uint32_t val, uint32_t d)
>  {
> -	uint_fixed_16_16_t res;
>  	uint64_t interm_val;
>  
>  	interm_val = (uint64_t)val << 16;
>  	interm_val = DIV_ROUND_UP_ULL(interm_val, d);
> -	WARN_ON(interm_val >> 32);
> -	res.val = (uint32_t) interm_val;
> -
> -	return res;
> +	return clamp_u64_to_fixed16(interm_val);
>  }
>  
>  static inline uint32_t div_round_up_u32_fixed16(uint32_t val,
> @@ -229,12 +228,9 @@ static inline uint_fixed_16_16_t mul_u32_fixed_16_16(uint32_t val,
>  						     uint_fixed_16_16_t mul)
>  {
>  	uint64_t intermediate_val;
> -	uint_fixed_16_16_t fp;
>  
>  	intermediate_val = (uint64_t) val * mul.val;
> -	WARN_ON(intermediate_val >> 32);
> -	fp.val = (uint32_t) intermediate_val;
> -	return fp;
> +	return clamp_u64_to_fixed16(intermediate_val);
>  }
>  
>  static inline const char *yesno(bool v)

-- 
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2017-07-14 10:19 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-05 14:31 [PATCH 00/11] Fixed16.16 wrapper cleanup & wm optimization Mahesh Kumar
2017-07-05 14:31 ` [PATCH 01/11] drm/i915: take-out common clamping code of fixed16 wrappers Mahesh Kumar
2017-07-14 10:24   ` Jani Nikula [this message]
2017-07-05 14:31 ` [PATCH 02/11] drm/i915: Always perform internal fixed16 division in 64 bits Mahesh Kumar
2017-07-05 14:31 ` [PATCH 03/11] drm/i915: cleanup fixed-point wrappers naming Mahesh Kumar
2017-07-05 14:31 ` [PATCH 04/11] drm/i915: Addition wrapper for fixed16.16 operation Mahesh Kumar
2017-07-05 14:31 ` [PATCH 05/11] drm/i915/skl+: WM calculation don't require height Mahesh Kumar
2017-07-05 14:31 ` [PATCH 06/11] drm/i915/skl+: unify cpp value in WM calculation Mahesh Kumar
2017-07-13 15:31   ` Maarten Lankhorst
2017-07-14 10:26     ` Jani Nikula
2017-07-14 10:31       ` Mahesh Kumar
2017-07-05 14:31 ` [PATCH 07/11] drm/i915/skl+: Optimize " Mahesh Kumar
2017-07-05 14:31 ` [PATCH 08/11] drm/i915/gen10: Calculate and enable transition WM Mahesh Kumar
2017-07-05 14:31 ` [PATCH 09/11] drm/i915/glk: IPC linetime watermark workaround for GLK Mahesh Kumar
2017-07-05 14:31 ` [PATCH 10/11] drm/i915/cnl: Extend WM workaround with IPC for CNL Mahesh Kumar
2017-07-05 14:31 ` [PATCH 11/11] drm/i915/bxt: Enable IPC support Mahesh Kumar
2017-07-06 15:10   ` Lankhorst, Maarten
2017-07-13 10:39     ` [PATCH 11/13] " Mahesh Kumar
2017-07-13 10:48       ` Chris Wilson
2017-07-13 12:02         ` Mahesh Kumar
2017-07-05 15:00 ` ✓ Fi.CI.BAT: success for Fixed16.16 wrapper cleanup & wm optimization (rev4) Patchwork

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