From: Kevin Hilman <khilman@ti.com>
To: "Koyamangalath, Abhilash" <abhilash.kv@ti.com>
Cc: "paul@pwsan.com" <paul@pwsan.com>,
"linux@arm.linux.org.uk" <linux@arm.linux.org.uk>,
"Cousson, Benoit" <b-cousson@ti.com>,
"tony@atomide.com" <tony@atomide.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Hiremath, Vaibhav" <hvaibhav@ti.com>,
"linux-omap@vger.kernel.org" <linux-omap@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH 2/2] omap_twl: Prevent SR to enable for am3517/am3505 devices
Date: Mon, 22 Aug 2011 15:48:40 -0700 [thread overview]
Message-ID: <87obzhgj07.fsf@ti.com> (raw)
In-Reply-To: <FCCFB4CDC6E5564B9182F639FC3560870370A4D96E@dbde02.ent.ti.com> (Abhilash Koyamangalath's message of "Mon, 8 Aug 2011 18:18:40 +0530")
"Koyamangalath, Abhilash" <abhilash.kv@ti.com> writes:
> Kevin Hilman wrote:
>>Abhilash K V <abhilash.kv@ti.com> writes:
>>
>> > From: Vaibhav Hiremath <hvaibhav@ti.com>
>> >
>> > In case of AM3517 & AM3505, Smart Reflex is not applicable so
>> > we must not enable it. So add check for am3517/05 cpu revision
>> > in omap3_twl_init() and return -ENODEV if true, else continue.
>> >
>> > Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
>> > Signed-off-by: Abhilash K V <abhilash.kv@ti.com>
>> > ---
>> > arch/arm/mach-omap2/omap_twl.c | 8 ++++++++
>> > 1 files changed, 8 insertions(+), 0 deletions(-)
>> >
>> > diff --git a/arch/arm/mach-omap2/omap_twl.c
>> b/arch/arm/mach-omap2/omap_twl.c
>> > index 07d6140..92fadcb 100644
>> > --- a/arch/arm/mach-omap2/omap_twl.c
>> > +++ b/arch/arm/mach-omap2/omap_twl.c
>> > @@ -269,6 +269,14 @@ int __init omap3_twl_init(void)
>> > if (!cpu_is_omap34xx())
>> > return -ENODEV;
>> >
>> > + /*
>> > + * In case of AM3517/AM3505 we should not be going down
>> > + * further, since SR is not applicable there.
>> > + */
>> > + if (cpu_is_omap3505() || cpu_is_omap3517()) {
>> > + return -ENODEV;
>> > + }
>> > +
>>
>> Rather than using cpu_is_*, you should add a new "feature" flag for
>> SmartReflex. We already have this for things like SGX, IVA, NEON, etc.
>> See <plat/feature.h>
> I did not find a feature.h;
sorry, I meant <plat/cpu.yh>
> did you mean OMAP3_CHECK_FEATURE macro which is used by
> omap3_check_features(), which gleans for presence of L2CACHE, IVA, SGX, NEON, ISP features
> from the Control Device Status Register (0x4800 244C) ?
yes, OMAP3_HAS_FEATURE()
> There is no such bit-field to indicate the presence of smart-reflex feature in this register.
> AFAIK, there is no such global register as well which could indicate this.
There doesn't have to be a register read to indicate this. See for
example the HAS_IO_WAKEUP feature.
Kevin
> - Abhilash
>
>> Kevin
>>
>>
>> > if (cpu_is_omap3630()) {
>> > omap3_mpu_volt_info.vp_vddmin =
>> OMAP3630_VP1_VLIMITTO_VDDMIN;
>> > omap3_mpu_volt_info.vp_vddmax =
>> OMAP3630_VP1_VLIMITTO_VDDMAX;
>>
>>
WARNING: multiple messages have this Message-ID (diff)
From: khilman@ti.com (Kevin Hilman)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/2] omap_twl: Prevent SR to enable for am3517/am3505 devices
Date: Mon, 22 Aug 2011 15:48:40 -0700 [thread overview]
Message-ID: <87obzhgj07.fsf@ti.com> (raw)
In-Reply-To: <FCCFB4CDC6E5564B9182F639FC3560870370A4D96E@dbde02.ent.ti.com> (Abhilash Koyamangalath's message of "Mon, 8 Aug 2011 18:18:40 +0530")
"Koyamangalath, Abhilash" <abhilash.kv@ti.com> writes:
> Kevin Hilman wrote:
>>Abhilash K V <abhilash.kv@ti.com> writes:
>>
>> > From: Vaibhav Hiremath <hvaibhav@ti.com>
>> >
>> > In case of AM3517 & AM3505, Smart Reflex is not applicable so
>> > we must not enable it. So add check for am3517/05 cpu revision
>> > in omap3_twl_init() and return -ENODEV if true, else continue.
>> >
>> > Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
>> > Signed-off-by: Abhilash K V <abhilash.kv@ti.com>
>> > ---
>> > arch/arm/mach-omap2/omap_twl.c | 8 ++++++++
>> > 1 files changed, 8 insertions(+), 0 deletions(-)
>> >
>> > diff --git a/arch/arm/mach-omap2/omap_twl.c
>> b/arch/arm/mach-omap2/omap_twl.c
>> > index 07d6140..92fadcb 100644
>> > --- a/arch/arm/mach-omap2/omap_twl.c
>> > +++ b/arch/arm/mach-omap2/omap_twl.c
>> > @@ -269,6 +269,14 @@ int __init omap3_twl_init(void)
>> > if (!cpu_is_omap34xx())
>> > return -ENODEV;
>> >
>> > + /*
>> > + * In case of AM3517/AM3505 we should not be going down
>> > + * further, since SR is not applicable there.
>> > + */
>> > + if (cpu_is_omap3505() || cpu_is_omap3517()) {
>> > + return -ENODEV;
>> > + }
>> > +
>>
>> Rather than using cpu_is_*, you should add a new "feature" flag for
>> SmartReflex. We already have this for things like SGX, IVA, NEON, etc.
>> See <plat/feature.h>
> I did not find a feature.h;
sorry, I meant <plat/cpu.yh>
> did you mean OMAP3_CHECK_FEATURE macro which is used by
> omap3_check_features(), which gleans for presence of L2CACHE, IVA, SGX, NEON, ISP features
> from the Control Device Status Register (0x4800 244C) ?
yes, OMAP3_HAS_FEATURE()
> There is no such bit-field to indicate the presence of smart-reflex feature in this register.
> AFAIK, there is no such global register as well which could indicate this.
There doesn't have to be a register read to indicate this. See for
example the HAS_IO_WAKEUP feature.
Kevin
> - Abhilash
>
>> Kevin
>>
>>
>> > if (cpu_is_omap3630()) {
>> > omap3_mpu_volt_info.vp_vddmin =
>> OMAP3630_VP1_VLIMITTO_VDDMIN;
>> > omap3_mpu_volt_info.vp_vddmax =
>> OMAP3630_VP1_VLIMITTO_VDDMAX;
>>
>>
WARNING: multiple messages have this Message-ID (diff)
From: Kevin Hilman <khilman@ti.com>
To: "Koyamangalath\, Abhilash" <abhilash.kv@ti.com>
Cc: "linux-omap\@vger.kernel.org" <linux-omap@vger.kernel.org>,
"tony\@atomide.com" <tony@atomide.com>,
"linux\@arm.linux.org.uk" <linux@arm.linux.org.uk>, "Cousson\,
Benoit" <b-cousson@ti.com>, "paul\@pwsan.com" <paul@pwsan.com>,
"linux-arm-kernel\@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"linux-kernel\@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"Hiremath\, Vaibhav" <hvaibhav@ti.com>
Subject: Re: [PATCH 2/2] omap_twl: Prevent SR to enable for am3517/am3505 devices
Date: Mon, 22 Aug 2011 15:48:40 -0700 [thread overview]
Message-ID: <87obzhgj07.fsf@ti.com> (raw)
In-Reply-To: <FCCFB4CDC6E5564B9182F639FC3560870370A4D96E@dbde02.ent.ti.com> (Abhilash Koyamangalath's message of "Mon, 8 Aug 2011 18:18:40 +0530")
"Koyamangalath, Abhilash" <abhilash.kv@ti.com> writes:
> Kevin Hilman wrote:
>>Abhilash K V <abhilash.kv@ti.com> writes:
>>
>> > From: Vaibhav Hiremath <hvaibhav@ti.com>
>> >
>> > In case of AM3517 & AM3505, Smart Reflex is not applicable so
>> > we must not enable it. So add check for am3517/05 cpu revision
>> > in omap3_twl_init() and return -ENODEV if true, else continue.
>> >
>> > Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
>> > Signed-off-by: Abhilash K V <abhilash.kv@ti.com>
>> > ---
>> > arch/arm/mach-omap2/omap_twl.c | 8 ++++++++
>> > 1 files changed, 8 insertions(+), 0 deletions(-)
>> >
>> > diff --git a/arch/arm/mach-omap2/omap_twl.c
>> b/arch/arm/mach-omap2/omap_twl.c
>> > index 07d6140..92fadcb 100644
>> > --- a/arch/arm/mach-omap2/omap_twl.c
>> > +++ b/arch/arm/mach-omap2/omap_twl.c
>> > @@ -269,6 +269,14 @@ int __init omap3_twl_init(void)
>> > if (!cpu_is_omap34xx())
>> > return -ENODEV;
>> >
>> > + /*
>> > + * In case of AM3517/AM3505 we should not be going down
>> > + * further, since SR is not applicable there.
>> > + */
>> > + if (cpu_is_omap3505() || cpu_is_omap3517()) {
>> > + return -ENODEV;
>> > + }
>> > +
>>
>> Rather than using cpu_is_*, you should add a new "feature" flag for
>> SmartReflex. We already have this for things like SGX, IVA, NEON, etc.
>> See <plat/feature.h>
> I did not find a feature.h;
sorry, I meant <plat/cpu.yh>
> did you mean OMAP3_CHECK_FEATURE macro which is used by
> omap3_check_features(), which gleans for presence of L2CACHE, IVA, SGX, NEON, ISP features
> from the Control Device Status Register (0x4800 244C) ?
yes, OMAP3_HAS_FEATURE()
> There is no such bit-field to indicate the presence of smart-reflex feature in this register.
> AFAIK, there is no such global register as well which could indicate this.
There doesn't have to be a register read to indicate this. See for
example the HAS_IO_WAKEUP feature.
Kevin
> - Abhilash
>
>> Kevin
>>
>>
>> > if (cpu_is_omap3630()) {
>> > omap3_mpu_volt_info.vp_vddmin =
>> OMAP3630_VP1_VLIMITTO_VDDMIN;
>> > omap3_mpu_volt_info.vp_vddmax =
>> OMAP3630_VP1_VLIMITTO_VDDMAX;
>>
>>
next prev parent reply other threads:[~2011-08-22 22:48 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-04 15:59 [PATCH 2/2] omap_twl: Prevent SR to enable for am3517/am3505 devices Abhilash K V
2011-08-04 15:59 ` Abhilash K V
2011-08-04 15:59 ` Abhilash K V
2011-08-04 21:55 ` Kevin Hilman
2011-08-04 21:55 ` Kevin Hilman
2011-08-04 21:55 ` Kevin Hilman
2011-08-08 12:48 ` Koyamangalath, Abhilash
2011-08-08 12:48 ` Koyamangalath, Abhilash
2011-08-08 12:48 ` Koyamangalath, Abhilash
2011-08-22 22:48 ` Kevin Hilman [this message]
2011-08-22 22:48 ` Kevin Hilman
2011-08-22 22:48 ` Kevin Hilman
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87obzhgj07.fsf@ti.com \
--to=khilman@ti.com \
--cc=abhilash.kv@ti.com \
--cc=b-cousson@ti.com \
--cc=hvaibhav@ti.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-omap@vger.kernel.org \
--cc=linux@arm.linux.org.uk \
--cc=paul@pwsan.com \
--cc=tony@atomide.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.