* [PATCH] drm/i915: Emit a user level message when resetting the GPU (or engine)
@ 2017-07-09 13:27 Chris Wilson
2017-07-09 13:44 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-07-10 14:20 ` [PATCH] " Mika Kuoppala
0 siblings, 2 replies; 4+ messages in thread
From: Chris Wilson @ 2017-07-09 13:27 UTC (permalink / raw)
To: intel-gfx
Although a banned context will be told to -EIO off if they try to submit
more requests, we have a discrepancy between whole device resets and
per-engine resets where we report the GPU reset but not the engine
resets. This leaves a bit of mystery as to why the context was banned,
and also reduces awareness overall of when a GPU (engine) reset occurs
with its possible side-effects.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michel Thierry <michel.thierry@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index d3076a74c17e..dde5783b8f80 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1865,9 +1865,10 @@ void i915_reset(struct drm_i915_private *dev_priv)
if (!i915_gem_unset_wedged(dev_priv))
goto wakeup;
+ dev_notice(dev_priv->drm.dev,
+ "Resetting chip after gpu hang\n");
error->reset_count++;
- pr_notice("drm/i915: Resetting chip after gpu hang\n");
disable_irq(dev_priv->drm.irq);
ret = i915_gem_reset_prepare(dev_priv);
if (ret) {
@@ -1945,7 +1946,9 @@ int i915_reset_engine(struct intel_engine_cs *engine)
GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &error->flags));
- DRM_DEBUG_DRIVER("resetting %s\n", engine->name);
+ dev_notice(engine->i915->drm.dev,
+ "Resetting %s after gpu hang\n", engine->name);
+ error->reset_engine_count[engine->id]++;
active_request = i915_gem_reset_prepare_engine(engine);
if (IS_ERR(active_request)) {
@@ -1978,7 +1981,6 @@ int i915_reset_engine(struct intel_engine_cs *engine)
if (ret)
goto out;
- error->reset_engine_count[engine->id]++;
out:
i915_gem_reset_finish_engine(engine);
return ret;
--
2.13.2
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^ permalink raw reply related [flat|nested] 4+ messages in thread
* ✓ Fi.CI.BAT: success for drm/i915: Emit a user level message when resetting the GPU (or engine)
2017-07-09 13:27 [PATCH] drm/i915: Emit a user level message when resetting the GPU (or engine) Chris Wilson
@ 2017-07-09 13:44 ` Patchwork
2017-07-10 14:20 ` [PATCH] " Mika Kuoppala
1 sibling, 0 replies; 4+ messages in thread
From: Patchwork @ 2017-07-09 13:44 UTC (permalink / raw)
To: Chris Wilson; +Cc: intel-gfx
== Series Details ==
Series: drm/i915: Emit a user level message when resetting the GPU (or engine)
URL : https://patchwork.freedesktop.org/series/27041/
State : success
== Summary ==
Series 27041v1 drm/i915: Emit a user level message when resetting the GPU (or engine)
https://patchwork.freedesktop.org/api/1.0/series/27041/revisions/1/mbox/
Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
fail -> PASS (fi-snb-2600) fdo#100007
Test kms_flip:
Subgroup basic-flip-vs-modeset:
skip -> PASS (fi-skl-x1585l)
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-a:
dmesg-warn -> PASS (fi-pnv-d510) fdo#101597 +1
Subgroup suspend-read-crc-pipe-b:
pass -> DMESG-WARN (fi-byt-j1900) fdo#101705
fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fdo#101597 https://bugs.freedesktop.org/show_bug.cgi?id=101597
fdo#101705 https://bugs.freedesktop.org/show_bug.cgi?id=101705
fi-bdw-5557u total:279 pass:268 dwarn:0 dfail:0 fail:0 skip:11 time:444s
fi-bdw-gvtdvm total:279 pass:265 dwarn:0 dfail:0 fail:0 skip:14 time:428s
fi-blb-e6850 total:279 pass:224 dwarn:1 dfail:0 fail:0 skip:54 time:354s
fi-bsw-n3050 total:279 pass:243 dwarn:0 dfail:0 fail:0 skip:36 time:518s
fi-bxt-j4205 total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:510s
fi-byt-j1900 total:279 pass:254 dwarn:1 dfail:0 fail:0 skip:24 time:489s
fi-byt-n2820 total:279 pass:250 dwarn:1 dfail:0 fail:0 skip:28 time:485s
fi-glk-2a total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:592s
fi-hsw-4770 total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:439s
fi-hsw-4770r total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:413s
fi-ilk-650 total:279 pass:229 dwarn:0 dfail:0 fail:0 skip:50 time:423s
fi-ivb-3520m total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:493s
fi-ivb-3770 total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:474s
fi-kbl-7500u total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:460s
fi-kbl-7560u total:279 pass:268 dwarn:1 dfail:0 fail:0 skip:10 time:580s
fi-kbl-r total:279 pass:260 dwarn:1 dfail:0 fail:0 skip:18 time:581s
fi-pnv-d510 total:279 pass:223 dwarn:1 dfail:0 fail:0 skip:55 time:558s
fi-skl-6260u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:461s
fi-skl-6700hq total:279 pass:262 dwarn:0 dfail:0 fail:0 skip:17 time:584s
fi-skl-6700k total:279 pass:257 dwarn:4 dfail:0 fail:0 skip:18 time:467s
fi-skl-6770hq total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:482s
fi-skl-gvtdvm total:279 pass:266 dwarn:0 dfail:0 fail:0 skip:13 time:436s
fi-skl-x1585l total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:496s
fi-snb-2520m total:279 pass:251 dwarn:0 dfail:0 fail:0 skip:28 time:542s
fi-snb-2600 total:279 pass:250 dwarn:0 dfail:0 fail:0 skip:29 time:405s
edc3bde190ad0559ad1c7c63e0efd8d5b4b24b2c drm-tip: 2017y-07m-07d-17h-12m-03s UTC integration manifest
8734760 drm/i915: Emit a user level message when resetting the GPU (or engine)
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_5148/
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Emit a user level message when resetting the GPU (or engine)
2017-07-09 13:27 [PATCH] drm/i915: Emit a user level message when resetting the GPU (or engine) Chris Wilson
2017-07-09 13:44 ` ✓ Fi.CI.BAT: success for " Patchwork
@ 2017-07-10 14:20 ` Mika Kuoppala
2017-07-10 15:11 ` Michel Thierry
1 sibling, 1 reply; 4+ messages in thread
From: Mika Kuoppala @ 2017-07-10 14:20 UTC (permalink / raw)
To: Chris Wilson, intel-gfx
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Although a banned context will be told to -EIO off if they try to submit
> more requests, we have a discrepancy between whole device resets and
> per-engine resets where we report the GPU reset but not the engine
> resets. This leaves a bit of mystery as to why the context was banned,
> and also reduces awareness overall of when a GPU (engine) reset occurs
> with its possible side-effects.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Michel Thierry <michel.thierry@intel.com>
> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.c | 8 +++++---
> 1 file changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index d3076a74c17e..dde5783b8f80 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -1865,9 +1865,10 @@ void i915_reset(struct drm_i915_private *dev_priv)
> if (!i915_gem_unset_wedged(dev_priv))
> goto wakeup;
>
> + dev_notice(dev_priv->drm.dev,
> + "Resetting chip after gpu hang\n");
> error->reset_count++;
>
> - pr_notice("drm/i915: Resetting chip after gpu hang\n");
> disable_irq(dev_priv->drm.irq);
> ret = i915_gem_reset_prepare(dev_priv);
> if (ret) {
> @@ -1945,7 +1946,9 @@ int i915_reset_engine(struct intel_engine_cs *engine)
>
> GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &error->flags));
>
> - DRM_DEBUG_DRIVER("resetting %s\n", engine->name);
> + dev_notice(engine->i915->drm.dev,
> + "Resetting %s after gpu hang\n", engine->name);
> + error->reset_engine_count[engine->id]++;
>
Even tho no mention, this is now in symmetry with reset to count
attempts not successes.
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
> active_request = i915_gem_reset_prepare_engine(engine);
> if (IS_ERR(active_request)) {
> @@ -1978,7 +1981,6 @@ int i915_reset_engine(struct intel_engine_cs *engine)
> if (ret)
> goto out;
>
> - error->reset_engine_count[engine->id]++;
> out:
> i915_gem_reset_finish_engine(engine);
> return ret;
> --
> 2.13.2
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] drm/i915: Emit a user level message when resetting the GPU (or engine)
2017-07-10 14:20 ` [PATCH] " Mika Kuoppala
@ 2017-07-10 15:11 ` Michel Thierry
0 siblings, 0 replies; 4+ messages in thread
From: Michel Thierry @ 2017-07-10 15:11 UTC (permalink / raw)
To: Mika Kuoppala, Chris Wilson, intel-gfx
On 7/10/2017 7:20 AM, Mika Kuoppala wrote:
> Chris Wilson <chris@chris-wilson.co.uk> writes:
>
>> Although a banned context will be told to -EIO off if they try to submit
>> more requests, we have a discrepancy between whole device resets and
>> per-engine resets where we report the GPU reset but not the engine
>> resets. This leaves a bit of mystery as to why the context was banned,
>> and also reduces awareness overall of when a GPU (engine) reset occurs
>> with its possible side-effects.
>>
>> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Michel Thierry <michel.thierry@intel.com>
>> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
>> ---
>> drivers/gpu/drm/i915/i915_drv.c | 8 +++++---
>> 1 file changed, 5 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
>> index d3076a74c17e..dde5783b8f80 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.c
>> +++ b/drivers/gpu/drm/i915/i915_drv.c
>> @@ -1865,9 +1865,10 @@ void i915_reset(struct drm_i915_private *dev_priv)
>> if (!i915_gem_unset_wedged(dev_priv))
>> goto wakeup;
>>
>> + dev_notice(dev_priv->drm.dev,
>> + "Resetting chip after gpu hang\n");
>> error->reset_count++;
>>
>> - pr_notice("drm/i915: Resetting chip after gpu hang\n");
>> disable_irq(dev_priv->drm.irq);
>> ret = i915_gem_reset_prepare(dev_priv);
>> if (ret) {
>> @@ -1945,7 +1946,9 @@ int i915_reset_engine(struct intel_engine_cs *engine)
>>
>> GEM_BUG_ON(!test_bit(I915_RESET_ENGINE + engine->id, &error->flags));
>>
>> - DRM_DEBUG_DRIVER("resetting %s\n", engine->name);
>> + dev_notice(engine->i915->drm.dev,
>> + "Resetting %s after gpu hang\n", engine->name);
>> + error->reset_engine_count[engine->id]++;
>>
>
> Even tho no mention, this is now in symmetry with reset to count
> attempts not successes.
>
True, originally I saw it as a way to prevent counting twice if there
were issues and promoted to full-reset. But it is also good to behave
the same as chip reset.
Acked-by: Michel Thierry <michel.thierry@intel.com>
> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
>
>
>> active_request = i915_gem_reset_prepare_engine(engine);
>> if (IS_ERR(active_request)) {
>> @@ -1978,7 +1981,6 @@ int i915_reset_engine(struct intel_engine_cs *engine)
>> if (ret)
>> goto out;
>>
>> - error->reset_engine_count[engine->id]++;
>> out:
>> i915_gem_reset_finish_engine(engine);
>> return ret;
>> --
>> 2.13.2
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 4+ messages in thread
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2017-07-09 13:27 [PATCH] drm/i915: Emit a user level message when resetting the GPU (or engine) Chris Wilson
2017-07-09 13:44 ` ✓ Fi.CI.BAT: success for " Patchwork
2017-07-10 14:20 ` [PATCH] " Mika Kuoppala
2017-07-10 15:11 ` Michel Thierry
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