[PATCH 0/4] Update device tree for Armada 3720 DB

[PATCH 0/4] Update device tree for Armada 3720 DB

[Gregory CLEMENT]

Hi,

the main purpose of this short series is to add the support of the
second SDHCI controller on the Armada 3720 DB board (and on the Armada
37xx SoC).

This series also adds some improvement to the device tree of the the
Armada 3720 DB board and the last patch allow using higher speed on
the SD card by adding the vqmmc regulator.

Gregory

Gregory CLEMENT (3):
  arm64: dts: marvell: armada-3720-db: Sort the dts node alphabetically
  arm64: dts: marvell: armada-3720-db: Add information about the V2
    board
  arm64: dts: marvell: armada-3720-db: Add vqmmc regulator for SD slot

Konstantin Porotchkin (1):
  arm64: dts: marvell: Enable second SDHCI controller in Armada 37xx

 arch/arm64/boot/dts/marvell/armada-3720-db.dts | 120 ++++++++++++++++---------
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi   |  11 +++
 2 files changed, 87 insertions(+), 44 deletions(-)

-- 
2.11.0

[PATCH 1/4] arm64: dts: marvell: armada-3720-db: Sort the dts node alphabetically

[Gregory CLEMENT]

Sort the reference nodes in alphabetical order to ease the merge of
future nodes.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 arch/arm64/boot/dts/marvell/armada-3720-db.dts | 83 +++++++++++++-------------
 1 file changed, 41 insertions(+), 42 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index a89855f57091..d6f12fafac6c 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -78,6 +78,20 @@
 	};
 };
 
+&eth0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii_pins>;
+	phy-mode = "rgmii-id";
+	phy = <&phy0>;
+	status = "okay";
+};
+
+&eth1 {
+	phy-mode = "sgmii";
+	phy = <&phy1>;
+	status = "okay";
+};
+
 &i2c0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&i2c1_pins>;
@@ -108,11 +122,36 @@
 	};
 };
 
+&mdio {
+	status = "okay";
+	phy0: ethernet-phy at 0 {
+		reg = <0>;
+	};
+
+	phy1: ethernet-phy at 1 {
+		reg = <1>;
+	};
+};
+
+/* CON17 (PCIe) / CON12 (mini-PCIe) */
+&pcie0 {
+	status = "okay";
+};
+
 /* CON3 */
 &sata {
 	status = "okay";
 };
 
+&sdhci0 {
+	non-removable;
+	bus-width = <8>;
+	mmc-ddr-1_8v;
+	mmc-hs400-1_8v;
+	marvell,pad-type = "fixed-1-8v";
+	status = "okay";
+};
+
 &spi0 {
 	status = "okay";
 	pinctrl-names = "default";
@@ -152,12 +191,8 @@
 	status = "okay";
 };
 
-&sdhci0 {
-	non-removable;
-	bus-width = <8>;
-	mmc-ddr-1_8v;
-	mmc-hs400-1_8v;
-	marvell,pad-type = "fixed-1-8v";
+/* CON27 */
+&usb2 {
 	status = "okay";
 };
 
@@ -166,39 +201,3 @@
 	status = "okay";
 	usb-phy = <&usb3_phy>;
 };
-
-/* CON17 (PCIe) / CON12 (mini-PCIe) */
-&pcie0 {
-	status = "okay";
-};
-
-/* CON27 */
-&usb2 {
-	status = "okay";
-};
-
-
-&mdio {
-	status = "okay";
-	phy0: ethernet-phy at 0 {
-		reg = <0>;
-	};
-
-	phy1: ethernet-phy at 1 {
-		reg = <1>;
-	};
-};
-
-&eth0 {
-	pinctrl-names = "default";
-	pinctrl-0 = <&rgmii_pins>;
-	phy-mode = "rgmii-id";
-	phy = <&phy0>;
-	status = "okay";
-};
-
-&eth1 {
-	phy-mode = "sgmii";
-	phy = <&phy1>;
-	status = "okay";
-};
-- 
2.11.0

[PATCH 1/4] arm64: dts: marvell: armada-3720-db: Sort the dts node alphabetically

[Andreas Färber]

Am 08.06.2017 um 18:51 schrieb Gregory CLEMENT:
> Sort the reference nodes in alphabetical order to ease the merge of
> future nodes.
> 
> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
> ---
>  arch/arm64/boot/dts/marvell/armada-3720-db.dts | 83 +++++++++++++-------------
>  1 file changed, 41 insertions(+), 42 deletions(-)

Reviewed-by: Andreas F?rber <afaerber@suse.de>

Regards,
Andreas

-- 
SUSE Linux GmbH, Maxfeldstr. 5, 90409 N?rnberg, Germany
GF: Felix Imend?rffer, Jane Smithard, Graham Norton
HRB 21284 (AG N?rnberg)

[PATCH 2/4] arm64: dts: marvell: armada-3720-db: Add information about the V2 board

[Gregory CLEMENT]

The initial device tree file was for the board V1.4. Now the V2.0 board
is also available. The same dtb will work for both, but the CON number
have changed, so update the comment in the dts to reflect this.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 arch/arm64/boot/dts/marvell/armada-3720-db.dts | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index d6f12fafac6c..3ee920ac0015 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -42,6 +42,10 @@
  *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  *     OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * This file is compatible with the version 1.4 and the version 2.0 of
+ * the board, however the CON numbers are different between the 2
+ * version
  */
 
 /dts-v1/;
@@ -78,6 +82,7 @@
 	};
 };
 
+/* Gigabit module on CON19(V2.0)/CON21(V1.4) */
 &eth0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&rgmii_pins>;
@@ -86,6 +91,7 @@
 	status = "okay";
 };
 
+/* Gigabit module on CON18(V2.0)/CON20(V1.4) */
 &eth1 {
 	phy-mode = "sgmii";
 	phy = <&phy1>;
@@ -133,7 +139,7 @@
 	};
 };
 
-/* CON17 (PCIe) / CON12 (mini-PCIe) */
+/* CON15(V2.0)/CON17(V1.4) : PCIe / CON15(V2.0)/CON12(V1.4) :mini-PCIe */
 &pcie0 {
 	status = "okay";
 };
@@ -184,19 +190,22 @@
 	};
 };
 
-/* Exported on the micro USB connector CON32 through an FTDI */
+/*
+ * Exported on the micro USB connector CON30(V2.0)/CON32(V1.4) through
+ * an FTDI
+ */
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart1_pins>;
 	status = "okay";
 };
 
-/* CON27 */
+/* CON27(V2.0)/CON29(V1.4) */
 &usb2 {
 	status = "okay";
 };
 
-/* CON31 */
+/* CON29(V2.0)/CON31(V1.4) */
 &usb3 {
 	status = "okay";
 	usb-phy = <&usb3_phy>;
-- 
2.11.0

[PATCH 3/4] arm64: dts: marvell: Enable second SDHCI controller in Armada 37xx

[Gregory CLEMENT]

From: Konstantin Porotchkin <kostap@marvell.com>

The Armada 37xx SOCs has 2 SDHCI interfaces. This patch adds the second
one.

Moroever, the Armada 37xx DB v2 board populates the 2 SDHCI interfaces.

The second interface is using plugable module that can either
have an SD connector or eMMC on it.
This patch adds support for SD module in the device DT.

[ gregory.clement at free-electrons.com:
 - Add more detail in commit log
 - Sort the dt node in address order
 - Document the SD slot in the dts ]

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 arch/arm64/boot/dts/marvell/armada-3720-db.dts |  9 +++++++++
 arch/arm64/boot/dts/marvell/armada-37xx.dtsi   | 11 +++++++++++
 2 files changed, 20 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 3ee920ac0015..eab3bc7e6382 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -158,6 +158,15 @@
 	status = "okay";
 };
 
+/* SD slot module on CON14(V2.0)/CON15(V1.4) */
+&sdhci1 {
+	wp-inverted;
+	cd-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>;
+	bus-width = <4>;
+	marvell,pad-type = "sd";
+	status = "okay";
+};
+
 &spi0 {
 	status = "okay";
 	pinctrl-names = "default";
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index 4d495ec39202..01a9c30be38d 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -292,6 +292,17 @@
 				};
 			};
 
+			sdhci1: sdhci at d0000 {
+				compatible = "marvell,armada-3700-sdhci",
+				"marvell,sdhci-xenon";
+				reg = <0xd0000 0x300
+				       0x1e808 0x4>;
+				interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&nb_periph_clk 0>;
+				clock-names = "core";
+				status = "disabled";
+			};
+
 			sdhci0: sdhci at d8000 {
 				compatible = "marvell,armada-3700-sdhci",
 				"marvell,sdhci-xenon";
-- 
2.11.0

[PATCH 3/4] arm64: dts: marvell: Enable second SDHCI controller in Armada 37xx

[Thomas Petazzoni]

Hello,

On Thu,  8 Jun 2017 18:51:24 +0200, Gregory CLEMENT wrote:

> diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> index 4d495ec39202..01a9c30be38d 100644
> --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
> @@ -292,6 +292,17 @@
>  				};
>  			};
>  
> +			sdhci1: sdhci at d0000 {
> +				compatible = "marvell,armada-3700-sdhci",
> +				"marvell,sdhci-xenon";

One more tab on this second line would be nice.

> +				reg = <0xd0000 0x300
> +				       0x1e808 0x4>;

I'd prefer:

				reg = <0xd0000 0x300>, <0x1e808 0x4>;

Best regards,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH 3/4] arm64: dts: marvell: Enable second SDHCI controller in Armada 37xx

[Gregory CLEMENT]

Hi Thomas,
 
 On jeu., juin 08 2017, Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote:

> Hello,
>
> On Thu,  8 Jun 2017 18:51:24 +0200, Gregory CLEMENT wrote:
>
>> diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
>> index 4d495ec39202..01a9c30be38d 100644
>> --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
>> +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
>> @@ -292,6 +292,17 @@
>>  				};
>>  			};
>>  
>> +			sdhci1: sdhci at d0000 {
>> +				compatible = "marvell,armada-3700-sdhci",
>> +				"marvell,sdhci-xenon";
>
> One more tab on this second line would be nice.

I agree but and I will aligned all the other entries too in a separate patch.

>
>> +				reg = <0xd0000 0x300
>> +				       0x1e808 0x4>;
>
> I'd prefer:
>
> 				reg = <0xd0000 0x300>, <0x1e808 0x4>;

For this one I think it is a matter of taste. I had a look on the other
files and it seems more common to put them on multi lines that on one
single line. And personally I prefer it, for me it seems more visible
that we use 2 set of registers.

So I will keep it.

Thanks,

Gregory

>
> Best regards,
>
> Thomas
> -- 
> Thomas Petazzoni, CTO, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH 3/4] arm64: dts: marvell: Enable second SDHCI controller in Armada 37xx

[Thomas Petazzoni]

Hello,

On Tue, 13 Jun 2017 12:10:29 +0200, Gregory CLEMENT wrote:

> >> +				reg = <0xd0000 0x300
> >> +				       0x1e808 0x4>;  
> >
> > I'd prefer:
> >
> > 				reg = <0xd0000 0x300>, <0x1e808 0x4>;  
> 
> For this one I think it is a matter of taste. I had a look on the other
> files and it seems more common to put them on multi lines that on one
> single line. And personally I prefer it, for me it seems more visible
> that we use 2 set of registers.

I'm not talking about multiple lines vs. one line. I'm talking about:

	reg = <X Y
	       A B>;

vs.

	reg = <X Y>,
	      <A B>;

Best regards,

Thomas
-- 
Thomas Petazzoni, CTO, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

[PATCH 3/4] arm64: dts: marvell: Enable second SDHCI controller in Armada 37xx

[Gregory CLEMENT]

Hi Thomas,
 
 On mar., juin 13 2017, Thomas Petazzoni <thomas.petazzoni@free-electrons.com> wrote:

> Hello,
>
> On Tue, 13 Jun 2017 12:10:29 +0200, Gregory CLEMENT wrote:
>
>> >> +				reg = <0xd0000 0x300
>> >> +				       0x1e808 0x4>;  
>> >
>> > I'd prefer:
>> >
>> > 				reg = <0xd0000 0x300>, <0x1e808 0x4>;  
>> 
>> For this one I think it is a matter of taste. I had a look on the other
>> files and it seems more common to put them on multi lines that on one
>> single line. And personally I prefer it, for me it seems more visible
>> that we use 2 set of registers.
>
> I'm not talking about multiple lines vs. one line. I'm talking about:
>
> 	reg = <X Y
> 	       A B>;
>
> vs.
>
> 	reg = <X Y>,
> 	      <A B>;

OK, this case I agree! And I also have to fix this file for the existing
sdhci and xor node.

Gregory


>
> Best regards,
>
> Thomas
> -- 
> Thomas Petazzoni, CTO, Free Electrons
> Embedded Linux and Kernel engineering
> http://free-electrons.com

-- 
Gregory Clement, Free Electrons
Kernel, drivers, real-time and embedded Linux
development, consulting, training and support.
http://free-electrons.com

[PATCH 4/4] arm64: dts: marvell: armada-3720-db: Add vqmmc regulator for SD slot

[Gregory CLEMENT]

By adding this regulator, the SD cards are usable at higher speed
protocols such as SDR104.

This patch was tested with an SD HC card compatible with UHS-I.

Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
---
 arch/arm64/boot/dts/marvell/armada-3720-db.dts | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index eab3bc7e6382..9df0f06ce607 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -80,6 +80,20 @@
 		compatible = "usb-nop-xceiv";
 		vcc-supply = <&exp_usb3_vbus>;
 	};
+
+	vcc_sd_reg1: regulator {
+		compatible = "regulator-gpio";
+		regulator-name = "vcc_sd1";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+
+		gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>;
+		gpios-states = <0>;
+		states = <1800000 0x1
+			  3300000 0x0>;
+		enable-active-high;
+	};
 };
 
 /* Gigabit module on CON19(V2.0)/CON21(V1.4) */
@@ -164,6 +178,7 @@
 	cd-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>;
 	bus-width = <4>;
 	marvell,pad-type = "sd";
+	vqmmc-supply = <&vcc_sd_reg1>;
 	status = "okay";
 };
 
-- 
2.11.0