From: "Alex Bennée" <alex.bennee@linaro.org>
To: Pranith Kumar <bobby.prani@gmail.com>
Cc: mttcg@listserver.greensocs.com, qemu-devel@nongnu.org,
fred.konrad@greensocs.com, a.rigo@virtualopensystems.com,
cota@braap.org, nikunj@linux.vnet.ibm.com,
mark.burton@greensocs.com, pbonzini@redhat.com,
jan.kiszka@siemens.com, serge.fdrv@gmail.com, rth@twiddle.net,
peter.maydell@linaro.org, claudio.fontana@huawei.com,
bamvor.zhangjian@linaro.org,
Peter Crosthwaite <crosthwaite.peter@gmail.com>
Subject: Re: [Qemu-devel] [PATCH v7 05/27] tcg: add options for enabling MTTCG
Date: Fri, 20 Jan 2017 14:50:13 +0000 [thread overview]
Message-ID: <87pojheqfu.fsf@linaro.org> (raw)
In-Reply-To: <878tq6r03a.fsf@gmail.com>
Pranith Kumar <bobby.prani@gmail.com> writes:
> Alex Bennée writes:
>
>> From: KONRAD Frederic <fred.konrad@greensocs.com>
>>
>> We know there will be cases where MTTCG won't work until additional work
>> is done in the front/back ends to support. It will however be useful to
>> be able to turn it on.
>>
>> As a result MTTCG will default to off unless the combination is
>> supported. However the user can turn it on for the sake of testing.
>>
>
> <snip>
>
>> static TimersState timers_state;
>> +bool mttcg_enabled;
>> +
>> +/*
>> + * We default to false if we know other options have been enabled
>> + * which are currently incompatible with MTTCG. Otherwise when each
>> + * guest (target) has been updated to support:
>> + * - atomic instructions
>> + * - memory ordering primitives (barriers)
>> + * they can set the appropriate CONFIG flags in ${target}-softmmu.mak
>> + *
>> + * Once a guest architecture has been converted to the new primitives
>> + * there are two remaining limitations to check.
>> + *
>> + * - The guest can't be oversized (e.g. 64 bit guest on 32 bit host)
>> + * - The host must have a stronger memory order than the guest
>> + *
>> + * It may be possible in future to support strong guests on weak hosts
>> + * but that will require tagging all load/stores in a guest with their
>> + * implicit memory order requirements which would likely slow things
>> + * down a lot.
>> + */
>> +
>> +static bool check_tcg_memory_orders_compatible(void)
>> +{
>> +#if defined(TCG_DEFAULT_MO) && defined(TCG_TARGET_DEFAULT_MO)
>> + return (TCG_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) == 0;
>
> I am not sure this is what we intended. If the guest is weaker than the host,
> we can still run the guest if we translate the guest barriers. With the above,
> a strong host cannot run a weaker host.
I think this is confusing because of QEMU's overload of the term target.
TCG_TARGET_DEFAULT_MO is the memory order of the host. So if there is
any expected memory order on the guest side (TCG_DEFAULT_MO) that isn't
met by the host then we fail. In ARMs case TCG_DEFAULT_MO is 0 so it
will always pass.
> I think what we want is to disallow weak hosts from running stronger guests,
> since we do not enforce the implicit ordering semantics of the guest as of
> now. In that case you can filter them out using the following:
>
> TCG_DEFAULT_MO | (TCG_DEFAULT_MO ^ ~TCG_TARGET_DEFAULT_MO) == TCG_MO_ALL
>
> We want our guest execution to prevent all possible re-ordering. The first
> term above is the host memory order. If the host is SC, we do not need to
> check anything else. If not, the second term tells us the difference in
> ordering between the guest and the host. It gives the kind of barriers
> which will be translated from guest to host. Both these together should cover
> all the cases for the memory order to be compatible.
>
> Thoughts?
That's the wrong way round. TCG_DEFAULT_MO is the guest memory order.
Maybe I should rename them to be explicitly:
TCG_GUEST_DEFAULT_MO
TCG_HOST_DEFAULT_MO
But that introduces another terminology into the TCG code.
>
> Thanks,
--
Alex Bennée
next prev parent reply other threads:[~2017-01-20 14:50 UTC|newest]
Thread overview: 62+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-01-19 17:04 [Qemu-devel] [PATCH v7 00/27] Remaining MTTCG Base patches and ARM enablement Alex Bennée
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 01/27] docs: new design document multi-thread-tcg.txt Alex Bennée
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 02/27] mttcg: translate-all: Enable locking debug in a debug build Alex Bennée
2017-01-23 18:57 ` Richard Henderson
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 03/27] mttcg: Add missing tb_lock/unlock() in cpu_exec_step() Alex Bennée
2017-01-23 18:57 ` Richard Henderson
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 04/27] tcg: move TCG_MO/BAR types into own file Alex Bennée
2017-01-23 18:59 ` Richard Henderson
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 05/27] tcg: add options for enabling MTTCG Alex Bennée
2017-01-20 1:28 ` Pranith Kumar
2017-01-20 14:50 ` Alex Bennée [this message]
2017-01-20 15:03 ` Pranith Kumar
2017-01-23 19:06 ` Richard Henderson
2017-01-24 20:25 ` Alex Bennée
2017-01-24 20:48 ` Richard Henderson
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 06/27] tcg: add kick timer for single-threaded vCPU emulation Alex Bennée
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 07/27] tcg: rename tcg_current_cpu to tcg_current_rr_cpu Alex Bennée
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 08/27] tcg: drop global lock during TCG code execution Alex Bennée
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 09/27] tcg: remove global exit_request Alex Bennée
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 10/27] tcg: enable tb_lock() for SoftMMU Alex Bennée
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 11/27] tcg: enable thread-per-vCPU Alex Bennée
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 12/27] tcg: handle EXCP_ATOMIC exception for system emulation Alex Bennée
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 13/27] cputlb: add assert_cpu_is_self checks Alex Bennée
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 14/27] cputlb: tweak qemu_ram_addr_from_host_nofail reporting Alex Bennée
2017-01-23 19:07 ` Richard Henderson
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 15/27] cputlb: introduce tlb_flush_* async work Alex Bennée
2017-01-23 19:10 ` Richard Henderson
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 16/27] cputlb: add tlb_flush_by_mmuidx async routines Alex Bennée
2017-01-23 19:11 ` Richard Henderson
2017-01-24 20:31 ` Alex Bennée
2017-01-24 20:44 ` Richard Henderson
2017-01-25 14:09 ` Alex Bennée
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 17/27] cputlb: atomically update tlb fields used by tlb_reset_dirty Alex Bennée
2017-01-23 19:17 ` Richard Henderson
2017-01-19 17:04 ` [Qemu-devel] [PATCH v7 18/27] cputlb: introduce tlb_flush_*_all_cpus Alex Bennée
2017-01-23 19:21 ` Richard Henderson
2017-01-24 20:34 ` Alex Bennée
2017-01-24 20:47 ` Richard Henderson
2017-01-25 14:21 ` Alex Bennée
2017-01-19 17:04 ` [PATCH v7 19/27] target-arm/powerctl: defer cpu reset work to CPU context Alex Bennée
2017-01-19 17:04 ` [Qemu-devel] " Alex Bennée
2017-01-19 17:05 ` [PATCH v7 20/27] target-arm: ensure BQL taken for ARM_CP_IO register access Alex Bennée
2017-01-19 17:05 ` [Qemu-devel] " Alex Bennée
2017-01-19 17:05 ` [PATCH v7 21/27] target-arm: helpers which may affect global state need the BQL Alex Bennée
2017-01-19 17:05 ` [Qemu-devel] " Alex Bennée
2017-01-19 17:05 ` [PATCH v7 22/27] target-arm: don't generate WFE/YIELD calls for MTTCG Alex Bennée
2017-01-19 17:05 ` [Qemu-devel] " Alex Bennée
2017-01-19 17:05 ` [PATCH v7 23/27] target-arm/cpu.h: make ARM_CP defined consistent Alex Bennée
2017-01-19 17:05 ` [Qemu-devel] " Alex Bennée
2017-01-19 17:05 ` [PATCH v7 24/27] target-arm: introduce ARM_CP_EXIT_PC Alex Bennée
2017-01-19 17:05 ` [Qemu-devel] " Alex Bennée
2017-01-19 17:05 ` [PATCH v7 25/27] target-arm: ensure all cross vCPUs TLB flushes complete Alex Bennée
2017-01-19 17:05 ` [Qemu-devel] " Alex Bennée
2017-01-19 17:05 ` [PATCH v7 26/27] tcg: enable MTTCG by default for ARM on x86 hosts Alex Bennée
2017-01-19 17:05 ` [Qemu-devel] " Alex Bennée
2017-01-20 0:08 ` Pranith Kumar
2017-01-20 0:08 ` [Qemu-devel] " Pranith Kumar
2017-01-20 10:53 ` Alex Bennée
2017-01-20 10:53 ` [Qemu-devel] " Alex Bennée
2017-01-20 14:30 ` Pranith Kumar
2017-01-20 14:30 ` [Qemu-devel] " Pranith Kumar
2017-01-19 17:05 ` [Qemu-devel] [PATCH v7 27/27] target-ppc: take global mutex for set_irq Alex Bennée
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