From: Jani Nikula <jani.nikula@linux.intel.com>
To: "Singh, Gaurav K" <gaurav.k.singh@intel.com>,
intel-gfx <intel-gfx@lists.freedesktop.org>
Cc: Shobhit Kumar <shobhit.kumar@intel.com>
Subject: Re: [PATCH 2/4] drm/i915: DSI sequence related changes for DSI Port C
Date: Tue, 09 Dec 2014 12:30:49 +0200 [thread overview]
Message-ID: <87ppbti086.fsf@intel.com> (raw)
In-Reply-To: <5486C62F.20701@intel.com>
On Tue, 09 Dec 2014, "Singh, Gaurav K" <gaurav.k.singh@intel.com> wrote:
> On 12/7/2014 4:13 PM, Gaurav K Singh wrote:
>> For DSI Port A & C, the seq_port value has been set to 0 now in VBT
>> Now the sequence of DSI single link on Port A and Port C will based
>> on the DVO port from VBT block 2.
>>
>> Signed-off-by: Gaurav K Singh <gaurav.k.singh@intel.com>
>> ---
>> drivers/gpu/drm/i915/intel_dsi_panel_vbt.c | 9 ++++++++-
>> 1 file changed, 8 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
>> index f8c2269..e7e2e52 100644
>> --- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
>> +++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
>> @@ -110,7 +110,14 @@ static u8 *mipi_exec_send_packet(struct intel_dsi *intel_dsi, u8 *data)
>> vc = (byte >> MIPI_VIRTUAL_CHANNEL_SHIFT) & 0x3;
>> seq_port = (byte >> MIPI_PORT_SHIFT) & 0x3;
>>
>> - port = intel_dsi_seq_port_to_port(seq_port);
>> + /* For DSI Port A & C, the seq_port value has been set to 0 now in VBT
>> + * Now the sequence of DSI single link on Port A and Port C will based
>> + * on the DVO port from VBT block 2.
>> + */
>> + if (intel_dsi->ports == (1 << PORT_C))
>> + port = PORT_C;
>> + else
>> + port = intel_dsi_seq_port_to_port(seq_port);
>> /* LP or HS mode */
>> intel_dsi->hs = mode;
>>
>
> Jani,
>
> Need your reviewed-by on this patch too.
Okay, I was confused because there were actually five patches in this
four patch series! ;)
The *code* is
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
because I understand it, but frankly both the commit message and the
comment confuse me more.
>
> With regards,
> Gaurav
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Jani Nikula, Intel Open Source Technology Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2014-12-09 10:30 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-07 10:43 [PATCH 0/4] BYT DSI Enable on Port C Gaurav K Singh
2014-12-07 10:43 ` [PATCH 1/4] drm/i915: Use DSI Pll1 for enabling MIPI DSI " Gaurav K Singh
2014-12-07 11:21 ` [PATCH] " Gaurav K Singh
2014-12-08 11:33 ` Jani Nikula
2014-12-09 5:36 ` Singh, Gaurav K
2014-12-09 0:45 ` shuang.he
2014-12-09 5:27 ` [PATCH 1/4] " Gaurav K Singh
2014-12-09 8:27 ` Jani Nikula
2014-12-07 10:43 ` [PATCH 2/4] drm/i915: DSI sequence related changes for DSI " Gaurav K Singh
2014-12-09 9:51 ` Singh, Gaurav K
2014-12-09 10:30 ` Jani Nikula [this message]
2014-12-09 13:49 ` Singh, Gaurav K
2014-12-10 9:20 ` Daniel Vetter
2014-12-10 9:35 ` Singh, Gaurav K
2014-12-10 16:37 ` [PATCH 2/4] drm/i915: Changes related to the sequence port no for Gaurav K Singh
2014-12-10 17:01 ` Daniel Vetter
2014-12-07 10:43 ` [PATCH 3/4] drm/i915: Enable MIPI PHY transparent latch for DSI Port C Gaurav K Singh
2014-12-09 8:36 ` Jani Nikula
2014-12-07 10:43 ` [PATCH 4/4] drm/i915: Get HW state changes required for DSI port C Gaurav K Singh
2014-12-08 11:37 ` Jani Nikula
2014-12-08 13:13 ` Singh, Gaurav K
2014-12-08 13:31 ` Jani Nikula
2014-12-09 5:29 ` [PATCH 4/4] drm/i915: Software workaround for getting the HW status of DSI Port C on BYT Gaurav K Singh
2014-12-09 8:34 ` Jani Nikula
2014-12-09 9:49 ` Daniel Vetter
2014-12-09 0:41 ` [PATCH 4/4] drm/i915: Get HW state changes required for DSI port C shuang.he
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