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From: Nam Cao <namcao@linutronix.de>
To: Inochi Amaoto <inochiama@gmail.com>,
	Inochi Amaoto <inochiama@gmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Samuel Holland <samuel.holland@sifive.com>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	Yixun Lan <dlan@gentoo.org>, Longbin Li <looong.bin@gmail.com>
Subject: Re: [PATCH] irqchip/sifive-plic: Respect mask state when setting affinity
Date: Fri, 08 Aug 2025 06:52:42 +0200	[thread overview]
Message-ID: <87qzxmpg85.fsf@yellow.woof> (raw)
In-Reply-To: <prnjyu7ev5scocf4jh5jikox3niftje364lf3bjvizppxamdov@hbizpiazqual>

Inochi Amaoto <inochiama@gmail.com> writes:

> On Fri, Aug 08, 2025 at 06:01:39AM +0800, Inochi Amaoto wrote:
> After some dig in, I found it is not very necessary to add this,
> When all enable bit is clear, the PRIORIT register of irq is
> not functional, so only umask the irq does not make sense. Only
> calling irq_enable does enable the irq.

Yeah, I contemplated doing this myself when I added the unmask to
plic_irq_enable(), because it looks more natural that plic_irq_enable()
and plic_irq_disable() are opposite. But I don't think it is necessary.

> I prefer to add a comment to describe this behavior, instead of
> adding this change in a separate patch.

No preference from me.

Nam

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WARNING: multiple messages have this Message-ID (diff)
From: Nam Cao <namcao@linutronix.de>
To: Inochi Amaoto <inochiama@gmail.com>,
	Inochi Amaoto <inochiama@gmail.com>,
	Thomas Gleixner <tglx@linutronix.de>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Samuel Holland <samuel.holland@sifive.com>
Cc: linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	Yixun Lan <dlan@gentoo.org>, Longbin Li <looong.bin@gmail.com>
Subject: Re: [PATCH] irqchip/sifive-plic: Respect mask state when setting affinity
Date: Fri, 08 Aug 2025 06:52:42 +0200	[thread overview]
Message-ID: <87qzxmpg85.fsf@yellow.woof> (raw)
In-Reply-To: <prnjyu7ev5scocf4jh5jikox3niftje364lf3bjvizppxamdov@hbizpiazqual>

Inochi Amaoto <inochiama@gmail.com> writes:

> On Fri, Aug 08, 2025 at 06:01:39AM +0800, Inochi Amaoto wrote:
> After some dig in, I found it is not very necessary to add this,
> When all enable bit is clear, the PRIORIT register of irq is
> not functional, so only umask the irq does not make sense. Only
> calling irq_enable does enable the irq.

Yeah, I contemplated doing this myself when I added the unmask to
plic_irq_enable(), because it looks more natural that plic_irq_enable()
and plic_irq_disable() are opposite. But I don't think it is necessary.

> I prefer to add a comment to describe this behavior, instead of
> adding this change in a separate patch.

No preference from me.

Nam

  reply	other threads:[~2025-08-08  4:53 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-07 11:18 [PATCH] irqchip/sifive-plic: Respect mask state when setting affinity Inochi Amaoto
2025-08-07 11:18 ` Inochi Amaoto
2025-08-07 12:39 ` Nam Cao
2025-08-07 12:39   ` Nam Cao
2025-08-07 22:01   ` Inochi Amaoto
2025-08-07 22:01     ` Inochi Amaoto
2025-08-08  0:08     ` Inochi Amaoto
2025-08-08  0:08       ` Inochi Amaoto
2025-08-08  4:52       ` Nam Cao [this message]
2025-08-08  4:52         ` Nam Cao
2025-08-08  8:29         ` Inochi Amaoto
2025-08-08  8:29           ` Inochi Amaoto

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