Re: [PATCH] gdbstub: update aarch64-core.xml

["Alex Bennée" <alex.bennee@linaro.org>]

Manos Pitsidianakis <manos.pitsidianakis@linaro.org> writes:

> On Mon, 19 May 2025 15:55, Alex Bennée <alex.bennee@linaro.org> wrote:
>>Manos Pitsidianakis <manos.pitsidianakis@linaro.org> writes:
>>
>>> Update aarch64-core.xml to include field definitions for PSTATE, which
>>> in gdb is modelled in the cpsr (current program status register)
>>> pseudo-register, named after the actual cpsr register in armv7.
>>>
>>> Defining the fields layout of the register allows easy inspection of for
>>> example, the current exception level (EL):
>>>
>>> For example. Before booting a Linux guest, EL=2, but after booting and
>>> Ctrl-C'ing in gdb, we get EL=0:
>>>
>>>   (gdb) info registers $cpsr
>>>   cpsr           0x20402009          [ SP EL=2 BTYPE=0 PAN C ]
>>>   (gdb) cont
>>>   Continuing.
>>>   ^C
>>>   Thread 2 received signal SIGINT, Interrupt.
>>>   0x0000ffffaaff286c in ?? ()
>>>   (gdb) info registers $cpsr
>>>   cpsr           0x20001000          [ EL=0 BTYPE=0 SSBS C ]
>>>
>>> The aarch64-core.xml has been updated to match exactly the version
>>> retrieved from upstream gdb, retrieved in 2025-05-19 from HEAD commit
>>> 9f4dc0b137c86f6ff2098cb1ab69442c69d6023d.
>>>
>>> https://sourceware.org/git/?p=binutils-gdb.git;a=tree;h=9f4dc0b137c86f6ff2098cb1ab69442c69d6023d
>>>
>>> Signed-off-by: Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
>>
>>Queued to gdbstub/next, thanks.
>>
>
> Would patches for the field system registers (NZCV, CurrentEL, DAIF, 
> SPSel) be acceptable?
>
> If yes, I think defining them in the static core xml is cleaner than 
> generating them dynamically in "system-registers.xml" like we do with 
> arm_gen_dynamic_sysreg_feature() but both can work. The drawback would 
> be that we wouldn't match upstream gdb's core xml schema anymore. (Maybe 
> we  can add a new xml include "pstate.xml" instead)

You could submit to the gdb core schema first (surely they would also
benefit from the patch?).


-- 
Alex Bennée
Virtualisation Tech Lead @ Linaro