From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ville Syrjala <ville.syrjala@linux.intel.com>,
intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/6] drm/i915/vga: Clean up VGACNTRL bits
Date: Thu, 17 Apr 2025 15:45:56 +0300 [thread overview]
Message-ID: <87r01rnegr.fsf@intel.com> (raw)
In-Reply-To: <20250417114454.12836-2-ville.syrjala@linux.intel.com>
On Thu, 17 Apr 2025, Ville Syrjala <ville.syrjala@linux.intel.com> wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> Use REG_BIT() & co. for the VGACNTRL register bits.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 7 ++++---
> 1 file changed, 4 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 49beab8e324d..81765f27b258 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -1814,9 +1814,10 @@
>
> /* VBIOS regs */
> #define VGACNTRL _MMIO(0x71400)
> -# define VGA_DISP_DISABLE (1 << 31)
> -# define VGA_2X_MODE (1 << 30)
> -# define VGA_PIPE_B_SELECT (1 << 29)
> +#define VGA_DISP_DISABLE REG_BIT(31)
> +#define VGA_2X_MODE REG_BIT(30)
> +#define VGA_PIPE_SEL_MASK REG_BIT(29)
> +#define VGA_PIPE_SEL(pipe) REG_FIELD_PREP(VGA_PIPE_SEL_MASK, (pipe))
>
> #define VLV_VGACNTRL _MMIO(VLV_DISPLAY_BASE + 0x71400)
--
Jani Nikula, Intel
next prev parent reply other threads:[~2025-04-17 12:46 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-17 11:44 [PATCH 0/6] drm/i915/vga: Clean up VGA plane handling Ville Syrjala
2025-04-17 11:44 ` [PATCH 1/6] drm/i915/vga: Clean up VGACNTRL bits Ville Syrjala
2025-04-17 12:45 ` Jani Nikula [this message]
2025-04-17 11:44 ` [PATCH 2/6] drm/i915/vga: Add more " Ville Syrjala
2025-04-17 12:50 ` Jani Nikula
2025-04-17 11:44 ` [PATCH 3/6] drm/i915/vga: Extract intel_vga_regs.h Ville Syrjala
2025-04-17 12:52 ` Jani Nikula
2025-04-17 11:44 ` [PATCH 4/6] drm/i915/vga: Include the current pipe in the VGA disable debug message Ville Syrjala
2025-04-17 12:53 ` Jani Nikula
2025-04-17 11:44 ` [PATCH 5/6] drm/i915/vga: Nuke vga_redisable_power_on() Ville Syrjala
2025-04-17 13:05 ` Jani Nikula
2025-04-17 11:44 ` [PATCH 6/6] drm/i915/vga: Consolidate intel_vga_disable() calls Ville Syrjala
2025-04-17 13:32 ` Jani Nikula
2025-04-17 12:41 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/vga: Clean up VGA plane handling Patchwork
2025-04-17 12:41 ` ✗ Fi.CI.SPARSE: " Patchwork
2025-04-17 13:11 ` ✓ i915.CI.BAT: success " Patchwork
2025-04-18 0:14 ` ✗ i915.CI.Full: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87r01rnegr.fsf@intel.com \
--to=jani.nikula@linux.intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=ville.syrjala@linux.intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.