[PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[Thomas Bonnefille]

From: Clément Léger <clement.leger@bootlin.com>

The EB board (Expansion board) supports both RZ/N1D and RZ-N1S. Since this
configuration targets only the RZ/N1D, it is named r9a06g032-rzn1d400-eb.
It adds support for the 2 additional switch ports (port C and D) that are
available on that board.

Signed-off-by: Clément Léger <clement.leger@bootlin.com>

[Thomas moved the dts to the renesas directory and declared the leds in
each phy]

Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
---
This short series adds support for the RZ/N1 Expansion Board. This board
is a carrier board on which a daughter board (either RZ/N1D or RZ/N1S)
can be plugged. The device-tree that is added by this series enables the
use to the 2 external switch ports that are present on this board.
---
V3:
 - Drop bindings commit as it was applied to master
 - Move Makefile modification to arch/arm/boot/dts/renesas/Makefile
 - Declare LEDs in PHY.
 - Use the driver default LED configuration as there was no reason to
   use a different one.

V2:
 - Add "renesas,rzn1d400-db" in list of compatibles for EB board
 - Replace '_' with '-' in eth pins node name
 - Split some long lines in dts
---
 arch/arm/boot/dts/renesas/Makefile                 |   1 +
 .../arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts | 120 +++++++++++++++++++++
 2 files changed, 121 insertions(+)

diff --git a/arch/arm/boot/dts/renesas/Makefile b/arch/arm/boot/dts/renesas/Makefile
index 833a02447ecf7a02bd2efe70fae15213ede9a6de..947c7fe0280337a3aa6e9a0257f406694892239c 100644
--- a/arch/arm/boot/dts/renesas/Makefile
+++ b/arch/arm/boot/dts/renesas/Makefile
@@ -30,4 +30,5 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
 	r8a7794-alt.dtb \
 	r8a7794-silk.dtb \
 	r9a06g032-rzn1d400-db.dtb \
+	r9a06g032-rzn1d400-eb.dtb \
 	sh73a0-kzm9g.dtb
diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
new file mode 100644
index 0000000000000000000000000000000000000000..20478941170bade197afb5cc9b3d694bd9a30951
--- /dev/null
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree Source for the RZN1D-EB Board
+ *
+ * Copyright (C) 2023 Schneider-Electric
+ *
+ */
+
+#include "r9a06g032-rzn1d400-db.dts"
+
+/ {
+	model = "RZN1D-EB Board";
+	compatible = "renesas,rzn1d400-eb", "renesas,rzn1d400-db",
+		     "renesas,r9a06g032";
+};
+
+&mii_conv2 {
+	renesas,miic-input = <MIIC_SWITCH_PORTD>;
+	status = "okay";
+};
+
+&mii_conv3 {
+	renesas,miic-input = <MIIC_SWITCH_PORTC>;
+	status = "okay";
+};
+
+&pinctrl{
+	pins_eth1: pins-eth1 {
+		pinmux = <RZN1_PINMUX(12, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(13, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(14, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(15, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(16, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(17, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(18, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(19, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(20, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(21, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(22, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(23, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
+		drive-strength = <6>;
+		bias-disable;
+	};
+
+	pins_eth2: pins-eth2 {
+		pinmux = <RZN1_PINMUX(24, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(25, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(26, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(27, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(28, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(29, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(30, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(31, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(32, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(33, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(34, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
+			 <RZN1_PINMUX(35, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
+		drive-strength = <6>;
+		bias-disable;
+	};
+};
+
+&switch {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pins_eth1>, <&pins_eth2>, <&pins_eth3>, <&pins_eth4>,
+		    <&pins_mdio1>;
+
+	mdio {
+		/* CN15 and CN16 switches must be configured in MDIO2 mode */
+		switch0phy1: ethernet-phy@1 {
+			reg = <1>;
+			leds {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				led@0 {
+					reg = <0>;
+				};
+				led@1 {
+					reg = <1>;
+				};
+				led@2 {
+					reg = <2>;
+				};
+			};	
+		};
+
+		switch0phy10: ethernet-phy@10 {
+			reg = <10>;
+			leds {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				led@0 {
+					reg = <0>;
+				};
+				led@1 {
+					reg = <1>;
+				};
+				led@2 {
+					reg = <2>;
+				};
+			};	
+		};
+	};
+};
+
+&switch_port2 {
+	label = "lan2";
+	phy-mode = "rgmii-id";
+	phy-handle = <&switch0phy10>;
+	status = "okay";
+};
+
+&switch_port3 {
+	label = "lan3";
+	phy-mode = "rgmii-id";
+	phy-handle = <&switch0phy1>;
+	status = "okay";
+};

---
base-commit: 9c5968db9e625019a0ee5226c7eebef5519d366a
change-id: 20250127-rzn1d400-eb-3fc1479a13e6

Best regards,
-- 
Thomas Bonnefille <thomas.bonnefille@bootlin.com>

Re: [PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[Wolfram Sang]

[-- Attachment #1: Type: text/plain, Size: 681 bytes --]

On Fri, Mar 14, 2025 at 07:56:29PM +0100, Thomas Bonnefille wrote:
> From: Clément Léger <clement.leger@bootlin.com>
> 
> The EB board (Expansion board) supports both RZ/N1D and RZ-N1S. Since this
> configuration targets only the RZ/N1D, it is named r9a06g032-rzn1d400-eb.
> It adds support for the 2 additional switch ports (port C and D) that are
> available on that board.
> 
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
> 
> [Thomas moved the dts to the renesas directory and declared the leds in
> each phy]
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>

Oh, cool! I will definitely test it next week. Thanks a lot!


[-- Attachment #2: signature.asc --]
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Re: [PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[Thomas Bonnefille]

Hello,
Erratum, there are some trailing whitespaces hiding in this file, it
seems like I had some checkpatch problems.
I'll send a v4 soon.

On Fri Mar 14, 2025 at 7:56 PM CET, Thomas Bonnefille wrote:
> From: Clément Léger <clement.leger@bootlin.com>
>
> The EB board (Expansion board) supports both RZ/N1D and RZ-N1S. Since this
> configuration targets only the RZ/N1D, it is named r9a06g032-rzn1d400-eb.
> It adds support for the 2 additional switch ports (port C and D) that are
> available on that board.
>
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
>
> [Thomas moved the dts to the renesas directory and declared the leds in
> each phy]
>
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
> ---
> This short series adds support for the RZ/N1 Expansion Board. This board
> is a carrier board on which a daughter board (either RZ/N1D or RZ/N1S)
> can be plugged. The device-tree that is added by this series enables the
> use to the 2 external switch ports that are present on this board.
> ---
> V3:
>  - Drop bindings commit as it was applied to master
>  - Move Makefile modification to arch/arm/boot/dts/renesas/Makefile
>  - Declare LEDs in PHY.
>  - Use the driver default LED configuration as there was no reason to
>    use a different one.
>
> V2:
>  - Add "renesas,rzn1d400-db" in list of compatibles for EB board
>  - Replace '_' with '-' in eth pins node name
>  - Split some long lines in dts
> ---
>  arch/arm/boot/dts/renesas/Makefile                 |   1 +
>  .../arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts | 120 +++++++++++++++++++++
>  2 files changed, 121 insertions(+)
>
> diff --git a/arch/arm/boot/dts/renesas/Makefile b/arch/arm/boot/dts/renesas/Makefile
> index 833a02447ecf7a02bd2efe70fae15213ede9a6de..947c7fe0280337a3aa6e9a0257f406694892239c 100644
> --- a/arch/arm/boot/dts/renesas/Makefile
> +++ b/arch/arm/boot/dts/renesas/Makefile
> @@ -30,4 +30,5 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
>  	r8a7794-alt.dtb \
>  	r8a7794-silk.dtb \
>  	r9a06g032-rzn1d400-db.dtb \
> +	r9a06g032-rzn1d400-eb.dtb \
>  	sh73a0-kzm9g.dtb
> diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
> new file mode 100644
> index 0000000000000000000000000000000000000000..20478941170bade197afb5cc9b3d694bd9a30951
> --- /dev/null
> +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
> @@ -0,0 +1,120 @@
> +// SPDX-License-Identifier: GPL-2.0
> +/*
> + * Device Tree Source for the RZN1D-EB Board
> + *
> + * Copyright (C) 2023 Schneider-Electric
> + *
> + */
> +
> +#include "r9a06g032-rzn1d400-db.dts"
> +
> +/ {
> +	model = "RZN1D-EB Board";
> +	compatible = "renesas,rzn1d400-eb", "renesas,rzn1d400-db",
> +		     "renesas,r9a06g032";
> +};
> +
> +&mii_conv2 {
> +	renesas,miic-input = <MIIC_SWITCH_PORTD>;
> +	status = "okay";
> +};
> +
> +&mii_conv3 {
> +	renesas,miic-input = <MIIC_SWITCH_PORTC>;
> +	status = "okay";
> +};
> +
> +&pinctrl{
> +	pins_eth1: pins-eth1 {
> +		pinmux = <RZN1_PINMUX(12, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(13, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(14, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(15, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(16, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(17, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(18, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(19, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(20, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(21, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(22, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(23, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
> +		drive-strength = <6>;
> +		bias-disable;
> +	};
> +
> +	pins_eth2: pins-eth2 {
> +		pinmux = <RZN1_PINMUX(24, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(25, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(26, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(27, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(28, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(29, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(30, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(31, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(32, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(33, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(34, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
> +			 <RZN1_PINMUX(35, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>;
> +		drive-strength = <6>;
> +		bias-disable;
> +	};
> +};
> +
> +&switch {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&pins_eth1>, <&pins_eth2>, <&pins_eth3>, <&pins_eth4>,
> +		    <&pins_mdio1>;
> +
> +	mdio {
> +		/* CN15 and CN16 switches must be configured in MDIO2 mode */
> +		switch0phy1: ethernet-phy@1 {
> +			reg = <1>;
> +			leds {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				led@0 {
> +					reg = <0>;
> +				};
> +				led@1 {
> +					reg = <1>;
> +				};
> +				led@2 {
> +					reg = <2>;
> +				};
> +			};	
> +		};
> +
> +		switch0phy10: ethernet-phy@10 {
> +			reg = <10>;
> +			leds {
> +				#address-cells = <1>;
> +				#size-cells = <0>;
> +
> +				led@0 {
> +					reg = <0>;
> +				};
> +				led@1 {
> +					reg = <1>;
> +				};
> +				led@2 {
> +					reg = <2>;
> +				};
> +			};	
> +		};
> +	};
> +};
> +
> +&switch_port2 {
> +	label = "lan2";
> +	phy-mode = "rgmii-id";
> +	phy-handle = <&switch0phy10>;
> +	status = "okay";
> +};
> +
> +&switch_port3 {
> +	label = "lan3";
> +	phy-mode = "rgmii-id";
> +	phy-handle = <&switch0phy1>;
> +	status = "okay";
> +};
>
> ---
> base-commit: 9c5968db9e625019a0ee5226c7eebef5519d366a
> change-id: 20250127-rzn1d400-eb-3fc1479a13e6
>
> Best regards,

Re: [PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[Thomas Bonnefille]

On Fri Mar 14, 2025 at 8:01 PM CET, Wolfram Sang wrote:
> On Fri, Mar 14, 2025 at 07:56:29PM +0100, Thomas Bonnefille wrote:
>> From: Clément Léger <clement.leger@bootlin.com>
>> 
>> The EB board (Expansion board) supports both RZ/N1D and RZ-N1S. Since this
>> configuration targets only the RZ/N1D, it is named r9a06g032-rzn1d400-eb.
>> It adds support for the 2 additional switch ports (port C and D) that are
>> available on that board.
>> 
>> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
>> 
>> [Thomas moved the dts to the renesas directory and declared the leds in
>> each phy]
>> 
>> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
>
> Oh, cool! I will definitely test it next week. Thanks a lot!

Hello, thank you very much, I would be really interested to know if the
LEDS on the ethernet port work on the board, as I didn't have the EB but
a similar product with the same SoC.

Re: [PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[kernel test robot]

:::::: 
:::::: Manual check reason: "dtcheck: binding changes may go via different trees"
:::::: 

BCC: lkp@intel.com
CC: oe-kbuild-all@lists.linux.dev
In-Reply-To: <20250314-rzn1d400-eb-v3-1-45c4fd3f6e01@bootlin.com>
References: <20250314-rzn1d400-eb-v3-1-45c4fd3f6e01@bootlin.com>
TO: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
TO: Geert Uytterhoeven <geert+renesas@glider.be>
TO: Magnus Damm <magnus.damm@gmail.com>
TO: Rob Herring <robh@kernel.org>
TO: Krzysztof Kozlowski <krzk@kernel.org>
TO: Conor Dooley <conor+dt@kernel.org>
CC: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
CC: "Miquèl Raynal" <miquel.raynal@bootlin.com>
CC: linux-renesas-soc@vger.kernel.org
CC: devicetree@vger.kernel.org
CC: linux-kernel@vger.kernel.org
CC: "Clément Léger" <clement.leger@bootlin.com>
CC: Thomas Bonnefille <thomas.bonnefille@bootlin.com>

Hi Thomas,

kernel test robot noticed the following build warnings:

[auto build test WARNING on 9c5968db9e625019a0ee5226c7eebef5519d366a]

url:    https://github.com/intel-lab-lkp/linux/commits/Thomas-Bonnefille/ARM-dts-r9a06g032-add-r9a06g032-rzn1d400-eb-board-device-tree/20250315-025809
base:   9c5968db9e625019a0ee5226c7eebef5519d366a
patch link:    https://lore.kernel.org/r/20250314-rzn1d400-eb-v3-1-45c4fd3f6e01%40bootlin.com
patch subject: [PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree
:::::: branch date: 3 days ago
:::::: commit date: 3 days ago
config: arm-randconfig-051-20250315 (https://download.01.org/0day-ci/archive/20250317/202503172325.DvN3eCYo-lkp@intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 14.2.0
dtschema version: 2025.3.dev4+g7b57675
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20250317/202503172325.DvN3eCYo-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/r/202503172325.DvN3eCYo-lkp@intel.com/

dtcheck warnings: (new ones prefixed by >>)
   arch/arm/boot/dts/renesas/r9a06g032.dtsi:393.27-442.5: Warning (avoid_unnecessary_addr_size): /soc/switch@44050000: unnecessary #address-cells/#size-cells without "ranges", "dma-ranges" or child "reg" property
>> arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: cpus: cpu@1:enable-method:0: 'spin-table' was expected
   	from schema $id: http://devicetree.org/schemas/cpus.yaml#
>> arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: serial@40060000: compatible: 'oneOf' conditional failed, one must be fixed:
   	['renesas,r9a06g032-uart', 'renesas,rzn1-uart', 'snps,dw-apb-uart'] is too long
   	'renesas,r9a06g032-uart' is not one of ['brcm,bcm11351-dw-apb-uart', 'brcm,bcm21664-dw-apb-uart', 'rockchip,px30-uart', 'rockchip,rk1808-uart', 'rockchip,rk3036-uart', 'rockchip,rk3066-uart', 'rockchip,rk3128-uart', 'rockchip,rk3188-uart', 'rockchip,rk3288-uart', 'rockchip,rk3308-uart', 'rockchip,rk3328-uart', 'rockchip,rk3368-uart', 'rockchip,rk3399-uart', 'rockchip,rk3528-uart', 'rockchip,rk3568-uart', 'rockchip,rk3576-uart', 'rockchip,rk3588-uart', 'rockchip,rv1108-uart', 'rockchip,rv1126-uart', 'sophgo,sg2044-uart', 'starfive,jh7100-hsuart', 'starfive,jh7100-uart', 'starfive,jh7110-uart']
   	'snps,dw-apb-uart' was expected
   	from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
>> arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: serial@40060000: Unevaluated properties are not allowed ('compatible' was unexpected)
   	from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
   arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: serial@40061000: compatible: 'oneOf' conditional failed, one must be fixed:
   	['renesas,r9a06g032-uart', 'renesas,rzn1-uart', 'snps,dw-apb-uart'] is too long
   	'renesas,r9a06g032-uart' is not one of ['brcm,bcm11351-dw-apb-uart', 'brcm,bcm21664-dw-apb-uart', 'rockchip,px30-uart', 'rockchip,rk1808-uart', 'rockchip,rk3036-uart', 'rockchip,rk3066-uart', 'rockchip,rk3128-uart', 'rockchip,rk3188-uart', 'rockchip,rk3288-uart', 'rockchip,rk3308-uart', 'rockchip,rk3328-uart', 'rockchip,rk3368-uart', 'rockchip,rk3399-uart', 'rockchip,rk3528-uart', 'rockchip,rk3568-uart', 'rockchip,rk3576-uart', 'rockchip,rk3588-uart', 'rockchip,rv1108-uart', 'rockchip,rv1126-uart', 'sophgo,sg2044-uart', 'starfive,jh7100-hsuart', 'starfive,jh7100-uart', 'starfive,jh7110-uart']
   	'snps,dw-apb-uart' was expected
   	from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
   arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: serial@40062000: compatible: 'oneOf' conditional failed, one must be fixed:
   	['renesas,r9a06g032-uart', 'renesas,rzn1-uart', 'snps,dw-apb-uart'] is too long
   	'renesas,r9a06g032-uart' is not one of ['brcm,bcm11351-dw-apb-uart', 'brcm,bcm21664-dw-apb-uart', 'rockchip,px30-uart', 'rockchip,rk1808-uart', 'rockchip,rk3036-uart', 'rockchip,rk3066-uart', 'rockchip,rk3128-uart', 'rockchip,rk3188-uart', 'rockchip,rk3288-uart', 'rockchip,rk3308-uart', 'rockchip,rk3328-uart', 'rockchip,rk3368-uart', 'rockchip,rk3399-uart', 'rockchip,rk3528-uart', 'rockchip,rk3568-uart', 'rockchip,rk3576-uart', 'rockchip,rk3588-uart', 'rockchip,rv1108-uart', 'rockchip,rv1126-uart', 'sophgo,sg2044-uart', 'starfive,jh7100-hsuart', 'starfive,jh7100-uart', 'starfive,jh7110-uart']
   	'snps,dw-apb-uart' was expected
--
   arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: serial@50002000: dma-names:1: 'rx' was expected
   	from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
   arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: serial@50003000: dma-names:0: 'tx' was expected
   	from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
   arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: serial@50003000: dma-names:1: 'rx' was expected
   	from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
   arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: serial@50004000: dma-names:0: 'tx' was expected
   	from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
   arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: serial@50004000: dma-names:1: 'rx' was expected
   	from schema $id: http://devicetree.org/schemas/serial/snps-dw-apb-uart.yaml#
>> arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dtb: switch@44050000: Unevaluated properties are not allowed ('#address-cells', '#size-cells' were unexpected)
   	from schema $id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml#

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[Miquel Raynal]

On 14/03/2025 at 19:56:29 +01, Thomas Bonnefille <thomas.bonnefille@bootlin.com> wrote:

> From: Clément Léger <clement.leger@bootlin.com>
>
> The EB board (Expansion board) supports both RZ/N1D and RZ-N1S. Since this
> configuration targets only the RZ/N1D, it is named r9a06g032-rzn1d400-eb.
> It adds support for the 2 additional switch ports (port C and D) that are
> available on that board.
>
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
>
> [Thomas moved the dts to the renesas directory and declared the leds in
> each phy]

While you do a new iteration, I'd suggest rewording this to:

Signed-off-by: Clément Léger <clement.leger@bootlin.com>
[Thomas: move the DTS to the Renesas directory, declare the PHY LEDs]
Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>

Cheers,
Miquèl

Re: [PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[Wolfram Sang]

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> Oh, cool! I will definitely test it next week. Thanks a lot!

The network architecture of this board is a mystery to me. Even before
your patch, I couldn't get network to work. Same with your patch
attached. I will try again next week with some help.


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Re: [PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[Wolfram Sang]

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On Fri, Mar 14, 2025 at 07:56:29PM +0100, Thomas Bonnefille wrote:
> From: Clément Léger <clement.leger@bootlin.com>
> 
> The EB board (Expansion board) supports both RZ/N1D and RZ-N1S. Since this
> configuration targets only the RZ/N1D, it is named r9a06g032-rzn1d400-eb.
> It adds support for the 2 additional switch ports (port C and D) that are
> available on that board.
> 
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
> 
> [Thomas moved the dts to the renesas directory and declared the leds in
> each phy]
> 
> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>

Niklas and I made it and could run all 4 ports of the switch. Leds work,
too. So, with the whitespace issue fixed.

Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

Thank you for picking up this patch again!


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Re: [PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[Thomas Bonnefille]

On Mon Mar 24, 2025 at 3:27 PM CET, Wolfram Sang wrote:
> On Fri, Mar 14, 2025 at 07:56:29PM +0100, Thomas Bonnefille wrote:
>> From: Clément Léger <clement.leger@bootlin.com>
>> 
>> The EB board (Expansion board) supports both RZ/N1D and RZ-N1S. Since this
>> configuration targets only the RZ/N1D, it is named r9a06g032-rzn1d400-eb.
>> It adds support for the 2 additional switch ports (port C and D) that are
>> available on that board.
>> 
>> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
>> 
>> [Thomas moved the dts to the renesas directory and declared the leds in
>> each phy]
>> 
>> Signed-off-by: Thomas Bonnefille <thomas.bonnefille@bootlin.com>
>
> Niklas and I made it and could run all 4 ports of the switch. Leds work,
> too. So, with the whitespace issue fixed.
>
> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> Tested-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
>
> Thank you for picking up this patch again!

Thank you very much for testing it !

Re: [PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[Wolfram Sang]

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> I'll send a v4 soon.

Please do with the minor review comments addressed. I have some patches
depending on it. Which means that I am using this DTS regularly now and
it works great.


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Re: [PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[Geert Uytterhoeven]

Hi Wolfram,

On Tue, 8 Apr 2025 at 08:23, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> > I'll send a v4 soon.
>
> Please do with the minor review comments addressed. I have some patches
> depending on it. Which means that I am using this DTS regularly now and
> it works great.

v4 was posted on March 24th?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v3] ARM: dts: r9a06g032: add r9a06g032-rzn1d400-eb board device-tree

[Wolfram Sang]

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> > Please do with the minor review comments addressed. I have some patches
> > depending on it. Which means that I am using this DTS regularly now and
> > it works great.
> 
> v4 was posted on March 24th?

Mea culpa, I overlooked it in the list. I am sorry.


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