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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Arun R Murthy <arun.r.murthy@intel.com>, intel-gfx@lists.freedesktop.org
Cc: Arun R Murthy <arun.r.murthy@intel.com>
Subject: Re: [PATCH 1/5] drm/i915/display: Add support for histogram
Date: Wed, 07 Aug 2024 12:55:18 +0300	[thread overview]
Message-ID: <87r0b04pyx.fsf@intel.com> (raw)
In-Reply-To: <20240705095551.1244154-2-arun.r.murthy@intel.com>

On Fri, 05 Jul 2024, Arun R Murthy <arun.r.murthy@intel.com> wrote:
> +/* GLOBAL_HIST related registers */
> +#define _DPST_CTL_A					0x490C0
> +#define _DPST_CTL_B					0x491C0
> +#define DPST_CTL(pipe)					_MMIO_PIPE(pipe, _DPST_CTL_A, _DPST_CTL_B)
> +#define DPST_CTL_IE_HIST_EN				REG_BIT(31)
> +#define DPST_CTL_RESTORE				REG_BIT(28)
> +#define DPST_CTL_IE_MODI_TABLE_EN			REG_BIT(27)
> +#define DPST_CTL_HIST_MODE				REG_BIT(24)
> +#define DPST_CTL_ENHANCEMENT_MODE_MASK			REG_GENMASK(14, 13)
> +#define DPST_CTL_EN_MULTIPLICATIVE			REG_FIELD_PREP(DPST_CTL_ENHANCEMENT_MODE_MASK, 2)
> +#define DPST_CTL_IE_TABLE_VALUE_FORMAT			REG_BIT(15)
> +#define DPST_CTL_BIN_REG_FUNC_SEL			REG_BIT(11)
> +#define DPST_CTL_BIN_REG_FUNC_TC			REG_FIELD_PREP(DPST_CTL_BIN_REG_FUNC_SEL, 0)
> +#define DPST_CTL_BIN_REG_FUNC_IE			REG_FIELD_PREP(DPST_CTL_BIN_REG_FUNC_SEL, 1)
> +#define DPST_CTL_BIN_REG_MASK				REG_GENMASK(6, 0)
> +#define DPST_CTL_BIN_REG_CLEAR				REG_FIELD_PREP(DPST_CTL_BIN_REG_MASK, 0)
> +#define DPST_CTL_IE_TABLE_VALUE_FORMAT_2INT_8FRAC	REG_FIELD_PREP(DPST_CTL_IE_TABLE_VALUE_FORMAT, 1)
> +#define DPST_CTL_IE_TABLE_VALUE_FORMAT_1INT_9FRAC	REG_FIELD_PREP(DPST_CTL_IE_TABLE_VALUE_FORMAT, 0)
> +#define DPST_CTL_HIST_MODE_YUV				REG_FIELD_PREP(DPST_CTL_HIST_MODE, 0)
> +#define DPST_CTL_HIST_MODE_HSV				REG_FIELD_PREP(DPST_CTL_HIST_MODE, 1)
> +
> +#define _DPST_GUARD_A					0x490C8
> +#define _DPST_GUARD_B					0x491C8
> +#define DPST_GUARD(pipe)				_MMIO_PIPE(pipe, _DPST_GUARD_A, _DPST_GUARD_B)
> +#define DPST_GUARD_HIST_INT_EN				REG_BIT(31)
> +#define DPST_GUARD_HIST_EVENT_STATUS			REG_BIT(30)
> +#define DPST_GUARD_INTERRUPT_DELAY_MASK			REG_GENMASK(29, 22)
> +#define DPST_GUARD_INTERRUPT_DELAY(val)			REG_FIELD_PREP(DPST_GUARD_INTERRUPT_DELAY_MASK, val)
> +#define DPST_GUARD_THRESHOLD_GB_MASK			REG_GENMASK(21, 0)
> +#define DPST_GUARD_THRESHOLD_GB(val)			REG_FIELD_PREP(DPST_GUARD_THRESHOLD_GB_MASK, val)
> +
> +#define _DPST_BIN_A					0x490C4
> +#define _DPST_BIN_B					0x491C4
> +#define DPST_BIN(pipe)					_MMIO_PIPE(pipe, _DPST_BIN_A, _DPST_BIN_B)
> +#define DPST_BIN_DATA_MASK				REG_GENMASK(23, 0)
> +#define DPST_BIN_BUSY					REG_BIT(31)

PS. The big comment about formatting register definitions at the top of
i915_reg.h still applies.


-- 
Jani Nikula, Intel

  parent reply	other threads:[~2024-08-07  9:55 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-07-05  9:55 [PATCH 0/5] Display Global Histogram Arun R Murthy
2024-07-05  9:55 ` [PATCH 1/5] drm/i915/display: Add support for histogram Arun R Murthy
2024-07-06  7:10   ` kernel test robot
2024-07-07 10:45   ` kernel test robot
2024-08-05  6:46   ` Kulkarni, Vandita
2024-08-22  6:37     ` Murthy, Arun R
2024-08-22 10:54       ` Kulkarni, Vandita
2024-08-22 11:00         ` Murthy, Arun R
2024-08-22 11:14           ` Kulkarni, Vandita
2024-08-07  9:31   ` Jani Nikula
2024-08-07 10:28     ` Murthy, Arun R
2024-08-07  9:55   ` Jani Nikula [this message]
2024-07-05  9:55 ` [PATCH 2/5] drm/i915/display: histogram interrupt handling Arun R Murthy
2024-08-07  9:42   ` Jani Nikula
2024-07-05  9:55 ` [PATCH 3/5] Add crtc properties for global histogram Arun R Murthy
2024-09-10 12:06   ` Shankar, Uma
2024-09-11  5:15   ` Kulkarni, Vandita
2024-09-11  8:49     ` Kulkarni, Vandita
2024-09-11  9:46       ` Kulkarni, Vandita
2024-09-17 15:40         ` Murthy, Arun R
2024-09-17 15:16       ` Murthy, Arun R
2024-09-12  9:09     ` Murthy, Arun R
2024-09-12  9:52     ` Murthy, Arun R
2024-07-05  9:55 ` [PATCH 4/5] drm/i915/histogram: histogram delay counter doesnt reset Arun R Murthy
2024-07-05  9:55 ` [PATCH 5/5] drm/i915/display/histogram: Histogram changes for Display LNL+ Arun R Murthy
2024-08-07  9:53   ` Jani Nikula
2024-07-05 13:36 ` ✗ Fi.CI.CHECKPATCH: warning for Display Global Histogram Patchwork
2024-07-05 13:36 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-07-05 13:44 ` ✓ Fi.CI.BAT: success " Patchwork
2024-07-06 18:17 ` ✗ Fi.CI.IGT: failure " Patchwork

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