Re: spi: Regression with v7.0-rc1 on VisionFive 2

From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Conor Dooley <conor@kernel.org>
Cc: Mark Brown <broonie@kernel.org>,  Ron Economos <re@w6rz.net>,
	linux-spi@vger.kernel.org,  linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org,
	 wsa+renesas@sang-engineering.com
Subject: Re: spi: Regression with v7.0-rc1 on VisionFive 2
Date: Mon, 02 Mar 2026 09:27:00 +0100	[thread overview]
Message-ID: <87seaiocvf.fsf@bootlin.com> (raw)
In-Reply-To: <20260228-defuse-extenuate-cf2a90ae66ea@spud> (Conor Dooley's message of "Sat, 28 Feb 2026 15:39:01 +0000")

Hello,

>> > > I'm getting an SPI failure with Linux v7.0-rc1 on the VisionFive 2 RISC-V board.
>> > 
>> > > Feb 28 00:29:33 visionfive kernel: cadence-qspi 13010000.spi: QSPI is still busy after 500ms timeout.
>> > > Feb 28 00:29:33 visionfive kernel: cadence-qspi 13010000.spi: detected FIFO depth (1) different from config (256)
>> > > Feb 28 00:29:33 visionfive kernel: cadence-qspi 13010000.spi: QSPI is still busy after 500ms timeout.
>> > > Feb 28 00:29:33 visionfive kernel: cadence-qspi 13010000.spi: QSPI is still busy after 500ms timeout.
>> > > Feb 28 00:29:33 visionfive kernel: spi-nor spi1.0: operation failed with -110
>> > > Feb 28 00:29:33 visionfive kernel: spi-nor spi1.0: probe with driver spi-nor failed with error -110
>> > 
>> > FWIW confirmed on my system:
>> > 
>> >    https://lava.sirena.org.uk/scheduler/job/2504026#L715
>> > 
>> > (which I didn't notice as that was just buildroot and not running
>> > kselftest-dt...).
>> 
>> This probably constitutes random speculation, but I am curious if
>> diff --git a/arch/riscv/boot/dts/starfive/jh7110.dtsi b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> index 6e56e9d20bb06..390fa87edbaf8 100644
>> --- a/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> +++ b/arch/riscv/boot/dts/starfive/jh7110.dtsi
>> @@ -873,9 +873,9 @@ qspi: spi@13010000 {
>>  			      <0x0 0x21000000 0x0 0x400000>;
>>  			interrupts = <25>;
>>  			clocks = <&syscrg JH7110_SYSCLK_QSPI_REF>,
>> -				 <&syscrg JH7110_SYSCLK_QSPI_AHB>,
>> -				 <&syscrg JH7110_SYSCLK_QSPI_APB>;
>> -			clock-names = "ref", "ahb", "apb";
>> +				 <&syscrg JH7110_SYSCLK_QSPI_APB>,
>> +				 <&syscrg JH7110_SYSCLK_QSPI_AHB>;
>> +			clock-names = "ref", "apb", "ahb";
>>  			resets = <&syscrg JH7110_SYSRST_QSPI_APB>,
>>  				 <&syscrg JH7110_SYSRST_QSPI_AHB>,
>>  				 <&syscrg JH7110_SYSRST_QSPI_REF>;
>> has any impact. Going from jh7110 specific code to bulk apis is an
>> ordering change, right?
>
> According to Ron, it had no impact.

Thanks for the report, and thanks for the try. Let me have a look.

Thanks,
Miquèl

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv