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From: Thomas Gleixner <tglx@linutronix.de>
To: Anup Patel <apatel@ventanamicro.com>
Cc: "Björn Töpel" <bjorn@kernel.org>,
	"Anup Patel" <anup@brainfault.org>,
	"Björn Töpel" <bjorn@rivosinc.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	x86@kernel.org, "Marc Zyngier" <maz@kernel.org>
Subject: Re: [RFC PATCH] genirq/matrix: Dynamic bitmap allocation
Date: Fri, 27 Oct 2023 11:08:32 +0200	[thread overview]
Message-ID: <87sf5w301b.ffs@tglx> (raw)
In-Reply-To: <CAK9=C2Xou_sZKX96c8Z7RXPCnmdf-_DPHZ8rfPmNdBqx8s_30Q@mail.gmail.com>

On Fri, Oct 27 2023 at 10:01, Anup Patel wrote:
> On Fri, Oct 27, 2023 at 4:47 AM Thomas Gleixner <tglx@linutronix.de> wrote:
> We have three types of MSIs on RISC-V platforms:
> 1) PCI MSIs (handled by the IMSIC driver of the RISC-V AIA series)
> 2) Platform MSIs (handled by the IMSIC driver of the RISC-V AIA series)
> 3) Wired IRQs converted to platform MSIs (aka wired-to-MSI bridge, which
>     is handled by APLIC driver of the RISC-V AIA series)
>
> The RISC-V AIA series needs the generic IRQ framework changes
> related to #2 and #3 (above) from your series hence my suggestion
> to rebase on your series.
> (https://lore.kernel.org/all/20221121135653.208611233@linutronix.de/)
>
> Is there a way to have your genirq changes merged before all ARM
> drivers have been moved to the new programming model ?
> OR
> Any other way to deal with this dependency ?

I'll have a look at this maze again and see how that can be separated
from the ARM pile, unless you beat me to it :)

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WARNING: multiple messages have this Message-ID (diff)
From: Thomas Gleixner <tglx@linutronix.de>
To: Anup Patel <apatel@ventanamicro.com>
Cc: "Björn Töpel" <bjorn@kernel.org>,
	"Anup Patel" <anup@brainfault.org>,
	"Björn Töpel" <bjorn@rivosinc.com>,
	linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
	x86@kernel.org, "Marc Zyngier" <maz@kernel.org>
Subject: Re: [RFC PATCH] genirq/matrix: Dynamic bitmap allocation
Date: Fri, 27 Oct 2023 11:08:32 +0200	[thread overview]
Message-ID: <87sf5w301b.ffs@tglx> (raw)
In-Reply-To: <CAK9=C2Xou_sZKX96c8Z7RXPCnmdf-_DPHZ8rfPmNdBqx8s_30Q@mail.gmail.com>

On Fri, Oct 27 2023 at 10:01, Anup Patel wrote:
> On Fri, Oct 27, 2023 at 4:47 AM Thomas Gleixner <tglx@linutronix.de> wrote:
> We have three types of MSIs on RISC-V platforms:
> 1) PCI MSIs (handled by the IMSIC driver of the RISC-V AIA series)
> 2) Platform MSIs (handled by the IMSIC driver of the RISC-V AIA series)
> 3) Wired IRQs converted to platform MSIs (aka wired-to-MSI bridge, which
>     is handled by APLIC driver of the RISC-V AIA series)
>
> The RISC-V AIA series needs the generic IRQ framework changes
> related to #2 and #3 (above) from your series hence my suggestion
> to rebase on your series.
> (https://lore.kernel.org/all/20221121135653.208611233@linutronix.de/)
>
> Is there a way to have your genirq changes merged before all ARM
> drivers have been moved to the new programming model ?
> OR
> Any other way to deal with this dependency ?

I'll have a look at this maze again and see how that can be separated
from the ARM pile, unless you beat me to it :)

  reply	other threads:[~2023-10-27  9:08 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-26 10:19 [RFC PATCH] genirq/matrix: Dynamic bitmap allocation Björn Töpel
2023-10-26 10:19 ` Björn Töpel
2023-10-26 10:41 ` Thomas Gleixner
2023-10-26 10:41   ` Thomas Gleixner
2023-10-26 12:26 ` Anup Patel
2023-10-26 12:26   ` Anup Patel
2023-10-26 17:26   ` Björn Töpel
2023-10-26 17:26     ` Björn Töpel
2023-10-26 23:17     ` Thomas Gleixner
2023-10-26 23:17       ` Thomas Gleixner
2023-10-27  4:31       ` Anup Patel
2023-10-27  4:31         ` Anup Patel
2023-10-27  9:08         ` Thomas Gleixner [this message]
2023-10-27  9:08           ` Thomas Gleixner

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