All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "MTTCG Devel" <mttcg@listserver.greensocs.com>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"KONRAD Frédéric" <fred.konrad@greensocs.com>,
	"Alvise Rigo" <a.rigo@virtualopensystems.com>,
	"Emilio G. Cota" <cota@braap.org>,
	"Pranith Kumar" <bobby.prani@gmail.com>,
	"Nikunj A Dadhania" <nikunj@linux.vnet.ibm.com>,
	"Mark Burton" <mark.burton@greensocs.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Jan Kiszka" <jan.kiszka@siemens.com>,
	"Fedorov Sergey" <serge.fdrv@gmail.com>,
	"Richard Henderson" <rth@twiddle.net>,
	"Bamvor Zhang Jian" <bamvor.zhangjian@linaro.org>,
	"open list:ARM" <qemu-arm@nongnu.org>
Subject: Re: [PATCH v9 23/25] target-arm: introduce ARM_CP_EXIT_PC
Date: Fri, 03 Feb 2017 11:33:23 +0000	[thread overview]
Message-ID: <87shnvfr0c.fsf@linaro.org> (raw)
In-Reply-To: <CAFEAcA9J4KgFLD5QiEjarw6HZY-T5WX4eSeSdGY6G2Y9ZAMOqQ@mail.gmail.com>


Peter Maydell <peter.maydell@linaro.org> writes:

> On 1 February 2017 at 15:05, Alex Bennée <alex.bennee@linaro.org> wrote:
>> Some helpers may trigger an immediate exit of the cpu_loop. If this
>> happens the PC need to be rectified to ensure the restart will begin
>> on the next instruction.
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
>>  target/arm/cpu.h           | 3 ++-
>>  target/arm/translate-a64.c | 4 ++++
>>  target/arm/translate.c     | 4 ++++
>>  3 files changed, 10 insertions(+), 1 deletion(-)
>>
>> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
>> index d61793ca06..a3c4d07817 100644
>> --- a/target/arm/cpu.h
>> +++ b/target/arm/cpu.h
>> @@ -1465,7 +1465,8 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid)
>>  #define ARM_CP_NZCV            (ARM_CP_SPECIAL | (3 << 8))
>>  #define ARM_CP_CURRENTEL       (ARM_CP_SPECIAL | (4 << 8))
>>  #define ARM_CP_DC_ZVA          (ARM_CP_SPECIAL | (5 << 8))
>> -#define ARM_LAST_SPECIAL       ARM_CP_DC_ZVA
>> +#define ARM_CP_EXIT_PC         (ARM_CP_SPECIAL | (6 << 8))
>> +#define ARM_LAST_SPECIAL       ARM_CP_EXIT_PC
>
> This shouldn't be a "special", because those are for
> "this is a special case that is handled entirely in the translate
> code", not "I need some extra behaviour on the code generated
> for calling the helper functions" (which is what the
> plain non-special ARM_CP flags do). Notice that all the other
> "special" cases completely define the behaviour of the cp that
> uses them, and the code implementing them ends the case
> statement with "return", not "break".
>
> Missing documentation comment change.

I posted this before you commented on the last version. Anyway see
bellow.

>
> That said, I'm definitely becoming more strongly of the
> opinion that longjumping out of this helper is not the
> best way to implement this, so these remarks are a bit moot.

Yep the tree:

  https://github.com/stsquad/qemu/commits/mttcg/base-patches-v10

Reverts the this change and changes the cputlb flush code to return and
let the guest translation code exit the normal way. I was hoping to get
some feedback from Paolo and Richard before I roll the fixes together
and post v10 which will be later today.

>
>>  /* Used only as a terminator for ARMCPRegInfo lists */
>>  #define ARM_CP_SENTINEL 0xffff
>>  /* Mask of only the flag bits in a type field */
>> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
>> index 7e7131fe2f..98d4fac070 100644
>> --- a/target/arm/translate-a64.c
>> +++ b/target/arm/translate-a64.c
>> @@ -1561,6 +1561,10 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
>>          tcg_rt = cpu_reg(s, rt);
>>          gen_helper_dc_zva(cpu_env, tcg_rt);
>>          return;
>> +    case ARM_CP_EXIT_PC:
>> +        /* The helper may exit the cpu_loop so ensure PC is correct */
>> +        gen_a64_set_pc_im(s->pc);
>> +        break;
>>      default:
>>          break;
>>      }
>> diff --git a/target/arm/translate.c b/target/arm/translate.c
>> index 24faa7c60c..e1f4a48720 100644
>> --- a/target/arm/translate.c
>> +++ b/target/arm/translate.c
>> @@ -7510,6 +7510,10 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn)
>>              gen_set_pc_im(s, s->pc);
>>              s->is_jmp = DISAS_WFI;
>>              return 0;
>> +        case ARM_CP_EXIT_PC:
>> +            /* The helper may exit the cpu_loop so ensure PC is correct */
>> +            gen_set_pc_im(s, s->pc);
>> +            break;
>>          default:
>>              break;
>>          }
>
> thanks
> -- PMM


--
Alex Bennée

WARNING: multiple messages have this Message-ID (diff)
From: "Alex Bennée" <alex.bennee@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "MTTCG Devel" <mttcg@listserver.greensocs.com>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"KONRAD Frédéric" <fred.konrad@greensocs.com>,
	"Alvise Rigo" <a.rigo@virtualopensystems.com>,
	"Emilio G. Cota" <cota@braap.org>,
	"Pranith Kumar" <bobby.prani@gmail.com>,
	"Nikunj A Dadhania" <nikunj@linux.vnet.ibm.com>,
	"Mark Burton" <mark.burton@greensocs.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Jan Kiszka" <jan.kiszka@siemens.com>,
	"Fedorov Sergey" <serge.fdrv@gmail.com>,
	"Richard Henderson" <rth@twiddle.net>,
	"Bamvor Zhang Jian" <bamvor.zhangjian@linaro.org>,
	"open list:ARM" <qemu-arm@nongnu.org>
Subject: Re: [Qemu-devel] [PATCH v9 23/25] target-arm: introduce ARM_CP_EXIT_PC
Date: Fri, 03 Feb 2017 11:33:23 +0000	[thread overview]
Message-ID: <87shnvfr0c.fsf@linaro.org> (raw)
In-Reply-To: <CAFEAcA9J4KgFLD5QiEjarw6HZY-T5WX4eSeSdGY6G2Y9ZAMOqQ@mail.gmail.com>


Peter Maydell <peter.maydell@linaro.org> writes:

> On 1 February 2017 at 15:05, Alex Bennée <alex.bennee@linaro.org> wrote:
>> Some helpers may trigger an immediate exit of the cpu_loop. If this
>> happens the PC need to be rectified to ensure the restart will begin
>> on the next instruction.
>>
>> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
>> ---
>>  target/arm/cpu.h           | 3 ++-
>>  target/arm/translate-a64.c | 4 ++++
>>  target/arm/translate.c     | 4 ++++
>>  3 files changed, 10 insertions(+), 1 deletion(-)
>>
>> diff --git a/target/arm/cpu.h b/target/arm/cpu.h
>> index d61793ca06..a3c4d07817 100644
>> --- a/target/arm/cpu.h
>> +++ b/target/arm/cpu.h
>> @@ -1465,7 +1465,8 @@ static inline uint64_t cpreg_to_kvm_id(uint32_t cpregid)
>>  #define ARM_CP_NZCV            (ARM_CP_SPECIAL | (3 << 8))
>>  #define ARM_CP_CURRENTEL       (ARM_CP_SPECIAL | (4 << 8))
>>  #define ARM_CP_DC_ZVA          (ARM_CP_SPECIAL | (5 << 8))
>> -#define ARM_LAST_SPECIAL       ARM_CP_DC_ZVA
>> +#define ARM_CP_EXIT_PC         (ARM_CP_SPECIAL | (6 << 8))
>> +#define ARM_LAST_SPECIAL       ARM_CP_EXIT_PC
>
> This shouldn't be a "special", because those are for
> "this is a special case that is handled entirely in the translate
> code", not "I need some extra behaviour on the code generated
> for calling the helper functions" (which is what the
> plain non-special ARM_CP flags do). Notice that all the other
> "special" cases completely define the behaviour of the cp that
> uses them, and the code implementing them ends the case
> statement with "return", not "break".
>
> Missing documentation comment change.

I posted this before you commented on the last version. Anyway see
bellow.

>
> That said, I'm definitely becoming more strongly of the
> opinion that longjumping out of this helper is not the
> best way to implement this, so these remarks are a bit moot.

Yep the tree:

  https://github.com/stsquad/qemu/commits/mttcg/base-patches-v10

Reverts the this change and changes the cputlb flush code to return and
let the guest translation code exit the normal way. I was hoping to get
some feedback from Paolo and Richard before I roll the fixes together
and post v10 which will be later today.

>
>>  /* Used only as a terminator for ARMCPRegInfo lists */
>>  #define ARM_CP_SENTINEL 0xffff
>>  /* Mask of only the flag bits in a type field */
>> diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
>> index 7e7131fe2f..98d4fac070 100644
>> --- a/target/arm/translate-a64.c
>> +++ b/target/arm/translate-a64.c
>> @@ -1561,6 +1561,10 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread,
>>          tcg_rt = cpu_reg(s, rt);
>>          gen_helper_dc_zva(cpu_env, tcg_rt);
>>          return;
>> +    case ARM_CP_EXIT_PC:
>> +        /* The helper may exit the cpu_loop so ensure PC is correct */
>> +        gen_a64_set_pc_im(s->pc);
>> +        break;
>>      default:
>>          break;
>>      }
>> diff --git a/target/arm/translate.c b/target/arm/translate.c
>> index 24faa7c60c..e1f4a48720 100644
>> --- a/target/arm/translate.c
>> +++ b/target/arm/translate.c
>> @@ -7510,6 +7510,10 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn)
>>              gen_set_pc_im(s, s->pc);
>>              s->is_jmp = DISAS_WFI;
>>              return 0;
>> +        case ARM_CP_EXIT_PC:
>> +            /* The helper may exit the cpu_loop so ensure PC is correct */
>> +            gen_set_pc_im(s, s->pc);
>> +            break;
>>          default:
>>              break;
>>          }
>
> thanks
> -- PMM


--
Alex Bennée

  reply	other threads:[~2017-02-03 11:33 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-02-01 15:05 [Qemu-devel] [PATCH v9 00/25] MTTCG Base enabling patches with ARM enablement Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 01/25] docs: new design document multi-thread-tcg.txt Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 02/25] mttcg: translate-all: Enable locking debug in a debug build Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 03/25] mttcg: Add missing tb_lock/unlock() in cpu_exec_step() Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 04/25] tcg: move TCG_MO/BAR types into own file Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 05/25] tcg: add options for enabling MTTCG Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 06/25] tcg: add kick timer for single-threaded vCPU emulation Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 07/25] tcg: rename tcg_current_cpu to tcg_current_rr_cpu Alex Bennée
2017-02-01 15:05 ` [PATCH v9 08/25] tcg: drop global lock during TCG code execution Alex Bennée
2017-02-01 15:05   ` [Qemu-devel] " Alex Bennée
2017-02-03 10:09   ` Peter Maydell
2017-02-03 10:09     ` [Qemu-devel] " Peter Maydell
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 09/25] tcg: remove global exit_request Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 10/25] tcg: enable tb_lock() for SoftMMU Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 11/25] tcg: enable thread-per-vCPU Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 12/25] tcg: handle EXCP_ATOMIC exception for system emulation Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 13/25] cputlb: add assert_cpu_is_self checks Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 14/25] cputlb: tweak qemu_ram_addr_from_host_nofail reporting Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 15/25] cputlb: introduce tlb_flush_* async work Alex Bennée
2017-02-01 15:05 ` [PATCH v9 16/25] cputlb and arm/sparc targets: convert mmuidx flushes from varg to bitmap Alex Bennée
2017-02-01 15:05   ` [Qemu-devel] " Alex Bennée
2017-02-01 21:29   ` Richard Henderson
2017-02-01 21:29     ` [Qemu-devel] " Richard Henderson
2017-02-03 10:15   ` Peter Maydell
2017-02-03 10:15     ` [Qemu-devel] " Peter Maydell
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 17/25] cputlb: add tlb_flush_by_mmuidx async routines Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 18/25] cputlb: atomically update tlb fields used by tlb_reset_dirty Alex Bennée
2017-02-01 15:05 ` [Qemu-devel] [PATCH v9 19/25] cputlb: introduce tlb_flush_*_all_cpus[_synced] Alex Bennée
2017-02-01 15:05 ` [PATCH v9 20/25] target-arm/powerctl: defer cpu reset work to CPU context Alex Bennée
2017-02-01 15:05   ` [Qemu-devel] " Alex Bennée
2017-02-03 11:15   ` Peter Maydell
2017-02-03 11:15     ` [Qemu-devel] " Peter Maydell
2017-02-03 15:02     ` Alex Bennée
2017-02-03 15:02       ` [Qemu-devel] " Alex Bennée
2017-02-01 15:05 ` [PATCH v9 21/25] target-arm: don't generate WFE/YIELD calls for MTTCG Alex Bennée
2017-02-01 15:05   ` [Qemu-devel] " Alex Bennée
2017-02-03 11:17   ` Peter Maydell
2017-02-03 11:17     ` [Qemu-devel] " Peter Maydell
2017-02-03 11:30     ` Alex Bennée
2017-02-03 11:30       ` [Qemu-devel] " Alex Bennée
2017-02-01 15:05 ` [PATCH v9 22/25] target-arm/cpu.h: make ARM_CP defined consistent Alex Bennée
2017-02-01 15:05   ` [Qemu-devel] " Alex Bennée
2017-02-03 11:19   ` Peter Maydell
2017-02-03 11:19     ` [Qemu-devel] " Peter Maydell
2017-02-01 15:05 ` [PATCH v9 23/25] target-arm: introduce ARM_CP_EXIT_PC Alex Bennée
2017-02-01 15:05   ` [Qemu-devel] " Alex Bennée
2017-02-03 11:22   ` Peter Maydell
2017-02-03 11:22     ` [Qemu-devel] " Peter Maydell
2017-02-03 11:33     ` Alex Bennée [this message]
2017-02-03 11:33       ` Alex Bennée
2017-02-01 15:05 ` [PATCH v9 24/25] target-arm: ensure all cross vCPUs TLB flushes complete Alex Bennée
2017-02-01 15:05   ` [Qemu-devel] " Alex Bennée
2017-02-03 11:33   ` Peter Maydell
2017-02-03 11:33     ` [Qemu-devel] " Peter Maydell
2017-02-01 15:05 ` [PATCH v9 25/25] tcg: enable MTTCG by default for ARM on x86 hosts Alex Bennée
2017-02-01 15:05   ` [Qemu-devel] " Alex Bennée
2017-02-03 11:25   ` Peter Maydell
2017-02-03 11:25     ` [Qemu-devel] " Peter Maydell
2017-02-03 12:07     ` Alex Bennée
2017-02-03 12:07       ` [Qemu-devel] " Alex Bennée

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=87shnvfr0c.fsf@linaro.org \
    --to=alex.bennee@linaro.org \
    --cc=a.rigo@virtualopensystems.com \
    --cc=bamvor.zhangjian@linaro.org \
    --cc=bobby.prani@gmail.com \
    --cc=cota@braap.org \
    --cc=fred.konrad@greensocs.com \
    --cc=jan.kiszka@siemens.com \
    --cc=mark.burton@greensocs.com \
    --cc=mttcg@listserver.greensocs.com \
    --cc=nikunj@linux.vnet.ibm.com \
    --cc=pbonzini@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    --cc=rth@twiddle.net \
    --cc=serge.fdrv@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.