From: Kevin Hilman <khilman@ti.com>
To: Tarun Kanti DebBarma <tarun.kanti@ti.com>
Cc: linux-omap@vger.kernel.org, santosh.shilimkar@ti.com,
tony@atomide.com, Charulatha V <charu@ti.com>
Subject: Re: [PATCH v3 13/20] GPIO: OMAP: Clean omap_gpio_mod_init function
Date: Wed, 06 Jul 2011 13:38:33 -0700 [thread overview]
Message-ID: <87sjqjf8l2.fsf@ti.com> (raw)
In-Reply-To: <1309513634-20971-14-git-send-email-tarun.kanti@ti.com> (Tarun Kanti DebBarma's message of "Fri, 1 Jul 2011 15:17:07 +0530")
Tarun Kanti DebBarma <tarun.kanti@ti.com> writes:
> With register offsets now defined for respective OMAP versions we can get rid
> of cpu_class_* checks. This function now has common initialization code for
> all OMAP versions. Initialization specific to OMAP16xx has been moved within
> omap16xx_gpio_init().
This patch also adds the ->do_raw_write() stuff which is not described
here, and is an unrelated change that wants its own patch. More on that
below.
> Signed-off-by: Tarun Kanti DebBarma <tarun.kanti@ti.com>
> Signed-off-by: Charulatha V <charu@ti.com>
> ---
> arch/arm/mach-omap1/gpio16xx.c | 19 ++++++-
> arch/arm/plat-omap/include/plat/gpio.h | 2 +
> drivers/gpio/gpio-omap.c | 96 +++++++++++++++-----------------
> 3 files changed, 64 insertions(+), 53 deletions(-)
>
> diff --git a/arch/arm/mach-omap1/gpio16xx.c b/arch/arm/mach-omap1/gpio16xx.c
> index 08dda3c..cfd86b9 100644
> --- a/arch/arm/mach-omap1/gpio16xx.c
> +++ b/arch/arm/mach-omap1/gpio16xx.c
> @@ -93,6 +93,7 @@ static struct omap_gpio_reg_offs omap16xx_gpio_regs = {
> .wkup_status = OMAP1610_GPIO_WAKEUPENABLE,
> .edgectrl1 = OMAP1610_GPIO_EDGE_CTRL1,
> .edgectrl2 = OMAP1610_GPIO_EDGE_CTRL2,
> + .sysconfig = OMAP1610_GPIO_SYSCONFIG,
> };
>
> static struct __initdata omap_gpio_platform_data omap16xx_gpio1_config = {
> @@ -218,12 +219,28 @@ static struct __initdata platform_device * omap16xx_gpio_dev[] = {
> static int __init omap16xx_gpio_init(void)
> {
> int i;
> + void __iomem *base;
> + struct resource *res;
> + struct platform_device *pdev;
> + struct omap_gpio_platform_data *pdata;
>
> if (!cpu_is_omap16xx())
> return -EINVAL;
>
> - for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++)
> + for (i = 0; i < ARRAY_SIZE(omap16xx_gpio_dev); i++) {
> + pdev = omap16xx_gpio_dev[i];
> + pdata = pdev->dev.platform_data;
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + base = ioremap(res->start, resource_size(res));
> +
> + if (pdata->regs->sysconfig)
using field from regs-> here...
> + __raw_writew(0x0014, base + OMAP1610_GPIO_SYSCONFIG);
but the #define here.
Since you don't really need this field in reg_offs (because it's not
used in SoC-independent code), just drop the if and always write
sysconfig.
> + omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
> + ULPD_CAM_CLK_CTRL);
Please preserve the comments from the original code, since the CAM
access does lok rather confusing.
> platform_device_register(omap16xx_gpio_dev[i]);
> + }
>
> return 0;
> }
> diff --git a/arch/arm/plat-omap/include/plat/gpio.h b/arch/arm/plat-omap/include/plat/gpio.h
> index 4f584de..3f7b028 100644
> --- a/arch/arm/plat-omap/include/plat/gpio.h
> +++ b/arch/arm/plat-omap/include/plat/gpio.h
> @@ -198,6 +198,8 @@ struct omap_gpio_reg_offs {
> u16 irqctrl;
> u16 edgectrl1;
> u16 edgectrl2;
> + /* Not applicable for OMAP2+ as hwmod layer takes care of sysconfig */
> + u16 sysconfig;
>
> bool irqenable_inv;
> };
> diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
> index 769fae7..3acbaa9 100644
> --- a/drivers/gpio/gpio-omap.c
> +++ b/drivers/gpio/gpio-omap.c
> @@ -75,6 +75,7 @@ struct gpio_bank {
>
> void (*set_dataout)(struct gpio_bank *bank, int gpio, int enable);
> int (*get_context_loss_count)(struct device *dev);
> + void (*do_raw_write)(void __iomem *reg, int set);
>
> struct omap_gpio_reg_offs *regs;
> };
> @@ -864,67 +865,53 @@ static void __init omap_gpio_show_rev(struct gpio_bank *bank)
> called = true;
> }
>
> +static void __do_raw_writel(void __iomem *reg, int set)
> +{
> + if (set)
> + __raw_writel(0xffffffff, reg);
> + else
> + __raw_writel(0x00000000, reg);
> +
> +}
> +
> +static void __do_raw_writew(void __iomem *reg, int set)
> +{
> + if (set)
> + __raw_writew(0xffff, reg);
> + else
> + __raw_writew(0x0000, reg);
> +}
> +
> /* This lock class tells lockdep that GPIO irqs are in a different
> * category than their parents, so it won't report false recursion.
> */
> static struct lock_class_key gpio_lock_class;
>
> -/* TODO: Cleanup cpu_is_* checks */
> static void omap_gpio_mod_init(struct gpio_bank *bank)
> {
> - if (cpu_class_is_omap2()) {
> - if (cpu_is_omap44xx()) {
> - __raw_writel(0xffffffff, bank->base +
> - OMAP4_GPIO_IRQSTATUSCLR0);
> - __raw_writel(0x00000000, bank->base +
> - OMAP4_GPIO_DEBOUNCENABLE);
> - /* Initialize interface clk ungated, module enabled */
> - __raw_writel(0, bank->base + OMAP4_GPIO_CTRL);
> - } else if (cpu_is_omap34xx()) {
> - __raw_writel(0x00000000, bank->base +
> - OMAP24XX_GPIO_IRQENABLE1);
> - __raw_writel(0xffffffff, bank->base +
> - OMAP24XX_GPIO_IRQSTATUS1);
> - __raw_writel(0x00000000, bank->base +
> - OMAP24XX_GPIO_DEBOUNCE_EN);
> -
> - /* Initialize interface clk ungated, module enabled */
> - __raw_writel(0, bank->base + OMAP24XX_GPIO_CTRL);
> - }
> - } else if (cpu_class_is_omap1()) {
> - if (bank_is_mpuio(bank)) {
> - __raw_writew(0xffff, bank->base +
> - OMAP_MPUIO_GPIO_MASKIT / bank->stride);
> + if (bank_is_mpuio(bank)) {
> + bank->do_raw_write(bank->base + bank->regs->irqenable, 1);
> + if (bank->regs->wkup_status)
> mpuio_init(bank);
> - }
> - if (cpu_is_omap15xx() && bank->method == METHOD_GPIO_1510) {
> - __raw_writew(0xffff, bank->base
> - + OMAP1510_GPIO_INT_MASK);
> - __raw_writew(0x0000, bank->base
> - + OMAP1510_GPIO_INT_STATUS);
> - }
> - if (cpu_is_omap16xx() && bank->method == METHOD_GPIO_1610) {
> - __raw_writew(0x0000, bank->base
> - + OMAP1610_GPIO_IRQENABLE1);
> - __raw_writew(0xffff, bank->base
> - + OMAP1610_GPIO_IRQSTATUS1);
> - __raw_writew(0x0014, bank->base
> - + OMAP1610_GPIO_SYSCONFIG);
> -
> - /*
> - * Enable system clock for GPIO module.
> - * The CAM_CLK_CTRL *is* really the right place.
> - */
> - omap_writel(omap_readl(ULPD_CAM_CLK_CTRL) | 0x04,
> - ULPD_CAM_CLK_CTRL);
> - }
> - if (cpu_is_omap7xx() && bank->method == METHOD_GPIO_7XX) {
> - __raw_writel(0xffffffff, bank->base
> - + OMAP7XX_GPIO_INT_MASK);
> - __raw_writel(0x00000000, bank->base
> - + OMAP7XX_GPIO_INT_STATUS);
> - }
> + return;
> }
> +
> + if (bank->regs->ctrl)
> + /* Initialize interface clk ungated, module enabled */
> + bank->do_raw_write(bank->base + bank->regs->ctrl, 0);
> +
> + if (bank->regs->clr_irqenable && bank->width == 32)
> + bank->do_raw_write(bank->base + bank->regs->clr_irqenable, 1);
> + else if (bank->regs->irqenable)
> + bank->do_raw_write(bank->base + bank->regs->irqenable,
> + bank->regs->irqenable_inv);
> +
> + if (bank->regs->irqstatus)
> + bank->do_raw_write(bank->base + bank->regs->irqstatus,
> + bank->regs->irqenable_inv == 0);
> +
> + if (bank->regs->debounce_en)
> + bank->do_raw_write(bank->base + bank->regs->debounce_en, 0);
> }
>
> static __init void
> @@ -1041,6 +1028,11 @@ static int __devinit omap_gpio_probe(struct platform_device *pdev)
> bank->get_context_loss_count = pdata->get_context_loss_count;
> bank->regs = pdata->regs;
>
> + if (bank->width == 32)
> + bank->do_raw_write = __do_raw_writel;
> + else
> + bank->do_raw_write = __do_raw_writew;
> +
> if (bank->regs->set_dataout && bank->regs->clr_dataout)
> bank->set_dataout = _set_gpio_dataout_reg;
> else
Actually, I think this driver should just be converted so *all* access
are 4-byte accesses.
Current code already uses a mix of readw and readl for register access
OMAP1, so let's just drop all the readw and use readl throughout. All
registers on OMAP1 are 4-byte aligned.
Kevin
next prev parent reply other threads:[~2011-07-06 20:38 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-07-01 9:46 [PATCH v3 00/20] GPIO: OMAP: driver cleanup and fixes Tarun Kanti DebBarma
2011-07-01 9:46 ` [PATCH v3 01/20] GPIO: OMAP: Remove dependency on gpio_bank_count Tarun Kanti DebBarma
2011-07-01 9:46 ` [PATCH v3 02/20] GPIO: OMAP2+: Use flag to identify wakeup domain Tarun Kanti DebBarma
2011-07-01 9:46 ` [PATCH v3 03/20] GPIO: OMAP: Make gpio_context part of gpio_bank structure Tarun Kanti DebBarma
2011-07-01 9:46 ` [PATCH v3 04/20] GPIO: OMAP: Fix pwrdm_post_transition call sequence Tarun Kanti DebBarma
2011-07-01 9:46 ` [PATCH v3 05/20] GPIO: OMAP: Handle save/restore ctx in GPIO driver Tarun Kanti DebBarma
2011-07-01 9:47 ` [PATCH v3 06/20] GPIO: OMAP2+: Make non-wakeup GPIO part of pdata Tarun Kanti DebBarma
2011-07-01 9:47 ` [PATCH v3 07/20] GPIO: OMAP: Avoid cpu checks during module ena/disable Tarun Kanti DebBarma
2011-07-01 9:47 ` [PATCH v3 08/20] GPIO: OMAP: Use wkup regs off/suspend support flag Tarun Kanti DebBarma
2011-07-06 19:51 ` Kevin Hilman
2011-07-07 5:06 ` DebBarma, Tarun Kanti
2011-07-01 9:47 ` [PATCH v3 09/20] GPIO: OMAP: Use level/edge detect reg offsets Tarun Kanti DebBarma
2011-07-05 23:51 ` Kevin Hilman
2011-07-06 4:15 ` DebBarma, Tarun Kanti
2011-07-06 19:57 ` Kevin Hilman
2011-07-07 4:47 ` DebBarma, Tarun Kanti
2011-07-01 9:47 ` [PATCH v3 10/20] GPIO: OMAP: Remove hardcoded offsets in ctxt save/restore Tarun Kanti DebBarma
2011-07-01 9:47 ` [PATCH v3 11/20] GPIO: OMAP: Clean set_gpio_triggering function Tarun Kanti DebBarma
2011-07-01 9:47 ` [PATCH v3 12/20] GPIO: OMAP: Use wkup_status for all SoCs Tarun Kanti DebBarma
2011-07-06 0:50 ` Kevin Hilman
2011-07-06 4:30 ` DebBarma, Tarun Kanti
2011-07-06 4:33 ` DebBarma, Tarun Kanti
2011-07-12 0:04 ` DebBarma, Tarun Kanti
2011-07-12 15:30 ` Kevin Hilman
2011-07-13 3:55 ` DebBarma, Tarun Kanti
2011-07-01 9:47 ` [PATCH v3 13/20] GPIO: OMAP: Clean omap_gpio_mod_init function Tarun Kanti DebBarma
2011-07-06 20:38 ` Kevin Hilman [this message]
2011-07-07 4:40 ` DebBarma, Tarun Kanti
2011-07-01 9:47 ` [PATCH v3 14/20] GPIO: OMAP15xx: Use pinctrl offset instead of macro Tarun Kanti DebBarma
2011-07-01 9:47 ` [PATCH v3 15/20] GPIO: OMAP: Use readl in irq_handler for all access Tarun Kanti DebBarma
2011-07-01 9:47 ` [PATCH v3 16/20] GPIO: OMAP: Remove bank->method & METHOD_* macros Tarun Kanti DebBarma
2011-07-01 9:47 ` [PATCH v3 17/20] GPIO: OMAP: Fix bankwidth for OMAP7xx MPUIO Tarun Kanti DebBarma
2011-07-01 9:47 ` [PATCH v3 18/20] GPIO: OMAP: Use PM runtime framework Tarun Kanti DebBarma
2011-07-20 6:28 ` Roger Quadros
2011-07-20 9:28 ` DebBarma, Tarun Kanti
2011-07-20 9:33 ` Roger Quadros
2011-07-20 9:46 ` DebBarma, Tarun Kanti
2011-07-01 9:47 ` [PATCH v3 19/20] GPIO: OMAP: optimize suspend and resume functions Tarun Kanti DebBarma
2011-07-06 20:54 ` Kevin Hilman
2011-07-07 4:42 ` DebBarma, Tarun Kanti
2011-07-01 9:47 ` [PATCH v3 20/20] GPIO: OMAP2+: Clean prepare_for_idle and resume_after_idle Tarun Kanti DebBarma
2011-07-05 23:46 ` [PATCH v3 00/20] GPIO: OMAP: driver cleanup and fixes Kevin Hilman
2011-07-06 4:37 ` DebBarma, Tarun Kanti
2011-07-06 21:07 ` Kevin Hilman
2011-07-07 4:16 ` DebBarma, Tarun Kanti
2011-07-12 15:22 ` Hilman, Kevin
2011-07-13 3:48 ` DebBarma, Tarun Kanti
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=87sjqjf8l2.fsf@ti.com \
--to=khilman@ti.com \
--cc=charu@ti.com \
--cc=linux-omap@vger.kernel.org \
--cc=santosh.shilimkar@ti.com \
--cc=tarun.kanti@ti.com \
--cc=tony@atomide.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.