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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Christian Eggers <ceggers@arri.de>
Cc: Richard Weinberger <richard@nod.at>,
	 <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Subject: Re: mtd: rawnand: Inconsistent parameter page on Foresee FSNS8A002G ?
Date: Sun, 24 Aug 2025 18:37:06 +0200	[thread overview]
Message-ID: <87tt1whe19.fsf@bootlin.com> (raw)
In-Reply-To: <3542795.LZWGnKmheA@n9w6sw14> (Christian Eggers's message of "Mon, 18 Aug 2025 19:02:49 +0200")

Hi Christian,

On 18/08/2025 at 19:02:49 +02, Christian Eggers <ceggers@arri.de> wrote:

> I try to use a Foresee FSNS8A002G SLC flash chip on an i.MX6 GPMI controller:
>
> https://www.lcsc.com/datasheet/C5126835.pdf
>
> The kernel output looks promising, but one line looks suspicious:
>
> ...
> nand: device found, Manufacturer ID: 0xcd, Chip ID: 0xda
> nand: Foresee FSNS8A002G
> nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
> nand: SDR timing mode 4 not acknowledged by the NAND chip
> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> Bad block table found at page 131008, version 0x01
> Bad block table found at page 130944, version 0x01
> 3 fixed-partitions partitions found on MTD device gpmi-nand
> ...
>
> According to the documentation of "Read Parameter Page", byte 129-130, 
> SDR modes 0 to 5 should be supported (page 19 on the data sheet).
> But the documentation of the GET_FEATURE/SET_FEATURE operation misses
> the "Timing mode" register (data sheet, page 24).
>
> I saw that there is a quirk for some Macronix chips which also seem
> not to support getting/setting the timing mode (but declaring them
> in the parameter page).

Unfortunately, it happens that sometimes flash vendor mess up parameter
pages, so either the flash supports mode 5 and it is lying to you (you
can test it and add a quirk) or the flash does not because this batch
could not stand a faster rate (?).

> My main question is whether this is "normal variation within the flash
> market" or a serious issue. In contrast to another device I currently
> use, the Foresee chip also doesn't support "cached" operations. Is there
> much value writing a fix for Timing Mode issue, or should I better
> use another flash device?

I cannot tell for sure, I hope it is rare enough but we've already seen
variations between identical devices with the same ID... So it is up to
you to talk to your NAND vendor in order to know whether there's been a
change in their line or if this chip is special and decide what's
best. If you think a quirk is relevant, don't hesitate to submit that
(and yes, the Macronix NAND flash driver gives you an example of how to
do that).

Thanks,
Miquèl

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Christian Eggers <ceggers@arri.de>
Cc: Richard Weinberger <richard@nod.at>,
	 <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>
Subject: Re: mtd: rawnand: Inconsistent parameter page on Foresee FSNS8A002G ?
Date: Sun, 24 Aug 2025 18:37:06 +0200	[thread overview]
Message-ID: <87tt1whe19.fsf@bootlin.com> (raw)
In-Reply-To: <3542795.LZWGnKmheA@n9w6sw14> (Christian Eggers's message of "Mon, 18 Aug 2025 19:02:49 +0200")

Hi Christian,

On 18/08/2025 at 19:02:49 +02, Christian Eggers <ceggers@arri.de> wrote:

> I try to use a Foresee FSNS8A002G SLC flash chip on an i.MX6 GPMI controller:
>
> https://www.lcsc.com/datasheet/C5126835.pdf
>
> The kernel output looks promising, but one line looks suspicious:
>
> ...
> nand: device found, Manufacturer ID: 0xcd, Chip ID: 0xda
> nand: Foresee FSNS8A002G
> nand: 256 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
> nand: SDR timing mode 4 not acknowledged by the NAND chip
> ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
> Bad block table found at page 131008, version 0x01
> Bad block table found at page 130944, version 0x01
> 3 fixed-partitions partitions found on MTD device gpmi-nand
> ...
>
> According to the documentation of "Read Parameter Page", byte 129-130, 
> SDR modes 0 to 5 should be supported (page 19 on the data sheet).
> But the documentation of the GET_FEATURE/SET_FEATURE operation misses
> the "Timing mode" register (data sheet, page 24).
>
> I saw that there is a quirk for some Macronix chips which also seem
> not to support getting/setting the timing mode (but declaring them
> in the parameter page).

Unfortunately, it happens that sometimes flash vendor mess up parameter
pages, so either the flash supports mode 5 and it is lying to you (you
can test it and add a quirk) or the flash does not because this batch
could not stand a faster rate (?).

> My main question is whether this is "normal variation within the flash
> market" or a serious issue. In contrast to another device I currently
> use, the Foresee chip also doesn't support "cached" operations. Is there
> much value writing a fix for Timing Mode issue, or should I better
> use another flash device?

I cannot tell for sure, I hope it is rare enough but we've already seen
variations between identical devices with the same ID... So it is up to
you to talk to your NAND vendor in order to know whether there's been a
change in their line or if this chip is special and decide what's
best. If you think a quirk is relevant, don't hesitate to submit that
(and yes, the Macronix NAND flash driver gives you an example of how to
do that).

Thanks,
Miquèl

  reply	other threads:[~2025-08-24 16:37 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-18 17:02 mtd: rawnand: Inconsistent parameter page on Foresee FSNS8A002G ? Christian Eggers
2025-08-18 17:02 ` Christian Eggers
2025-08-24 16:37 ` Miquel Raynal [this message]
2025-08-24 16:37   ` Miquel Raynal
2025-08-28  5:24   ` Christian Eggers
2025-08-28  5:24     ` Christian Eggers
2025-08-28  9:55     ` Miquel Raynal
2025-08-28  9:55       ` Miquel Raynal

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