Re: [PATCH v2 20/27] spi: spi-mem: Estimate the time taken by operations

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From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>
Cc: "Sanjay R Mehta" <sanju.mehta@amd.com>,
	"Serge Semin" <fancer.lancer@gmail.com>,
	"Han Xu" <han.xu@nxp.com>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Daire McNamara" <daire.mcnamara@microchip.com>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Haibo Chen" <haibo.chen@nxp.com>,
	"Yogesh Gaur" <yogeshgaur.83@gmail.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Michal Simek" <michal.simek@amd.com>,
	"Richard Weinberger" <richard@nod.at>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	"Jacky Huang" <ychuang3@nuvoton.com>,
	"Shan-Chun Hung" <schung@nuvoton.com>,
	"Chin-Ting Kuo" <chin-ting_kuo@aspeedtech.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Joel Stanley" <joel@jms.id.au>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Avi Fishman" <avifishman70@gmail.com>,
	"Tomer Maimon" <tmaimon77@gmail.com>,
	"Tali Perry" <tali.perry1@gmail.com>,
	"Patrick Venture" <venture@google.com>,
	"Nancy Yuen" <yuenn@google.com>,
	"Benjamin Fair" <benjaminfair@google.com>,
	"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
	"Alexandre Torgue" <alexandre.torgue@foss.st.com>,
	"Raju Rangoju" <Raju.Rangoju@amd.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Steam Lin" <stlin2@winbond.com>,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
	imx@lists.linux.dev, linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, linux-aspeed@lists.ozlabs.org,
	openbmc@lists.ozlabs.org,
	linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH v2 20/27] spi: spi-mem: Estimate the time taken by operations
Date: Fri, 10 Jan 2025 15:37:52 +0100	[thread overview]
Message-ID: <87tta6ag5b.fsf@bootlin.com> (raw)
In-Reply-To: <ca317e2c-cd09-4884-b9eb-9cf23ae88078@sirena.org.uk> (Mark Brown's message of "Fri, 10 Jan 2025 12:42:47 +0000")

Hi Mark,

On 10/01/2025 at 12:42:47 GMT, Mark Brown <broonie@kernel.org> wrote:

> On Tue, Dec 24, 2024 at 06:06:05PM +0100, Miquel Raynal wrote:
>> In the SPI-NAND layer, we currently make list of operation variants from
>> the fastest one to the slowest and there is a bit of logic in the core
>> to go over them and pick the first one that is supported by the
>> controller, ie. the fastest one among the supported ops.
>
> This breaks the build:
>
> /build/stage/linux/drivers/spi/spi-mem.c:580:5: error: conflicting types for ‘spi_mem_calc_op_duration’; have ‘u64(struct spi_mem_op *)’ {aka ‘long long unsigned int(struct spi_mem_op *)’}
>   580 | u64 spi_mem_calc_op_duration(struct spi_mem_op *op)

Crap, that's a fixup that landed in the wrong commit (mtd: spinand:
Enhance the logic when picking a variant). I'll fix it.

Thanks,
Miquèl

WARNING: multiple messages have this Message-ID (diff)

From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>
Cc: "Sanjay R Mehta" <sanju.mehta@amd.com>,
	"Serge Semin" <fancer.lancer@gmail.com>,
	"Han Xu" <han.xu@nxp.com>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Daire McNamara" <daire.mcnamara@microchip.com>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Haibo Chen" <haibo.chen@nxp.com>,
	"Yogesh Gaur" <yogeshgaur.83@gmail.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Michal Simek" <michal.simek@amd.com>,
	"Richard Weinberger" <richard@nod.at>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	"Jacky Huang" <ychuang3@nuvoton.com>,
	"Shan-Chun Hung" <schung@nuvoton.com>,
	"Chin-Ting Kuo" <chin-ting_kuo@aspeedtech.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Joel Stanley" <joel@jms.id.au>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Avi Fishman" <avifishman70@gmail.com>,
	"Tomer Maimon" <tmaimon77@gmail.com>,
	"Tali Perry" <tali.perry1@gmail.com>,
	"Patrick Venture" <venture@google.com>,
	"Nancy Yuen" <yuenn@google.com>,
	"Benjamin Fair" <benjaminfair@google.com>,
	"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
	"Alexandre Torgue" <alexandre.torgue@foss.st.com>,
	"Raju Rangoju" <Raju.Rangoju@amd.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Steam Lin" <stlin2@winbond.com>,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
	imx@lists.linux.dev, linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, linux-aspeed@lists.ozlabs.org,
	openbmc@lists.ozlabs.org,
	linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH v2 20/27] spi: spi-mem: Estimate the time taken by operations
Date: Fri, 10 Jan 2025 15:37:52 +0100	[thread overview]
Message-ID: <87tta6ag5b.fsf@bootlin.com> (raw)
In-Reply-To: <ca317e2c-cd09-4884-b9eb-9cf23ae88078@sirena.org.uk> (Mark Brown's message of "Fri, 10 Jan 2025 12:42:47 +0000")

Hi Mark,

On 10/01/2025 at 12:42:47 GMT, Mark Brown <broonie@kernel.org> wrote:

> On Tue, Dec 24, 2024 at 06:06:05PM +0100, Miquel Raynal wrote:
>> In the SPI-NAND layer, we currently make list of operation variants from
>> the fastest one to the slowest and there is a bit of logic in the core
>> to go over them and pick the first one that is supported by the
>> controller, ie. the fastest one among the supported ops.
>
> This breaks the build:
>
> /build/stage/linux/drivers/spi/spi-mem.c:580:5: error: conflicting types for ‘spi_mem_calc_op_duration’; have ‘u64(struct spi_mem_op *)’ {aka ‘long long unsigned int(struct spi_mem_op *)’}
>   580 | u64 spi_mem_calc_op_duration(struct spi_mem_op *op)

Crap, that's a fixup that landed in the wrong commit (mtd: spinand:
Enhance the logic when picking a variant). I'll fix it.

Thanks,
Miquèl

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)

From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>
Cc: "Sanjay R Mehta" <sanju.mehta@amd.com>,
	"Serge Semin" <fancer.lancer@gmail.com>,
	"Han Xu" <han.xu@nxp.com>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Daire McNamara" <daire.mcnamara@microchip.com>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Haibo Chen" <haibo.chen@nxp.com>,
	"Yogesh Gaur" <yogeshgaur.83@gmail.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Michal Simek" <michal.simek@amd.com>,
	"Richard Weinberger" <richard@nod.at>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	"Jacky Huang" <ychuang3@nuvoton.com>,
	"Shan-Chun Hung" <schung@nuvoton.com>,
	"Chin-Ting Kuo" <chin-ting_kuo@aspeedtech.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Joel Stanley" <joel@jms.id.au>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Avi Fishman" <avifishman70@gmail.com>,
	"Tomer Maimon" <tmaimon77@gmail.com>,
	"Tali Perry" <tali.perry1@gmail.com>,
	"Patrick Venture" <venture@google.com>,
	"Nancy Yuen" <yuenn@google.com>,
	"Benjamin Fair" <benjaminfair@google.com>,
	"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
	"Alexandre Torgue" <alexandre.torgue@foss.st.com>,
	"Raju Rangoju" <Raju.Rangoju@amd.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Steam Lin" <stlin2@winbond.com>,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
	imx@lists.linux.dev, linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, linux-aspeed@lists.ozlabs.org,
	openbmc@lists.ozlabs.org,
	linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH v2 20/27] spi: spi-mem: Estimate the time taken by operations
Date: Fri, 10 Jan 2025 15:37:52 +0100	[thread overview]
Message-ID: <87tta6ag5b.fsf@bootlin.com> (raw)
In-Reply-To: <ca317e2c-cd09-4884-b9eb-9cf23ae88078@sirena.org.uk> (Mark Brown's message of "Fri, 10 Jan 2025 12:42:47 +0000")

Hi Mark,

On 10/01/2025 at 12:42:47 GMT, Mark Brown <broonie@kernel.org> wrote:

> On Tue, Dec 24, 2024 at 06:06:05PM +0100, Miquel Raynal wrote:
>> In the SPI-NAND layer, we currently make list of operation variants from
>> the fastest one to the slowest and there is a bit of logic in the core
>> to go over them and pick the first one that is supported by the
>> controller, ie. the fastest one among the supported ops.
>
> This breaks the build:
>
> /build/stage/linux/drivers/spi/spi-mem.c:580:5: error: conflicting types for ‘spi_mem_calc_op_duration’; have ‘u64(struct spi_mem_op *)’ {aka ‘long long unsigned int(struct spi_mem_op *)’}
>   580 | u64 spi_mem_calc_op_duration(struct spi_mem_op *op)

Crap, that's a fixup that landed in the wrong commit (mtd: spinand:
Enhance the logic when picking a variant). I'll fix it.

Thanks,
Miquèl

_______________________________________________
Linux-rockchip mailing list
Linux-rockchip@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-rockchip

WARNING: multiple messages have this Message-ID (diff)

From: Miquel Raynal <miquel.raynal@bootlin.com>
To: Mark Brown <broonie@kernel.org>
Cc: "Sanjay R Mehta" <sanju.mehta@amd.com>,
	"Serge Semin" <fancer.lancer@gmail.com>,
	"Han Xu" <han.xu@nxp.com>,
	"Conor Dooley" <conor.dooley@microchip.com>,
	"Daire McNamara" <daire.mcnamara@microchip.com>,
	"Matthias Brugger" <matthias.bgg@gmail.com>,
	"AngeloGioacchino Del Regno"
	<angelogioacchino.delregno@collabora.com>,
	"Haibo Chen" <haibo.chen@nxp.com>,
	"Yogesh Gaur" <yogeshgaur.83@gmail.com>,
	"Heiko Stuebner" <heiko@sntech.de>,
	"Michal Simek" <michal.simek@amd.com>,
	"Richard Weinberger" <richard@nod.at>,
	"Vignesh Raghavendra" <vigneshr@ti.com>,
	"Jacky Huang" <ychuang3@nuvoton.com>,
	"Shan-Chun Hung" <schung@nuvoton.com>,
	"Chin-Ting Kuo" <chin-ting_kuo@aspeedtech.com>,
	"Cédric Le Goater" <clg@kaod.org>,
	"Joel Stanley" <joel@jms.id.au>,
	"Andrew Jeffery" <andrew@codeconstruct.com.au>,
	"Avi Fishman" <avifishman70@gmail.com>,
	"Tomer Maimon" <tmaimon77@gmail.com>,
	"Tali Perry" <tali.perry1@gmail.com>,
	"Patrick Venture" <venture@google.com>,
	"Nancy Yuen" <yuenn@google.com>,
	"Benjamin Fair" <benjaminfair@google.com>,
	"Maxime Coquelin" <mcoquelin.stm32@gmail.com>,
	"Alexandre Torgue" <alexandre.torgue@foss.st.com>,
	"Raju Rangoju" <Raju.Rangoju@amd.com>,
	"Thomas Petazzoni" <thomas.petazzoni@bootlin.com>,
	"Steam Lin" <stlin2@winbond.com>,
	linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
	imx@lists.linux.dev, linux-riscv@lists.infradead.org,
	linux-arm-kernel@lists.infradead.org,
	linux-mediatek@lists.infradead.org,
	linux-rockchip@lists.infradead.org,
	linux-mtd@lists.infradead.org, linux-aspeed@lists.ozlabs.org,
	openbmc@lists.ozlabs.org,
	linux-stm32@st-md-mailman.stormreply.com
Subject: Re: [PATCH v2 20/27] spi: spi-mem: Estimate the time taken by operations
Date: Fri, 10 Jan 2025 15:37:52 +0100	[thread overview]
Message-ID: <87tta6ag5b.fsf@bootlin.com> (raw)
In-Reply-To: <ca317e2c-cd09-4884-b9eb-9cf23ae88078@sirena.org.uk> (Mark Brown's message of "Fri, 10 Jan 2025 12:42:47 +0000")

Hi Mark,

On 10/01/2025 at 12:42:47 GMT, Mark Brown <broonie@kernel.org> wrote:

> On Tue, Dec 24, 2024 at 06:06:05PM +0100, Miquel Raynal wrote:
>> In the SPI-NAND layer, we currently make list of operation variants from
>> the fastest one to the slowest and there is a bit of logic in the core
>> to go over them and pick the first one that is supported by the
>> controller, ie. the fastest one among the supported ops.
>
> This breaks the build:
>
> /build/stage/linux/drivers/spi/spi-mem.c:580:5: error: conflicting types for ‘spi_mem_calc_op_duration’; have ‘u64(struct spi_mem_op *)’ {aka ‘long long unsigned int(struct spi_mem_op *)’}
>   580 | u64 spi_mem_calc_op_duration(struct spi_mem_op *op)

Crap, that's a fixup that landed in the wrong commit (mtd: spinand:
Enhance the logic when picking a variant). I'll fix it.

Thanks,
Miquèl

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

next prev parent reply	other threads:[~2025-01-10 14:38 UTC|newest]

Thread overview: 132+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-24 17:05 [PATCH v2 00/27] spi-nand/spi-mem DTR support Miquel Raynal
2024-12-24 17:05 ` Miquel Raynal
2024-12-24 17:05 ` Miquel Raynal
2024-12-24 17:05 ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 01/27] spi: spi-mem: Extend spi-mem operations with a per-operation maximum frequency Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 02/27] spi: spi-mem: Add a new controller capability Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 03/27] spi: amd: Support per spi-mem operation frequency switches Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 04/27] spi: amd: Drop redundant check Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 05/27] spi: amlogic-spifc-a1: Support per spi-mem operation frequency switches Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 06/27] spi: cadence-qspi: " Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 07/27] spi: dw: " Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 08/27] spi: fsl-qspi: " Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 09/27] spi: microchip-core-qspi: " Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 10/27] spi: mt65xx: " Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 11/27] spi: mxic: " Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 12/27] spi: nxp-fspi: " Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 13/27] spi: rockchip-sfc: " Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05 ` [PATCH v2 14/27] spi: spi-sn-f-ospi: " Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:05   ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 15/27] spi: spi-ti-qspi: " Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 16/27] spi: zynq-qspi: " Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 17/27] spi: zynqmp-gqspi: " Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 18/27] spi: spi-mem: Reorder spi-mem macro assignments Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 19/27] spi: spi-mem: Create macros for DTR operation Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 20/27] spi: spi-mem: Estimate the time taken by operations Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2025-01-10 12:42   ` Mark Brown
2025-01-10 12:42     ` Mark Brown
2025-01-10 12:42     ` Mark Brown
2025-01-10 12:42     ` Mark Brown
2025-01-10 14:37     ` Miquel Raynal [this message]
2025-01-10 14:37       ` Miquel Raynal
2025-01-10 14:37       ` Miquel Raynal
2025-01-10 14:37       ` Miquel Raynal
2025-01-10 14:52       ` Mark Brown
2025-01-10 14:52         ` Mark Brown
2025-01-10 14:52         ` Mark Brown
2025-01-10 14:52         ` Mark Brown
2025-01-10 15:06         ` Miquel Raynal
2025-01-10 15:06           ` Miquel Raynal
2025-01-10 15:06           ` Miquel Raynal
2025-01-10 15:06           ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 21/27] mtd: spinand: Create distinct fast and slow read from cache variants Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 22/27] mtd: spinand: Add an optional frequency to read from cache macros Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 23/27] mtd: spinand: Enhance the logic when picking a variant Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 24/27] mtd: spinand: Add support for read DTR operations Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 25/27] mtd: spinand: winbond: Update the *JW chip definitions Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 26/27] mtd: spinand: winbond: Add comment about naming Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06 ` [PATCH v2 27/27] mtd: spinand: winbond: Add support for DTR operations Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2024-12-24 17:06   ` Miquel Raynal
2025-01-10 15:47 ` (subset) [PATCH v2 00/27] spi-nand/spi-mem DTR support Mark Brown
2025-01-10 15:47   ` Mark Brown
2025-01-10 15:47   ` Mark Brown
2025-01-10 15:47   ` Mark Brown

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