From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>,
intel-gfx@lists.freedesktop.org
Cc: airlied@linux.ie, Daniel Vetter <daniel.vetter@ffwll.ch>,
dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v4 00/16] Add support for DP-HDMI2.1 PCON
Date: Tue, 08 Dec 2020 12:33:20 +0200 [thread overview]
Message-ID: <87tuswa8pb.fsf@intel.com> (raw)
In-Reply-To: <20201208075145.17389-1-ankit.k.nautiyal@intel.com>
On Tue, 08 Dec 2020, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> This patch series attempts to add support for a DP-HDMI2.1 Protocol
> Convertor. The VESA spec for the HDMI2.1 PCON are proposed in Errata
> E5 to DisplayPort_v2.0:
> https://vesa.org/join-vesamemberships/member-downloads/?action=stamp&fileid=42299
> The details are mentioned in:
> VESA DP-to-HDMI PCON Specification Standalone Document
> https://groups.vesa.org/wg/DP/document/15651
>
> This series starts with adding support for FRL (Fixed Rate Link)
> Training between the PCON and HDMI2.1 sink.
> As per HDMI2.1 specification, a new data-channel or lane is added in
> FRL mode, by repurposing the TMDS clock Channel. Through FRL, higher
> bit-rate can be supported, ie. up to 12 Gbps/lane (48 Gbps over 4
> lanes).
>
> With these patches, the HDMI2.1 PCON can be configured to achieve FRL
> training based on the maximum FRL rate supported by the panel, source
> and the PCON.
> The approach is to add the support for FRL training between PCON and
> HDMI2.1 sink and gradually add other blocks for supporting higher
> resolutions and other HDMI2.1 features, that can be supported by pcon
> for the sources that do not natively support HDMI2.1.
>
> This is done before the DP Link training between the source and PCON
> is started. In case of FRL training is not achieved, the PCON will
> work in the regular TMDS mode, without HDMI2.1 feature support.
> Any interruption in FRL training between the PCON and HDMI2.1 sink is
> notified through IRQ_HPD. On receiving the IRQ_HPD the concerned DPCD
> registers are read and FRL training is re-attempted.
>
> Currently, we have tested the FRL training and are able to enable 4K
> display with TGL Platform + Realtek PCON RTD2173 with HDMI2.1 supporting
> panel.
Per IRC chat with Maarten and Daniel, once all the reviews are in, I'll
add a topic branch and apply the patches there, so we can merge the
branch to both drm-misc-next and drm-intel-next.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@linux.intel.com>
To: Ankit Nautiyal <ankit.k.nautiyal@intel.com>,
intel-gfx@lists.freedesktop.org
Cc: airlied@linux.ie, Daniel Vetter <daniel.vetter@ffwll.ch>,
dri-devel@lists.freedesktop.org, vandita.kulkarni@intel.com,
uma.shankar@intel.com, swati2.sharma@intel.com
Subject: Re: [PATCH v4 00/16] Add support for DP-HDMI2.1 PCON
Date: Tue, 08 Dec 2020 12:33:20 +0200 [thread overview]
Message-ID: <87tuswa8pb.fsf@intel.com> (raw)
In-Reply-To: <20201208075145.17389-1-ankit.k.nautiyal@intel.com>
On Tue, 08 Dec 2020, Ankit Nautiyal <ankit.k.nautiyal@intel.com> wrote:
> This patch series attempts to add support for a DP-HDMI2.1 Protocol
> Convertor. The VESA spec for the HDMI2.1 PCON are proposed in Errata
> E5 to DisplayPort_v2.0:
> https://vesa.org/join-vesamemberships/member-downloads/?action=stamp&fileid=42299
> The details are mentioned in:
> VESA DP-to-HDMI PCON Specification Standalone Document
> https://groups.vesa.org/wg/DP/document/15651
>
> This series starts with adding support for FRL (Fixed Rate Link)
> Training between the PCON and HDMI2.1 sink.
> As per HDMI2.1 specification, a new data-channel or lane is added in
> FRL mode, by repurposing the TMDS clock Channel. Through FRL, higher
> bit-rate can be supported, ie. up to 12 Gbps/lane (48 Gbps over 4
> lanes).
>
> With these patches, the HDMI2.1 PCON can be configured to achieve FRL
> training based on the maximum FRL rate supported by the panel, source
> and the PCON.
> The approach is to add the support for FRL training between PCON and
> HDMI2.1 sink and gradually add other blocks for supporting higher
> resolutions and other HDMI2.1 features, that can be supported by pcon
> for the sources that do not natively support HDMI2.1.
>
> This is done before the DP Link training between the source and PCON
> is started. In case of FRL training is not achieved, the PCON will
> work in the regular TMDS mode, without HDMI2.1 feature support.
> Any interruption in FRL training between the PCON and HDMI2.1 sink is
> notified through IRQ_HPD. On receiving the IRQ_HPD the concerned DPCD
> registers are read and FRL training is re-attempted.
>
> Currently, we have tested the FRL training and are able to enable 4K
> display with TGL Platform + Realtek PCON RTD2173 with HDMI2.1 supporting
> panel.
Per IRC chat with Maarten and Daniel, once all the reviews are in, I'll
add a topic branch and apply the patches there, so we can merge the
branch to both drm-misc-next and drm-intel-next.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
next prev parent reply other threads:[~2020-12-08 10:33 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-12-08 7:51 [Intel-gfx] [PATCH v4 00/16] Add support for DP-HDMI2.1 PCON Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 01/16] drm/edid: Add additional HFVSDB fields for HDMI2.1 Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 02/16] drm/edid: Parse MAX_FRL field from HFVSDB block Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 03/16] drm/edid: Parse DSC1.2 cap fields " Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 04/16] drm/dp_helper: Add Helpers for FRL Link Training support for DP-HDMI2.1 PCON Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 05/16] drm/dp_helper: Add support for link failure detection Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 06/16] drm/dp_helper: Add support for Configuring DSC for HDMI2.1 Pcon Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 07/16] drm/dp_helper: Add helpers to configure PCONs RGB-YCbCr Conversion Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-09 17:50 ` [Intel-gfx] " Dan Carpenter
2020-12-09 17:50 ` Dan Carpenter
2020-12-09 17:50 ` Dan Carpenter
2020-12-09 17:50 ` Dan Carpenter
2020-12-10 12:20 ` [Intel-gfx] " Nautiyal, Ankit K
2020-12-10 12:20 ` Nautiyal, Ankit K
2020-12-10 12:20 ` Nautiyal, Ankit K
2020-12-13 7:10 ` [Intel-gfx] " Shankar, Uma
2020-12-13 7:10 ` Shankar, Uma
2020-12-14 13:17 ` [Intel-gfx] " Nautiyal, Ankit K
2020-12-14 13:17 ` Nautiyal, Ankit K
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 08/16] drm/i915: Capture max frl rate for PCON in dfp cap structure Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 09/16] drm/i915: Add support for starting FRL training for HDMI2.1 via PCON Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 10/16] drm/i915: Check for FRL training before DP Link training Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 11/16] drm/i915: Add support for enabling link status and recovery Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 12/16] drm/i915: Read DSC capabilities of the HDMI2.1 PCON encoder Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 13/16] drm/i915: Add helper functions for calculating DSC parameters for HDMI2.1 Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-13 7:13 ` [Intel-gfx] " Shankar, Uma
2020-12-13 7:13 ` Shankar, Uma
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 14/16] drm/i915/display: Configure PCON for DSC1.1 to DSC1.2 encoding Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-13 7:16 ` [Intel-gfx] " Shankar, Uma
2020-12-13 7:16 ` Shankar, Uma
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 15/16] drm/i915: Let PCON convert from RGB to YUV if it can Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-13 7:23 ` [Intel-gfx] " Shankar, Uma
2020-12-13 7:23 ` Shankar, Uma
2020-12-14 13:27 ` [Intel-gfx] " Nautiyal, Ankit K
2020-12-14 13:27 ` Nautiyal, Ankit K
2020-12-08 7:51 ` [Intel-gfx] [PATCH v4 16/16] drm/i915: Enable PCON configuration for Color Conversion for TGL Ankit Nautiyal
2020-12-08 7:51 ` Ankit Nautiyal
2020-12-13 7:29 ` [Intel-gfx] " Shankar, Uma
2020-12-13 7:29 ` Shankar, Uma
2020-12-14 13:51 ` [Intel-gfx] " Nautiyal, Ankit K
2020-12-14 13:51 ` Nautiyal, Ankit K
2020-12-08 8:18 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add support for DP-HDMI2.1 PCON (rev6) Patchwork
2020-12-08 8:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-12-08 8:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-12-08 9:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2020-12-08 10:33 ` Jani Nikula [this message]
2020-12-08 10:33 ` [PATCH v4 00/16] Add support for DP-HDMI2.1 PCON Jani Nikula
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