From: Mika Kuoppala <mika.kuoppala@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [CI 1/3] drm/i915/gt: Skip rmw for masked registers
Date: Fri, 31 Jan 2020 15:14:38 +0200 [thread overview]
Message-ID: <87tv4b939d.fsf@gaia.fi.intel.com> (raw)
In-Reply-To: <158047170013.2430.15418748422936870751@skylake-alporthouse-com>
Chris Wilson <chris@chris-wilson.co.uk> writes:
> Quoting Mika Kuoppala (2020-01-31 11:51:44)
>> Chris Wilson <chris@chris-wilson.co.uk> writes:
>>
>> > A masked register does not need rmw to update, and it is best not to use
>> > such a sequence.
>> >
>> > Reported-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
>> > Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
>> > Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> > ---
>> > drivers/gpu/drm/i915/gt/intel_workarounds.c | 32 ++++++++++++++-------
>> > 1 file changed, 21 insertions(+), 11 deletions(-)
>> >
>> > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> > index 5a7db279f702..e4c2b6d42f46 100644
>> > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> > @@ -116,7 +116,8 @@ static void _wa_add(struct i915_wa_list *wal, const struct i915_wa *wa)
>> > } else {
>> > wa_ = &wal->list[mid];
>> >
>> > - if ((wa->mask & ~wa_->mask) == 0) {
>> > + if ((wa->mask | wa_->mask) &&
>>
>> Don't we want to discard if someone tries to demote a masked
>> one into a plain?
>
> That should throw the error, right?
>
> If either used a mask and now we don't, then 0 & x == 0 => DRM_ERROR.
Yes, it will throw the error. My mistake.
But if we have a mask, we should not allow nonmasked additions
aswell? So mask == 0 would always be masked register and you
can't mix.
-Mika
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next prev parent reply other threads:[~2020-01-31 13:15 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-01-31 7:57 [Intel-gfx] [CI 1/3] drm/i915/gt: Skip rmw for masked registers Chris Wilson
2020-01-31 7:57 ` [Intel-gfx] [CI 2/3] drm/i915: extract engine WA programming to common resume function Chris Wilson
2020-01-31 7:57 ` [Intel-gfx] [CI 3/3] drm/i915: Move ringbuffer WAs to engine workaround list Chris Wilson
2020-01-31 9:13 ` [Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [CI,1/3] drm/i915/gt: Skip rmw for masked registers Patchwork
2020-01-31 11:56 ` Chris Wilson
2020-01-31 11:51 ` [Intel-gfx] [CI 1/3] " Mika Kuoppala
2020-01-31 11:55 ` Chris Wilson
2020-01-31 13:14 ` Mika Kuoppala [this message]
2020-01-31 13:18 ` Chris Wilson
2020-01-31 23:15 ` [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/3] drm/i915/gt: Skip rmw for masked registers (rev2) Patchwork
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