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From: Jani Nikula <jani.nikula@linux.intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>,
	Dave Airlie <airlied@gmail.com>,
	dri-devel@lists.freedesktop.org
Subject: Re: [PATCH] drm: micro optimise cache flushing
Date: Thu, 20 Sep 2012 13:02:03 +0300	[thread overview]
Message-ID: <87txut6mhw.fsf@intel.com> (raw)
In-Reply-To: <275ffc$6li573@fmsmga002.fm.intel.com>

On Wed, 19 Sep 2012, Chris Wilson <chris@chris-wilson.co.uk> wrote:
> On Wed, 19 Sep 2012 11:12:41 +1000, Dave Airlie <airlied@gmail.com> wrote:
>> From: Dave Airlie <airlied@redhat.com>
>> 
>> We hit this a lot with i915 and although we'd like to engineer things to hit
>> it a lot less, this commit at least makes it consume a few less cycles.
>> 
>> from something containing
>> movzwl 0x0(%rip),%r10d
>> to
>> add    %r8,%rdx
>> 
>> I only noticed it while using perf to profile something else.
>> 
>> Signed-off-by: Dave Airlie <airlied@redhat.com>
> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
>
> I would have thought this is something the compiler should, with the
> appropriate hints, be smart enough to decide for itself as boot_cpu_data
> should be constant once defined. *shrug*

Since it's not obvious the compiler isn't smart enough, should the code
carry a comment so we don't forget?

BR,
Jani.

      reply	other threads:[~2012-09-20  9:57 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2012-09-19  1:12 [PATCH] drm: micro optimise cache flushing Dave Airlie
2012-09-19  7:50 ` Chris Wilson
2012-09-20 10:02   ` Jani Nikula [this message]

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